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    /openrisc/trunk/rtos/ecos-2.0/packages/devs/serial/powerpc/quicc
    from Rev 27 to Rev 174
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Rev 27 → Rev 174

/v2_0/cdl/ser_quicc_smc.cdl
0,0 → 1,291
# ====================================================================
#
# ser_quicc_smc.cdl
#
# eCos serial PowerPC/QUICC SMC configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
## Copyright (C) 2002 Gary Thomas
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): jskov
# Original data: gthomas
# Contributors:
# Date: 1999-07-14
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
 
cdl_package CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC {
display "PowerPC QUICC/SMC serial device drivers"
 
parent CYGPKG_IO_SERIAL_DEVICES
active_if CYGPKG_IO_SERIAL
active_if CYGPKG_HAL_QUICC
 
requires CYGPKG_ERROR
include_dir cyg/io
include_files ; # none _exported_ whatsoever
description "
This option enables the serial device drivers for the
PowerPC QUICC/SMC."
 
compile -library=libextras.a quicc_smc_serial.c
 
define_proc {
puts $::cdl_system_header "/***** serial driver proc output start *****/"
puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_DEVICE_HEADER <pkgconf/io_serial_powerpc_quicc_smc.h>"
puts $::cdl_system_header "/***** serial driver proc output end *****/"
}
 
cdl_component CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC1 {
display "PowerPC QUICC/SMC serial port 1 driver"
flavor bool
requires CYGNUM_HAL_QUICC_SMC1
default_value 1
description "
This option includes the serial device driver for the PowerPC
QUICC/SMC port 1."
 
cdl_option CYGDAT_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_NAME {
display "Device name for PowerPC QUICC/SMC serial port 1"
flavor data
default_value {"\"/dev/ser1\""}
description "
This option specifies the device name for the PowerPC
QUICC/SMC port 1."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BAUD {
display "Baud rate for the PowerPC QUICC/SMC serial port 1"
flavor data
legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 3600
4800 7200 9600 14400 19200 38400 57600 115200 230400
}
default_value 38400
description "
This option specifies the default baud rate (speed) for the
PowerPC QUICC/SMC port 1."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BUFSIZE {
display "Buffer size for the PowerPC QUICC/SMC serial port 1"
flavor data
legal_values 0 to 8192
default_value 256
description "
This option specifies the size of the internal buffers used
for the PowerPC QUICC/SMC port 1."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BRG {
display "Which baud rate generator to use for the PowerPC QUICC/SMC serial port 1"
flavor data
legal_values 1 to 4
default_value 1
description "
This option specifies which of the four baud rate generators
to use for the PowerPC QUICC/SMC port 1."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxSIZE {
display "Output buffer size for the PowerPC QUICC/SMC serial port 1"
flavor data
legal_values 16 to 128
default_value 16
description "
This option specifies the maximum number of characters per
transmit request to be used for the PowerPC QUICC/SMC port 1."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxNUM {
display "Number of output buffers for the PowerPC QUICC/SMC serial port 1"
flavor data
legal_values 2 to 16
default_value 4
description "
This option specifies the number of output buffer packets
to be used for the PowerPC QUICC/SMC port 1."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxSIZE {
display "Input buffer size for the PowerPC QUICC/SMC serial port 1"
flavor data
legal_values 16 to 128
default_value 16
description "
This option specifies the maximum number of characters per receive
request to be used for the PowerPC QUICC/SMC port 1."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxNUM {
display "Number of input buffers for the PowerPC QUICC/SMC serial port 1"
flavor data
legal_values 2 to 16
default_value 4
description "
This option specifies the number of input buffer packets
to be used for the PowerPC QUICC/SMC port 1."
}
}
 
cdl_component CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC2 {
display "PowerPC QUICC/SMC serial port 2 driver"
flavor bool
requires CYGNUM_HAL_QUICC_SMC2
default_value 1
description "
This option includes the serial device driver for the PowerPC
QUICC/SMC port 2."
 
cdl_option CYGDAT_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_NAME {
display "Device name for PowerPC QUICC/SMC serial port 2"
flavor data
default_value {"\"/dev/ser2\""}
description "
This option specifies the device name for the PowerPC
QUICC/SMC port 2."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BAUD {
display "Baud rate for the PowerPC QUICC/SMC serial port 2"
flavor data
legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400 3600
4800 7200 9600 14400 19200 38400 57600 115200 230400
}
default_value 38400
description "
This option specifies the default baud rate (speed) for the
PowerPC QUICC/SMC port 2."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BUFSIZE {
display "Buffer size for the PowerPC QUICC/SMC serial port 2"
flavor data
legal_values 0 to 8192
default_value 256
description "
This option specifies the size of the internal buffers used
for the PowerPC QUICC/SMC port 2."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BRG {
display "Which baud rate generator to use for the PowerPC QUICC/SMC serial port 2"
flavor data
legal_values 1 to 4
default_value 2
description "
This option specifies which of the four baud rate generators
to use for the PowerPC QUICC/SMC port 2."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxSIZE {
display "Output buffer size for the PowerPC QUICC/SMC serial port 2"
flavor data
legal_values 16 to 128
default_value 16
description "
This option specifies the maximum number of characters per
transmit request to be used for the PowerPC QUICC/SMC port 2."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxNUM {
display "Number of output buffers for the PowerPC QUICC/SMC serial port 2"
flavor data
legal_values 2 to 16
default_value 4
description "
This option specifies the number of output buffer packets
to be used for the PowerPC QUICC/SMC port 2."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_RxSIZE {
display "Input buffer size for the PowerPC QUICC/SMC serial port 2"
flavor data
legal_values 16 to 128
default_value 16
description "
This option specifies the maximum number of characters per receive
request to be used for the PowerPC QUICC/SMC port 2."
}
 
cdl_option CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_RxNUM {
display "Number of output buffers for the PowerPC QUICC/SMC serial port 2"
flavor data
legal_values 2 to 16
default_value 4
description "
This option specifies the number of input buffer packets
to be used for the PowerPC QUICC/SMC port 2."
}
}
 
cdl_component CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_OPTIONS {
display "Serial device driver build options"
flavor none
description "
Package specific build options including control over
compiler flags used only in building this package,
and details of which tests are built."
 
 
cdl_option CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_CFLAGS_ADD {
display "Additional compiler flags"
flavor data
no_define
default_value { "" }
description "
This option modifies the set of compiler flags for
building these serial device drivers. These flags are used in addition
to the set of global flags."
}
 
cdl_option CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_CFLAGS_REMOVE {
display "Suppressed compiler flags"
flavor data
no_define
default_value { "" }
description "
This option modifies the set of compiler flags for
building these serial device drivers. These flags are removed from
the set of global flags if present."
}
}
}
 
# EOF ser_quicc_smc.cdl
/v2_0/src/quicc_smc_serial.c
0,0 → 1,775
//==========================================================================
//
// io/serial/powerpc/quicc_smc_serial.c
//
// PowerPC QUICC (SMC) Serial I/O Interface Module (interrupt driven)
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
// Copyright (C) 2003 Gary Thomas
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): gthomas
// Contributors: gthomas
// Date: 1999-06-20
// Purpose: QUICC SMC Serial I/O module (interrupt driven version)
// Description:
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/system.h>
#include <pkgconf/io_serial.h>
#include <pkgconf/io.h>
#include <cyg/io/io.h>
#include <cyg/hal/hal_intr.h>
#include <cyg/io/devtab.h>
#include <cyg/io/serial.h>
#include <cyg/infra/diag.h>
#include <cyg/hal/hal_cache.h>
#include <cyg/hal/quicc/ppc8xx.h>
#include CYGBLD_HAL_PLATFORM_H
 
#ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC
 
// macro for aligning buffers to cache lines
#define ALIGN_TO_CACHELINES(b) ((cyg_uint8 *)(((CYG_ADDRESS)(b) + (HAL_DCACHE_LINE_SIZE-1)) & ~(HAL_DCACHE_LINE_SIZE-1)))
 
// Buffer descriptor control bits
#define QUICC_BD_CTL_Ready 0x8000 // Buffer contains data (tx) or is empty (rx)
#define QUICC_BD_CTL_Wrap 0x2000 // Last buffer in list
#define QUICC_BD_CTL_Int 0x1000 // Generate interrupt when empty (tx) or full (rx)
#define QUICC_BD_CTL_MASK 0xB000 // User settable bits
 
// SMC Mode Register
#define QUICC_SMCMR_CLEN(n) ((n+1)<<11) // Character length
#define QUICC_SMCMR_SB(n) ((n-1)<<10) // Stop bits (1 or 2)
#define QUICC_SMCMR_PE(n) (n<<9) // Parity enable (0=disable, 1=enable)
#define QUICC_SMCMR_PM(n) (n<<8) // Parity mode (0=odd, 1=even)
#define QUICC_SMCMR_UART (2<<4) // UART mode
#define QUICC_SMCMR_TEN (1<<1) // Enable transmitter
#define QUICC_SMCMR_REN (1<<0) // Enable receiver
 
// SMC Events (interrupts)
#define QUICC_SMCE_BRK 0x10 // Break received
#define QUICC_SMCE_BSY 0x04 // Busy - receive buffer overrun
#define QUICC_SMCE_TX 0x02 // Tx interrupt
#define QUICC_SMCE_RX 0x01 // Rx interrupt
 
// SMC Commands
#define QUICC_SMC_CMD_InitTxRx (0<<8)
#define QUICC_SMC_CMD_InitTx (1<<8)
#define QUICC_SMC_CMD_InitRx (2<<8)
#define QUICC_SMC_CMD_StopTx (4<<8)
#define QUICC_SMC_CMD_RestartTx (6<<8)
#define QUICC_SMC_CMD_Reset 0x8000
#define QUICC_SMC_CMD_Go 0x0001
 
#include "quicc_smc_serial.h"
 
typedef struct quicc_smc_serial_info {
CYG_ADDRWORD channel; // Which channel SMC1/SMC2
CYG_WORD int_num; // Interrupt number
cyg_uint32 *brg; // Which baud rate generator
volatile struct smc_uart_pram *pram; // Parameter RAM pointer
volatile struct smc_regs *ctl; // SMC control registers
volatile struct cp_bufdesc *txbd, *rxbd; // Next Tx,Rx descriptor to use
struct cp_bufdesc *tbase, *rbase; // First Tx,Rx descriptor
int txsize, rxsize; // Length of individual buffers
cyg_interrupt serial_interrupt;
cyg_handle_t serial_interrupt_handle;
} quicc_smc_serial_info;
 
static bool quicc_smc_serial_init(struct cyg_devtab_entry *tab);
static bool quicc_smc_serial_putc(serial_channel *chan, unsigned char c);
static Cyg_ErrNo quicc_smc_serial_lookup(struct cyg_devtab_entry **tab,
struct cyg_devtab_entry *sub_tab,
const char *name);
static unsigned char quicc_smc_serial_getc(serial_channel *chan);
static Cyg_ErrNo quicc_smc_serial_set_config(serial_channel *chan,
cyg_uint32 key, const void *xbuf,
cyg_uint32 *len);
static void quicc_smc_serial_start_xmit(serial_channel *chan);
static void quicc_smc_serial_stop_xmit(serial_channel *chan);
 
static cyg_uint32 quicc_smc_serial_ISR(cyg_vector_t vector, cyg_addrword_t data);
static void quicc_smc_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
 
static SERIAL_FUNS(quicc_smc_serial_funs,
quicc_smc_serial_putc,
quicc_smc_serial_getc,
quicc_smc_serial_set_config,
quicc_smc_serial_start_xmit,
quicc_smc_serial_stop_xmit
);
 
#ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC1
static quicc_smc_serial_info quicc_smc_serial_info1 = {
0x90, // Channel indicator
CYGNUM_HAL_INTERRUPT_CPM_SMC1 // interrupt
};
#if CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BUFSIZE > 0
static unsigned char quicc_smc_serial_out_buf1[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BUFSIZE];
static unsigned char quicc_smc_serial_in_buf1[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BUFSIZE];
 
static SERIAL_CHANNEL_USING_INTERRUPTS(quicc_smc_serial_channel1,
quicc_smc_serial_funs,
quicc_smc_serial_info1,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT,
&quicc_smc_serial_out_buf1[0], sizeof(quicc_smc_serial_out_buf1),
&quicc_smc_serial_in_buf1[0], sizeof(quicc_smc_serial_in_buf1)
);
#else
static SERIAL_CHANNEL(quicc_smc_serial_channel1,
quicc_smc_serial_funs,
quicc_smc_serial_info1,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT
);
#endif
 
static unsigned char quicc_smc1_txbuf[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxNUM][CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxSIZE + HAL_DCACHE_LINE_SIZE-1];
static unsigned char quicc_smc1_rxbuf[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxNUM][CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxSIZE + HAL_DCACHE_LINE_SIZE-1];
 
DEVTAB_ENTRY(quicc_smc_serial_io1,
CYGDAT_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_NAME,
0, // Does not depend on a lower level interface
&cyg_io_serial_devio,
quicc_smc_serial_init,
quicc_smc_serial_lookup, // Serial driver may need initializing
&quicc_smc_serial_channel1
);
#endif // CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC1
 
#ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC2
static quicc_smc_serial_info quicc_smc_serial_info2 = {
0xD0, // Channel indicator
CYGNUM_HAL_INTERRUPT_CPM_SMC2_PIP // interrupt
};
#if CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BUFSIZE > 0
static unsigned char quicc_smc_serial_out_buf2[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BUFSIZE];
static unsigned char quicc_smc_serial_in_buf2[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BUFSIZE];
 
static SERIAL_CHANNEL_USING_INTERRUPTS(quicc_smc_serial_channel2,
quicc_smc_serial_funs,
quicc_smc_serial_info2,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT,
&quicc_smc_serial_out_buf2[0], sizeof(quicc_smc_serial_out_buf2),
&quicc_smc_serial_in_buf2[0], sizeof(quicc_smc_serial_in_buf2)
);
#else
static SERIAL_CHANNEL(quicc_smc_serial_channel2,
quicc_smc_serial_funs,
quicc_smc_serial_info2,
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BAUD),
CYG_SERIAL_STOP_DEFAULT,
CYG_SERIAL_PARITY_DEFAULT,
CYG_SERIAL_WORD_LENGTH_DEFAULT,
CYG_SERIAL_FLAGS_DEFAULT
);
#endif
static unsigned char quicc_smc2_txbuf[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxNUM][CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxSIZE + HAL_DCACHE_LINE_SIZE-1];
static unsigned char quicc_smc2_rxbuf[CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_RxNUM][CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_RxSIZE + HAL_DCACHE_LINE_SIZE-1];
 
DEVTAB_ENTRY(quicc_smc_serial_io2,
CYGDAT_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_NAME,
0, // Does not depend on a lower level interface
&cyg_io_serial_devio,
quicc_smc_serial_init,
quicc_smc_serial_lookup, // Serial driver may need initializing
&quicc_smc_serial_channel2
);
#endif // CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC2
 
#ifdef CYGDBG_DIAG_BUF
extern int enable_diag_uart;
#endif // CYGDBG_DIAG_BUF
 
// Internal function to actually configure the hardware to desired baud rate, etc.
static bool
quicc_smc_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init)
{
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
unsigned int baud_divisor = select_baud[new_config->baud];
cyg_uint32 _lcr;
EPPC *eppc = eppc_base();
if (baud_divisor == 0) return false;
// Disable channel during setup
smc_chan->ctl->smc_smcmr = QUICC_SMCMR_UART; // Disabled, UART mode
// Disable port interrupts while changing hardware
_lcr = select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] |
select_stop_bits[new_config->stop] |
select_parity[new_config->parity];
// Stop transmitter while changing baud rate
eppc->cp_cr = smc_chan->channel | QUICC_SMC_CMD_Go | QUICC_SMC_CMD_StopTx;
// Set baud rate generator
*smc_chan->brg = 0x10000 | (UART_BITRATE(baud_divisor)<<1);
#ifdef XX_CYGDBG_DIAG_BUF
enable_diag_uart = 0;
diag_printf("Set BAUD RATE[%x], %d = %x, tstate = %x\n", smc_chan->brg, baud_divisor, *smc_chan->brg, smc_chan->pram->tstate);
enable_diag_uart = 1;
#endif // CYGDBG_DIAG_BUF
 
// Enable channel with new configuration
smc_chan->ctl->smc_smcmr = QUICC_SMCMR_UART|QUICC_SMCMR_TEN|QUICC_SMCMR_REN|_lcr;
eppc->cp_cr = smc_chan->channel | QUICC_SMC_CMD_Go | QUICC_SMC_CMD_RestartTx;
if (new_config != &chan->config) {
chan->config = *new_config;
}
return true;
}
 
// Function to set up internal tables for device.
static void
quicc_smc_serial_init_info(quicc_smc_serial_info *smc_chan,
volatile struct smc_uart_pram *uart_pram,
volatile struct smc_regs *ctl,
int TxBD, int TxNUM, int TxSIZE,
cyg_uint8 *TxBUF,
int RxBD, int RxNUM, int RxSIZE,
cyg_uint8 *RxBUF,
int portBmask,
int BRG, int SIpos)
{
EPPC *eppc = eppc_base();
struct cp_bufdesc *txbd, *rxbd;
cyg_uint32 simode = 0;
int i;
 
// Disable channel during setup
ctl->smc_smcmr = QUICC_SMCMR_UART; // Disabled, UART mode
smc_chan->pram = uart_pram;
smc_chan->ctl = ctl;
/*
* SDMA & LCD bus request level 5
* (Section 16.10.2.1)
*/
eppc->dma_sdcr = 1;
switch (BRG) {
case 1:
smc_chan->brg = (cyg_uint32 *)&eppc->brgc1;
simode = 0;
break;
case 2:
smc_chan->brg = (cyg_uint32 *)&eppc->brgc2;
simode = 1;
break;
case 3:
smc_chan->brg = (cyg_uint32 *)&eppc->brgc3;
simode = 2;
break;
case 4:
smc_chan->brg = (cyg_uint32 *)&eppc->brgc4;
simode = 3;
break;
}
// NMSI mode, BRGn to SMCm (Section 16.12.5.2)
eppc->si_simode = (eppc->si_simode & ~(0xF<<SIpos)) | (simode<<SIpos);
/*
* Set up the PortB pins for UART operation.
* Set PAR and DIR to allow SMCTXDx and SMRXDx
* (Table 16-39)
*/
eppc->pip_pbpar |= portBmask;
eppc->pip_pbdir &= ~portBmask;
/*
* SDMA & LCD bus request level 5
* (Section 16.10.2.1)
*/
eppc->dma_sdcr = 1;
/*
* Set Rx and Tx function code
* (Section 16.15.4.2)
*/
uart_pram->rfcr = 0x18;
uart_pram->tfcr = 0x18;
/*
* Set pointers to buffer descriptors.
* (Sections 16.15.4.1, 16.15.7.12, and 16.15.7.13)
*/
uart_pram->rbase = RxBD;
uart_pram->tbase = TxBD;
/* tx and rx buffer descriptors */
txbd = (struct cp_bufdesc *)((char *)eppc + TxBD);
rxbd = (struct cp_bufdesc *)((char *)eppc + RxBD);
smc_chan->txbd = txbd;
smc_chan->tbase = txbd;
smc_chan->txsize = TxSIZE;
smc_chan->rxbd = rxbd;
smc_chan->rbase = rxbd;
smc_chan->rxsize = RxSIZE;
/* max receive buffer length */
uart_pram->mrblr = RxSIZE;
/* set max_idle feature - generate interrupt after 4 chars idle period */
uart_pram->max_idl = 4;
/* no last brk char received */
uart_pram->brkln = 0;
/* no break condition occurred */
uart_pram->brkec = 0;
/* 1 break char sent on top XMIT */
uart_pram->brkcr = 1;
/* setup RX buffer descriptors */
for (i = 0; i < RxNUM; i++) {
rxbd->length = 0;
rxbd->buffer = RxBUF;
rxbd->ctrl = QUICC_BD_CTL_Ready | QUICC_BD_CTL_Int;
if (i == (RxNUM-1)) rxbd->ctrl |= QUICC_BD_CTL_Wrap; // Last buffer
RxBUF += RxSIZE;
rxbd++;
}
/* setup TX buffer descriptors */
for (i = 0; i < TxNUM; i++) {
txbd->length = 0;
txbd->buffer = TxBUF;
txbd->ctrl = 0;
if (i == (TxNUM-1)) txbd->ctrl |= QUICC_BD_CTL_Wrap; // Last buffer
TxBUF += TxSIZE;
txbd++;
}
/*
* Reset Rx & Tx params
*/
eppc->cp_cr = smc_chan->channel | QUICC_SMC_CMD_Go | QUICC_SMC_CMD_InitTxRx;
/*
* Clear any previous events. Enable interrupts.
* (Section 16.15.7.14 and 16.15.7.15)
*/
ctl->smc_smce = 0xFF;
ctl->smc_smcm = QUICC_SMCE_BSY|QUICC_SMCE_TX|QUICC_SMCE_RX;
}
 
// Function to initialize the device. Called at bootstrap time.
static bool
quicc_smc_serial_init(struct cyg_devtab_entry *tab)
{
serial_channel *chan = (serial_channel *)tab->priv;
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
volatile EPPC *eppc = (volatile EPPC *)eppc_base();
int TxBD, RxBD;
static int first_init = 1;
int cache_state;
 
HAL_DCACHE_IS_ENABLED(cache_state);
HAL_DCACHE_SYNC();
HAL_DCACHE_DISABLE();
#ifdef CYGDBG_IO_INIT
diag_printf("QUICC_SMC SERIAL init - dev: %x.%d\n", smc_chan->channel, smc_chan->int_num);
#endif
if (first_init) {
// Set up tables since many fields are dynamic [computed at runtime]
first_init = 0;
#ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC1
eppc->cp_cr = QUICC_SMC_CMD_Reset | QUICC_SMC_CMD_Go; // Totally reset CP
while (eppc->cp_cr & QUICC_SMC_CMD_Reset) ;
TxBD = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxNUM);
RxBD = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxNUM);
quicc_smc_serial_init_info(&quicc_smc_serial_info1,
&eppc->pram[2].scc.pothers.smc_modem.psmc.u, // PRAM
&eppc->smc_regs[0], // Control registers
TxBD,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxNUM,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxSIZE,
ALIGN_TO_CACHELINES(&quicc_smc1_txbuf[0][0]),
RxBD,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxNUM,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_RxSIZE,
ALIGN_TO_CACHELINES(&quicc_smc1_rxbuf[0][0]),
0xC0, // PortB mask
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_BRG,
12 // SI mask position
);
#else
#ifdef CYGPKG_HAL_POWERPC_MBX
// Ensure the SMC1 side is initialized first and use shared mem
// above where it plays:
diag_init(); // (pull in constructor that inits diag channel)
TxBD = 0x2830; // Note: this should be inferred from the chip state
#else
// there is no diag device wanting to use the QUICC, so prepare it
// for SMC2 use only.
eppc->cp_cr = QUICC_SMC_CMD_Reset | QUICC_SMC_CMD_Go; // Totally reset CP
while (eppc->cp_cr & QUICC_SMC_CMD_Reset) ;
TxBD = 0x2800; // Note: this should be configurable
#endif
#endif
#ifdef CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC_SMC2
TxBD = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxNUM);
RxBD = _mpc8xx_allocBd(sizeof(struct cp_bufdesc)*CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_RxNUM);
quicc_smc_serial_init_info(&quicc_smc_serial_info2,
&eppc->pram[3].scc.pothers.smc_modem.psmc.u, // PRAM
&eppc->smc_regs[1], // Control registers
TxBD,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxNUM,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_TxSIZE,
ALIGN_TO_CACHELINES(&quicc_smc2_txbuf[0][0]),
RxBD,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_RxNUM,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_RxSIZE,
ALIGN_TO_CACHELINES(&quicc_smc2_rxbuf[0][0]),
0xC00, // PortB mask
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BRG,
28 // SI mask position
);
#endif
}
(chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
if (chan->out_cbuf.len != 0) {
cyg_drv_interrupt_create(smc_chan->int_num,
CYGARC_SIU_PRIORITY_HIGH, // Priority - unused (but asserted)
(cyg_addrword_t)chan, // Data item passed to interrupt handler
quicc_smc_serial_ISR,
quicc_smc_serial_DSR,
&smc_chan->serial_interrupt_handle,
&smc_chan->serial_interrupt);
cyg_drv_interrupt_attach(smc_chan->serial_interrupt_handle);
cyg_drv_interrupt_unmask(smc_chan->int_num);
}
quicc_smc_serial_config_port(chan, &chan->config, true);
if (cache_state)
HAL_DCACHE_ENABLE();
return true;
}
 
// This routine is called when the device is "looked" up (i.e. attached)
static Cyg_ErrNo
quicc_smc_serial_lookup(struct cyg_devtab_entry **tab,
struct cyg_devtab_entry *sub_tab,
const char *name)
{
serial_channel *chan = (serial_channel *)(*tab)->priv;
(chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
return ENOERR;
}
 
// Force the current transmit buffer to be sent
static void
quicc_smc_serial_flush(quicc_smc_serial_info *smc_chan)
{
volatile struct cp_bufdesc *txbd = smc_chan->txbd;
int cache_state;
HAL_DCACHE_IS_ENABLED(cache_state);
if (cache_state) {
HAL_DCACHE_FLUSH(txbd->buffer, smc_chan->txsize);
}
 
if ((txbd->length > 0) &&
((txbd->ctrl & (QUICC_BD_CTL_Ready|QUICC_BD_CTL_Int)) == 0)) {
txbd->ctrl |= QUICC_BD_CTL_Ready|QUICC_BD_CTL_Int; // Signal buffer ready
if (txbd->ctrl & QUICC_BD_CTL_Wrap) {
txbd = smc_chan->tbase;
} else {
txbd++;
}
smc_chan->txbd = txbd;
}
}
 
// Send a character to the device output buffer.
// Return 'true' if character is sent to device
static bool
quicc_smc_serial_putc(serial_channel *chan, unsigned char c)
{
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
volatile struct cp_bufdesc *txbd, *txfirst;
EPPC *eppc = eppc_base();
bool res;
cyg_drv_dsr_lock(); // Avoid race condition testing pointers
txbd = (struct cp_bufdesc *)((char *)eppc + smc_chan->pram->tbptr);
txfirst = txbd;
// Scan for a non-busy buffer
while (txbd->ctrl & QUICC_BD_CTL_Ready) {
// This buffer is busy, move to next one
if (txbd->ctrl & QUICC_BD_CTL_Wrap) {
txbd = smc_chan->tbase;
} else {
txbd++;
}
if (txbd == txfirst) break; // Went all the way around
}
smc_chan->txbd = txbd;
if ((txbd->ctrl & (QUICC_BD_CTL_Ready|QUICC_BD_CTL_Int)) == 0) {
// Transmit buffer is not full/busy
txbd->buffer[txbd->length++] = c;
if (txbd->length == smc_chan->txsize) {
// This buffer is now full, tell SMC to start processing it
quicc_smc_serial_flush(smc_chan);
}
res = true;
} else {
// No space
res = false;
}
cyg_drv_dsr_unlock();
return res;
}
 
// Fetch a character from the device input buffer, waiting if necessary
static unsigned char
quicc_smc_serial_getc(serial_channel *chan)
{
unsigned char c;
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
volatile struct cp_bufdesc *rxbd = smc_chan->rxbd;
while ((rxbd->ctrl & QUICC_BD_CTL_Ready) != 0) ;
c = rxbd->buffer[0];
rxbd->length = smc_chan->rxsize;
rxbd->ctrl |= QUICC_BD_CTL_Ready;
if (rxbd->ctrl & QUICC_BD_CTL_Wrap) {
rxbd = smc_chan->rbase;
} else {
rxbd++;
}
smc_chan->rxbd = (struct cp_bufdesc *)rxbd;
return c;
}
 
// Set up the device characteristics; baud rate, etc.
static Cyg_ErrNo
quicc_smc_serial_set_config(serial_channel *chan, cyg_uint32 key,
const void *xbuf, cyg_uint32 *len)
{
switch (key) {
case CYG_IO_SET_CONFIG_SERIAL_INFO:
{
// FIXME - The documentation says that you can't change the baud rate
// again until at least two BRG input clocks have occurred.
cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
if ( *len < sizeof(cyg_serial_info_t) ) {
return -EINVAL;
}
*len = sizeof(cyg_serial_info_t);
if ( true != quicc_smc_serial_config_port(chan, config, false) )
return -EINVAL;
}
break;
default:
return -EINVAL;
}
return ENOERR;
}
 
// Enable the transmitter (interrupt) on the device
static void
quicc_smc_serial_start_xmit(serial_channel *chan)
{
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
cyg_drv_dsr_lock();
if (smc_chan->txbd->length == 0) {
// See if there is anything to put in this buffer, just to get it going
(chan->callbacks->xmt_char)(chan);
}
if (smc_chan->txbd->length != 0) {
// Make sure it gets started
quicc_smc_serial_flush(smc_chan);
}
cyg_drv_dsr_unlock();
}
 
// Disable the transmitter on the device
static void
quicc_smc_serial_stop_xmit(serial_channel *chan)
{
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
// If anything is in the last buffer, need to get it started
if (smc_chan->txbd->length != 0) {
quicc_smc_serial_flush(smc_chan);
}
}
 
// Serial I/O - low level interrupt handler (ISR)
static cyg_uint32
quicc_smc_serial_ISR(cyg_vector_t vector, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
cyg_drv_interrupt_mask(smc_chan->int_num);
return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR); // Cause DSR to be run
}
 
// Serial I/O - high level interrupt handler (DSR)
static void
quicc_smc_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info *)chan->dev_priv;
volatile struct smc_regs *ctl = smc_chan->ctl;
volatile struct cp_bufdesc *txbd;
volatile struct cp_bufdesc *rxbd = smc_chan->rxbd;
struct cp_bufdesc *rxlast;
int i, cache_state;
#ifdef CYGDBG_DIAG_BUF
int _time, _stime;
externC cyg_tick_count_t cyg_current_time(void);
cyg_drv_isr_lock();
enable_diag_uart = 0;
HAL_CLOCK_READ(&_time);
_stime = (int)cyg_current_time();
diag_printf("DSR start - CE: %x, time: %x.%x\n", ctl->smc_smce, _stime, _time);
enable_diag_uart = 1;
#endif // CYGDBG_DIAG_BUF
if (ctl->smc_smce & QUICC_SMCE_TX) {
#ifdef XX_CYGDBG_DIAG_BUF
enable_diag_uart = 0;
txbd = smc_chan->tbase;
for (i = 0; i < CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC1_TxNUM; i++, txbd++) {
diag_printf("Tx BD: %x, length: %d, ctl: %x\n", txbd, txbd->length, txbd->ctrl);
}
enable_diag_uart = 1;
#endif // CYGDBG_DIAG_BUF
// Transmit interrupt
ctl->smc_smce = QUICC_SMCE_TX; // Reset interrupt state;
txbd = smc_chan->tbase; // First buffer
while (true) {
if ((txbd->ctrl & (QUICC_BD_CTL_Ready|QUICC_BD_CTL_Int)) == QUICC_BD_CTL_Int) {
#ifdef XX_CYGDBG_DIAG_BUF
enable_diag_uart = 0;
HAL_CLOCK_READ(&_time);
_stime = (int)cyg_current_time();
diag_printf("TX Done - Tx: %x, length: %d, time: %x.%x\n", txbd, txbd->length, _stime, _time);
enable_diag_uart = 1;
#endif // CYGDBG_DIAG_BUF
txbd->length = 0;
txbd->ctrl &= ~QUICC_BD_CTL_Int; // Reset interrupt bit
}
if (txbd->ctrl & QUICC_BD_CTL_Wrap) {
txbd = smc_chan->tbase;
break;
} else {
txbd++;
}
}
(chan->callbacks->xmt_char)(chan);
}
while (ctl->smc_smce & QUICC_SMCE_RX) {
// Receive interrupt
ctl->smc_smce = QUICC_SMCE_RX; // Reset interrupt state;
rxlast = (struct cp_bufdesc *) (
(char *)eppc_base() + smc_chan->pram->rbptr );
#ifdef CYGDBG_DIAG_BUF
enable_diag_uart = 0;
HAL_CLOCK_READ(&_time);
_stime = (int)cyg_current_time();
diag_printf("Scan RX - rxbd: %x, rbptr: %x, time: %x.%x\n", rxbd, rxlast, _stime, _time);
#endif // CYGDBG_DIAG_BUF
while (rxbd != rxlast) {
if ((rxbd->ctrl & QUICC_BD_CTL_Ready) == 0) {
#ifdef CYGDBG_DIAG_BUF
diag_printf("rxbuf: %x, flags: %x, length: %d\n", rxbd, rxbd->ctrl, rxbd->length);
diag_dump_buf(rxbd->buffer, rxbd->length);
#endif // CYGDBG_DIAG_BUF
for (i = 0; i < rxbd->length; i++) {
(chan->callbacks->rcv_char)(chan, rxbd->buffer[i]);
}
// Note: the MBX860 does not seem to snoop/invalidate the data cache properly!
HAL_DCACHE_IS_ENABLED(cache_state);
if (cache_state) {
HAL_DCACHE_INVALIDATE(rxbd->buffer, smc_chan->rxsize); // Make sure no stale data
}
rxbd->length = 0;
rxbd->ctrl |= QUICC_BD_CTL_Ready;
}
if (rxbd->ctrl & QUICC_BD_CTL_Wrap) {
rxbd = smc_chan->rbase;
} else {
rxbd++;
}
}
#ifdef CYGDBG_DIAG_BUF
enable_diag_uart = 1;
#endif // CYGDBG_DIAG_BUF
smc_chan->rxbd = (struct cp_bufdesc *)rxbd;
}
if (ctl->smc_smce & QUICC_SMCE_BSY) {
#ifdef CYGDBG_DIAG_BUF
enable_diag_uart = 0;
diag_printf("RX BUSY interrupt\n");
enable_diag_uart = 1;
#endif // CYGDBG_DIAG_BUF
ctl->smc_smce = QUICC_SMCE_BSY; // Reset interrupt state;
}
#ifdef CYGDBG_DIAG_BUF
enable_diag_uart = 0;
HAL_CLOCK_READ(&_time);
_stime = (int)cyg_current_time();
diag_printf("DSR done - CE: %x, time: %x.%x\n", ctl->smc_smce, _stime, _time);
enable_diag_uart = 1;
#endif // CYGDBG_DIAG_BUF
cyg_drv_interrupt_acknowledge(smc_chan->int_num);
cyg_drv_interrupt_unmask(smc_chan->int_num);
#ifdef CYGDBG_DIAG_BUF
cyg_drv_isr_unlock();
#endif // CYGDBG_DIAG_BUF
}
 
void
show_rxbd(int dump_all)
{
#ifdef CYGDBG_DIAG_BUF
EPPC *eppc = eppc_base();
struct smc_uart_pram *pram = &eppc->pram[2].scc.pothers.smc_modem.psmc.u;
struct cp_bufdesc *rxbd = (struct cp_bufdesc *)((char *)eppc+pram->rbase);
int _enable = enable_diag_uart;
enable_diag_uart = 0;
#if 1
diag_printf("SMC Mask: %x, Events: %x, Rbase: %x, Rbptr: %x\n",
eppc->smc_regs[0].smc_smcm, eppc->smc_regs[0].smc_smce,
pram->rbase, pram->rbptr);
while (true) {
diag_printf("Rx BD: %x, ctl: %x, length: %d\n", rxbd, rxbd->ctrl, rxbd->length);
if (rxbd->ctrl & QUICC_BD_CTL_Wrap) break;
rxbd++;
}
#endif
enable_diag_uart = _enable;
if (dump_all) dump_diag_buf();
#endif // CYGDBG_DIAG_BUF
}
#endif // CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC
 
// ------------------------------------------------------------------------
// EOF powerpc/quicc_smc_serial.c
/v2_0/src/quicc_smc_serial.h
0,0 → 1,112
#ifndef CYGONCE_POWERPC_QUICC_SMC_SERIAL_H
#define CYGONCE_POWERPC_QUICC_SMC_SERIAL_H
 
// ====================================================================
//
// quicc_smc_serial.h
//
// Device I/O - Description of PowerPC QUICC/SMC serial hardware
//
// ====================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
// ====================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): gthomas
// Contributors: gthomas
// Date: 1999-06-21
// Purpose: Internal interfaces for serial I/O drivers
// Description:
//
//####DESCRIPTIONEND####
//
// ====================================================================
 
// Description of serial ports using QUICC/SMC
 
#include <cyg/hal/quicc/ppc8xx.h> // QUICC structure definitions
 
static unsigned int select_word_length[] = {
QUICC_SMCMR_CLEN(5), // 5 bits / word (char)
QUICC_SMCMR_CLEN(6),
QUICC_SMCMR_CLEN(7),
QUICC_SMCMR_CLEN(8)
};
 
static unsigned int select_stop_bits[] = {
0,
QUICC_SMCMR_SB(1), // 1 stop bit
QUICC_SMCMR_SB(1), // 1.5 stop bit
QUICC_SMCMR_SB(2) // 2 stop bits
};
 
static unsigned int select_parity[] = {
QUICC_SMCMR_PE(0), // No parity
QUICC_SMCMR_PE(1)|QUICC_SMCMR_PM(1), // Even parity
QUICC_SMCMR_PE(1)|QUICC_SMCMR_PM(0), // Odd parity
0, // Mark parity
0, // Space parity
};
 
// Baud rate values, based on board clock
 
static cyg_int32 select_baud[] = {
0, // Unused
50, // 50
75, // 75
110, // 110
0, // 134.5
150, // 150
200, // 200
300, // 300
600, // 600
1200, // 1200
1800, // 1800
2400, // 2400
3600, // 3600
4800, // 4800
7200, // 7200
9600, // 9600
14400, // 14400
19200, // 19200
38400, // 38400
57600, // 57600
115200, // 115200
0, // 230400
};
 
#define UART_BITRATE(n) (((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)
#define UART_SLOW_BITRATE(n) ((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/n))
 
#endif // CYGONCE_POWERPC_QUICC_SMC_SERIAL_H
/v2_0/ChangeLog
0,0 → 1,1235
2003-03-05 Gary Thomas <gary@mlbassoc.com>
 
* src/quicc_smc_serial.c: Use common routines to manage CPM/DPRAM
pointers - much nicer in a multi-driver environment.
 
2003-02-24 Jonathan Larmour <jifl@eCosCentric.com>
 
* cdl/ser_quicc_smc.cdl: Remove irrelevant doc link.
 
2002-12-10 Gary Thomas <gthomas@ecoscentric.com>
 
* cdl/ser_quicc_smc.cdl: Only enable devices which exist - as described
by the HAL/CDL interfaces.
 
2001-11-30 Jonathan Larmour <jlarmour@redhat.com>
2001-11-29 Christoph Csebits <christoph.csebits@frequentis.com>
 
* src/quicc_smc_serial.c:
aligning buffer to cache lines,
flushing buffer in cache before flushing the device.
 
2001-09-10 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/ser_quicc_smc.cdl:
Fix 234000->230400 typo.
 
 
 
* src/quicc_smc_serial.c (quicc_smc_serial_init_info):
Set quicc going only after most of the other initialization is
complete - otherwise initializing too early causes some of the
parameters not to be initialized properly.
 
2000-12-13 Daniel Lind <daniel.lind@sth.frontec.se>
 
* src/quicc_smc_serial.c (quicc_smc_serial_flush):
Don't mark a buffer ready unless it has been fully serviced - in
particular, the interrupt bit must be clear.
[2000-12-13] committed by Gary Thomas <gthomas@redhat.com>
 
2000-12-06 Jonathan Larmour <jlarmour@redhat.com>
 
* src/quicc_smc_serial.c: Remove unread tx_enabled variable from
quicc_smc_serial_info
Ensure quicc serial interrupt is unmasked in general so that rx works!
(quicc_smc_serial_start_xmit): Protect better from DSR interruption
 
2000-10-24 Jonathan Larmour <jlarmour@redhat.com>
 
* src/quicc_smc_serial.c (quicc_smc_serial_ISR): Return with
CYG_ISR_HANDLED (reported by Daniel Lind)
 
2000-08-01 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* src/quicc_smc_serial.c (quicc_smc_serial_set_config): Now use keys
to make more flexible.
 
2000-06-22 Hugo Tyson <hmt@cygnus.co.uk>
 
* cdl/<yournamehere>.cdl: Remove the comment on the empty
include_files directive; the tools now support this correctly.
This keeps internal include files internal.
 
2000-04-11 Hugo Tyson <hmt@cygnus.co.uk>
 
* cdl/ser_quicc_smc.cdl: Change the parent from CYGPKG_IO_SERIAL
(which is enabled most of the time) to CYGPKG_IO_SERIAL_DEVICES
(which is not...) thus allowing convenient control independent of
platform. Also enable all individual devices by default, now, so
that they can be enabled simply by enabling the above new parent.
 
2000-04-07 Hugo Tyson <hmt@cygnus.co.uk>
 
* ecos.db: Re-organize device packages. This is a massive change
involving deleting all the sources for serial and ethernet drivers
from where they used to live in
packages/io/serial/current/src/ARCH/PLATFORM.[ch]
packages/net/drivers/eth/PLATFORM/current/src/...
and reinstating them in
packages/devs/serial/ARCH/PLATFORM/current/src/...
packages/devs/eth/ARCH/PLATFORM/current/src/...
 
All these new packages are properly defined in ecos.db, and are
all of type "hardware" so that a "target" can grab them.
This directory layout is descriptive of the devices we have right
now, arch and platform are separate levels just to make it easier
to navigate in the filesystem and similar to the HAL structure in
the filesystem.
 
It is *not* prescriptive of future work; for example, the mythical
common highly-portable 16550 serial driver which works on many
targets would be called "devs/serial/s16550/current", or a serial
device for a particular board (cogent springs to mind) that can
work with different CPUs fitted is "devs/serial/cogent/current".
 
Changelogs have been preserved and replicated over all the new
packages, so that no history is lost.
 
The contents of individual source files are unchanged; they build
in just the same emvironment except for a very few cases where the
config file name changed in this movement.
 
Targets in ecos.db have been redefined to bring in all relevant
hardware packages including net and serial drivers (but the newly
included packages are only active if their desired parent is
available.)
The names of CDL options (and their #defines of course) stay the
same for the serial drivers, for backward compatibility.
 
* templates/*/current.ect: these have had CYGPKG_IO_SERIAL added
rather than it being in (almost) all target definitions.
2000-04-05 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* src/common/tty.c (tty_read): CRLF conversion should use \r\n not \n\r
(tty_write): Similarly
 
* include/ttyio.h: Update CYG_TTY_IN_FLAGS_CRLF and
CYG_TTY_IN_FLAGS_CRLF to match
 
2000-03-31 Jesper Skov <jskov@redhat.com>
 
* cdl/ser_sh_edk7708.cdl: Limit legal baud rate range.
* src/sh/sh_sci_serial.c: Use baud rate macro instead of hardwired
constants.
 
2000-03-28 John Dallaway <jld@cygnus.co.uk>
 
* cdl/io_serial.cdl,
cdl/ser_arm_aeb.cdl,
cdl/ser_arm_cma230.cdl,
cdl/ser_arm_edb7xxx.cdl,
cdl/ser_arm_pid.cdl,
cdl/ser_i386_pc.cdl,
cdl/ser_mips_jmr3904.cdl,
cdl/ser_mips_vrc4373.cdl,
cdl/ser_mn10300.cdl,
cdl/ser_powerpc_cogent.cdl,
cdl/ser_quicc_smc.cdl,
cdl/ser_sh_edk7708.cdl,
cdl/ser_sparclite_sleb.cdl,
cdl/tty.cdl:
 
Adjust documentation URLs.
 
2000-03-07 Jesper Skov <jskov@redhat.com>
 
* cdl/ser_mips_jmr3904.cdl: Rename devices to match CDL naming.
 
2000-02-29 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* include/serialio.h: Correct baud rate typo: 230400 rather than
234000. Thanks to Grant Edwards for the report.
 
2000-02-28 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/powerpc/quicc_smc_serial.c: Use standard 'diag_dump_buf()'.
 
2000-02-28 Jesper Skov <jskov@redhat.com>
 
* tests/ser_test_protocol.inl: Allow 115200 baud on Cogent
again. Fixed interrupt problem.
 
2000-02-22 Jesper Skov <jskov@redhat.com>
 
* tests/ser_test_protocol.inl: Don't use 115200 baud on
Cogent. Our slower boards can't keep up.
 
2000-02-17 Gary Thomas <gthomas@cygnus.co.uk>
 
* cdl/ser_powerpc_cogent.cdl: Fix incorrect dependency.
 
2000-02-16 Nick Garnett <nickg@cygnus.co.uk>
 
* include/pkgconf/io_serial.h:
Added configury for PC serial device drivers.
 
* cdl/ser_i386_pc.cdl:
* src/i386/pc_serial.c:
* src/i386/pc_serial.h:
Added these files to implement PC serial line drivers.
 
* cdl/io_serial.cdl:
Added CYGPKG_IO_SERIAL_I386_PC.
 
* tests/ser_test_protocol.inl:
Added support for PC serial line testing.
2000-02-11 Jesper Skov <jskov@redhat.com>
 
* src/sh/sh_sci_7708.inl (DEVTAB_ENTRY):
* src/sparclite/sleb_sdtr.c:
serial_devio => cyg_io_serial_devio
 
2000-02-10 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* src/mn10300/mn10300_serial.c: Ensure all CYG_HAL_MN10300_*
preprocessor conditionals use the correct CYGPKG_HAL_MN10300_AM3* form
now.
 
2000-02-03 Jesper Skov <jskov@redhat.com>
 
* src/powerpc/quicc_smc_serial.c: CYG_HAL_POWERPC_x->CYGPKG_...
 
2000-02-02 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* src/arm/aeb_serial.h: Rename lower case register macros to REG_ upper
case macros
 
* src/arm/aeb_serial.c: Update to reflect above
 
2000-01-31 Simon FitzMaurice <sdf@cygnus.co.uk>
* cdl/*.cdl:
 
Adjust help URLs in line with new doc layout.
2000-01-28 Simon FitzMaurice <sdf@cygnus.co.uk>
* cdl/*.cdl:
 
Adjust help URLs in line with new doc layout.
2000-01-28 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/common/tty.c (tty_read): Fix problem with backspace at start
of line (size must be 'signed' for compare to work).
 
2000-01-19 Hugo Tyson <hmt@cygnus.co.uk>
 
* cdl/*.cdl: Add descriptions to a number of options &c which were
lacking same, also tidied up other typos as noticed en passant.
 
2000-01-17 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/common/tty.c (tty_read): Avoid echoing "backspace/erase" at
start of line.
 
2000-01-05 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/common/serial.c (serial_write): Avoid potential deadlock if
transmit start actually sends enough characters to signal cond wait.
 
2000-01-03 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/serial.h: Fix namespace pollution -
serial_devio => cyg_io_serial_devio
serial_callbacks => cyg_io_serial_callbacks
 
* src/mips/tx3904_serial.c:
* src/mips/vrc4373_serial.c:
* src/mn10300/mn10300_serial.c:
* src/powerpc/quicc_smc_serial.c:
* src/powerpc/cogent_serial_with_ints.c:
* src/sparclite/sleb_sdtr.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c:
* src/arm/edb7xxx_serial.c:
* src/arm/cma230_serial.c:
* src/arm/ebsa285_serial.c:
* src/common/haldiag.c:
* src/common/serial.c: Fix namespace pollution -
serial_devio => cyg_io_serial_devio
 
1999-12-06 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/arm/pid_serial_with_ints.c (pid_serial_DSR): Add loop to handle
case where an interrupt represents multiple events.
 
1999-11-19 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/powerpc/quicc_smc_serial.c: Channel select for SMC2 was wrong.
 
1999-11-18 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Remove mention of 7209/7212.
 
1999-11-03 John Dallaway <jld@cygnus.co.uk>
 
* cdl/io_serial.cdl: Define build options.
 
1999-10-26 Jesper Skov <jskov@cygnus.co.uk>
* tests/serial5.c (serial_test): Reduce speed in thumb mode.
 
* src/arm/pid_serial.h: Added BE support.
 
* src/PKGconf.mak: Use CYGPKG_<> instead of CYG_<> to control what
needs to be compiled.
 
1999-10-25 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/arm/pid_serial.h (ISR_RxTO): Define - character received but
not handled "promptly".
 
* src/arm/pid_serial_with_ints.c (pid_serial_DSR): Handle rcv interrupts
properly (can't ignore them even with TO bit set).
 
* src/arm/cl7211_serial.c (cl7211_serial_rx_DSR): Need to handle all
input (empty input FIFO) otherwise characters get dropped.
 
1999-10-15 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Removed AEB rev C change. Was bogus.
 
1999-10-11 Nick Garnett <nickg@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Added configury for VR4300 testing.
 
* src/mips/vrc4373_serial.c: Added Bi-endian support.
 
* include/pkgconf/io_serial.h: Adjusted default baud rates to
38400.
 
1999-10-06 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Run tests on AEB rev C as well.
 
1999-09-28 Hugo Tyson <hmt@cygnus.co.uk>
 
* src/powerpc/quicc_smc_serial.c (quicc_smc_serial_init): Correct
value supplied for interrupt priority - it may be unused, but it
is asserted for range. Initialize the diagnostic channel if on an
MBX and if NOT using SMC1 ourselves, to ensure that diag output
and built-in stubs work correctly; otherwise reset the quicc and
ignore SMC1 as before. Fix various warnings, mostly about
casting/arg-passing/assigning away volatile.
 
1999-08-31 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Define dummy crash ID.
 
1999-08-30 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Added crash information which
should help track down repeating errors.
 
1999-08-20 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/README: Added.
 
1999-08-18 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/tty1.c:
* tests/tty2.c:
* tests/serial1.c:
* tests/serial2.c:
* tests/serial3.c:
* tests/serial4.c:
* tests/serial5.c:
* tests/PKGconf.mak:
Require kernel and kernel C API.
1999-08-17 Nick Garnett <nickg@cygnus.co.uk>
 
* src/mn10300/mn10300_serial.c: Added a simple implementation of a
receive FIFO to try and reduce the overhead of receiving bytes.
 
1999-08-16 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* src/PKGconf.mak:
* src/mn10300/mn10300_serial.c:
* tests/ser_test_protocol.inl:
Rename all am32 -> am31
 
1999-08-12 Nick Garnett <nickg@cygnus.co.uk>
 
Imported following changes from development branch:
1999-08-11 Nick Garnett <nickg@cygnus.co.uk>
 
* tests/serial5.c: Modified config test for boards that need a lower
speed for this test.
 
* tests/ser_test_protocol.inl: Removed 14400 baud tests for all
MN10300 variants. The MN10300 cannot currently do this speed.
 
* src/mn10300/mn10300_serial.c: Tidied up the transmit interrupt
enable/disable code to be variant specific.
 
* include/pkgconf/io_serial.h: Undid Jonathan's change, since the
same options are used for all MN10300 variants.
1999-08-10 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* include/pkgconf/io_serial.h:
Reparent CYGPKG_IO_SERIAL_MN10300 from under CYGPKG_HAL_MN10300 to
CYGPKG_HAL_MN10300_AM32_STDEVAL1 since it's stdeval1 specific
 
1999-08-04 Nick Garnett <nickg@cygnus.co.uk>
 
* tests/ser_test_protocol.inl:
Changed names of MN10300 defines tested. Added AM33 definitions.
 
* src/mn10300/mn10300_serial.c:
Modified driver to work on am33 too. This simply requires some
alternate definitions of things like register addresses and some
bits in them plus some extra parameterization of some register
values.
 
* src/PKGconf.mak:
Added am33 to list of architectures supporting serial lines.
1999-07-28 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Update descriptions to be more
generic (CL7x11 instead of CL7211).
 
1999-07-28 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Correct typos in CDL description
for serial port 2 driver
 
1999-07-26 Hugo Tyson <hmt@cygnus.co.uk>
 
* src/arm/ebsa285_serial.c: New file: device driver for the serial
device of the Intel StrongARM EBSA-285 evaluation board.
 
* include/pkgconf/io_serial.h (CYGPKG_IO_SERIAL_ARM_EBSA285):
Config for it.
 
* src/PKGconf.mak (EXTRAS_COMPILE): Compile it.
 
* tests/ser_test_protocol.inl (TEST_SER_DEV): Enable testing of it.
 
1999-07-08 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl (change_config): Changed implementation.
 
1999-06-27 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/powerpc/quicc_smc_serial.c (quicc_smc_serial_init): More robust
initialization, with data cache disabled. This seems to fix the
random failures described below.
 
* tests/ser_test_protocol.inl: Add configuration for QUICC/MBX860.
Added some delays in the configuration change code to make QUICC
happy [didn't help much although the manual says they are required].
 
* src/powerpc/quicc_smc_serial.h (UART_BITRATE): Rewrote macro to
match what the Linux driver uses - still doesn't work well, though.
 
* src/powerpc/quicc_smc_serial.c: Lots of changes trying to get the
serial driver working and robust. At this point it works quite well,
using the default buffer sizes. Changing from the defaults seem to
easily break it though, certainly on input. Also, changing the baud
rate seems to not work reliably.
 
* src/common/serial.c: Add some tracing/debug info to try and debug
problems with QUICC serial driver. These are hard disabled with
"XX_" prepended to "CYGDBG_DIAG_BUF". Enabling them gives information
about how/when data are delivered from the serial driver.
 
* include/pkgconf/io_serial.h: Adjust limits and defaults on number and
size of buffers with values that seem to work.
 
1999-06-21 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sh/sh_sci_serial.c: Rearranged inclusion of .inl file a bit
to avoid compiler warnings.
 
1999-06-21 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Fix CDL for number of buffers.
 
* src/powerpc/quicc_smc_serial.c: Force number of buffers = 1.
 
1999-06-20 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Some clean up (removed commented
obsolete CDL parenting structure).
Add support for Motorola PowerPC QUICC/SMC.
 
* src/arm/cma230_serial.c:
* src/arm/cl7211_serial.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c: Use #include to get 'diag_printf()'
prototypes.
 
1999-06-17 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/arm/cl7211_serial.c (cl7211_serial_start_xmit): Fix race which
cause xmitter to get stuck.
 
1999-06-16 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sh/sh_serial.c: [removed]
* src/sh/sh_sci_serial.c: [added]
* src/sh/sh_sci_7708.inl: [added]
* include/pkgconf/io_serial.h:
* src/PKGconf.mak (EXTRAS_COMPILE):
* tests/ser_test_protocol.inl:
Renamed CDL options and restructered driver.
Fixed CDL typo.
1999-06-04 Jesper Skov <jskov@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Fixed CDL string for BAUD rate option.
 
1999-06-04 Gary Thomas <gthomas@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Disable testing at 115200
for Cogent CMA230 (ARM).
 
* src/arm/cma230_serial.c: Fix interrupt for port B.
 
1999-05-31 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sh/sh_serial.c: Fixed receive interrupts and added handler for
error interrupts.
 
1999-05-28 Jesper Skov <jskov@cygnus.co.uk>
 
* io/serial/current/src/PKGconf.mak:
* io/serial/current/tests/ser_test_protocol.inl:
* include/pkgconf/io_serial.h:
Renamed SH platform package to edk7708.
 
1999-05-27 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Added ability to change options in
host software.
 
1999-05-27 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* src/mn10300/mn10300_serial.c (mn10300_serial_config_port):
Wait for the serial device to become acquiescent before disabling
it. This prevents cygmon's outgoing characters getting corrupted
due to transmission being disabled.
Fix for PR 20047
1999-05-26 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h:
* tests/ser_test_protocol.inl: Add Cogent CMA230 setup.
* src/arm/cma230_serial.c: Make names compatible with Cogent
PowerPC board.
 
1999-05-26 Gary Thomas <gthomas@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Add Cirrus Logic CL7211 setup.
1999-05-26 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sh/sh_serial.c: Added more baud rate values. Disabled
interrupt driven receive. Fixed config_port to enable proper
interrupt flags.
 
1999-05-25 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* tests/ser_test_protocol.inl:
Change all mentions of CYGPKG_HAL_TX39_JMR3904 to
CYGPKG_HAL_MIPS_TX39_JMR3904
 
1999-05-25 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* src/PKGconf.mak (EXTRAS_COMPILE): Change CYG_HAL_TX39 to
CYG_HAL_MIPS_TX39
1999-05-25 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Added sh entry.
 
1999-05-24 Jesper Skov <jskov@cygnus.co.uk>
 
* src/PKGconf.mak:
* include/pkgconf/io_serial.h:
* src/sh/sh_serial.c:
Added sh driver.
 
1999-05-18 Jesper Skov <jskov@cygnus.co.uk>
PR 19926
* src/sparclite/sleb_sdtr.c (sleb_sdtr_rx_DSR): Only read chan if
there is one.
 
1999-05-18 Jesper Skov <jskov@cygnus.co.uk>
PR 19926
* src/arm/cl7211_serial.c (cl7211_serial_rx_DSR): Only read char
if there is one.
 
1999-05-16 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/arm/cl7211_serial.c: Clean up, first working version.
 
1999-05-14 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Removed workaround for spurious
Cogent reads.
 
* src/arm/aeb_serial.c:
* src/arm/aeb_serial.h:
* src/arm/pid_serial_with_ints.c:
* src/arm/pid_serial.h:
* src/powerpc/cogent_serial.h:
* src/powerpc/cogent_serial_with_ints.c:
Check for receive interrupt before reading.
 
1999-05-13 Nick Garnett <nickg@cygnus.co.uk>
 
The follow changes were made in a branch an have now been merged:
 
1999-04-21 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/mips/vrc4373_serial.c: Small changes to get working with
interrupts.
1999-04-20 John Dallaway <jld@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Fix CYGPKG_IO_SERIAL_TX39_JMR3904
parent attribute.
 
1999-05-11 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/arm/cl7211_serial.c: Fix compile problems from merged code.
 
1999-05-05 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Tidied up a bit and added
description of protocol.
 
1999-05-05 Jesper Skov <jskov@cygnus.co.uk>
 
* src/common/serial.c (serial_write, serial_read): Clear abort
flag at entry.
 
1999-05-05 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/serial4.c (serial_test): Handle config fails correctly.
 
* tests/ser_test_protocol.inl: Better change_config
handling. Simple recovery and negotiation isn't timing
dependant.
 
1999-05-05 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/timeout.inl: Updated with the below changes.
 
1999-05-05 Gary Thomas <gthomas@cygnus.co.uk>
 
* misc/timeout.inl (timeout): Timeouts are relative, but alarms
need absolute time values.
 
1999-05-04 Jesper Skov <jskov@cygnus.co.uk>
PR 20018
* tests/serial1.c (serial_test): Always PASS, regardless of
configuration.
 
1999-05-04 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Reverse order of configurations -
run tests with slow baud rate first.
Only check CYG_KERNEL_DIAG_GDB_SERIAL_DIRECT for SLEB on RAM startup.
 
1999-05-04 Jesper Skov <jskov@cygnus.co.uk>
* src/mn10300/mn10300_serial.c:
Use interrupt enable/disable feature of serial port2 to allow
coexistence with CygMon/hal_diag.
* tests/ser_test_protocol.inl: Use port2 for MN10300.
 
1999-04-28 Bart Veer <bartv@cygnus.co.uk>
 
* src/PKGconf.mak (EXTRAS_COMPILE):
Use the new rules for generating libextras.a
 
1999-04-26 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Add support for Cirrus Logic CL7211.
 
 
1999-04-20 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c: Fix default baud rate if unbuffered.
1999-04-20 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Added some comments. Disabled 38400
for SLEB. Only run test on SLEB if CygMon isn't used for diag
output.
1999-04-15 Jesper Skov <jskov@cygnus.co.uk>
PR 19752
* tests/serial3.c:
* tests/serial5.c:
Run these tests at a lower baud rate on ARM AEB.
1999-04-14 Jesper Skov <jskov@cygnus.co.uk>
PR 19839
* src/mn10300/mn10300_serial.c:
Fix compiler warnings.
 
1999-04-14 Bart Veer <bartv@cygnus.co.uk>
 
* include/pkgconf/io_serial.h:
Reparent the board-specific serial devices below the actual boards.
1999-04-13 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl:
NA when run from simulator.
 
1999-04-12 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl:
Disabled 115200 for MN10300.
Reclaim interrupt vectors from CygMon when testing on SLEB.
 
1999-04-09 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/serial.h: Change SERIAL_CHANNEL setup so all channels
have serial callbacks, regardless of buffering.
 
1999-04-09 Jesper Skov <jskov@cygnus.co.uk>
 
* src/common/tty.c:
* include/pkgconf/io_serial.h:
Added new ttydiag device layered on top of haldiag, so that tty0
can be layered on top of ser0.
 
1999-04-08 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/tty1.c: [added]
* tests/tty2.c: [added]
* tests/PKGconf.mak:
* tests/ser_test_protocol.inl:
Added two simple TTY tests.
 
1999-04-07 Hugo Tyson <hmt@cygnus.co.uk>
 
* src/sparclite/sleb_sdtr.h: Include cyg/hal/hal_io.h for I/O
macros instead of hal_diag.h where they had evolved before.
 
1999-04-06 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/serial4.c (serial_test):
* tests/serial3.c (serial_test):
Reduce packet sizes.
 
1999-03-31 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Added remaining targets to the
test.
 
1999-03-31 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/sparclite/sleb_sdtr.c (sleb_sdtr_start_xmit): Fix timing race
when enabling xmit interrupts.
 
1999-03-26 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/sparclite/sleb_sdtr.c: Change how the port is set up. The transmitter
is now always enabled, just the interrupts are masked/unmasked to control it.
This lets the serial driver cooperate with Cygmon on the port used for GDB.
Note that currently serial input does not work for CON1 since Cygmon is
taking all of the receive interrupts for itself.
(sleb_sdtr_tx_DSR): Need to keep track whether xmit interrupt should be
enabled - otherwise it can get enabled incorrectly and we get interrupted
to death!
 
1999-03-26 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Send a DONE message after a no-echo
binary packet.
 
1999-03-26 Hugo Tyson <hmt@cygnus.co.uk>
 
* tests/serial5.c:
* tests/serial4.c:
* tests/serial3.c:
* tests/serial2.c:
* tests/serial1.c:
Make these build when no kernel present; include of testcase
was the wrong side of the ifdef.
 
1999-03-26 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/serial5.c:
* tests/serial4.c:
* tests/serial3.c:
* tests/serial2.c:
* tests/serial1.c:
Moved NOP check to ser_test_protocol open call.
* tests/ser_test_protocol.inl: Make sure the proper device is
selected for testing. Do NOP check in open call.
 
1999-03-25 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h:
* misc/console.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c:
* src/common/tty.c:
* src/mips/tx3904_serial.c:
* src/mn10300/mn10300_serial.c:
* src/powerpc/cogent_serial_with_ints.c:
* src/sparclite/sleb_sdtr.c: Update CDL to follow naming conventions.
 
* src/mips/tx3904_serial.c (tx3904_serial_config_port):
Make sure port is enabled (CDL) before using it.
 
* src/mn10300/mn10300_serial.c (mn10300_serial_config_port):
* src/powerpc/cogent_serial_with_ints.c (cogent_serial_config_port):
* src/arm/aeb_serial.c (aeb_serial_config_port):
* src/arm/pid_serial_with_ints.c (pid_serial_config_port): Change so that
the physical port is not modified unless the provided configuration is valid.
 
* src/sparclite/sleb_sdtr.c (sleb_sdtr_config_port):
Using wrong config data.
 
* include/serialio.h: Add macros to support baud rate from CDL.
 
* include/pkgconf/io_serial.h:
* src/mn10300/mn10300_serial.c:
* src/mips/tx3904_serial.c (tx3904_serial_ISR):
* src/sparclite/sleb_sdtr.c:
* src/powerpc/cogent_serial_with_ints.c:
* src/arm/pid_serial_with_ints.c:
* src/arm/aeb_serial.c: Add configury for baud rate and buffer size.
 
1999-03-24 Nick Garnett <nickg@cygnus.co.uk>
 
* src/mips/tx3904_serial.c:
Now uses CYGHWR_HAL_MIPS_CPU_FREQ_ACTUAL to get CPU
frequency. This is a little more accurate than using
CYGHWR_HAL_MIPS_CPU_FREQ.
 
1999-03-24 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/serialio.h (CYGNUM_SERIAL_BAUD_MIN/MAX): Add for completeness.
 
* src/arm/aeb_serial.c (aeb_serial_stop_xmit):
* src/arm/pid_serial_with_ints.c (pid_serial_stop_xmit): Fix typo in comment.
 
1999-03-24 Jesper Skov <jskov@cygnus.co.uk>
 
* tests/ser_test_protocol.inl: Weeded out configs TX39 doesn't
like.
 
* src/powerpc/cogent_serial.h:
Added copyright header.
* tests/ser_test_protocol.inl:
* tests/serial1.c:
* tests/serial2.c:
* tests/serial3.c:
* tests/serial4.c:
* tests/serial5.c:
Don't try to run tests when no IO device has been specified.
1999-03-23 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial1.c, misc/serial2.c, misc/serial3.c, misc/serial4.c,
* misc/serial5.c, misc/ser_test_protocol.inl
Deleted.
 
1999-03-23 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/PKGconf.mak:
* tests/timeout.inl:
* tests/PKGconf.mak:
* tests/serial1.c:
* tests/serial2.c:
* tests/serial3.c:
* tests/serial4.c:
* tests/serial5.c:
* tests/ser_test_protocol.inl:
Moved the serial tests from the misc directory to the tests
directory.
 
1999-03-23 Nick Garnett <nickg@cygnus.co.uk>
 
* src/mn10300/mn10300_serial.c: Now initially mask TX interrupts
at initialization and unmask/remask in start/stop xmit
routines. This has no real effect on the hardware, but the
simulator does not implement the LCR_TXE bit properly, resulting
in spurious TX interrupts during diagnostic output.
This was the cause of the slow output reported in PR 19559.
 
1999-03-23 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Fix "display" strings to have appropriate
case - mostly lower case.
 
1999-03-22 Hugo Tyson <hmt@cygnus.co.uk>
 
* misc/console.c:
* misc/serial.c:
* misc/serial1.c:
* misc/serial2.c:
* misc/serial3.c:
* misc/serial4.c:
* misc/serial5.c:
Use CYGNUM_HAL_STACK_SIZE_TYPICAL for the stack size instead of
CYGNUM_HAL_MINIMUM_STACK_SIZE.
 
1999-03-22 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/mn10300/mn10300_serial.c:
* src/mips/tx3904_serial.c: Add CDL configury.
 
* include/pkgconf/io_serial.h: Update CDL to add device name
configurability for all devices.
 
* src/sparclite/sleb_sdtr.c:
* src/powerpc/cogent_serial_with_ints.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c: Use CDL configured device names.
 
1999-03-22 Jesper Skov <jskov@lassi.cygnus.co.uk>
 
* misc/serial1.c:
* misc/serial2.c:
* misc/serial3.c:
* misc/serial4.c:
* misc/serial5.c:
Requires kernel as well.
 
1999-03-22 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sparclite/sleb_sdtr.c:
Moved include statement to avoid warnings.
 
1999-03-19 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/ser_test_protocol.inl:
* misc/serial5.c:
* misc/PKGconf.mak:
Replace complex and not very stable duplex test with a simpler
test that works better.
Added serial5 using that test.
1999-03-19 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/PKGconf.mak:
* misc/serial1.c:
* misc/serial2.c:
Added API test and made serial2 do simple string output.
1999-03-19 Jesper Skov <jskov@cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c: Changed ToDo comment.
 
1999-03-19 Jesper Skov <jskov@lassi.cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c:
Moved include statement to avoid warnings.
 
1999-03-19 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: More CDL problems.
 
1999-03-18 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Add CDL for SPARClite SLEB.
 
* src/powerpc/cogent_serial_with_ints.c:
* src/arm/pid_serial_with_ints.c:
* src/arm/aeb_serial.c: Update device names to match CDL.
 
* include/pkgconf/io_serial.h: Change names for serial ports to
be CYGPKG_IO_SERIAL_<arch>_<platform>_<port>.
 
1999-03-18 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/ser_test_protocol.inl:
* misc/serial2.c:
First stab at the duplex binary test. Still much fun to be had...
 
1999-03-18 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/ser_test_protocol.inl: Added timeout for PING.
 
1999-03-18 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/common/serial.c: Change ABORT functionality to be DSR safe.
(serial_get_config): Fix typo!
 
* include/pkgconf/io_serial.h: Small change in CDL to make serial
devices tied to the platform and not the serial I/O package. This
means that only the devices appropriate to a given platform can be
enabled.
 
* misc/serial.c: Better use of alarms - only trigger at the time of
the next timeout. Moved timeout functions to new file "timeout.inl".
 
* src/common/serial.c (serial_get_config): Add support for
CYG_IO_GET_CONFIG_SERIAL_INPUT_FLUSH and CYG_IO_GET_CONFIG_SERIAL_ABORT.
* misc/serial.c: Add simple timeout mechanisms.
 
1999-03-17 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c: Conditionalize based on CDL.
 
* include/pkgconf/io_serial.h: Add some CDL configury - not perfect
because of current ~CDL limitations.
 
1999-03-17 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c: Cleaned up a bit. Used for hacking new tests.
 
1999-03-17 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/PKGconf.mak:
* misc/ser_test_protocol.inl:
* misc/serial2.c:
* misc/serial3.c:
* misc/serial4.c:
Put testing protocol implementation in a separate file. Split the
tests in serial2 into separate files.
 
1999-03-16 Nick Garnett <nickg@cygnus.co.uk>
 
* src/mn10300/mn10300_serial.c: Fixed some compiler warnings.
 
1999-03-15 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Change default configurations.
No serial drivers enabled for PID port A or AEB.
 
* src/sparclite/sleb_sdtr.c:
* src/powerpc/cogent_serial_with_ints.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c:
* src/common/haldiag.c:
* src/common/tty.c:
* src/common/serial.c: Add 'CYGDBG_IO_INIT' for control of init
messages.
 
* src/powerpc/cogent_serial_with_ints.c:
* src/sparclite/sleb_sdtr.c:
* src/arm/aeb_serial.c:
* src/arm/pid_serial_with_ints.c: Don't include <cyg/kernel/kapi.h>
 
1999-03-15 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c (serial_test): Fix use of strlen. Fix DONE part
of binary protocol.
 
1999-03-12 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c: Play a bit with timing. Think I broke it :(
Added DONE to BINARY packet.
Proper call to DRAIN.
 
1999-03-12 Nick Garnett <nickg@cygnus.co.uk>
 
* src/mips/tx3904_serial.c: Tidied away some debugging code.
 
1999-03-12 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c: Removed bogus config changes.
 
1999-03-12 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c (serial_test): Check for ser_filter on host (PING
packet).
 
1999-03-11 Jesper Skov <jskov@cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c: Added note.
 
* misc/serial2.c:
Added (almost) proper configuration handling.
Run tests on varying configurations.
 
1999-03-11 Nick Garnett <nickg@cygnus.co.uk>
 
* src/mips/tx3904_serial.c:
Many changes to get working.
 
* misc/console.c (console_test): Fixed compiler warning.
 
* misc/serial2.c:
Added device name for TX39 testing.
Fixed some bugs in Tcyg_io_write() macro.
 
1999-03-10 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c: Added target specific test device name.
 
1999-03-10 John Dallaway <jld@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Correct CDL description spelling.
 
1999-03-10 Jesper Skov <jskov@cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c:
* misc/console.c:
Fixed compiler warnings.
 
1999-03-10 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Improve CDL descriptions.
 
1999-03-10 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c (serial_test): Do some more tests with changed
baud rates.
 
1999-03-09 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c (serial_test): Added workaround for spurious byte
problem. Added a few more tests to run.
 
* src/powerpc/cogent_serial_with_ints.c
(cogent_serial_config_port): Remove interrupt enabling.
 
1999-03-09 Nick Garnett <nickg@cygnus.co.uk>
 
* src/PKGconf.mak:
* src/mips/tx3904_serial.c:
Added initial version of TX39 device driver. Currently untested
but eliminates PR19445.
 
1999-03-09 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c: DRAIN function works now.
 
1999-03-09 Jesper Skov <jskov@cygnus.co.uk>
 
* include/pkgconf/io_serial.h: Only enable one serial driver per
default.
 
1999-03-08 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial2.c (serial_test): Be a bit more aggressive.
 
* src/powerpc/cogent_serial_with_ints.c: Check that configuration
is sensible.
 
1999-03-08 Jesper Skov <jskov@cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c:
Added support for both ports.
 
* include/pkgconf/io_serial.h: Added simple defines for cogent
serial ports. No CDL yet.
 
1999-03-08 Jesper Skov <jskov@cygnus.co.uk>
 
* misc/serial.c: Removed PID references. Fixed compiler warnings.
 
1999-03-08 Jesper Skov <jskov@cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c: Cleaned up a
bit. Actually works now.
 
1999-03-08 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/common/serial.c: Change in cyg_drv_cond_wait() behaviour
means DSR lock should be left alone.
 
1999-03-08 Jesper Skov <jskov@cygnus.co.uk>
PR 19400
* src/powerpc/cogent_serial_with_ints.c (cogent_serial_init): Set
valid interrupt priority.
 
1999-03-05 Nick Garnett <nickg@cygnus.co.uk>
 
* src/mn10300/mn10300_serial.c (mn10300_serial_init):
Added extra test to avoid initializing serial 2 when CYGMON is
present.
Include hal_intr.h explicitly for use in non-kernel
configurations.
 
* src/common/serial.c:
Added extra test before calls to cyg_drv_cond_wait() to avoid race
condition. This is not, however, a complete solution to this
problem. A better solution will be forthcoming.
 
* include/serial.h:
Changed include files used to permit non-kernel configurations to
be built.
 
1999-03-05 Jesper Skov <jskov@cygnus.co.uk>
 
* src/common/haldiag.c: Removed diag_printf declaration.
 
1999-03-05 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* src/mn10300/mn10300_serial.c:
Change CYG_VECTOR_* to CYGNUM_HAL_INTERRUPT_* to get it to compile!
 
1999-03-05 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/powerpc/cogent_serial_with_ints.c (cogent_serial_config_port):
Fix renaming of interrupt vectors.
 
1999-03-05 Gary Thomas <gthomas@cygnus.co.uk>
 
* src/arm/pid_serial_with_ints.c: Fix interrupt vectors.
 
1999-03-03 Gary Thomas <gthomas@cygnus.co.uk>
 
* serial/current/src/arm/pid_serial_with_ints.c:
New [somewhat] configurable drivers for PID.
 
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