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    /openrisc/trunk/rtos/ecos-2.0/packages/devs/serial/sh/sci
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Rev 27 → Rev 174

/v2_0/cdl/ser_sh_sci.cdl
0,0 → 1,113
# ====================================================================
#
# ser_sh_sci.cdl
#
# eCos serial SH/SCI configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): jskov
# Contributors:
# Date: 1999-07-08
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
 
cdl_package CYGPKG_IO_SERIAL_SH_SCI {
display "SH SCI serial device drivers"
 
parent CYGPKG_IO_SERIAL_DEVICES
active_if CYGPKG_IO_SERIAL
active_if CYGPKG_HAL_SH
 
active_if CYGINT_IO_SERIAL_SH_SCI_REQUIRED
 
requires CYGPKG_ERROR
include_dir cyg/io
include_files ; # none _exported_ whatsoever
description "
This option enables the serial device drivers for the
SCI module in Hitachi SH CPUs."
 
compile -library=libextras.a sh_sci_serial.c
 
define_proc {
puts $::cdl_system_header "/***** serial driver proc output start *****/"
puts $::cdl_system_header "#ifndef CYGDAT_IO_SERIAL_DEVICE_HEADER"
puts $::cdl_system_header "#define CYGDAT_IO_SERIAL_DEVICE_HEADER <pkgconf/io_serial_sh_sci.h>"
puts $::cdl_system_header "#endif"
puts $::cdl_system_header "/***** serial driver proc output end *****/"
 
puts $::cdl_header "#include <pkgconf/system.h>";
puts $::cdl_header "#include CYGDAT_IO_SERIAL_SH_SCI_CFG";
}
 
cdl_component CYGPKG_IO_SERIAL_SH_SCI_OPTIONS {
display "SCI serial device driver build options"
flavor none
description "
Package specific build options including control over
compiler flags used only in building this package,
and details of which tests are built."
 
cdl_option CYGPKG_IO_SERIAL_SH_SCI_CFLAGS_ADD {
display "Additional compiler flags"
flavor data
no_define
default_value { "" }
description "
This option modifies the set of compiler flags for
building these serial device drivers. These flags are
used in addition to the set of global flags."
}
 
cdl_option CYGPKG_IO_SERIAL_SH_SCI_CFLAGS_REMOVE {
display "Suppressed compiler flags"
flavor data
no_define
default_value { "" }
description "
This option modifies the set of compiler flags for
building these serial device drivers. These flags are
removed from the set of global flags if present."
}
}
}
 
# EOF ser_sh_sci.cdl
/v2_0/src/sh_sci_serial.c
0,0 → 1,546
//==========================================================================
//
// io/serial/sh/sh_sci_serial.c
//
// SH Serial SCI I/O Interface Module (interrupt driven)
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:gthomas, jskov
// Date: 1999-05-24
// Purpose: SH Serial I/O module (interrupt driven version)
// Description:
//
// Note: Since interrupt sources from the same SCI channel share the same
// interrupt level, there is no risk of races when altering the
// channel's control register from ISRs and DSRs. However, when
// altering the control register from user-level code, interrupts
// must be disabled while the register is being accessed.
//
// FIXME: Receiving in polled mode prevents duplex transfers from working for
// some reason.
//####DESCRIPTIONEND####
//==========================================================================
 
#include <pkgconf/io_serial.h>
#include <pkgconf/io.h>
 
// FIXME: This is necessary since the SCIF driver may be overriding
// CYGDAT_IO_SERIAL_DEVICE_HEADER. Need a better way to include two
// different drivers.
#include <pkgconf/io_serial_sh_sci.h>
 
#include <cyg/io/io.h>
#include <cyg/hal/hal_intr.h>
#include <cyg/io/devtab.h>
#include <cyg/infra/diag.h>
#include <cyg/io/serial.h>
 
#include <cyg/hal/sh_regs.h>
 
// Only compile driver if an inline file with driver details was selected.
#ifdef CYGDAT_IO_SERIAL_SH_SCI_INL
 
// Find the SCI controller register layout from the SCI0 definitions
#if defined(CYGARC_REG_SCI_SCSMR0)
# define SCI_SCSMR (CYGARC_REG_SCI_SCSMR0-CYGARC_REG_SCI_SCSMR0) // serial mode register
# define SCI_SCBRR (CYGARC_REG_SCI_SCBRR0-CYGARC_REG_SCI_SCSMR0) // bit rate register
# define SCI_SCSCR (CYGARC_REG_SCI_SCSCR0-CYGARC_REG_SCI_SCSMR0) // serial control register
# define SCI_SCTDR (CYGARC_REG_SCI_SCTDR0-CYGARC_REG_SCI_SCSMR0) // transmit data register
# define SCI_SCSSR (CYGARC_REG_SCI_SCSSR0-CYGARC_REG_SCI_SCSMR0) // serial status register
# define SCI_SCRDR (CYGARC_REG_SCI_SCRDR0-CYGARC_REG_SCI_SCSMR0) // receive data register
# define SCI_SCSPTR (CYGARC_REG_SCI_SCSPTR0-CYGARC_REG_SCI_SCSMR0)// serial port register
#elif defined(CYGARC_REG_SCI_SCSMR)
# define SCI_SCSMR (CYGARC_REG_SCI_SCSMR-CYGARC_REG_SCI_SCSMR) // serial mode register
# define SCI_SCBRR (CYGARC_REG_SCI_SCBRR-CYGARC_REG_SCI_SCSMR) // bit rate register
# define SCI_SCSCR (CYGARC_REG_SCI_SCSCR-CYGARC_REG_SCI_SCSMR) // serial control register
# define SCI_SCTDR (CYGARC_REG_SCI_SCTDR-CYGARC_REG_SCI_SCSMR) // transmit data register
# define SCI_SCSSR (CYGARC_REG_SCI_SCSSR-CYGARC_REG_SCI_SCSMR) // serial status register
# define SCI_SCRDR (CYGARC_REG_SCI_SCRDR-CYGARC_REG_SCI_SCSMR) // receive data register
# define SCI_SCSPTR (CYGARC_REG_SCI_SCSPTR-CYGARC_REG_SCI_SCSMR) // serial port register
#else
# error "Missing register offsets"
#endif
 
static short select_word_length[] = {
-1,
-1,
CYGARC_REG_SCI_SCSMR_CHR, // 7 bits
0 // 8 bits
};
 
static short select_stop_bits[] = {
-1,
0, // 1 stop bit
-1,
CYGARC_REG_SCI_SCSMR_STOP // 2 stop bits
};
 
static short select_parity[] = {
0, // No parity
CYGARC_REG_SCI_SCSMR_PE, // Even parity
CYGARC_REG_SCI_SCSMR_PE|CYGARC_REG_SCI_SCSMR_OE, // Odd parity
-1,
-1
};
 
static unsigned short select_baud[] = {
0, // Unused
CYGARC_SCBRR_CKSx(50)<<8 | CYGARC_SCBRR_N(50),
CYGARC_SCBRR_CKSx(75)<<8 | CYGARC_SCBRR_N(75),
CYGARC_SCBRR_CKSx(110)<<8 | CYGARC_SCBRR_N(110),
CYGARC_SCBRR_CKSx(134)<<8 | CYGARC_SCBRR_N(134),
CYGARC_SCBRR_CKSx(150)<<8 | CYGARC_SCBRR_N(150),
CYGARC_SCBRR_CKSx(200)<<8 | CYGARC_SCBRR_N(200),
CYGARC_SCBRR_CKSx(300)<<8 | CYGARC_SCBRR_N(300),
CYGARC_SCBRR_CKSx(600)<<8 | CYGARC_SCBRR_N(600),
CYGARC_SCBRR_CKSx(1200)<<8 | CYGARC_SCBRR_N(1200),
CYGARC_SCBRR_CKSx(1800)<<8 | CYGARC_SCBRR_N(1800),
CYGARC_SCBRR_CKSx(2400)<<8 | CYGARC_SCBRR_N(2400),
CYGARC_SCBRR_CKSx(3600)<<8 | CYGARC_SCBRR_N(3600),
CYGARC_SCBRR_CKSx(4800)<<8 | CYGARC_SCBRR_N(4800),
CYGARC_SCBRR_CKSx(7200)<<8 | CYGARC_SCBRR_N(7200),
CYGARC_SCBRR_CKSx(9600)<<8 | CYGARC_SCBRR_N(9600),
CYGARC_SCBRR_CKSx(14400)<<8 | CYGARC_SCBRR_N(14400),
CYGARC_SCBRR_CKSx(19200)<<8 | CYGARC_SCBRR_N(19200),
CYGARC_SCBRR_CKSx(38400)<<8 | CYGARC_SCBRR_N(38400),
CYGARC_SCBRR_CKSx(57600)<<8 | CYGARC_SCBRR_N(57600),
CYGARC_SCBRR_CKSx(115200)<<8 | CYGARC_SCBRR_N(115200),
CYGARC_SCBRR_CKSx(230400)<<8 | CYGARC_SCBRR_N(230400)
};
 
 
typedef struct sh_sci_info {
CYG_ADDRWORD data; // Pointer to data register
CYG_WORD er_int_num, // Error interrupt number
rx_int_num, // Receive interrupt number
tx_int_num; // Transmit interrupt number
 
CYG_ADDRWORD ctrl_base; // Base address of SCI controller
 
cyg_interrupt serial_er_interrupt,
serial_rx_interrupt,
serial_tx_interrupt;
cyg_handle_t serial_er_interrupt_handle,
serial_rx_interrupt_handle,
serial_tx_interrupt_handle;
 
bool tx_enabled;
} sh_sci_info;
 
static bool sh_serial_init(struct cyg_devtab_entry *tab);
static bool sh_serial_putc(serial_channel *chan, unsigned char c);
static Cyg_ErrNo sh_serial_lookup(struct cyg_devtab_entry **tab,
struct cyg_devtab_entry *sub_tab,
const char *name);
static unsigned char sh_serial_getc(serial_channel *chan);
static Cyg_ErrNo sh_serial_set_config(serial_channel *chan, cyg_uint32 key,
const void *xbuf, cyg_uint32 *len);
static void sh_serial_start_xmit(serial_channel *chan);
static void sh_serial_stop_xmit(serial_channel *chan);
 
static cyg_uint32 sh_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data);
static void sh_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count,
cyg_addrword_t data);
static cyg_uint32 sh_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data);
static void sh_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count,
cyg_addrword_t data);
static cyg_uint32 sh_serial_er_ISR(cyg_vector_t vector, cyg_addrword_t data);
static void sh_serial_er_DSR(cyg_vector_t vector, cyg_ucount32 count,
cyg_addrword_t data);
 
static SERIAL_FUNS(sh_serial_funs,
sh_serial_putc,
sh_serial_getc,
sh_serial_set_config,
sh_serial_start_xmit,
sh_serial_stop_xmit
);
 
#include CYGDAT_IO_SERIAL_SH_SCI_INL
 
// Internal function to actually configure the hardware to desired baud rate,
// etc.
static bool
sh_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config,
bool init)
{
cyg_uint16 baud_divisor = select_baud[new_config->baud];
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
cyg_uint8 _scr, _smr;
 
// Check configuration request
if ((-1 == select_word_length[(new_config->word_length -
CYGNUM_SERIAL_WORD_LENGTH_5)])
|| -1 == select_stop_bits[new_config->stop]
|| -1 == select_parity[new_config->parity]
|| baud_divisor == 0)
return false;
 
// Disable SCI interrupts while changing hardware
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, 0);
 
// Set databits, stopbits and parity.
_smr = select_word_length[(new_config->word_length -
CYGNUM_SERIAL_WORD_LENGTH_5)] |
select_stop_bits[new_config->stop] |
select_parity[new_config->parity];
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSMR, _smr);
 
// Set baud rate.
_smr &= ~CYGARC_REG_SCI_SCSMR_CKSx_MASK;
_smr |= baud_divisor >> 8;
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSMR, _smr);
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCBRR, baud_divisor & 0xff);
 
// Clear the status register.
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSSR, 0);
 
if (init) {
// Always enable transmitter and receiver.
_scr = CYGARC_REG_SCI_SCSCR_TE | CYGARC_REG_SCI_SCSCR_RE;
 
if (chan->out_cbuf.len != 0)
_scr |= CYGARC_REG_SCI_SCSCR_TIE; // enable tx interrupts
 
if (chan->in_cbuf.len != 0)
_scr |= CYGARC_REG_SCI_SCSCR_RIE; // enable rx interrupts
}
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
 
if (new_config != &chan->config) {
chan->config = *new_config;
}
return true;
}
 
// Function to initialize the device. Called at bootstrap time.
static bool
sh_serial_init(struct cyg_devtab_entry *tab)
{
serial_channel *chan = (serial_channel *)tab->priv;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
#ifdef CYGDBG_IO_INIT
diag_printf("SH SERIAL init - dev: %x.%d\n",
sh_chan->data, sh_chan->rx_int_num);
#endif
// Really only required for interrupt driven devices
(chan->callbacks->serial_init)(chan);
 
if (chan->out_cbuf.len != 0) {
cyg_drv_interrupt_create(sh_chan->tx_int_num,
3,
(cyg_addrword_t)chan, // Data item passed to interrupt handler
sh_serial_tx_ISR,
sh_serial_tx_DSR,
&sh_chan->serial_tx_interrupt_handle,
&sh_chan->serial_tx_interrupt);
cyg_drv_interrupt_attach(sh_chan->serial_tx_interrupt_handle);
cyg_drv_interrupt_unmask(sh_chan->tx_int_num);
sh_chan->tx_enabled = false;
}
if (chan->in_cbuf.len != 0) {
// Receive interrupt
cyg_drv_interrupt_create(sh_chan->rx_int_num,
3,
(cyg_addrword_t)chan, // Data item passed to interrupt handler
sh_serial_rx_ISR,
sh_serial_rx_DSR,
&sh_chan->serial_rx_interrupt_handle,
&sh_chan->serial_rx_interrupt);
cyg_drv_interrupt_attach(sh_chan->serial_rx_interrupt_handle);
// Receive error interrupt
cyg_drv_interrupt_create(sh_chan->er_int_num,
3,
(cyg_addrword_t)chan, // Data item passed to interrupt handler
sh_serial_er_ISR,
sh_serial_er_DSR,
&sh_chan->serial_er_interrupt_handle,
&sh_chan->serial_er_interrupt);
cyg_drv_interrupt_attach(sh_chan->serial_er_interrupt_handle);
// This unmasks both interrupt sources.
cyg_drv_interrupt_unmask(sh_chan->rx_int_num);
}
sh_serial_config_port(chan, &chan->config, true);
return true;
}
 
// This routine is called when the device is "looked" up (i.e. attached)
static Cyg_ErrNo
sh_serial_lookup(struct cyg_devtab_entry **tab,
struct cyg_devtab_entry *sub_tab,
const char *name)
{
serial_channel *chan = (serial_channel *)(*tab)->priv;
 
// Really only required for interrupt driven devices
(chan->callbacks->serial_init)(chan);
return ENOERR;
}
 
// Send a character to the device output buffer.
// Return 'true' if character is sent to device
static bool
sh_serial_putc(serial_channel *chan, unsigned char c)
{
cyg_uint8 _ssr;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSSR, _ssr);
if (_ssr & CYGARC_REG_SCI_SCSSR_TDRE) {
// Transmit buffer is empty
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCTDR, c);
// Clear empty flag.
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSSR,
CYGARC_REG_SCI_SCSSR_CLEARMASK & ~CYGARC_REG_SCI_SCSSR_TDRE);
return true;
} else {
// No space
return false;
}
}
 
// Fetch a character from the device input buffer, waiting if necessary
static unsigned char
sh_serial_getc(serial_channel *chan)
{
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
unsigned char c;
cyg_uint8 _ssr;
 
do {
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSSR, _ssr);
} while ((_ssr & CYGARC_REG_SCI_SCSSR_RDRF) == 0);
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCRDR, c);
 
// Clear buffer full flag.
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSSR,
CYGARC_REG_SCI_SCSSR_CLEARMASK & ~CYGARC_REG_SCI_SCSSR_RDRF);
 
return c;
}
 
// Set up the device characteristics; baud rate, etc.
static Cyg_ErrNo
sh_serial_set_config(serial_channel *chan, cyg_uint32 key,
const void *xbuf, cyg_uint32 *len)
{
switch (key) {
case CYG_IO_SET_CONFIG_SERIAL_INFO:
{
cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
if ( *len < sizeof(cyg_serial_info_t) ) {
return -EINVAL;
}
*len = sizeof(cyg_serial_info_t);
if ( true != sh_serial_config_port(chan, config, false) )
return -EINVAL;
}
break;
default:
return -EINVAL;
}
return ENOERR;
}
 
// Enable the transmitter on the device
static void
sh_serial_start_xmit(serial_channel *chan)
{
cyg_uint8 _scr;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
 
sh_chan->tx_enabled = true;
 
// Mask the interrupts (all sources of the unit) while changing
// the CR since a rx interrupt in the middle of this would result
// in a bad CR state.
cyg_drv_interrupt_mask(sh_chan->rx_int_num);
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr |= CYGARC_REG_SCI_SCSCR_TIE; // Enable xmit interrupt
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
 
cyg_drv_interrupt_unmask(sh_chan->rx_int_num);
}
 
// Disable the transmitter on the device
static void
sh_serial_stop_xmit(serial_channel *chan)
{
cyg_uint8 _scr;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
 
sh_chan->tx_enabled = false;
 
// Mask the interrupts (all sources of the unit) while changing
// the CR since a rx interrupt in the middle of this would result
// in a bad CR state.
cyg_drv_interrupt_mask(sh_chan->rx_int_num);
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr &= ~CYGARC_REG_SCI_SCSCR_TIE; // Disable xmit interrupt
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
 
cyg_drv_interrupt_unmask(sh_chan->rx_int_num);
}
 
// Serial I/O - low level tx interrupt handler (ISR)
static cyg_uint32
sh_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
cyg_uint8 _scr;
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr &= ~CYGARC_REG_SCI_SCSCR_TIE; // mask out tx interrupts
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
 
return CYG_ISR_CALL_DSR; // Cause DSR to be run
}
 
// Serial I/O - high level tx interrupt handler (DSR)
static void
sh_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
 
(chan->callbacks->xmt_char)(chan);
 
if (sh_chan->tx_enabled) {
cyg_uint8 _scr;
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr |= CYGARC_REG_SCI_SCSCR_TIE; // unmask tx interrupts
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
}
}
 
// Serial I/O - low level RX interrupt handler (ISR)
static cyg_uint32
sh_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
cyg_uint8 _scr;
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr &= ~CYGARC_REG_SCI_SCSCR_RIE; // mask rx interrupts
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
return CYG_ISR_CALL_DSR; // Cause DSR to be run
}
 
// Serial I/O - high level rx interrupt handler (DSR)
static void
sh_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
cyg_uint8 _ssr, _scr;
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSSR, _ssr);
if (_ssr & CYGARC_REG_SCI_SCSSR_RDRF) {
cyg_uint8 _c;
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCRDR, _c);
// Clear buffer full flag.
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSSR,
CYGARC_REG_SCI_SCSSR_CLEARMASK & ~CYGARC_REG_SCI_SCSSR_RDRF);
 
(chan->callbacks->rcv_char)(chan, _c);
}
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr |= CYGARC_REG_SCI_SCSCR_RIE; // unmask rx interrupts
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
}
 
static volatile int sh_serial_error_orer = 0;
static volatile int sh_serial_error_fer = 0;
static volatile int sh_serial_error_per = 0;
 
// Serial I/O - low level error interrupt handler (ISR)
static cyg_uint32
sh_serial_er_ISR(cyg_vector_t vector, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
cyg_uint8 _scr;
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr &= ~CYGARC_REG_SCI_SCSCR_RIE; // mask rx interrupts
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
return CYG_ISR_CALL_DSR; // Cause DSR to be run
}
 
// Serial I/O - high level error interrupt handler (DSR)
static void
sh_serial_er_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
{
serial_channel *chan = (serial_channel *)data;
sh_sci_info *sh_chan = (sh_sci_info *)chan->dev_priv;
cyg_uint8 _ssr, _ssr2, _scr;
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSSR, _ssr);
_ssr2 = CYGARC_REG_SCI_SCSSR_CLEARMASK;
 
if (_ssr & CYGARC_REG_SCI_SCSSR_ORER) {
_ssr2 &= ~CYGARC_REG_SCI_SCSSR_ORER;
sh_serial_error_orer++;
}
if (_ssr & CYGARC_REG_SCI_SCSSR_FER) {
_ssr2 &= ~CYGARC_REG_SCI_SCSSR_FER;
sh_serial_error_fer++;
}
if (_ssr & CYGARC_REG_SCI_SCSSR_PER) {
_ssr2 &= ~CYGARC_REG_SCI_SCSSR_PER;
sh_serial_error_per++;
}
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSSR, _ssr2);
 
HAL_READ_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
_scr |= CYGARC_REG_SCI_SCSCR_RIE; // unmask rx interrupts
HAL_WRITE_UINT8(sh_chan->ctrl_base+SCI_SCSCR, _scr);
}
 
#endif // ifdef CYGDAT_IO_SERIAL_SH_SCI_INL
/v2_0/ChangeLog
0,0 → 1,167
2003-02-24 Jonathan Larmour <jifl@eCosCentric.com>
 
* cdl/ser_sh_sci.cdl: Remove irrelevant doc link.
 
2002-05-08 Jesper Skov <jskov@redhat.com>
 
* src/sh_sci_serial.c: Register renaming.
 
2002-04-23 Jesper Skov <jskov@redhat.com>
 
* src/sh_sci_serial.c: Compute register offsets from register
definitions. Don't define SCI base.
 
2001-02-26 Jesper Skov <jskov@redhat.com>
 
* src/sh_sci_serial.c (sh_serial_er_DSR): Enable interrupts on
exit.
 
2000-09-26 Jesper Skov <jskov@redhat.com>
 
* cdl/ser_sh_sci.cdl: Minor hack to allow both SCI and SCIF
packages to be used at the same time.
* src/sh_sci_serial.c: Same.
 
2000-09-05 Jesper Skov <jskov@redhat.com>
 
* src/sh_sci_serial.c: Moved to generic SH SCI package.
* ChangeLog: Removed all non-SCI related references.
2000-08-01 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* src/sh_sci_serial.c (sh_serial_set_config): Now use keys to make
more flexible.
 
2000-06-22 Hugo Tyson <hmt@cygnus.co.uk>
 
* cdl/<yournamehere>.cdl: Remove the comment on the empty
include_files directive; the tools now support this correctly.
This keeps internal include files internal.
 
2000-04-11 Hugo Tyson <hmt@cygnus.co.uk>
 
* cdl/ser_sh_edk7708.cdl: Change the parent from CYGPKG_IO_SERIAL
(which is enabled most of the time) to CYGPKG_IO_SERIAL_DEVICES
(which is not...) thus allowing convenient control independent of
platform. Also enable all individual devices by default, now, so
that they can be enabled simply by enabling the above new parent.
 
2000-04-11 Jesper Skov <jskov@redhat.com>
 
* cdl/ser_sh_edk7708.cdl: Move compile statement into a
sub-component.
 
2000-04-07 Hugo Tyson <hmt@cygnus.co.uk>
 
* ecos.db: Re-organize device packages. This is a massive change
involving deleting all the sources for serial and ethernet drivers
from where they used to live in
packages/io/serial/current/src/ARCH/PLATFORM.[ch]
packages/net/drivers/eth/PLATFORM/current/src/...
and reinstating them in
packages/devs/serial/ARCH/PLATFORM/current/src/...
packages/devs/eth/ARCH/PLATFORM/current/src/...
 
All these new packages are properly defined in ecos.db, and are
all of type "hardware" so that a "target" can grab them.
This directory layout is descriptive of the devices we have right
now, arch and platform are separate levels just to make it easier
to navigate in the filesystem and similar to the HAL structure in
the filesystem.
 
It is *not* prescriptive of future work; for example, the mythical
common highly-portable 16550 serial driver which works on many
targets would be called "devs/serial/s16550/current", or a serial
device for a particular board (cogent springs to mind) that can
work with different CPUs fitted is "devs/serial/cogent/current".
 
Changelogs have been preserved and replicated over all the new
packages, so that no history is lost.
 
The contents of individual source files are unchanged; they build
in just the same emvironment except for a very few cases where the
config file name changed in this movement.
 
Targets in ecos.db have been redefined to bring in all relevant
hardware packages including net and serial drivers (but the newly
included packages are only active if their desired parent is
available.)
The names of CDL options (and their #defines of course) stay the
same for the serial drivers, for backward compatibility.
 
* templates/*/current.ect: these have had CYGPKG_IO_SERIAL added
rather than it being in (almost) all target definitions.
2000-03-31 Jesper Skov <jskov@redhat.com>
 
* cdl/ser_sh_edk7708.cdl: Limit legal baud rate range.
* src/sh/sh_sci_serial.c: Use baud rate macro instead of hardwired
constants.
 
2000-02-11 Jesper Skov <jskov@redhat.com>
 
* src/sh/sh_sci_7708.inl (DEVTAB_ENTRY):
serial_devio => cyg_io_serial_devio
 
1999-06-16 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sh/sh_serial.c: [removed]
* src/sh/sh_sci_serial.c: [added]
* src/sh/sh_sci_7708.inl: [added]
Renamed CDL options and restructered driver.
Fixed CDL typo.
1999-05-31 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sh/sh_serial.c: Fixed receive interrupts and added handler for
error interrupts.
 
1999-05-26 Jesper Skov <jskov@cygnus.co.uk>
 
* src/sh/sh_serial.c: Added more baud rate values. Disabled
interrupt driven receive. Fixed config_port to enable proper
interrupt flags.
 
1999-05-24 Jesper Skov <jskov@cygnus.co.uk>
 
* src/PKGconf.mak:
* include/pkgconf/io_serial.h:
* src/sh/sh_serial.c:
Added sh driver.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================

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