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  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/rtos/ecos-2.0/packages/hal/mips/mips32/v2_0/src
    from Rev 27 to Rev 174
    ↔ Reverse comparison
  •

Rev 27 → Rev 174

/mips_mips32.ld
0,0 → 1,386
//===========================================================================
//
// MLT linker script for MIPS32
//
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
 
#include <pkgconf/system.h>
 
OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips",
"elf32-littlemips")
/* The preprocessor defines mips, but we know we're mips :-) */
#undef mips
OUTPUT_ARCH(mips:isa32)
 
STARTUP(vectors.o)
ENTRY(reset_vector)
#ifdef EXTRAS
INPUT(extras.o)
#endif
#if (__GNUC__ >= 3)
GROUP(libtarget.a libgcc.a libsupc++.a)
#else
GROUP(libtarget.a libgcc.a)
#endif
 
/* FIXME: The MLT should pass in the required alignment since it must be
* the same as the VMA's alignment. As a result of this bug, all the MIPS32
* ROM mlt files have alignment 8, when some should have alignment 4
* (902557-CR)
*/
#define ALIGN_LMA 0x40
#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))
#define LMA_EQ_VMA
#define FORCE_OUTPUT . = .
 
#define SECTIONS_BEGIN
 
#if defined(CYG_HAL_STARTUP_RAM)
 
/* this version for RAM startup */
#define SECTION_rom_vectors(_region_, _vma_, _lma_) \
.rom_vectors _vma_ : _lma_ \
{ KEEP (*(.utlb_vector)) \
. = ALIGN(0x80); KEEP(*(.other_vector)) \
/* debug and reset vector not used in RAM version */ \
KEEP(*(.debug_vector)) \
KEEP (*(.reset_vector)) } \
> _region_
 
#elif defined(CYG_HAL_STARTUP_ROM)
 
/* this version for ROM startup */
#define SECTION_rom_vectors(_region_, _vma_, _lma_) \
.rom_vectors _vma_ : _lma_ \
{ KEEP (*(.reset_vector)) \
. = ALIGN(0x200); KEEP (*(.utlb_vector)) \
. = . + 0x100; \
. = ALIGN(0x80); KEEP(*(.other_vector)) \
. = . + 0x80; \
. = ALIGN(0x80); KEEP(*(.debug_vector)) } \
> _region_
 
#endif /* ROM startup version of ROM vectors */
 
#define SECTION_ROMISC(_region_, _vma_, _lma_) \
.interp _vma_ : _lma_ { *(.interp) } > _region_ \
.hash : FOLLOWING(.interp) { *(.hash) } > _region_ \
.dynsym : FOLLOWING(.hash) { *(.dynsym) } > _region_ \
.dynstr : FOLLOWING(.dynsym) { *(.dynstr) } > _region_ \
.gnu.version : FOLLOWING(.dynstr) { *(.gnu.version) } > _region_ \
.gnu.version_d : FOLLOWING(.gnu.version) { *(.gnu.version_d) } > _region_ \
.gnu.version_r : FOLLOWING(.gnu.version_d) { *(.gnu.version_r) } > _region_ \
.plt : FOLLOWING(.gnu.version_r) { *(.plt) } > _region_
 
#define SECTION_RELOCS(_region_, _vma_, _lma_) \
.rel.text : \
{ \
*(.rel.text) \
*(.rel.text.*) \
*(.rel.gnu.linkonce.t*) \
} > _region_ \
.rela.text : \
{ \
*(.rela.text) \
*(.rela.text.*) \
*(.rela.gnu.linkonce.t*) \
} > _region_ \
.rel.data : \
{ \
*(.rel.data) \
*(.rel.data.*) \
*(.rel.gnu.linkonce.d*) \
} > _region_ \
.rela.data : \
{ \
*(.rela.data) \
*(.rela.data.*) \
*(.rela.gnu.linkonce.d*) \
} > _region_ \
.rel.rodata : \
{ \
*(.rel.rodata) \
*(.rel.rodata.*) \
*(.rel.gnu.linkonce.r*) \
} > _region_ \
.rela.rodata : \
{ \
*(.rela.rodata) \
*(.rela.rodata.*) \
*(.rela.gnu.linkonce.r*) \
} > _region_ \
.rel.got : { *(.rel.got) } > _region_ \
.rela.got : { *(.rela.got) } > _region_ \
.rel.ctors : { *(.rel.ctors) } > _region_ \
.rela.ctors : { *(.rela.ctors) } > _region_ \
.rel.dtors : { *(.rel.dtors) } > _region_ \
.rela.dtors : { *(.rela.dtors) } > _region_ \
.rel.init : { *(.rel.init) } > _region_ \
.rela.init : { *(.rela.init) } > _region_ \
.rel.fini : { *(.rel.fini) } > _region_ \
.rela.fini : { *(.rela.fini) } > _region_ \
.rel.bss : { *(.rel.bss) } > _region_ \
.rela.bss : { *(.rela.bss) } > _region_ \
.rel.plt : { *(.rel.plt) } > _region_ \
.rela.plt : { *(.rela.plt) } > _region_ \
.rel.dyn : { *(.rel.dyn) } > _region_
 
#define SECTION_init(_region_, _vma_, _lma_) \
.init _vma_ : _lma_ \
{ \
FORCE_OUTPUT; KEEP (*(.init)) \
} > _region_ =0
 
#define SECTION_text(_region_, _vma_, _lma_) \
.text _vma_ : _lma_ \
{ \
_stext = .; _ftext = . ; \
*(.text) \
*(.text.*) \
*(.stub) \
*(.gnu.warning) \
*(.gnu.linkonce.t*) \
*(.mips16.fn.*) *(.mips16.call.*) \
} > _region_ =0 \
_etext = .; PROVIDE (etext = .);
 
#define SECTION_fini(_region_, _vma_, _lma_) \
.fini _vma_ : _lma_ \
{ \
FORCE_OUTPUT; KEEP (*(.fini)) \
} > _region_ =0
 
#define SECTION_rodata(_region_, _vma_, _lma_) \
.rodata _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) \
} > _region_
 
#define SECTION_rodata1(_region_, _vma_, _lma_) \
.rodata1 _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.rodata1) *(.rodata1.*) \
} > _region_
 
#define SECTION_vsr_table(_region_, _vma_, _lma_) \
.vsr_table _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.vsr_table) \
} > _region_
 
#define SECTION_data(_region_, _vma_, _lma_) \
.data _vma_ : _lma_ \
{ \
__ram_data_start = ABSOLUTE (.); _fdata = . ; \
*(.data) *(.data.*) *(.gnu.linkonce.d*) \
*( .2ram.*) \
. = ALIGN (8); \
SORT(CONSTRUCTORS) \
} > _region_ \
__rom_data_start = LOADADDR(.data);
 
#define SECTION_data1(_region_, _vma_, _lma_) \
.data1 _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.data1) *(.data1.*) \
} > _region_
 
#define SECTION_eh_frame(_region_, _vma_, _lma_) \
.eh_frame _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.eh_frame) \
} > _region_
 
#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \
.gcc_except_table _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.gcc_except_table) \
} > _region_
 
 
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
 
/* We don't want to include the .ctors section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
 
/* FIXME: We shouldn't need to define __CTOR_LIST__/__CTOR_END__
and __DTOR_LIST__/__DTOR_END__ except by the PROVIDE lines.
However this doesn't work for old (99r1-era) toolchains, so
leave it for now. */
 
#define SECTION_ctors(_region_, _vma_, _lma_) \
.ctors _vma_ : _lma_ \
{ \
FORCE_OUTPUT; \
KEEP (*crtbegin.o(.ctors)) \
__CTOR_LIST__ = .; \
PROVIDE (__CTOR_LIST__ = .); \
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) \
KEEP (*(SORT(.ctors.*))) \
KEEP (*(.ctors)) \
__CTOR_END__ = .; \
PROVIDE (__CTOR_END__ = .); \
} > _region_
 
#define SECTION_dtors(_region_, _vma_, _lma_) \
.dtors _vma_ : _lma_ \
{ \
FORCE_OUTPUT; \
KEEP (*crtbegin.o(.dtors)) \
__DTOR_LIST__ = .; \
PROVIDE (__DTOR_LIST__ = .); \
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) \
KEEP (*(SORT(.dtors.*))) \
KEEP (*(.dtors)) \
__DTOR_END__ = .; \
PROVIDE (__DTOR_END__ = .); \
} > _region_
 
#define SECTION_devtab(_region_, _vma_, _lma_) \
.devtab _vma_ : _lma_ \
{ \
FORCE_OUTPUT; \
KEEP(*( SORT (.ecos.table.*))) ; \
} > _region_
 
#define SECTION_got(_region_, _vma_, _lma_) \
_gp = ALIGN(16) + 0x7ff0; \
.got _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.got.plt) *(.got) \
} > _region_
 
#define SECTION_dynamic(_region_, _vma_, _lma_) \
.dynamic _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.dynamic) \
} > _region_
 
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
 
#define SECTION_sdata(_region_, _vma_, _lma_) \
.sdata _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.sdata) *(.sdata.*) *(.gnu.linkonce.s*) \
} > _region_
 
#define SECTION_lit8(_region_, _vma_, _lma_) \
.lit8 _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.lit8) \
} > _region_
 
#define SECTION_lit4(_region_, _vma_, _lma_) \
.lit4 : FOLLOWING(.lit8) \
{ \
FORCE_OUTPUT; *(.lit4) \
} > _region_ \
__ram_data_end = .; _edata = . ; \
PROVIDE (edata = .);
 
#define SECTION_sbss(_region_, _vma_, _lma_) \
__bss_start = .; _fbss = .; \
.sbss _vma_ : _lma_ \
{ \
FORCE_OUTPUT; *(.dynsbss) *(.sbss) *(.sbss.*) *(.scommon) \
} > _region_
 
#define SECTION_bss(_region_, _vma_, _lma_) \
.bss _vma_ : _lma_ \
{ \
*(.dynbss) *(.bss) *(.bss.*) *(COMMON) \
} > _region_ \
__bss_end = .;
 
/* The /DISCARD/ section ensures that the output will not contain a
* .mdebug section as it confuses GDB. This is a workaround for CR 100804.
*/
 
#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \
/* Stabs debugging sections. */ \
.stab 0 : { *(.stab) } \
.stabstr 0 : { *(.stabstr) } \
.stab.excl 0 : { *(.stab.excl) } \
.stab.exclstr 0 : { *(.stab.exclstr) } \
.stab.index 0 : { *(.stab.index) } \
.stab.indexstr 0 : { *(.stab.indexstr) } \
.comment 0 : { *(.comment) } \
/* DWARF debug sections. \
Symbols in the DWARF debugging sections are relative to \
the beginning of the section so we begin them at 0. */ \
/* DWARF 1 */ \
.debug 0 : { *(.debug) } \
.line 0 : { *(.line) } \
/* GNU DWARF 1 extensions */ \
.debug_srcinfo 0 : { *(.debug_srcinfo) } \
.debug_sfnames 0 : { *(.debug_sfnames) } \
/* DWARF 1.1 and DWARF 2 */ \
.debug_aranges 0 : { *(.debug_aranges) } \
.debug_pubnames 0 : { *(.debug_pubnames) } \
/* DWARF 2 */ \
.debug_info 0 : { *(.debug_info) } \
.debug_abbrev 0 : { *(.debug_abbrev) } \
.debug_line 0 : { *(.debug_line) } \
.debug_frame 0 : { *(.debug_frame) } \
.debug_str 0 : { *(.debug_str) } \
.debug_loc 0 : { *(.debug_loc) } \
.debug_macinfo 0 : { *(.debug_macinfo) } \
/* SGI/MIPS DWARF 2 extensions */ \
.debug_weaknames 0 : { *(.debug_weaknames) } \
.debug_funcnames 0 : { *(.debug_funcnames) } \
.debug_typenames 0 : { *(.debug_typenames) } \
.debug_varnames 0 : { *(.debug_varnames) } \
/* These must appear regardless of . */ \
.gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } \
.gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } \
/DISCARD/ 0 : { *(.mdebug) }
 
#include CYGHWR_MEMORY_LAYOUT_LDI
 
hal_vsr_table = 0x80000200;
hal_virtual_vector_table = 0x80000300;
/var_misc.c
0,0 → 1,225
//==========================================================================
//
// var_misc.c
//
// HAL implementation miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jlarmour, dmoseley
// Date: 2000-07-14
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // Base types
#include <cyg/infra/cyg_trac.h> // tracing macros
#include <cyg/infra/cyg_ass.h> // assertion macros
 
#include <cyg/hal/hal_intr.h>
 
#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
#include <cyg/hal/hal_arch.h>
#include <cyg/hal/var_arch.h>
#include <cyg/hal/plf_io.h>
#include <cyg/hal/hal_cache.h>
 
/*------------------------------------------------------------------------*/
// Array which stores the configured priority levels for the configured
// interrupts.
 
volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT];
 
/*------------------------------------------------------------------------*/
 
void hal_variant_init(void)
{
}
 
/*
* Uncomment the following to allow for dynamic cache sizing.
* Currently we are going to assume the exact part specified in the ecosconfig stuff.
* Perhaps in the near future this can all be done dynamically.
*/
/* define DYNAMIC_CACHE_SIZING */
 
#if 0
#ifndef DYNAMIC_CACHE_SIZING
#warning " \n\
STILL NEED TO IMPLEMENT DYNAMIC_CACHE_SIZING. \n\
ALSO, the HAL_PLATFORM_CPU/etc defines need to be dynamic. \n\
ALSO, need to do big endian stuff as well. \n\
Determine if network debug is necessary. \n\
Remove MIPS memc_init code"
#endif
#endif
 
/*------------------------------------------------------------------------*/
// Initialize the caches
 
int hal_init_icache(unsigned long config1_val)
{
#ifdef DYNAMIC_CACHE_SIZING
int icache_linesize, icache_assoc, icache_sets, icache_lines, icache_size;
unsigned long cache_addr;
 
switch (config1_val & CONFIG1_IL)
{
case CONFIG1_ICACHE_LINE_SIZE_16_BYTES: icache_linesize = 16; break;
case CONFIG1_ICACHE_NOT_PRESET: return -1; break;
default: /* Error */ return -1; break;
}
 
switch (config1_val & CONFIG1_IA)
{
case CONFIG1_ICACHE_DIRECT_MAPPED: icache_assoc = 1; break;
case CONFIG1_ICACHE_2_WAY: icache_assoc = 2; break;
case CONFIG1_ICACHE_3_WAY: icache_assoc = 3; break;
case CONFIG1_ICACHE_4_WAY: icache_assoc = 4; break;
default: /* Error */ return -1; break;
}
 
switch (config1_val & CONFIG1_IS)
{
case CONFIG1_ICACHE_64_SETS_PER_WAY: icache_sets = 64; break;
case CONFIG1_ICACHE_128_SETS_PER_WAY: icache_sets = 128; break;
case CONFIG1_ICACHE_256_SETS_PER_WAY: icache_sets = 256; break;
default: /* Error */ return -1; break;
}
 
icache_lines = icache_sets * icache_assoc;
icache_size = icache_lines * icache_linesize;
#endif /* DYNAMIC_CACHE_SIZING */
 
/*
* Reset does not invalidate the cache so let's do so now.
*/
HAL_ICACHE_INVALIDATE_ALL();
 
#ifdef DYNAMIC_CACHE_SIZING
return icache_size;
#else
return HAL_ICACHE_SIZE;
#endif
}
 
int hal_init_dcache(unsigned long config1_val)
{
#ifdef DYNAMIC_CACHE_SIZING
int dcache_linesize, dcache_assoc, dcache_sets, dcache_lines, dcache_size;
 
switch (config1_val & CONFIG1_DL)
{
case CONFIG1_DCACHE_LINE_SIZE_16_BYTES: dcache_linesize = 16; break;
case CONFIG1_DCACHE_NOT_PRESET: return -1; break;
default: /* Error */ return -1; break;
}
 
switch (config1_val & CONFIG1_DA)
{
case CONFIG1_DCACHE_DIRECT_MAPPED: dcache_assoc = 1; break;
case CONFIG1_DCACHE_2_WAY: dcache_assoc = 2; break;
case CONFIG1_DCACHE_3_WAY: dcache_assoc = 3; break;
case CONFIG1_DCACHE_4_WAY: dcache_assoc = 4; break;
default: /* Error */ return -1; break;
}
 
switch (config1_val & CONFIG1_DS)
{
case CONFIG1_DCACHE_64_SETS_PER_WAY: dcache_sets = 64; break;
case CONFIG1_DCACHE_128_SETS_PER_WAY: dcache_sets = 128; break;
case CONFIG1_DCACHE_256_SETS_PER_WAY: dcache_sets = 256; break;
default: /* Error */ return -1; break;
}
 
dcache_lines = dcache_sets * dcache_assoc;
dcache_size = dcache_lines * dcache_linesize;
#endif /* DYNAMIC_CACHE_SIZING */
 
/*
* Reset does not invalidate the cache so let's do so now.
*/
HAL_DCACHE_INVALIDATE_ALL();
 
#ifdef DYNAMIC_CACHE_SIZING
return dcache_size;
#else
return HAL_DCACHE_SIZE;
#endif
}
 
void hal_c_cache_init(unsigned long config1_val)
{
volatile unsigned val;
 
if (hal_init_icache(config1_val) == -1)
{
/* Error */
;
}
 
if (hal_init_dcache(config1_val) == -1)
{
/* Error */
;
}
 
// enable cached KSEG0
asm volatile("mfc0 %0,$16;" : "=r"(val));
val &= ~3;
asm volatile("mtc0 %0,$16;" : : "r"(val));
}
 
void hal_icache_sync(void)
{
HAL_ICACHE_INVALIDATE_ALL();
}
 
void hal_dcache_sync(void)
{
HAL_DCACHE_INVALIDATE_ALL();
}
 
/*------------------------------------------------------------------------*/
/* End of var_misc.c */
/variant.S
0,0 → 1,77
##=============================================================================
##
## variant.S
##
## MIPS 32 variant code
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): dmoseley
## Contributors: dmoseley
## Date: 2000-06-07
## Purpose: MIPS 32 variant code
## Description: Variant specific code for MIPS32 architecture.
##
##
##
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <pkgconf/system.h>
#include <pkgconf/hal.h>
 
#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
#include <cyg/hal/mips-regs.h>
 
#ifdef CYGPKG_KERNEL
# include <pkgconf/kernel.h>
#endif
#include <cyg/hal/arch.inc>
 
#include <cyg/hal/var_arch.h>
#include <cyg/hal/hal_arch.h>
 
##-----------------------------------------------------------------------------
# Variant Initialization.
# This code performs variant specific initialization.
 
##-----------------------------------------------------------------------------
## end of variant.S

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