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  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/rtos/ecos-2.0/packages/hal/mips/ref4955/v2_0/include
    from Rev 27 to Rev 174
    ↔ Reverse comparison
  •

Rev 27 → Rev 174

/plf_intr.h
0,0 → 1,320
#ifndef CYGONCE_HAL_PLF_INTR_H
#define CYGONCE_HAL_PLF_INTR_H
 
//==========================================================================
//
// plf_intr.h
//
// REF4955 Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors: jskov, nickg
// Date: 2000-05-09
// Purpose: Define Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for the REF4955 board.
//
// Usage:
// #include <cyg/hal/plf_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
//--------------------------------------------------------------------------
// Interrupt vectors.
 
#ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
 
 
// The first 6 correspond to the interrupt lines in the status/cause regs
#define CYGNUM_HAL_INTERRUPT_V320USC_INT0 0
#define CYGNUM_HAL_INTERRUPT_V320USC_INT1 1
#define CYGNUM_HAL_INTERRUPT_EXT 2
#define CYGNUM_HAL_INTERRUPT_LAN 3
#define CYGNUM_HAL_INTERRUPT_IO 4
#define CYGNUM_HAL_INTERRUPT_COMPARE 5
 
 
#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN)
 
// This overlaps with LB_MBI below but it doesn't matter. It's only used
// by the HAL to access the special chaining entry in the ISR tables.
// All other attempted access to the ISR table will be redirected to this
// entry (curtsey of HAL_TRANSLATE_VECTOR). The other vector definitions
// are still valid, but only for enable/disable/config etc. (i.e., in
// chaining mode they have associated entries in the ISR tables).
#define CYGNUM_HAL_INTERRUPT_CHAINING 6
 
#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \
(_index_) = CYGNUM_HAL_INTERRUPT_CHAINING
 
#endif
 
 
// The next 32 correspond to the interrupt lines in the V320USC's interrupt
// controller. These are decoded from the controller when an interrupt
// enters via CYGNUM_HAL_INTERRUPT_V320USC_INT0.
#define CYGNUM_HAL_INTERRUPT_INTC_V320USC_base 6
#define CYGNUM_HAL_INTERRUPT_LB_MBI 6
#define CYGNUM_HAL_INTERRUPT_PCI_MBI 7
#define CYGNUM_HAL_INTERRUPT_RESERVED_2 8
#define CYGNUM_HAL_INTERRUPT_I2O_OP_NE 9
#define CYGNUM_HAL_INTERRUPT_I2O_IF_NF 10
#define CYGNUM_HAL_INTERRUPT_I2O_IP_NE 11
#define CYGNUM_HAL_INTERRUPT_I2O_OP_NF 12
#define CYGNUM_HAL_INTERRUPT_I2O_OF_NE 13
#define CYGNUM_HAL_INTERRUPT_RESERVED_8 14
#define CYGNUM_HAL_INTERRUPT_RESERVED_9 15
#define CYGNUM_HAL_INTERRUPT_RESERVED_10 16
#define CYGNUM_HAL_INTERRUPT_RESERVED_11 17
#define CYGNUM_HAL_INTERRUPT_TIMER0 18
#define CYGNUM_HAL_INTERRUPT_TIMER1 19
#define CYGNUM_HAL_INTERRUPT_RESERVED_14 20
#define CYGNUM_HAL_INTERRUPT_ENUM 21
#define CYGNUM_HAL_INTERRUPT_DMA0 22
#define CYGNUM_HAL_INTERRUPT_DMA1 23
#define CYGNUM_HAL_INTERRUPT_RESERVED_18 24
#define CYGNUM_HAL_INTERRUPT_RESERVED_19 25
#define CYGNUM_HAL_INTERRUPT_PWR_STATE 26
#define CYGNUM_HAL_INTERRUPT_HBI 27
#define CYGNUM_HAL_INTERRUPT_WDI 28
#define CYGNUM_HAL_INTERRUPT_BWI 29
#define CYGNUM_HAL_INTERRUPT_PSLAVE_PI 30
#define CYGNUM_HAL_INTERRUPT_PMASTER_PI 31
#define CYGNUM_HAL_INTERRUPT_PCI_T_ABORT 32
#define CYGNUM_HAL_INTERRUPT_PCI_M_ABORT 33
#define CYGNUM_HAL_INTERRUPT_DRAM_PI 34
#define CYGNUM_HAL_INTERRUPT_RESERVED_29 35
#define CYGNUM_HAL_INTERRUPT_DI0 36
#define CYGNUM_HAL_INTERRUPT_DI1 37
 
// The next 6 correspond to the interrupt lines specific to the PCI
// connector (decoded from CYGNUM_HAL_INTERRUPT_V320USC_INT1)
#define CYGNUM_HAL_INTERRUPT_INTC_PCI_base 38
#define CYGNUM_HAL_INTERRUPT_SERR 38
#define CYGNUM_HAL_INTERRUPT_PERR 39
#define CYGNUM_HAL_INTERRUPT_INTD 40
#define CYGNUM_HAL_INTERRUPT_INTC 41
#define CYGNUM_HAL_INTERRUPT_INTB 42
#define CYGNUM_HAL_INTERRUPT_INTA 43
 
// The next 5 correspond to the interrupt lines specific to the REF4955
// board (decoded from CYGNUM_HAL_INTERRUPT_IO)
#define CYGNUM_HAL_INTERRUPT_INTC_IO_base 44
#define CYGNUM_HAL_INTERRUPT_SOFTWARE 44
#define CYGNUM_HAL_INTERRUPT_INT_SWITCH 45
#define CYGNUM_HAL_INTERRUPT_PARALLEL 46
#define CYGNUM_HAL_INTERRUPT_DEBUG_UART 47
#define CYGNUM_HAL_INTERRUPT_USER_UART 48
 
 
// Min/Max ISR numbers and how many there are
#define CYGNUM_HAL_ISR_MIN CYGNUM_HAL_INTERRUPT_V320USC_INT0
#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_USER_UART
#define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX - CYGNUM_HAL_ISR_MIN + 1)
 
// The vector used by the Real time clock
#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_COMPARE
 
#define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
 
#endif
 
//--------------------------------------------------------------------------
// Interrupt controler information
 
// V320USC
#define CYGARC_REG_INT_STAT 0xb80000ec
 
#define CYGARC_REG_INT_CFG0 0xb80000e0
#define CYGARC_REG_INT_CFG1 0xb80000e4
#define CYGARC_REG_INT_CFG2 0xb80000e8
#define CYGARC_REG_INT_CFG3 0xb8000158
 
#define CYGARC_REG_INT_CFG_INT0 0x00000100
#define CYGARC_REG_INT_CFG_INT1 0x00000200
#define CYGARC_REG_INT_CFG_INT2 0x00000400
#define CYGARC_REG_INT_CFG_INT3 0x00000800
 
 
// FPGA
#define CYGARC_REG_PCI_STAT 0xb5300000
#define CYGARC_REG_PCI_MASK 0xb5300030
 
#define CYGARC_REG_IO_STAT 0xb5300010
#define CYGARC_REG_IO_MASK 0xb5300040
 
 
#define HAL_INTERRUPT_MASK( _vector_ ) \
CYG_MACRO_START \
if( (_vector_) <= CYGNUM_HAL_INTERRUPT_COMPARE ) \
{ \
asm volatile ( \
"mfc0 $3,$12\n" \
"la $2,0x00000400\n" \
"sllv $2,$2,%0\n" \
"nor $2,$2,$0\n" \
"and $3,$3,$2\n" \
"mtc0 $3,$12\n" \
"nop; nop; nop\n" \
: \
: "r"(_vector_) \
: "$2", "$3" \
); \
} \
else if ((_vector_) >= CYGNUM_HAL_INTERRUPT_INTC_IO_base) \
{ \
cyg_uint8 _mask_; \
cyg_uint32 _shift_ = (_vector_)-CYGNUM_HAL_INTERRUPT_INTC_IO_base; \
HAL_READ_UINT8(CYGARC_REG_IO_MASK, _mask_ ); \
_mask_ &= ~(1<<_shift_); \
HAL_WRITE_UINT8(CYGARC_REG_IO_MASK, _mask_ ); \
} \
else if (_vector_ >= CYGNUM_HAL_INTERRUPT_INTC_PCI_base) \
{ \
cyg_uint8 _mask_; \
cyg_uint32 _shift_ = (_vector_)-CYGNUM_HAL_INTERRUPT_INTC_PCI_base; \
HAL_READ_UINT8(CYGARC_REG_PCI_MASK, _mask_ ); \
_mask_ &= ~(1<<_shift_); \
HAL_WRITE_UINT8(CYGARC_REG_PCI_MASK, _mask_ ); \
} else { /* V320USC */ \
cyg_uint32 _mask_; \
cyg_uint32 _shift_ = \
(_vector_)-CYGNUM_HAL_INTERRUPT_INTC_V320USC_base; \
HAL_READ_UINT32(CYGARC_REG_INT_CFG0, _mask_ ); \
_mask_ &= !(1<<_shift_); \
HAL_WRITE_UINT32(CYGARC_REG_INT_CFG0, _mask_ ); \
} \
CYG_MACRO_END
 
#define HAL_INTERRUPT_UNMASK( _vector_ ) \
CYG_MACRO_START \
if( (_vector_) <= CYGNUM_HAL_INTERRUPT_COMPARE ) \
{ \
asm volatile ( \
"mfc0 $3,$12\n" \
"la $2,0x00000400\n" \
"sllv $2,$2,%0\n" \
"or $3,$3,$2\n" \
"mtc0 $3,$12\n" \
"nop; nop; nop\n" \
: \
: "r"(_vector_) \
: "$2", "$3" \
); \
} \
else if ((_vector_) >= CYGNUM_HAL_INTERRUPT_INTC_IO_base) \
{ \
cyg_uint8 _mask_; \
cyg_uint32 _shift_ = (_vector_)-CYGNUM_HAL_INTERRUPT_INTC_IO_base; \
HAL_READ_UINT8(CYGARC_REG_IO_MASK, _mask_ ); \
_mask_ |= (1<<_shift_); \
HAL_WRITE_UINT8(CYGARC_REG_IO_MASK, _mask_ ); \
} \
else if (_vector_ >= CYGNUM_HAL_INTERRUPT_INTC_PCI_base) \
{ \
cyg_uint8 _mask_; \
cyg_uint32 _shift_ = (_vector_)-CYGNUM_HAL_INTERRUPT_INTC_PCI_base; \
HAL_READ_UINT8(CYGARC_REG_PCI_MASK, _mask_ ); \
_mask_ |= (1<<_shift_); \
HAL_WRITE_UINT8(CYGARC_REG_PCI_MASK, _mask_ ); \
} else { /* V320USC */ \
cyg_uint32 _mask_; \
cyg_uint32 _shift_ = \
(_vector_)-CYGNUM_HAL_INTERRUPT_INTC_V320USC_base; \
HAL_READ_UINT32(CYGARC_REG_INT_CFG0, _mask_ ); \
_mask_ |= (1<<_shift_); \
HAL_WRITE_UINT32(CYGARC_REG_INT_CFG0, _mask_ ); \
} \
CYG_MACRO_END
 
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
CYG_MACRO_START \
cyg_uint32 _srvector_ = _vector_; \
if ((_vector_) >= CYGNUM_HAL_INTERRUPT_INTC_IO_base) { \
_srvector_ = CYGNUM_HAL_INTERRUPT_IO; \
} else if (_vector_ >= CYGNUM_HAL_INTERRUPT_INTC_PCI_base) { \
_srvector_ = CYGNUM_HAL_INTERRUPT_V320USC_INT1; \
} else if (_vector_ >= CYGNUM_HAL_INTERRUPT_INTC_V320USC_base) { \
cyg_uint32 _mask_; \
cyg_uint32 _shift_ = \
(_vector_)-CYGNUM_HAL_INTERRUPT_INTC_V320USC_base; \
_mask_ = (1<<_shift_); \
HAL_WRITE_UINT32(CYGARC_REG_INT_STAT, _mask_ ); \
_srvector_ = CYGNUM_HAL_INTERRUPT_V320USC_INT0; \
} \
asm volatile ( \
"mfc0 $3,$13\n" \
"la $2,0x00000400\n" \
"sllv $2,$2,%0\n" \
"nor $2,$2,$0\n" \
"and $3,$3,$2\n" \
"mtc0 $3,$13\n" \
"nop; nop; nop\n" \
: \
: "r"(_srvector_) \
: "$2", "$3" \
); \
CYG_MACRO_END
 
#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )
 
#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )
 
#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
 
 
//----------------------------------------------------------------------------
// Reset.
#define CYGARC_REG_BOARD_RESET 0xb5400000
 
#define HAL_PLATFORM_RESET() HAL_WRITE_UINT8(CYGARC_REG_BOARD_RESET,0)
 
#define HAL_PLATFORM_RESET_ENTRY 0xbfc00000
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLF_INTR_H
// End of plf_intr.h
/plf_stub.h
0,0 → 1,85
#ifndef CYGONCE_HAL_PLF_STUB_H
#define CYGONCE_HAL_PLF_STUB_H
 
//=============================================================================
//
// plf_stub.h
//
// Platform header for GDB stub support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:jskov
// Date: 2000-05-15
// Purpose: Platform HAL stub support for MIPS/REF4955 boards.
// Usage: #include <cyg/hal/plf_stub.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM
 
#include <cyg/hal/mips-stub.h> // architecture stub support
 
//----------------------------------------------------------------------------
// Define some platform specific communication details. This is mostly
// handled by hal_if now, but we need to make sure the comms tables are
// properly initialized.
 
externC void cyg_hal_plf_comms_init(void);
 
#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init()
 
#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud))
#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0
#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT
 
//----------------------------------------------------------------------------
// Stub initializer.
extern void hal_plf_stub_init( void );
#define HAL_STUB_PLATFORM_INIT() hal_plf_stub_init();
 
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_PLF_STUB_H
// End of plf_stub.h
/pkgconf/mlt_mips_tx49_ref4955_rom.h
0,0 → 1,35
// eCos memory layout - Fri Oct 20 06:22:57 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0x80000000)
#define CYGMEM_REGION_ram_SIZE (0x4000000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#define CYGMEM_REGION_rom (0xbfc00000)
#define CYGMEM_REGION_rom_SIZE (0x1000000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vectors) [];
#endif
#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
#define CYGMEM_SECTION_reserved_vectors_SIZE (0x200)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
#endif
#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x100)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
#endif
#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x84000000 - (size_t) CYG_LABEL_NAME (__heap1))
/pkgconf/mlt_mips_tx49_ref4955_rom.ldi
0,0 → 1,43
// eCos memory layout - Fri Oct 20 06:22:57 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
ram : ORIGIN = 0x80000000, LENGTH = 0x4000000
rom : ORIGIN = 0xbfc00000, LENGTH = 0x1000000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (rom, 0xbfc00000, LMA_EQ_VMA)
SECTION_ROMISC (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_RELOCS (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_init (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
CYG_LABEL_DEFN(__reserved_vectors) = 0x80000000; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x200;
CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x100;
CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
SECTION_data (ram, ALIGN (0x10), FOLLOWING (.rodata1))
SECTION_data1 (ram, ALIGN (0x8), FOLLOWING (.data))
SECTION_eh_frame (ram, ALIGN (0x8), FOLLOWING (.data1))
SECTION_gcc_except_table (ram, ALIGN (0x8), FOLLOWING (.eh_frame))
SECTION_ctors (ram, ALIGN (0x8), FOLLOWING (.gcc_except_table))
SECTION_dtors (ram, ALIGN (0x8), FOLLOWING (.ctors))
SECTION_devtab (ram, ALIGN (0x8), FOLLOWING (.dtors))
SECTION_got (ram, ALIGN (0x8), FOLLOWING (.devtab))
SECTION_dynamic (ram, ALIGN (0x8), FOLLOWING (.got))
SECTION_sdata (ram, ALIGN (0x8), FOLLOWING (.dynamic))
SECTION_lit8 (ram, ALIGN (0x8), FOLLOWING (.sdata))
SECTION_lit4 (ram, ALIGN (0x8), FOLLOWING (.lit8))
SECTION_sbss (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/pkgconf/mlt_mips_tx49_ref4955_ram.h
0,0 → 1,37
// eCos memory layout - Fri Oct 20 06:22:02 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0x80000000)
#define CYGMEM_REGION_ram_SIZE (0x4000000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vectors) [];
#endif
#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
#define CYGMEM_SECTION_reserved_vectors_SIZE (0x200)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
#endif
#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x100)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
#endif
#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_for_rom) [];
#endif
#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom))
#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x7c00)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x84000000 - (size_t) CYG_LABEL_NAME (__heap1))
/pkgconf/mlt_mips_tx49_ref4955_ram.ldi
0,0 → 1,43
// eCos memory layout - Fri Oct 20 06:22:02 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
ram : ORIGIN = 0x80000000, LENGTH = 0x4000000
}
 
SECTIONS
{
SECTIONS_BEGIN
CYG_LABEL_DEFN(__reserved_vectors) = 0x80000000; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x200;
CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x100;
CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x7c00;
SECTION_rom_vectors (ram, ALIGN (0x10), LMA_EQ_VMA)
SECTION_ROMISC (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_RELOCS (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_init (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_data1 (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_eh_frame (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_ctors (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_dtors (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_devtab (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_got (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_dynamic (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_sdata (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_lit8 (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_lit4 (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_sbss (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/pkgconf/mlt_mips_tx49_ref4955_rom.mlt
0,0 → 1,29
version 0
region ram 80000000 4000000 0 !
region rom bfc00000 1000000 1 !
section reserved_vectors 200 1 0 0 1 1 1 1 80000000 80000000 reserved_vsr_table reserved_vsr_table !
section reserved_vsr_table 100 10 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table !
section reserved_virtual_table 100 10 0 0 0 1 0 0 data !
section data 0 10 1 1 0 1 0 1 data1 data1 !
section data1 0 8 1 1 0 1 0 1 eh_frame eh_frame !
section eh_frame 0 8 1 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 8 1 1 0 1 0 1 ctors ctors !
section ctors 0 8 1 1 0 1 0 1 dtors dtors !
section dtors 0 8 1 1 0 1 0 1 devtab devtab !
section devtab 0 8 1 1 0 1 0 1 got got !
section got 0 8 1 1 0 1 0 1 dynamic dynamic !
section dynamic 0 8 1 1 0 1 0 1 sdata sdata !
section sdata 0 8 1 1 0 1 0 1 lit8 lit8 !
section lit8 0 8 1 1 0 1 0 1 lit4 lit4 !
section lit4 0 8 1 1 0 1 0 0 sbss !
section sbss 0 8 0 1 0 1 0 1 bss bss !
section bss 0 8 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
section rom_vectors 0 1 0 1 1 1 1 1 bfc00000 bfc00000 ROMISC ROMISC !
section ROMISC 0 8 0 1 0 1 0 1 RELOCS RELOCS !
section RELOCS 0 8 0 1 0 1 0 1 init init !
section init 0 8 0 1 0 1 0 1 text text !
section text 0 8 0 1 0 1 0 1 fini fini !
section fini 0 8 0 1 0 1 0 1 rodata rodata !
section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 8 0 1 0 0 0 1 data !
/pkgconf/mlt_mips_tx49_ref4955_ram.mlt
0,0 → 1,29
version 0
region ram 80000000 4000000 0 !
section reserved_vectors 200 1 0 0 1 1 1 1 80000000 80000000 reserved_vsr_table reserved_vsr_table !
section reserved_vsr_table 100 10 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table !
section reserved_virtual_table 100 10 0 0 0 1 0 1 reserved_for_rom reserved_for_rom !
section reserved_for_rom 7c00 10 0 0 0 1 0 1 rom_vectors rom_vectors !
section rom_vectors 0 10 0 1 0 1 0 1 ROMISC ROMISC !
section ROMISC 0 4 0 1 0 1 0 1 RELOCS RELOCS !
section RELOCS 0 4 0 1 0 1 0 1 init init !
section init 0 4 0 1 0 1 0 1 text text !
section text 0 4 0 1 0 1 0 1 fini fini !
section fini 0 4 0 1 0 1 0 1 rodata rodata !
section rodata 0 8 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 8 0 1 0 1 0 1 data data !
section data 0 8 0 1 0 1 0 1 data1 data1 !
section data1 0 8 0 1 0 1 0 1 eh_frame eh_frame !
section eh_frame 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 4 0 1 0 1 0 1 ctors ctors !
section ctors 0 4 0 1 0 1 0 1 dtors dtors !
section dtors 0 4 0 1 0 1 0 1 devtab devtab !
section devtab 0 4 0 1 0 1 0 1 got got !
section got 0 4 0 1 0 1 0 1 dynamic dynamic !
section dynamic 0 4 0 1 0 1 0 1 sdata sdata !
section sdata 0 4 0 1 0 1 0 1 lit8 lit8 !
section lit8 0 8 0 1 0 1 0 1 lit4 lit4 !
section lit4 0 8 0 1 0 1 0 1 sbss sbss !
section sbss 0 8 0 1 0 1 0 1 bss bss !
section bss 0 8 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/plf_cache.h
0,0 → 1,68
#ifndef CYGONCE_PLF_CACHE_H
#define CYGONCE_PLF_CACHE_H
 
//=============================================================================
//
// plf_cache.h
//
// HAL cache control API
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg
// Date: 1998-02-17
// Purpose: Cache control API
// Description: The macros defined here provide the HAL APIs for handling
// cache control operations.
// Usage:
// #include <cyg/hal/plf_cache.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
//=============================================================================
 
// Nothing here at present.
 
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_PLF_CACHE_H
// End of plf_cache.h
 
/platform.inc
0,0 → 1,243
#ifndef CYGONCE_HAL_PLATFORM_INC
#define CYGONCE_HAL_PLATFORM_INC
##=============================================================================
##
## platform.inc
##
## REF4955/TX4955 board assembler header file
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): nickg
## Contributors:nickg,jskov
## Date: 2000-05-15
## Purpose: REF4955/TX4955 board definitions.
## Description: This file contains various definitions and macros that are
## useful for writing assembly code for the REF4955/TX4955 board.
## Usage:
## #include <cyg/hal/platform.inc>
## ...
##
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <cyg/hal/mips.inc>
#include <cyg/hal/plf_defs.inc>
 
 
#------------------------------------------------------------------------------
# Macro for copying vectors to RAM if necessary.
#if !defined(CYGSEM_HAL_USE_ROM_MONITOR)
 
.macro hal_vectors_init
# If we don~t play nice with a ROM monitor, copy the required
# vectors into the proper location.
la t0,0x80000000 # dest addr
la t1,utlb_vector # source addr
la t3,utlb_vector_end # end dest addr
1:
lw v0,0(t1) # get word
addi t1,t1,4
sw v0,0(t0) # write word
addi t0,t0,4
bne t1,t3,1b
nop
 
la t0,0x80000180 # dest addr
la t1,other_vector # source addr
la t3,other_vector_end # end dest addr
1:
lw v0,0(t1) # get word
addi t1,t1,4
sw v0,0(t0) # write word
addi t0,t0,4
bne t1,t3,1b
nop
 
.set mips3 # Set ISA to MIPS 3 to allow cache insns
# Now clear the region in the caches
la t0,0x80000000 # dest addr
ori t1,t0,0x200 # source addr
1: cache 0x01,0(t0) # Flush word from data cache
cache 0x01,1(t0)
cache 0x01,2(t0)
cache 0x01,3(t0)
nop
cache 0x00,0(t0) # Invalidate icache for word
cache 0x00,1(t0)
cache 0x00,2(t0)
cache 0x00,3(t0)
nop
addi t0,t0,0x20
bne t0,t1,1b
nop
.set mips0 # reset ISA to default
 
.endm
 
#else
 
.macro hal_vectors_init
.endm
 
#endif
 
#------------------------------------------------------------------------------
# Monitor initialization.
#ifndef CYGPKG_HAL_MIPS_MON_DEFINED
 
#if defined(CYG_HAL_STARTUP_ROM) || \
( defined(CYG_HAL_STARTUP_RAM) && \
!defined(CYGSEM_HAL_USE_ROM_MONITOR))
# If we are starting up from ROM, or we are starting in
# RAM and NOT using a ROM monitor, initialize the VSR table.
 
.macro hal_mon_init
hal_vectors_init
# Set default exception VSR for all vectors
ori a0,zero,CYGNUM_HAL_VSR_COUNT
la a1,__default_exception_vsr
la a2,hal_vsr_table
1: sw a1,0(a2)
addi a2,a2,4
addi a0,a0,-1
bne a0,zero,1b
nop
 
# Now set special VSRs
la a0,hal_vsr_table
# Set interrupt VSR
la a1,__default_interrupt_vsr
sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0)
# Add special handler on breakpoint vector to allow GDB and
# GCC to both use 'break' without conflicts.
la a1,__break_vsr_springboard
sw a1,CYGNUM_HAL_VECTOR_BREAKPOINT*4(a0)
# Set exception handler on special vectors
# FIXME: Should use proper definitions
la a1,__default_exception_vsr
sw a1,32*4(a0) # debug
sw a1,33*4(a0) # utlb
sw a1,34*4(a0) # nmi
.endm
#elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
 
# Initialize the VSR table entries
# We only take control of the interrupt vector,
# the rest are left to the ROM for now...
 
.macro hal_mon_init
hal_vectors_init
# Set interrupt VSR
la a0,hal_vsr_table
la a1,__default_interrupt_vsr
sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0)
.endm
 
#else
 
.macro hal_mon_init
hal_vectors_init
.endm
 
#endif
 
#define CYGPKG_HAL_MIPS_MON_DEFINED
#endif
 
#------------------------------------------------------------------------------
 
#if !defined(CYG_HAL_STARTUP_RAM)
.macro hal_memc_init
// Only initialize the SDRAM controller when running in ROM
.extern hal_memc_setup
lar t0,hal_memc_setup
jalr t0
nop
.endm
#define CYGPKG_HAL_MIPS_MEMC_DEFINED
#endif
 
#------------------------------------------------------------------------------
# Decide whether the VSR table is defined externally, or is to be defined
# here.
 
## ISR tables are defined in platform.S
#define CYG_HAL_MIPS_ISR_TABLES_DEFINED
 
## VSR table is at a fixed RAM address defined by the linker script
#define CYG_HAL_MIPS_VSR_TABLE_DEFINED
 
##-----------------------------------------------------------------------------
## For chaining, use the calculated cause vector number.
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN
.macro hal_intc_translate inum,vnum
move \vnum,\inum # Vector == interrupt number
.endm
#define CYGPKG_HAL_MIPS_INTC_TRANSLATE_DEFINED
#endif
 
##-----------------------------------------------------------------------------
#ifdef CYG_STARTUP_ROM
 
## Initial SR value for use in ROM:
## CP0 usable
## Vectors in RAM
## FP registers are 32 bit
## All hw ints disabled
#define INITIAL_SR 0x30000000
 
#else
 
## Initial SR value for use standalone:
## CP0 usable
## Vectors to RAM
## FP registers are 32 bit
## All hw ints disabled
#define INITIAL_SR 0x30000000
 
#endif
 
#------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLATFORM_INC
# end of platform.inc
/hal_diag.h
0,0 → 1,92
#ifndef CYGONCE_HAL_HAL_DIAG_H
#define CYGONCE_HAL_HAL_DIAG_H
 
//=============================================================================
//
// hal_diag.h
//
// HAL Support for Kernel Diagnostic Routines
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:jskov, nickg
// Date: 2000-05-15
// Purpose: HAL Support for Kernel Diagnostic Routines
// Description: Diagnostic routines for use during kernel development.
// Usage: #include <cyg/hal/hal_diag.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG)
 
#include <cyg/hal/hal_if.h>
 
#define HAL_DIAG_INIT() hal_if_diag_init()
#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_)
#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_)
 
#else // everything by steam
 
//-----------------------------------------------------------------------------
// functions implemented in hal_diag.c
 
externC void hal_diag_init(void);
 
externC void hal_diag_write_char(char c);
 
externC void hal_diag_read_char(char *c);
 
//-----------------------------------------------------------------------------
 
#define HAL_DIAG_INIT() hal_diag_init()
 
#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_)
 
#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_)
 
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
 
//-----------------------------------------------------------------------------
// end of hal_diag.h
#endif // CYGONCE_HAL_HAL_DIAG_H
/plf_io.h
0,0 → 1,200
#ifndef CYGONCE_PLF_IO_H
#define CYGONCE_PLF_IO_H
 
//=============================================================================
//
// plf_io.h
//
// HAL platform device IO register support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors:nickg, jskov
// Date: 2000-05-18
// Purpose: Define IO register support
// Description: The macros defined here provide the HAL APIs for handling
// device IO control registers.
//
// Usage:
// #include <cyg/hal/plf_io.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
//-----------------------------------------------------------------------------
// BYTE Register access.
// Individual and vectorized access to 8 bit registers.
 
// Little-endian version
#if (CYG_BYTEORDER == CYG_LSBFIRST)
 
#define HAL_READ_UINT8( _register_, _value_ ) \
((_value_) = *((volatile CYG_BYTE *)(_register_)))
 
#define HAL_WRITE_UINT8( _register_, _value_ ) \
(*((volatile CYG_BYTE *)(_register_)) = (_value_))
 
#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
CYG_MACRO_END
 
#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
CYG_MACRO_END
 
#else // Big-endian version
 
#define HAL_READ_UINT8( _register_, _value_ ) \
((_value_) = *((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_)^3)))
 
#define HAL_WRITE_UINT8( _register_, _value_ ) \
(*((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_)^3)) = (_value_))
 
#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = _r_[_j_]; \
CYG_MACRO_END
 
#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
_r_[_j_] = (_buf_)[_i_]; \
CYG_MACRO_END
 
#endif // Big-endian
 
//-----------------------------------------------------------------------------
// 16 bit access.
// Individual and vectorized access to 16 bit registers.
// Little-endian version
#if (CYG_BYTEORDER == CYG_LSBFIRST)
 
#define HAL_READ_UINT16( _register_, _value_ ) \
((_value_) = *((volatile CYG_WORD16 *)(_register_)))
 
#define HAL_WRITE_UINT16( _register_, _value_ ) \
(*((volatile CYG_WORD16 *)(_register_)) = (_value_))
 
#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
CYG_MACRO_END
 
#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
CYG_MACRO_END
 
#else // Big-endian version
 
#define HAL_READ_UINT16( _register_, _value_ ) \
((_value_) = *((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_)^3)))
 
#define HAL_WRITE_UINT16( _register_, _value_ ) \
(*((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_)^3)) = (_value_))
 
#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = _r_[_j_]; \
CYG_MACRO_END
 
#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
CYG_MACRO_START \
cyg_count32 _i_,_j_; \
volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
_r_[_j_] = (_buf_)[_i_]; \
CYG_MACRO_END
 
#endif // Big-endian
 
//-----------------------------------------------------------------------------
// 32 bit access.
// Individual and vectorized access to 32 bit registers.
 
// Note: same macros for little- and big-endian systems.
#define HAL_READ_UINT32( _register_, _value_ ) \
((_value_) = *((volatile CYG_WORD32 *)(_register_)))
 
#define HAL_WRITE_UINT32( _register_, _value_ ) \
(*((volatile CYG_WORD32 *)(_register_)) = (_value_))
 
#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
}
 
#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
}
 
#define HAL_IO_MACROS_DEFINED
 
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLF_IO_H
// End of plf_io.h

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