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  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/rtos/ecos-2.0/packages/hal/mips/vrc4373/v2_0/include
    from Rev 27 to Rev 174
    Reverse comparison

Rev 27 → Rev 174

/pkgconf/mlt_mips_vr4300_vrc4373_rom.h
0,0 → 1,20
// eCos memory layout - Fri Oct 20 07:10:03 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0x80000800)
#define CYGMEM_REGION_ram_SIZE (0x7f800)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#define CYGMEM_REGION_rom (0xbfc00000)
#define CYGMEM_REGION_rom_SIZE (0x80000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x80080000 - (size_t) CYG_LABEL_NAME (__heap1))
/pkgconf/mlt_mips_vr4300_vrc4373_romram.h
0,0 → 1,17
// eCos memory layout - Fri Oct 20 06:27:12 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0x80000000)
#define CYGMEM_REGION_ram_SIZE (0x500000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x80500000 - (size_t) CYG_LABEL_NAME (__heap1))
/pkgconf/mlt_mips_vr4300_vrc4373_romram.ldi
0,0 → 1,29
// eCos memory layout - Fri Oct 20 06:27:12 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
ram : ORIGIN = 0x80000000, LENGTH = 0x500000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (ram, 0x80000000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_ctors (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_dtors (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rel__dyn (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/pkgconf/mlt_mips_vr4300_vrc4373_rom.ldi
0,0 → 1,30
// eCos memory layout - Fri Oct 20 07:10:03 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
ram : ORIGIN = 0x80000800, LENGTH = 0x7f800
rom : ORIGIN = 0xbfc00000, LENGTH = 0x80000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (rom, 0xbfc00000, LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_ctors (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_dtors (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rel__dyn (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, 0x80000800, FOLLOWING (.gcc_except_table))
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/pkgconf/mlt_mips_vr4300_vrc4373_ram.h
0,0 → 1,17
// eCos memory layout - Fri Oct 20 06:25:55 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0x80100000)
#define CYGMEM_REGION_ram_SIZE (0x500000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x80600000 - (size_t) CYG_LABEL_NAME (__heap1))
/pkgconf/mlt_mips_vr4300_vrc4373_ram.ldi
0,0 → 1,29
// eCos memory layout - Fri Oct 20 06:25:55 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
ram : ORIGIN = 0x80100000, LENGTH = 0x500000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (ram, 0x80100000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_ctors (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_dtors (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rel__dyn (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/pkgconf/mlt_mips_vr4300_vrc4373_romram.mlt
0,0 → 1,15
version 0
region ram 80000000 500000 0 !
section rom_vectors 0 1 0 1 1 1 1 1 80000000 80000000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 ctors ctors !
section ctors 0 1 0 1 0 1 0 1 dtors dtors !
section dtors 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 rel.dyn rel.dyn !
section rel.dyn 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
section data 0 8 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/pkgconf/mlt_mips_vr4300_vrc4373_rom.mlt
0,0 → 1,16
version 0
region ram 80000800 7f800 0 !
region rom bfc00000 80000 1 !
section data 0 1 1 1 1 1 0 0 80000800 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
section rom_vectors 0 1 0 1 1 1 1 1 bfc00000 bfc00000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 ctors ctors !
section ctors 0 1 0 1 0 1 0 1 dtors dtors !
section dtors 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 rel.dyn rel.dyn !
section rel.dyn 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 0 0 1 data !
/pkgconf/mlt_mips_vr4300_vrc4373_ram.mlt
0,0 → 1,15
version 0
region ram 80100000 500000 0 !
section rom_vectors 0 1 0 1 1 1 1 1 80100000 80100000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 ctors ctors !
section ctors 0 1 0 1 0 1 0 1 dtors dtors !
section dtors 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 rel.dyn rel.dyn !
section rel.dyn 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
section data 0 8 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !

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