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Rev 27 → Rev 174

/v2_0/cdl/hal_mn10300_am33_stb.cdl
0,0 → 1,307
# ====================================================================
#
# hal_mn10300_am33_stb.cdl
#
# AM33/STB board HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): jskov
# Original data: nick, bartv
# Contributors:
# Date: 1999-11-02
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_MN10300_AM33_STB {
display "stb evaluation board"
parent CYGPKG_HAL_MN10300
requires CYGPKG_HAL_MN10300_AM33
define_header hal_mn10300_am33_stb.h
include_dir cyg/hal
description "
The STB HAL package should be used when targetting the
actual hardware for the AM33 STB evaluation board."
 
compile hal_diag.c plf_stub.c plf_misc.c
 
implements CYGINT_HAL_DEBUG_GDB_STUBS
implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
 
requires CYGSEM_HAL_UNCACHED_FLASH_ACCESS == 1;
 
define_proc {
puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_mn10300_am33.h>"
puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_mn10300_am33_stb.h>"
}
 
cdl_component CYG_HAL_STARTUP {
display "Startup type"
flavor data
legal_values {"RAM" "ROM"}
default_value {"RAM"}
no_define
define -file system.h CYG_HAL_STARTUP
description "
When targetting the STB board it is possible to build
the system for either RAM bootstrap or ROM bootstrap. The
former generally requires that the board is equipped with
GDB stub ROMs or equivalent software
that allows gdb to download the eCos application
on to the board. The latter typically requires that the
eCos application be blown into EPROMs or equivalent
technology. If a JTAG debugger is avaiable, it is also
possible to download ROM executables into either SDRAM cards
or program them into a FLASH ROM."
}
 
cdl_option CYGBLD_ROM_SLOT {
display "ROM startup slot"
flavor data
legal_values {"ROM" "SRAM1"}
default_value {"ROM"}
description "
This option can be used to request that the image is to be
linked to be run from the SRAM1 SLOT (0x82400000) rather than
the system boot ROM slot (0x40000000).
"
}
 
cdl_option CYGHWR_HAL_MN10300_AM33_STB_DIAG_PORT {
display "Diagnostic Serial Port"
flavor data
legal_values 0 1
default_value 0
description "
The STB board has three separate serial ports, of which only
ports 0 and 2 are brought out to the front panel. This option
chooses which of these ports will be used for diagnostic output.
At present only port 0 is supported."
}
 
cdl_option CYGHWR_HAL_MN10300_AM33_STB_DIAG_BAUD {
display "Diagnostic Serial Port Baud Rate"
flavor data
legal_values 9600 19200 38400 115200
default_value 38400
define CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
description "
This option selects the baud rate used for the diagnostic port.
Note: this should match the value chosen for the GDB port if the
diagnostic and GDB port are the same."
}
 
cdl_option CYGHWR_HAL_MN10300_AM33_STB_GDB_PORT {
display "GDB Serial Port"
flavor data
legal_values 0 1
default_value 0
description "
The VRC4373 board has two separate serial ports. This option
chooses which of these ports will be used to connect to a host
running GDB."
}
 
cdl_option CYGHWR_HAL_MN10300_AM33_STB_GDB_BAUD {
display "GDB Serial Port Baud Rate"
flavor data
legal_values 9600 19200 38400 115200
default_value 38400
description "
This option controls the baud rate used for the GDB connection."
}
 
cdl_option CYGSEM_HAL_AM33_PLF_USES_SERIAL0 {
display "ASB2303 uses AM33 SERIAL0"
flavor bool
default_value 1
description "
Enable this option if AM33 SERIAL0 is to be used as a virtual vector
communications channel."
}
 
cdl_option CYGSEM_HAL_AM33_PLF_USES_SERIAL1 {
display "ASB2303 uses AM33 SERIAL1"
flavor bool
default_value 1
description "
Enable this option if AM33 SERIAL1 is to be used as a virtual vector
communications channel."
}
 
 
# Real-time clock/counter specifics
cdl_option CYGHWR_HAL_MN10300_PROCESSOR_OSC_DEFAULT {
display "Processor clock rate"
calculated 30375000
flavor data
}
 
cdl_component CYGBLD_GLOBAL_OPTIONS {
display "Global build options"
flavor none
parent CYGPKG_NONE
description "
Global build options including control over
compiler flags, linker flags and choice of toolchain."
 
 
cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
display "Global command prefix"
flavor data
no_define
default_value { "mn10300-elf" }
description "
This option specifies the command prefix used when
invoking the build tools."
}
 
cdl_option CYGBLD_GLOBAL_CFLAGS {
display "Global compiler flags"
flavor data
no_define
default_value { "-mam33 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
description "
This option controls the global compiler flags which
are used to compile all packages by
default. Individual packages may define
options which override these global flags."
}
 
cdl_option CYGBLD_GLOBAL_LDFLAGS {
display "Global linker flags"
flavor data
no_define
default_value { "-mam33 -g -nostdlib -Wl,--gc-sections -Wl,-static" }
description "
This option controls the global linker flags. Individual
packages may define options which override these global flags."
}
 
cdl_option CYGBLD_BUILD_GDB_STUBS {
display "Build GDB stub ROM image"
default_value 0
requires { CYG_HAL_STARTUP == "ROM" }
requires CYGSEM_HAL_ROM_MONITOR
requires CYGBLD_BUILD_COMMON_GDB_STUBS
requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
no_define
description "
This option enables the building of the GDB stubs for the
board. The common HAL controls takes care of most of the
build process, but the final conversion from ELF image to
binary data is handled by the platform CDL, allowing
relocation of the data if necessary."
 
make -priority 320 {
<PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img
$(OBJCOPY) -O binary $< $@
}
}
}
 
cdl_option CYGNUM_HAL_BREAKPOINT_LIST_SIZE {
display "Number of breakpoints supported by the HAL."
flavor data
default_value 25
description "
This option determines the number of breakpoints supported by the HAL."
}
 
cdl_component CYGHWR_MEMORY_LAYOUT {
display "Memory layout"
flavor data
no_define
calculated { CYG_HAL_STARTUP == "RAM" ? "mn10300_am33_stb_ram" : \
CYGBLD_ROM_SLOT == "ROM" ? "mn10300_am33_stb_rom" : \
"mn10300_am33_stb_sram1" }
 
cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
display "Memory layout linker script fragment"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_mn10300_am33_stb_ram.ldi>" : \
CYGBLD_ROM_SLOT == "ROM" ? "<pkgconf/mlt_mn10300_am33_stb_rom.ldi>" : \
"<pkgconf/mlt_mn10300_am33_stb_sram1.ldi>" }
}
 
cdl_option CYGHWR_MEMORY_LAYOUT_H {
display "Memory layout header file"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_H
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_mn10300_am33_stb_ram.h>" : \
CYGBLD_ROM_SLOT == "ROM" ? "<pkgconf/mlt_mn10300_am33_stb_rom.h>" : \
"<pkgconf/mlt_mn10300_am33_stb_sram1.h>" }
}
}
 
cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
display "Work with a ROM monitor"
flavor booldata
legal_values { "GDB_stubs" }
default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
requires { CYG_HAL_STARTUP == "RAM" }
parent CYGPKG_HAL_ROM_MONITOR
description "
Support can be enabled for boot ROMs or ROM monitors which contain
GDB stubs. This support changes various eCos semantics such as
the encoding of diagnostic output, and the overriding of hardware
interrupt vectors."
}
 
cdl_option CYGSEM_HAL_ROM_MONITOR {
display "Behave as a ROM monitor"
flavor bool
default_value 0
parent CYGPKG_HAL_ROM_MONITOR
requires { CYG_HAL_STARTUP == "ROM" }
description "
Enable this option if this program is to be used as a ROM monitor,
i.e. applications will be loaded into RAM on the board, and this
ROM monitor may process exceptions or interrupts generated from the
application. This enables features such as utilizing a separate
interrupt stack when exceptions are generated."
}
}
/v2_0/include/plf_intr.h
0,0 → 1,94
#ifndef CYGONCE_HAL_PLF_INTR_H
#define CYGONCE_HAL_PLF_INTR_H
 
//==========================================================================
//
// plf_intr.h
//
// STB Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jskov,
// gthomas, jlarmour
// Date: 1999-02-16
// Purpose: Define Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for the AM33 STB board.
//
// Usage:
// #include <cyg/hal/plf_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
//--------------------------------------------------------------------------
// Control-C support.
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
 
# define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_SERIAL_0_RX
 
externC cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
 
#define HAL_CTRLC_ISR hal_ctrlc_isr
 
#endif
 
 
//----------------------------------------------------------------------------
// Reset.
#ifndef CYGHWR_HAL_RESET_DEFINED
extern void hal_stb_reset( void );
#define CYGHWR_HAL_RESET_DEFINED
#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT
 
#define HAL_PLATFORM_RESET_ENTRY 0x40000000
 
#endif // CYGHWR_HAL_RESET_DEFINED
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLF_INTR_H
// End of plf_intr.h
/v2_0/include/plf_stub.h
0,0 → 1,89
#ifndef CYGONCE_HAL_PLF_STUB_H
#define CYGONCE_HAL_PLF_STUB_H
 
//=============================================================================
//
// plf_stub.h
//
// Platform header for GDB stub support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:jskov
// Date: 1999-02-12
// Purpose: Platform HAL stub support for AM33/STB boards.
// Usage: #include <cyg/hal/plf_stub.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
#include <pkgconf/hal_mn10300_am33_stb.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM
 
#include <cyg/hal/mn10300_stub.h> // architecture stub support
 
//----------------------------------------------------------------------------
// Define some platform specific communication details. This is mostly
// handled by hal_if now, but we need to make sure the comms tables are
// properly initialized.
 
externC void cyg_hal_plf_comms_init(void);
 
#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init()
#define HAL_STUB_PLATFORM_GET_CHAR() cyg_hal_plf_serial_getc(0)
#define HAL_STUB_PLATFORM_PUT_CHAR(c) cyg_hal_plf_serial_putc(0, (c))
#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) cyg_hal_plf_serial_setbaud(0, (baud))
#define HAL_STUB_PLATFORM_INTERRUPTIBLE (&hal_stb_interruptible)
#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT
 
//----------------------------------------------------------------------------
// Stub initializer.
 
externC void hal_stb_platform_init(void);
 
#define HAL_STUB_PLATFORM_INIT() hal_stb_platform_init()
 
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_PLF_STUB_H
// End of plf_stub.h
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_ram.mlt
0,0 → 1,12
version 0
region ram 50080000 400000 0 !
section rom_vectors 0 1 0 1 1 1 1 1 50080000 50080000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
section data 0 4 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_sram1.ldi
0,0 → 1,27
// eCos memory layout - Fri Oct 20 09:14:22 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
sram1 : ORIGIN = 0x80400000, LENGTH = 0x400000
ram : ORIGIN = 0x50000000, LENGTH = 0x800000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (sram1, 0x80400000, LMA_EQ_VMA)
SECTION_text (sram1, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (sram1, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (sram1, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (sram1, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (sram1, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (sram1, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (sram1, ALIGN (0x1), LMA_EQ_VMA)
SECTION_bss (ram, 0x50000400, FOLLOWING (.data))
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_sram1.mlt
0,0 → 1,13
version 0
region rom 82400000 400000 1 !
region ram 50000400 7ffc00 0 !
section rom_vectors 0 1 0 1 1 1 1 1 82400000 82400000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 0 0 1 data !
section data 0 1 1 1 1 1 0 0 50000400 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_rom.h
0,0 → 1,20
// eCos memory layout - Fri Oct 20 09:14:22 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_rom (0x40000000)
#define CYGMEM_REGION_rom_SIZE (0x400000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#define CYGMEM_REGION_ram (0x50000400)
#define CYGMEM_REGION_ram_SIZE (0x7ffc00)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x50800400 - (size_t) CYG_LABEL_NAME (__heap1))
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_rom.ldi
0,0 → 1,27
// eCos memory layout - Fri Oct 20 09:14:22 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
rom : ORIGIN = 0x40000000, LENGTH = 0x400000
ram : ORIGIN = 0x50000400, LENGTH = 0x800000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (rom, 0x40000000, LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, 0x50000400, FOLLOWING (.gcc_except_table))
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_ram.h
0,0 → 1,17
// eCos memory layout - Fri Oct 20 09:08:16 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0x50080000)
#define CYGMEM_REGION_ram_SIZE (0x400000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x50480000 - (size_t) CYG_LABEL_NAME (__heap1))
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_ram.ldi
0,0 → 1,26
// eCos memory layout - Fri Oct 20 09:08:16 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
ram : ORIGIN = 0x50080000, LENGTH = 0x400000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (ram, 0x50080000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_rom.mlt
0,0 → 1,13
version 0
region rom 82400000 400000 1 !
region ram 90000400 7ffc00 0 !
section rom_vectors 0 1 0 1 1 1 1 1 82400000 82400000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 0 0 1 data !
section data 0 1 1 1 1 1 0 0 90000400 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/v2_0/include/pkgconf/mlt_mn10300_am33_stb_sram1.h
0,0 → 1,20
// eCos memory layout - Fri Oct 20 09:14:22 2000
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_rom (0x80400000)
#define CYGMEM_REGION_rom_SIZE (0x400000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#define CYGMEM_REGION_ram (0x50000400)
#define CYGMEM_REGION_ram_SIZE (0x7ffc00)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x50800000 - (size_t) CYG_LABEL_NAME (__heap1))
/v2_0/include/platform.inc
0,0 → 1,235
#ifndef CYGONCE_HAL_PLATFORM_INC
#define CYGONCE_HAL_PLATFORM_INC
##=============================================================================
##
## platform.inc
##
## STB board assembler header file
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): nickg
## Contributors: nickg
## Date: 1999-04-06
## Purpose: STB board definitions.
## Description: This file contains various definitions and macros that are
## useful for writing assembly code for the STB board.
## Usage:
## #include <cyg/hal/platform.inc>
## ...
##
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <pkgconf/hal.h>
 
 
#------------------------------------------------------------------------------
# Diagnostics macros.
 
#define CYG_HAL_DIAG_LED_ADDRESS1 0x83f90000
#define CYG_HAL_DIAG_LED_ADDRESS2 0x81f90000
#define CYG_HAL_DIAG_LED_ADDRESS3 hal_diag_led_state
 
.macro hal_diag_data
.globl hal_diag_led_state
hal_diag_led_state: .long 0xffffffff
hal_diag_intr_count: .long 0
.endm
 
.macro hal_diag_init
mov 0xFFFFFFFF,d0
mov CYG_HAL_DIAG_LED_ADDRESS1,a0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS2,a0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS3,a0
mov d0,(a0)
 
mov 0xd4002000,a0 # SR control regs
mov 0xd4003000,a1 # timer control regs
mov 99,d0
movbu d0,(16,a1)
mov 0x80,d0
movbu d0,(a1)
clr d0
movbu d0,(4,a0)
mov 0xc084,d0
movhu d0,(a0)
 
jmp 1f
 
hal_diag_digits:
.byte 0x81 # 0
.byte 0xf3 # 1
.byte 0x49 # 2
.byte 0x61 # 3
.byte 0x33 # 4
.byte 0x25 # 5
.byte 0x05 # 6
.byte 0xf1 # 7
.byte 0x01 # 8
.byte 0x21 # 9
.byte 0x11 # A
.byte 0x07 # B
.byte 0x8d # C
.byte 0x43 # D
.byte 0x0d # E
.byte 0x1d # F
 
hal_diag_hex_digits:
.ascii "0123456789ABCDEF"
1:
 
# hal_diag_led 0
# hal_diag_led 1
# hal_diag_led 2
# hal_diag_led 3
# hal_diag_led 4
# hal_diag_led 5
# hal_diag_led 6
# hal_diag_led 7
# hal_diag_led 8
# hal_diag_led 9
# hal_diag_led 0xa
# hal_diag_led 0xb
# hal_diag_led 0xc
# hal_diag_led 0xd
# hal_diag_led 0xe
# hal_diag_led 0xf
 
.endm
 
.macro hal_diag_excpt_start
mov CYG_HAL_DIAG_LED_ADDRESS3,a0
mov (a0),d0
xor 0x01000000,d0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS1,a0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS2,a0
mov d0,(a0)
.endm
 
.macro hal_diag_intr_start
mov (hal_diag_intr_count),d1
inc d1
cmp 100,d1
bne x\@
clr d1
mov CYG_HAL_DIAG_LED_ADDRESS3,a0
mov (a0),d0
xor 0x00010000,d0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS1,a0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS2,a0
mov d0,(a0)
x\@:
mov d1,(hal_diag_intr_count)
.endm
 
#if 0
.macro hal_diag_restore
mov (hal_diag_intr_count),d0
and 0x1000,d0
beq x\@
mov CYG_HAL_DIAG_LED_ADDRESS3,a0
mov (a0),d0
and 0xfffeffff,d0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS1,a0
mov d0,(a0)
mov CYG_HAL_DIAG_LED_ADDRESS2,a0
mov d0,(a0)
x\@:
.endm
#else
.macro hal_diag_restore
.endm
#endif
 
#if 0
.macro hal_diag_led val
movm [d2,d3,a2],(sp)
mov hal_diag_digits,a2
mov \val,d2
and 0xf,d2
add d2,a2
movbu (a2),d3
mov CYG_HAL_DIAG_LED_ADDRESS3,a2
mov (a2),d2
asl 8,d2
or d3,d2
mov d2,(a2)
mov CYG_HAL_DIAG_LED_ADDRESS1,a2
mov d2,(a2)
mov CYG_HAL_DIAG_LED_ADDRESS2,a2
mov d2,(a2)
 
# mov \val,d3
# and 0xf,d3
# mov hal_diag_hex_digits,a2
# add d3,a2
# movbu (a2),d3
# mov 0xd4002000,a2
#x2: movhu (0,a2),d2
# and 0x20,d2
# bne 2b
# movbu d3,(8,a2)
 
mov 200000,d2
1:
add -1,d2
cmp 0,d2
bne 1b
 
movm (sp),[d2,d3,a2]
.endm
#else
.macro hal_diag_led val
.endm
#endif
 
#define CYGPKG_HAL_MN10300_DIAG_DEFINED
 
 
#------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLATFORM_INC
# end of platform.inc
/v2_0/include/plf_io.h
0,0 → 1,141
#ifndef CYGONCE_PLF_IO_H
#define CYGONCE_PLF_IO_H
 
//=============================================================================
//
// plf_io.h
//
// Platform specific IO support
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: dhowells
// Date: 2001-08-02
// Purpose: STB platform IO support
// Description:
// Usage: #include <cyg/hal/plf_io.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef __ASSEMBLER__
#define HAL_REG_8(x) x
#define HAL_REG_16(x) x
#define HAL_REG_32(x) x
#else
#define HAL_REG_8(x) (volatile cyg_uint8*)(x)
#define HAL_REG_16(x) (volatile cyg_uint16*)(x)
#define HAL_REG_32(x) (volatile cyg_uint32*)(x)
#endif
 
//-----------------------------------------------------------------------------
 
/* STB GPIO Registers */
#define HAL_GPIO_BASE 0xDB000000
 
#define HAL_GPIO_0_MODE_OFFSET 0x0000
#define HAL_GPIO_0_IN_OFFSET 0x0004
#define HAL_GPIO_0_OUT_OFFSET 0x0008
#define HAL_GPIO_1_MODE_OFFSET 0x0100
#define HAL_GPIO_1_IN_OFFSET 0x0104
#define HAL_GPIO_1_OUT_OFFSET 0x0108
#define HAL_GPIO_2_MODE_OFFSET 0x0200
#define HAL_GPIO_2_IN_OFFSET 0x0204
#define HAL_GPIO_2_OUT_OFFSET 0x0208
#define HAL_GPIO_3_MODE_OFFSET 0x0300
#define HAL_GPIO_3_IN_OFFSET 0x0304
#define HAL_GPIO_3_OUT_OFFSET 0x0308
#define HAL_GPIO_4_MODE_OFFSET 0x0400
#define HAL_GPIO_4_IN_OFFSET 0x0404
#define HAL_GPIO_4_OUT_OFFSET 0x0408
#define HAL_GPIO_5_MODE_OFFSET 0x0500
#define HAL_GPIO_5_IN_OFFSET 0x0504
#define HAL_GPIO_5_OUT_OFFSET 0x0508
 
#define HAL_GPIO_0_MODE HAL_REG_16 (HAL_GPIO_BASE + HAL_GPIO_0_MODE_OFFSET)
#define HAL_GPIO_0_IN HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_0_IN_OFFSET)
#define HAL_GPIO_0_OUT HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_0_OUT_OFFSET)
#define HAL_GPIO_1_MODE HAL_REG_16 (HAL_GPIO_BASE + HAL_GPIO_1_MODE_OFFSET)
#define HAL_GPIO_1_IN HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_1_IN_OFFSET)
#define HAL_GPIO_1_OUT HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_1_OUT_OFFSET)
#define HAL_GPIO_2_MODE HAL_REG_16 (HAL_GPIO_BASE + HAL_GPIO_2_MODE_OFFSET)
#define HAL_GPIO_2_IN HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_2_IN_OFFSET)
#define HAL_GPIO_2_OUT HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_2_OUT_OFFSET)
#define HAL_GPIO_3_MODE HAL_REG_16 (HAL_GPIO_BASE + HAL_GPIO_3_MODE_OFFSET)
#define HAL_GPIO_3_IN HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_3_IN_OFFSET)
#define HAL_GPIO_3_OUT HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_3_OUT_OFFSET)
#define HAL_GPIO_4_MODE HAL_REG_16 (HAL_GPIO_BASE + HAL_GPIO_4_MODE_OFFSET)
#define HAL_GPIO_4_IN HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_4_IN_OFFSET)
#define HAL_GPIO_4_OUT HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_4_OUT_OFFSET)
#define HAL_GPIO_5_MODE HAL_REG_16 (HAL_GPIO_BASE + HAL_GPIO_5_MODE_OFFSET)
#define HAL_GPIO_5_IN HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_5_IN_OFFSET)
#define HAL_GPIO_5_OUT HAL_REG_8 (HAL_GPIO_BASE + HAL_GPIO_5_OUT_OFFSET)
 
//-----------------------------------------------------------------------------
#define HAL_LED_ADDRESS 0x83f90000
#define HAL_GPIO_MODE_ALL_OUTPUT 0x5555
 
 
#ifdef __ASSEMBLER__
 
# include <cyg/hal/platform.inc>
# define DEBUG_DISPLAY(hexdig) hal_diag_led hexdig
# define DEBUG_DELAY() \
mov 0x20000, d0; \
0: sub 1, d0; \
bne 0b; \
nop
 
#else
 
extern cyg_uint8 cyg_hal_plf_led_val(CYG_WORD hexdig);
# define DEBUG_DISPLAY(hexdig) HAL_WRITE_UINT8(HAL_LED_ADDRESS, cyg_hal_plf_led_val(hexdig))
# define DEBUG_DELAY() \
{ \
volatile int i = 0x80000; \
while (--i) ; \
}
 
#endif
 
//-----------------------------------------------------------------------------
// end of plf_io.h
#endif // CYGONCE_PLF_IO_H
/v2_0/include/hal_diag.h
0,0 → 1,80
#ifndef CYGONCE_HAL_HAL_DIAG_H
#define CYGONCE_HAL_HAL_DIAG_H
 
/*=============================================================================
//
// hal_diag.h
//
// HAL Support for Kernel Diagnostic Routines
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg
// Date: 1998-03-02
// Purpose: HAL Support for Kernel Diagnostic Routines
// Description: Diagnostic routines for use during kernel development.
// Usage: #include "cyg/hal/hal_diag.h"
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
/*---------------------------------------------------------------------------*/
/* functions implemented in hal_diag.c */
 
externC void hal_diag_init(void);
 
externC void hal_diag_write_char(char c);
 
externC void hal_diag_read_char(char *c);
 
/*---------------------------------------------------------------------------*/
 
#define HAL_DIAG_INIT() hal_diag_init()
 
#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_)
 
#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_)
 
/*---------------------------------------------------------------------------*/
/* end of hal_diag.h */
#endif /* CYGONCE_HAL_HAL_DIAG_H */
/v2_0/src/plf_stub.c
0,0 → 1,167
//=============================================================================
//
// plf_stub.c
//
// Platform specific code for GDB stub support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg, jskov (based on the old mn10300 hal_stub.c)
// Contributors:nickg, jskov, dhowells
// Date: 1999-02-12
// Purpose: Platform specific code for GDB stub support.
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/hal/hal_stub.h>
 
#include <cyg/hal/hal_io.h> // HAL IO macros
#include <cyg/hal/hal_intr.h> // HAL interrupt macros
 
//---------------------------------------------------------------------------
// MN10300 Serial line
 
// We use serial0 on AM33
#define SERIAL0_CR ((volatile cyg_uint16 *)0xd4002000)
#define SERIAL0_ICR ((volatile cyg_uint8 *) 0xd4002004)
#define SERIAL0_TXR ((volatile cyg_uint8 *) 0xd4002008)
#define SERIAL0_RXR ((volatile cyg_uint8 *) 0xd4002009)
#define SERIAL0_SR ((volatile cyg_uint16 *)0xd400200c)
 
// Timer 2 provides baud rate divisor
#define TIMER0_MD ((volatile cyg_uint8 *)0xd4003002)
#define TIMER0_BR ((volatile cyg_uint8 *)0xd4003012)
#define TIMER0_CR ((volatile cyg_uint8 *)0xd4003022)
 
#define SIO1_LSTAT_TRDY 0x20
#define SIO1_LSTAT_RRDY 0x10
 
 
//---------------------------------------------------------------------------
 
#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
// This ISR is called from the interrupt handler. This should only
// happen when there is no serial driver, so the code shouldn't mess
// anything up.
int cyg_hal_gdb_isr(cyg_uint32 vector, target_register_t pc)
{
if ( CYGNUM_HAL_INTERRUPT_SERIAL_0_RX == vector ) {
cyg_uint8 c;
 
HAL_READ_UINT8 (SERIAL0_RXR, c);
HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX);
 
if( 3 == c )
{
// Ctrl-C: set a breakpoint at PC so GDB will display the
// correct program context when stopping rather than the
// interrupt handler.
cyg_hal_gdb_interrupt (pc);
 
// Interrupt handled. Don't call ISR proper. At return
// from the VSR, execution will stop at the breakpoint
// just set.
return 0;
}
}
 
// Not caused by GDB. Call ISR proper.
return 1;
}
 
int hal_stb_interruptible(int state)
{
if (state) {
HAL_WRITE_UINT8 (SERIAL0_ICR, 0);
HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
} else {
HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
}
return 0;
}
 
void hal_stb_init_break_irq( void )
{
// Enable serial receive interrupts.
HAL_WRITE_UINT8 (SERIAL0_ICR, 0);
HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
HAL_ENABLE_INTERRUPTS();
}
#endif
 
//-----------------------------------------------------------------------------
 
void hal_stb_platform_init(void)
{
extern CYG_ADDRESS hal_virtual_vector_table[64];
extern void init_thread_syscall( void *);
extern void install_async_breakpoint(void *epc);
// void (*oldvsr)(void);
extern void __default_exception_vsr(void);
 
// Ensure that the breakpoint VSR points to the default VSR. This will pass
// it on to the stubs.
// HAL_VSR_SET( CYGNUM_HAL_VECTOR_BREAKPOINT, __default_exception_vsr, &oldvsr );
 
// Install async breakpoint handler into vector table.
hal_virtual_vector_table[35] = (CYG_ADDRESS)install_async_breakpoint;
 
#if !defined(CYGPKG_KERNEL) && defined(CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT)
// Only include this code if we do not have a kernel. Otherwise
// the kernel supplies the functionality for the app we are linked
// with.
 
// Prepare for application installation of thread info function in
// vector table.
hal_virtual_vector_table[15] = 0;
init_thread_syscall( (void *)&hal_virtual_vector_table[15] );
 
#endif
}
 
 
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
//-----------------------------------------------------------------------------
// End of plf_stub.c
/v2_0/src/hal_diag.c
0,0 → 1,526
/*=============================================================================
//
// hal_diag.c
//
// HAL diagnostic output code
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg
// Date: 1998-03-02
// Purpose: HAL diagnostic output
// Description: Implementations of HAL diagnostic output support.
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // base types
#include <cyg/infra/cyg_trac.h> // tracing macros
#include <cyg/infra/cyg_ass.h> // assertion macros
 
#include <cyg/hal/hal_diag.h>
#include <cyg/hal/hal_intr.h>
#include <cyg/hal/hal_misc.h>
 
/*---------------------------------------------------------------------------*/
/* Select default diag channel to use */
 
//#define CYG_KERNEL_DIAG_ROMART
//#define CYG_KERNEL_DIAG_SERIAL0
//#define CYG_KERNEL_DIAG_SERIAL1
//#define CYG_KERNEL_DIAG_SERIAL2
//#define CYG_KERNEL_DIAG_BUFFER
//#define CYG_KERNEL_DIAG_GDB
 
#if !defined(CYG_KERNEL_DIAG_SERIAL0) && \
!defined(CYG_KERNEL_DIAG_SERIAL1) && \
!defined(CYG_KERNEL_DIAG_SERIAL2) && \
!defined(CYG_KERNEL_DIAG_ROMART)
 
#if defined(CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs)
 
#define CYG_KERNEL_DIAG_SERIAL0
#define CYG_KERNEL_DIAG_GDB
 
#else
 
#define CYG_KERNEL_DIAG_SERIAL0
 
#endif
 
#endif
 
//#define CYG_HAL_MN10300_STB_SERIAL2
 
/*---------------------------------------------------------------------------*/
// MN10300 Serial line
 
#if defined(CYG_HAL_MN10300_STB_SERIAL0) || defined(CYG_KERNEL_DIAG_SERIAL0)
 
// We use serial0 on AM33
#define SERIAL0_CR ((volatile cyg_uint16 *)0xd4002000)
#define SERIAL0_ICR ((volatile cyg_uint8 *) 0xd4002004)
#define SERIAL0_TXR ((volatile cyg_uint8 *) 0xd4002008)
#define SERIAL0_RXR ((volatile cyg_uint8 *) 0xd4002009)
#define SERIAL0_SR ((volatile cyg_uint16 *)0xd400200c)
 
// Timer 2 provides baud rate divisor
#define TIMER0_MD ((volatile cyg_uint8 *)0xd4003002)
#define TIMER0_BR ((volatile cyg_uint8 *)0xd4003012)
#define TIMER0_CR ((volatile cyg_uint8 *)0xd4003022)
 
// Timer 0 provides a prescaler for lower baud rates
#define HW_TIMER0_MD ((volatile cyg_uint8 *)0xd4003000)
#define HW_TIMER0_BR ((volatile cyg_uint8 *)0xd4003010)
#define HW_TIMER0_CR ((volatile cyg_uint8 *)0xd4003020)
 
#define SIO_LSTAT_TRDY 0x20
#define SIO_LSTAT_RRDY 0x10
 
#define SERIAL_CR_TXE 0x8000
 
void hal_diag_init_serial0(void)
{
#if 1
// 99 translates to 38400 baud.
*TIMER0_BR = 99;
// Timer0 sourced from IOCLK
*TIMER0_MD = 0x80;
#else
// 1 and 198 translate into 9800 baud
*TIMER0_BR = 1;
*TIMER0_MD = 0x84; // source = timer 0 overflow
*HW_TIMER0_BR = 198; // timer 0 base register
*HW_TIMER0_CR = 0x80; // source from ioclk
#endif
// No interrupts for now.
*SERIAL0_ICR = 0x00;
 
// Source from timer 1, 8bit chars, enable tx and rx
*SERIAL0_CR = 0xc085;
}
 
void hal_diag_write_char_serial0(char c)
{
register volatile cyg_uint16 *volatile tty_status = SERIAL0_SR;
register volatile cyg_uint8 *volatile tty_tx = SERIAL0_TXR;
 
while( (*tty_status & SIO_LSTAT_TRDY) != 0 ) continue;
 
*tty_tx = c;
}
 
void hal_diag_drain_serial0(void)
{
register volatile cyg_uint16 *volatile tty_status = SERIAL0_SR;
 
while( (*tty_status & SIO_LSTAT_TRDY) != 0 ) continue;
}
 
void hal_diag_read_char_serial0(char *c)
{
register volatile cyg_uint16 *volatile tty_status = SERIAL0_SR;
register volatile cyg_uint8 *volatile tty_rx = SERIAL0_RXR;
 
while( (*tty_status & SIO_LSTAT_RRDY) == 0 ) continue;
 
*c = *tty_rx;
 
// We must ack the interrupt caused by that read to avoid
// confusing the GDB stub ROM.
HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_0_RX );
}
 
#if defined(CYG_KERNEL_DIAG_SERIAL0)
 
#define hal_diag_init_serial hal_diag_init_serial0
#define hal_diag_write_char_serial hal_diag_write_char_serial0
#define hal_diag_drain_serial hal_diag_drain_serial0
#define hal_diag_read_char_serial hal_diag_read_char_serial0
 
#endif
 
#endif
 
/*---------------------------------------------------------------------------*/
// MN10300 Serial line
 
#if defined(CYG_HAL_MN10300_STB_SERIAL1) || defined(CYG_KERNEL_DIAG_SERIAL1)
 
// We use serial1 on MN103002
#define SERIAL1_CR ((volatile cyg_uint16 *)0xd4002010)
#define SERIAL1_ICR ((volatile cyg_uint8 *) 0xd4002014)
#define SERIAL1_TXR ((volatile cyg_uint8 *) 0xd4002018)
#define SERIAL1_RXR ((volatile cyg_uint8 *) 0xd4002019)
#define SERIAL1_SR ((volatile cyg_uint16 *)0xd400201c)
 
// Timer 1 provided baud rate divisor
#define TIMER1_MD ((volatile cyg_uint8 *)0xd4003001)
#define TIMER1_BR ((volatile cyg_uint8 *)0xd4003011)
#define TIMER1_CR ((volatile cyg_uint8 *)0xd4003021)
 
// Timer 0 provides a prescaler for lower baud rates
#define HW_TIMER0_MD ((volatile cyg_uint8 *)0xd4003000)
#define HW_TIMER0_BR ((volatile cyg_uint8 *)0xd4003010)
#define HW_TIMER0_CR ((volatile cyg_uint8 *)0xd4003020)
 
#define SIO1_LSTAT_TRDY 0x20
#define SIO1_LSTAT_RRDY 0x10
 
#define SERIAL_CR_TXE 0x8000
 
void hal_diag_init_serial1(void)
{
#if 1
// 99 translates to 38400 baud.
*TIMER1_BR = 99;
 
// Timer1 sourced from IOCLK
*TIMER1_MD = 0x80;
 
#else
 
// 1 and 198 translate into 9800 baud
*TIMER1_BR = 1;
*TIMER1_MD = 0x84; // source = timer 0 overflow
*HW_TIMER0_BR = 198; // timer 0 base register
*HW_TIMER0_CR = 0x80; // source from ioclk
#endif
// No interrupts for now.
*SERIAL1_ICR = 0x00;
 
// Source from timer 1, 8bit chars, enable tx and rx
*SERIAL1_CR = 0xc084;
}
 
void hal_diag_write_char_serial1(char c)
{
register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR;
register volatile cyg_uint8 *volatile tty_tx = SERIAL1_TXR;
 
while( (*tty_status & SIO1_LSTAT_TRDY) != 0 ) continue;
 
*tty_tx = c;
}
 
void hal_diag_drain_serial1(void)
{
register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR;
 
while( (*tty_status & SIO1_LSTAT_TRDY) != 0 ) continue;
}
 
void hal_diag_read_char_serial1(char *c)
{
register volatile cyg_uint16 *volatile tty_status = SERIAL1_SR;
register volatile cyg_uint8 *volatile tty_rx = SERIAL1_RXR;
 
while( (*tty_status & SIO1_LSTAT_RRDY) == 0 ) continue;
 
*c = *tty_rx;
 
// We must ack the interrupt caused by that read to avoid
// confusing the GDB stub ROM.
HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_1_RX );
}
 
#if defined(CYG_KERNEL_DIAG_SERIAL1)
 
#define hal_diag_init_serial hal_diag_init_serial1
#define hal_diag_write_char_serial hal_diag_write_char_serial1
#define hal_diag_drain_serial hal_diag_drain_serial1
#define hal_diag_read_char_serial hal_diag_read_char_serial1
 
#endif
 
#endif
 
/*---------------------------------------------------------------------------*/
 
#if defined(CYG_HAL_MN10300_STB_SERIAL2) || defined(CYG_KERNEL_DIAG_SERIAL2)
 
// We use serial2 on MN103002
#define SERIAL2_CR ((volatile cyg_uint16 *)0xd4002020)
#define SERIAL2_ICR ((volatile cyg_uint8 *) 0xd4002024)
#define SERIAL2_TXR ((volatile cyg_uint8 *) 0xd4002028)
#define SERIAL2_RXR ((volatile cyg_uint8 *) 0xd4002029)
#define SERIAL2_SR ((volatile cyg_uint8 *) 0xd400202c)
#define SERIAL2_TR ((volatile cyg_uint8 *) 0xd400202d)
 
// Timer 3 provides baud rate divisor
#define TIMER2_MD ((volatile cyg_uint8 *)0xd4003003)
#define TIMER2_BR ((volatile cyg_uint8 *)0xd4003013)
#define TIMER2_CR ((volatile cyg_uint8 *)0xd4003023)
 
#define SIO2_LSTAT_TRDY 0x20
#define SIO2_LSTAT_RRDY 0x10
 
void hal_diag_init_serial2(void)
{
#if 0
{
int i,j;
for( j = 1; j < 255; j++ )
{
for(i = 1; i < 127; i++)
{
*TIMER2_BR = j;
*SERIAL2_TR = i;
// Timer2 sourced from IOCLK
*TIMER2_MD = 0x80;
 
// No interrupts for now.
*SERIAL2_ICR = 0x00;
 
// Source from timer 2, 8bit chars, enable tx and rx
*SERIAL2_CR = 0xc081;
 
diag_printf("\r\n<%03d,%03d>1234567890abcdefgh<%03d,%03d>\r\n",j,i,j,i);
}
}
}
#endif
// 7 and 102 translate to 38400 baud.
// The AM33 documentation says that these values should be 7 and 113.
// I have no explanation as to why there is such a discrepancy between the
// documentation and the hardware.
*TIMER2_BR = 7;
*SERIAL2_TR = 102;
// Timer2 sourced from IOCLK
*TIMER2_MD = 0x80;
 
// No interrupts for now.
*SERIAL2_ICR = 0x00;
 
// Source from timer 3, 8bit chars, enable tx and rx
*SERIAL2_CR = 0xc083;
 
}
 
void hal_diag_write_char_serial2(char c)
{
register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
register volatile cyg_uint8 *volatile tty_tx = SERIAL2_TXR;
 
while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue;
 
*tty_tx = c;
}
 
void hal_diag_drain_serial2(void)
{
register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
 
while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue;
}
 
void hal_diag_read_char_serial2(char *c)
{
register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
register volatile cyg_uint8 *volatile tty_rx = SERIAL2_RXR;
 
while( (*tty_status & SIO2_LSTAT_RRDY) == 0 ) continue;
 
*c = *tty_rx;
 
// We must ack the interrupt caused by that read to avoid
// confusing the GDB stub ROM.
HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_2_RX );
}
 
#if defined(CYG_KERNEL_DIAG_SERIAL2)
 
#define hal_diag_init_serial hal_diag_init_serial2
#define hal_diag_write_char_serial hal_diag_write_char_serial2
#define hal_diag_drain_serial hal_diag_drain_serial2
#define hal_diag_read_char_serial hal_diag_read_char_serial2
 
#endif
 
#endif
 
/*---------------------------------------------------------------------------*/
 
 
#if defined(CYG_KERNEL_DIAG_BUFFER)
 
char hal_diag_buffer[10000];
int hal_diag_buffer_pos;
 
void hal_diag_init_buffer(void)
{
hal_diag_buffer_pos = 0;
}
 
void hal_diag_write_char_buffer(char c)
{
hal_diag_buffer[hal_diag_buffer_pos++] = c;
if (hal_diag_buffer_pos >= sizeof(hal_diag_buffer) )
hal_diag_buffer_pos = 0;
}
 
void hal_diag_drain_buffer(void)
{
}
 
void hal_diag_read_char_buffer(char *c)
{
*c = '\n';
}
 
#define hal_diag_init_serial hal_diag_init_buffer
#define hal_diag_write_char_serial hal_diag_write_char_buffer
#define hal_diag_drain_serial hal_diag_drain_buffer
#define hal_diag_read_char_serial hal_diag_read_char_buffer
 
#endif
 
 
/*---------------------------------------------------------------------------*/
 
void hal_diag_init(void)
{
hal_diag_init_serial();
}
 
void hal_diag_write_char(char c)
{
#ifdef CYG_KERNEL_DIAG_GDB
 
static char line[100];
static int pos = 0;
 
// No need to send CRs
if( c == '\r' ) return;
 
line[pos++] = c;
 
if( c == '\n' || pos == sizeof(line) )
{
// Disable interrupts. This prevents GDB trying to interrupt us
// while we are in the middle of sending a packet. The serial
// receive interrupt will be seen when we re-enable interrupts
// later.
 
CYG_INTERRUPT_STATE oldstate;
CYG_BYTE wdcr;
HAL_DISABLE_INTERRUPTS(oldstate);
 
// Beacuse of problems with NT on the testfarm, we also have
// to disable the watchdog here. This only matters in the
// watchdog tests. And yes, this sends my irony meter off the
// scale too.
 
HAL_READ_UINT8( 0xC0001002, wdcr );
HAL_WRITE_UINT8( 0xC0001002, wdcr&0x3F );
while(1)
{
static char hex[] = "0123456789ABCDEF";
cyg_uint8 csum = 0;
int i;
hal_diag_write_char_serial('$');
hal_diag_write_char_serial('O');
csum += 'O';
for( i = 0; i < pos; i++ )
{
char ch = line[i];
char h = hex[(ch>>4)&0xF];
char l = hex[ch&0xF];
hal_diag_write_char_serial(h);
hal_diag_write_char_serial(l);
csum += h;
csum += l;
}
hal_diag_write_char_serial('#');
hal_diag_write_char_serial(hex[(csum>>4)&0xF]);
hal_diag_write_char_serial(hex[csum&0xF]);
 
 
{
char c1;
 
hal_diag_read_char_serial( &c1 );
 
if( c1 == '+' ) break;
 
if( cyg_hal_is_break( &c1, 1 ) )
cyg_hal_user_break( NULL );
 
}
}
pos = 0;
 
// Wait for tx buffer to drain
hal_diag_drain_serial();
// And re-enable interrupts
HAL_RESTORE_INTERRUPTS(oldstate);
HAL_WRITE_UINT8( 0xC0001002, wdcr );
}
#else
hal_diag_write_char_serial(c);
#endif
}
 
 
 
 
void hal_diag_read_char(char *c)
{
hal_diag_read_char_serial(c);
}
 
 
/*---------------------------------------------------------------------------*/
/* End of hal_diag.c */
/v2_0/src/plf_misc.c
0,0 → 1,203
//==========================================================================
//
// plf_misc.c
//
// HAL platform miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jlarmour, dhowells
// Date: 1999-01-21
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // Base types
#include <cyg/infra/cyg_trac.h> // tracing macros
#include <cyg/infra/cyg_ass.h> // assertion macros
 
#include <cyg/hal/hal_arch.h> // architectural definitions
 
#include <cyg/hal/hal_intr.h> // Interrupt handling
 
#include <cyg/hal/hal_cache.h> // Cache handling
 
#include <cyg/hal/hal_if.h>
#include <cyg/hal/hal_misc.h>
 
#include <cyg/hal/plf_io.h>
 
/*------------------------------------------------------------------------*/
/* LED support */
cyg_uint8 cyg_hal_plf_led_val(CYG_WORD hexdig)
{
static cyg_uint8 map[] = {
0x81, // 0
0xf3, // 1
0x49, // 2
0x61, // 3
0x33, // 4
0x25, // 5
0x05, // 6
0xf1, // 7
0x01, // 8
0x21, // 9
0x11, // A
0x07, // B
0x8d, // C
0x43, // D
0x0d, // E
0x1d // F
};
return map[(hexdig & 0xF)];
}
 
/*------------------------------------------------------------------------*/
 
void hal_platform_init(void)
{
HAL_WRITE_UINT8(HAL_LED_ADDRESS, cyg_hal_plf_led_val(8));
 
#if defined(CYG_HAL_STARTUP_ROM)
// Note that the hardware seems to come up with the
// caches containing random data. Hence they must be
// invalidated before being enabled.
// However, we only do this if we are in ROM. If we are
// in RAM, then we leave the caches in the state chosen
// by the ROM monitor. If we enable them when the monitor
// is not expecting it, we can end up breaking things if the
// monitor is not doing cache flushes.
 
//HAL_ICACHE_INVALIDATE_ALL();
//HAL_ICACHE_ENABLE();
//HAL_DCACHE_INVALIDATE_ALL();
//HAL_DCACHE_ENABLE();
#endif
 
// Set up eCos/ROM interfaces
hal_if_init();
#if defined(CYGPKG_KERNEL) && \
defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \
defined(CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs)
{
extern void patch_dbg_syscalls(void * vector);
patch_dbg_syscalls( (void *)(&hal_virtual_vector_table[0]) );
}
#endif
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
{
static void hal_ctrlc_isr_init(void);
hal_ctrlc_isr_init();
}
#endif
}
 
/*------------------------------------------------------------------------*/
/* Control C ISR support */
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) && \
!defined(CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT)
 
#if CYGHWR_HAL_MN10300_AM33_STB_GDB_PORT == 0
 
// We use serial0 on AM33
#define SERIAL_CR ((volatile cyg_uint16 *)0xd4002000)
#define SERIAL_ICR ((volatile cyg_uint8 *) 0xd4002004)
#define SERIAL_TXR ((volatile cyg_uint8 *) 0xd4002008)
#define SERIAL_RXR ((volatile cyg_uint8 *) 0xd4002009)
#define SERIAL_SR ((volatile cyg_uint16 *)0xd400200c)
 
// Timer 1 provided baud rate divisor
#define TIMER_MD ((volatile cyg_uint8 *)0xd4003000)
#define TIMER_BR ((volatile cyg_uint8 *)0xd4003010)
#define TIMER_CR ((volatile cyg_uint8 *)0xd4003020)
 
#define SIO_LSTAT_TRDY 0x20
#define SIO_LSTAT_RRDY 0x10
 
#else
 
#error Unsupported GDB port
 
#endif
 
struct Hal_SavedRegisters *hal_saved_interrupt_state;
 
static void hal_ctrlc_isr_init(void)
{
// cyg_uint16 cr;
 
// HAL_READ_UINT16( SERIAL_CR, cr );
// cr |= LCR_RXE;
// HAL_WRITE_UINT16( SERIAL_CR, cr );
HAL_INTERRUPT_SET_LEVEL( CYGHWR_HAL_GDB_PORT_VECTOR, 4 );
HAL_INTERRUPT_UNMASK( CYGHWR_HAL_GDB_PORT_VECTOR );
}
 
cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
{
char c;
cyg_uint16 sr;
HAL_INTERRUPT_ACKNOWLEDGE( CYGHWR_HAL_GDB_PORT_VECTOR );
 
HAL_READ_UINT16( SERIAL_SR, sr );
 
if( sr & SIO_LSTAT_RRDY )
{
HAL_READ_UINT8( SERIAL_RXR, c);
 
if( cyg_hal_is_break( &c , 1 ) )
cyg_hal_user_break( (CYG_ADDRWORD *)hal_saved_interrupt_state );
 
}
return 1;
}
 
#endif
 
/*------------------------------------------------------------------------*/
/* End of plf_misc.c */
/v2_0/ChangeLog
0,0 → 1,263
2002-11-19 Mark Salter <msalter@redhat.com>
 
* cdl/hal_mn10300_am33_stb.cdl: Remove virtual vector comm support.
Add options to select AM33 serial ports for comm channels. Add
override for default processor clock frequency.
* src/ser_stb.c: Removed.
 
2002-08-06 Gary Thomas <gary@chez-thomas.org>
2002-08-06 Motoya Kurotsu <kurotsu@allied-telesis.co.jp>
 
* src/ser_stb.c: I/O channel data can't be constant - contains
timeout information which can be changed.
 
2001-10-31 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_mn10300_am33_stb.cdl: Indicate support of variable baud rates.
 
2001-09-05 David Howells <dhowells@redhat.com>
 
* src/plf_misc.c: made inclusion here of hal_ctrlc_isr()
contingent on the lack of virtual vector support.
 
2001-08-15 David Howells <dhowells@redhat.com>
 
* src/hal_diag.c: included hal_misc.h.
* src/plf_misc.c: included hal_misc.h and stopped declaring
hal_virtual_vector_table directly.
 
2001-08-03 David Howells <dhowells@redhat.com>
 
* cdl/hal_mn10300_am33_stb.cdl: added vector support and made to
work with RedBoot and flash.
* include/plf_intr.h: ditto.
* include/plf_io.h: ditto.
* include/plf_stub.h: ditto.
* include/pkgconf/mlt_mn10300_am33_stb_rom.h: ditto.
* include/pkgconf/mlt_mn10300_am33_stb_rom.mlt: ditto.
* include/pkgconf/mlt_mn10300_am33_stb_sram1.h: ditto.
* include/pkgconf/mlt_mn10300_am33_stb_sram1.ldi: ditto.
* include/pkgconf/mlt_mn10300_am33_stb_sram1.mlt: ditto.
* misc/redboot_RAM.ecm: ditto.
* misc/redboot_ROM.ecm: ditto.
* misc/redboot_SRAM1.ecm: ditto.
* src/plf_misc.c: ditto.
* src/plf_stub.c: ditto.
* src/ser_stb.c: ditto.
 
2001-08-02 Nick Garnett <nickg@redhat.com>
 
* include/plf_io.h:
Added this file to match assumption now made in arch files that it
exists.
 
2001-01-26 Jesper Skov <jskov@redhat.com>
 
* include/plf_stub.h: Reset macros moved
* include/plf_intr.h: to this file.
 
2000-10-20 Jonathan Larmour <jlarmour@redhat.com>
 
* include/pkgconf/mlt_mn10300_am33_stb_ram.mlt:
* include/pkgconf/mlt_mn10300_am33_stb_rom.mlt:
Add heap1 section
 
* include/pkgconf/mlt_mn10300_am33_stb_ram.h:
* include/pkgconf/mlt_mn10300_am33_stb_rom.h:
* include/pkgconf/mlt_mn10300_am33_stb_ram.ldi:
* include/pkgconf/mlt_mn10300_am33_stb_rom.ldi:
Regenerated
 
2000-03-20 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* src/plf_stub.c (cyg_hal_gdb_isr): Use serial 0 interrupt macros
consistently
(hal_stb_interruptible): Likewise
(hal_stb_init_break_irq): Likewise
 
2000-02-18 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* cdl/hal_mn10300_am33_stb.cdl (CYGBLD_BUILD_GDB_STUBS): When building
stubs, define every dependency required here rather than in the
template
 
2000-02-10 Jesper Skov <jskov@redhat.com>
 
* include/plf_stub.h:
Renoved HAL_STUB_PLATFORM_STUBS_INIT.
 
2000-02-07 Jesper Skov <jskov@redhat.com>
 
* cdl/hal_mn10300_am33_stb.cdl: use cpu options when linking.
 
2000-02-03 Jesper Skov <jskov@redhat.com>
 
* cdl/hal_mn10300_am33_stb.cdl: Implements stubs.
 
2000-01-27 Jesper Skov <jskov@redhat.com>
 
* cdl/hal_mn10300_am33_stb.cdl: Moved part of stubs build rule to
common HAL. Changed description.
 
2000-01-26 Jesper Skov <jskov@redhat.com>
 
* cdl/hal_mn10300_am33_stb.cdl: Fix display string.
 
2000-01-24 Jesper Skov <jskov@cygnus.co.uk>
 
* cdl/hal_mn10300_am33_stb.cdl: Add stubs build rule.
 
2000-01-24 John Dallaway <jld@cygnus.co.uk>
 
* cdl/*.cdl:
 
Remove obsolete option CYGTST_TESTING_IDENTIFIER.
 
2000-01-19 Hugo Tyson <hmt@cygnus.co.uk>
 
* cdl/*.cdl: Add descriptions to a number of options &c which were
lacking same, also tidied up other typos as noticed en passant.
 
1999-12-21 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* src/hal_diag.c (CYG_KERNEL_DIAG_GDB): Rename
CYG_HAL_USE_ROM_MONITOR_GDB_STUBS ->
CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs
 
* src/plf_misc.c (hal_platform_init): Likewise
(cyg_hal_user_break): Likewise
 
* misc/stubrom.perm: Don't need to enable CYG_HAL_ROM_MONITOR - it has
no effect in this HAL
 
* cdl/hal_mn10300_am33_stb.cdl: Add new platform-specific
CYGSEM_HAL_USE_ROM_MONITOR option to control ROM monitor support
 
1999-12-20 Gary Thomas <gthomas@cygnus.co.uk>
 
* cdl/hal_mn10300_am33_stb.cdl: Add -Wl for linker options.
 
1999-11-25 Gary Thomas <gthomas@cygnus.co.uk>
 
* include/pkgconf/mlt_mn10300_am33_stb_rom.h:
* include/pkgconf/mlt_mn10300_am33_stb_ram.h: New file(s).
 
1999-11-03 Jesper Skov <jskov@cygnus.co.uk>
 
* cdl/hal_mn10300_am33_stb.cdl: Added.
 
1999-08-27 Nick Garnett <nickg@cygnus.co.uk>
 
* src/hal_diag.c (hal_diag_write_char): Added code to disable
watchdog while emitting a debug message. This is solely to cope
with shortcomings in the test farm.
 
1999-08-16 John Dallaway <jld@cygnus.co.uk>
 
* include/pkgconf/hal_mn10300_am33_stb.h:
 
Comment out descriptions of non-configurable options for now.
 
1999-08-16 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* src/plf_misc.c:
* src/plf_stub.c:
Correct comment from am32 to am33
 
1999-08-13 Nick Garnett <nickg@cygnus.co.uk>
 
* src/plf_misc.c (hal_platform_init): Only enable the caches if we
are in ROM. When we are in RAM we let the ROM monitor decide how
the caches are to be used.
 
1999-08-10 Jonathan Larmour <jlarmour@cygnus.co.uk>
 
* include/pkgconf/hal_mn10300_am33_stb.h:
Ensure CYGPKG_HAL_MN10300_AM33_STB requires CYGPKG_HAL_MN10300_AM33
 
1999-08-06 Nick Garnett <nickg@cygnus.co.uk>
 
* src/plf_stub.c:
* src/hal_diag.c:
Changed timers used for baud rate generation for all serial lines
so we can use timer0 as a prescaler for lower baud rates.
 
1999-07-30 Nick Garnett <nickg@cygnus.co.uk>
 
* src/plf_stub.c: Enabled asynchronous breakpoint handler in
virtual vector table.
 
* src/plf_misc.c: Implemented Ctrl-C support.
[Later] Changed return code of hal_ctrlc_isr() to 1.
* src/hal_diag.c: Added Ctrl-C support to GDB protocol handling.
[Later] Added interrupt acknowledge calls to all serial line reads
to eliminate spurious interrupts.
 
* include/pkgconf/hal_mn10300_am33_stb.h: Renamed defines
correctly. Added defined for DIAG and GDB ports.
 
* include/plf_intr.h: Fixed typo in Ctrl-C support.
 
1999-07-27 Nick Garnett <nickg@cygnus.co.uk>
 
* src/plf_misc.c: Changed test for call to patch_dbg_syscalls() to
check CYG_HAL_USE_ROM_MONITOR_GDB_STUBS.
 
* src/hal_diag.c: Added configuration to use GDB O packets via
serial0 when running under GDB stubs.
Modified baud rate selection for serial2. Left code to determine
serial line speed in place for future use.
 
* misc/stubrom.perm: Added this file to package configuration for
the stubrom.
 
* include/pkgconf/mlt_mn10300_am33_stb_rom.ldi:
* include/pkgconf/mlt_mn10300_am33_stb_ram.ldi:
Moved ROM to 0x40000000 and RAM to 0x50000000.
* src/plf_stub.c:
* include/plf_stub.h:
Did some renaming, added HAL_STUB_PLATFORM_INIT(). Switched over
to serial0 for GDB protocol.
 
* include/platform.inc:
Added diagnostic macros to output digits onto front panel LEDs.
 
1999-07-16 Nick Garnett <nickg@cygnus.co.uk>
 
* src/hal_diag.c:
Added code to diag via serial0. Miscellaneous other tidies.
 
* include/pkgconf/mlt_mn10300_am33_stb_ram.ldi:
Increased RAM size to 4M.
 
* include/pkgconf/hal_mn10300_am33_stb.h:
Set CYGNUM_HAL_RTC_PERIOD to correct value for this board.
 
1999-07-07 Nick Garnett <nickg@cygnus.co.uk>
 
* include/pkgconf/mlt_mn10300_am33_stb_ram.ldi:
Moved RAM memory segment to 0x40000000.
 
* src/hal_diag.c:
Added buffer based diagnostic option.
 
1999-06-30 Nick Garnett <nickg@cygnus.co.uk>
 
* include/hal_diag.h:
* include/platform.inc:
* include/plf_intr.h:
* include/plf_stub.h:
* include/pkgconf/hal_mn10300_am33_stb.h:
* include/pkgconf/mlt_mn10300_am33_stb_ram.ldi:
* include/pkgconf/mlt_mn10300_am33_stb_ram.mlt:
* include/pkgconf/mlt_mn10300_am33_stb_rom.ldi:
* include/pkgconf/mlt_mn10300_am33_stb_rom.mlt:
* src/PKGconf.mak:
* src/hal_diag.c:
* src/plf_misc.c:
* src/plf_stub.c:
Added these files to contain HAL code and definitions for STB
target board.
 
/v2_0/misc/redboot_RAM.ecm
0,0 → 1,61
cdl_savefile_version 1;
cdl_savefile_command cdl_savefile_version {};
cdl_savefile_command cdl_savefile_command {};
cdl_savefile_command cdl_configuration { description hardware template package };
cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
 
cdl_configuration eCos {
description "" ;
hardware stb ;
template redboot ;
package -hardware CYGPKG_HAL_MN10300 v2_0 ;
package -hardware CYGPKG_HAL_MN10300_AM33_STB v2_0 ;
package -hardware CYGPKG_HAL_MN10300_AM33 v2_0 ;
package -hardware CYGPKG_IO_SERIAL_MN10300 v2_0 ;
package -hardware CYGPKG_DEVICES_WATCHDOG_MN10300_MN10300 v2_0 ;
package -template CYGPKG_HAL v2_0 ;
package -template CYGPKG_INFRA v2_0 ;
package -template CYGPKG_REDBOOT v2_0 ;
 
# package CYGPKG_IO_ETH_DRIVERS v2_0 ;
# package CYGPKG_DEVS_ETH_CF v2_0 ;
package CYGPKG_IO_FLASH v2_0 ;
package CYGPKG_DEVS_FLASH_AMD_AM29XXXXX v2_0 ;
};
 
cdl_option CYGBLD_BUILD_GDB_STUBS {
user_value 0
};
 
cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
user_value 0
};
 
cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
inferred_value 0
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
inferred_value 1
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT {
inferred_value 1
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT {
inferred_value 0
};
 
cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
inferred_value 0 0
};
 
cdl_component CYGBLD_BUILD_REDBOOT {
user_value 1
};
 
 
/v2_0/misc/redboot_SRAM1.ecm
0,0 → 1,74
cdl_savefile_version 1;
cdl_savefile_command cdl_savefile_version {};
cdl_savefile_command cdl_savefile_command {};
cdl_savefile_command cdl_configuration { description hardware template package };
cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
 
cdl_configuration eCos {
description "" ;
hardware stb ;
template redboot ;
package -hardware CYGPKG_HAL_MN10300 v2_0 ;
package -hardware CYGPKG_HAL_MN10300_AM33_STB v2_0 ;
package -hardware CYGPKG_HAL_MN10300_AM33 v2_0 ;
package -hardware CYGPKG_IO_SERIAL_MN10300 v2_0 ;
package -hardware CYGPKG_DEVICES_WATCHDOG_MN10300_MN10300 v2_0 ;
package -template CYGPKG_HAL v2_0 ;
package -template CYGPKG_INFRA v2_0 ;
package -template CYGPKG_REDBOOT v2_0 ;
 
# package CYGPKG_IO_ETH_DRIVERS v2_0 ;
# package CYGPKG_DEVS_ETH_CF v2_0 ;
package CYGPKG_IO_FLASH v2_0 ;
package -hardware CYGPKG_DEVS_FLASH_MN10300_STB v2_0 ;
package CYGPKG_DEVS_FLASH_AMD_AM29XXXXX v2_0 ;
};
 
cdl_option CYGBLD_BUILD_GDB_STUBS {
user_value 0
};
 
cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
user_value 0
};
 
cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
inferred_value 0
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
inferred_value 1
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT {
inferred_value 1
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT {
inferred_value 0
};
 
cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
inferred_value 0 0
};
 
cdl_option CYGSEM_HAL_ROM_MONITOR {
inferred_value 1
};
 
cdl_component CYG_HAL_STARTUP {
user_value ROM
};
 
cdl_option CYGBLD_ROM_SLOT {
user_value SRAM1
};
 
cdl_component CYGBLD_BUILD_REDBOOT {
user_value 1
};
 
 
/v2_0/misc/stubrom.perm
0,0 → 1,26
#
# A configuration for building a GDB stub ROM for the STB board.
#
# To build the ROMs:
# 1. Create a build directory and cd into it.
# 2. Run: permtest.tcl --srcdir=<sourcedir> <sourcedir>/hal/mn10300/stb/current/misc/stubrom.perm
# Where <sourcedir> is the path to your source repository.
# 3. Run: make
# 4. Run: make -C hal/common/current/src/stubrom
#
# The file hal/common/current/src/stubrom/stubrom will be an ELF excutable of the ROM.
# Use objcopy to convert this to the appropriate format for your PROM burner.
# Enjoy!
#
# If you do not have permtest.tcl, then run the pkgconf command by hand and
# then edit pkgconf/hal.h to enable/disable the options as shown.
#
 
pkgconf --target=mn10300_am33 --platform=stb --startup=rom --disable-kernel --disable-uitron --disable-libc --disable-libm --disable-io --disable-io_serial --disable-wallclock --disable-watchdog
 
header hal.h {
enable CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
enable CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
disable CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT
enable CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
}
/v2_0/misc/redboot_ROM.ecm
0,0 → 1,70
cdl_savefile_version 1;
cdl_savefile_command cdl_savefile_version {};
cdl_savefile_command cdl_savefile_command {};
cdl_savefile_command cdl_configuration { description hardware template package };
cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
 
cdl_configuration eCos {
description "" ;
hardware stb ;
template redboot ;
package -hardware CYGPKG_HAL_MN10300 v2_0 ;
package -hardware CYGPKG_HAL_MN10300_AM33_STB v2_0 ;
package -hardware CYGPKG_HAL_MN10300_AM33 v2_0 ;
package -hardware CYGPKG_IO_SERIAL_MN10300 v2_0 ;
package -hardware CYGPKG_DEVICES_WATCHDOG_MN10300_MN10300 v2_0 ;
package -template CYGPKG_HAL v2_0 ;
package -template CYGPKG_INFRA v2_0 ;
package -template CYGPKG_REDBOOT v2_0 ;
 
# package CYGPKG_IO_ETH_DRIVERS v2_0 ;
# package CYGPKG_DEVS_ETH_CF v2_0 ;
package CYGPKG_IO_FLASH v2_0 ;
package -hardware CYGPKG_DEVS_FLASH_MN10300_STB v2_0 ;
package CYGPKG_DEVS_FLASH_AMD_AM29XXXXX v2_0 ;
};
 
cdl_option CYGBLD_BUILD_GDB_STUBS {
user_value 0
};
 
cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
user_value 0
};
 
cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
inferred_value 0
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
inferred_value 1
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT {
inferred_value 1
};
 
cdl_option CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT {
inferred_value 0
};
 
cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
inferred_value 0 0
};
 
cdl_option CYGSEM_HAL_ROM_MONITOR {
inferred_value 1
};
 
cdl_component CYG_HAL_STARTUP {
user_value ROM
};
 
cdl_component CYGBLD_BUILD_REDBOOT {
user_value 1
};
 
 

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