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    /openrisc/trunk/rtos/ecos-2.0/packages/hal/v85x
    from Rev 27 to Rev 174
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Rev 27 → Rev 174

/v850/v2_0/cdl/hal_v85x_v850.cdl
0,0 → 1,121
# ====================================================================
#
# hal_v85x_v850.cdl
#
# NEC/V850 variant architectural HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): gthomas
# Contributors: jlarmour
# Date: 2000-03-09
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_V85X_V850 {
display "V850 variant"
parent CYGPKG_HAL_V85X
hardware
include_dir cyg/hal
define_header hal_v85x_v850.h
description "
The V850 variant HAL package provides generic support
for this processor architecture. It is also necessary to
select a specific target platform HAL package."
 
define_proc {
puts $::cdl_header "#include <pkgconf/hal_v85x.h>"
}
 
compile v850_stub.c v850_misc.c context.S hal_diag.c
 
implements CYGINT_HAL_TESTS_NO_CACHES
 
cdl_interface CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0 {
display "Defined if platform uses standard on-chip serial0"
}
cdl_option CYGBLD_HAL_V850_DIAG_USE_ONCHIP_SERIAL0 {
display "Build diag driver for on-chip V850 serial 0"
active_if { CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0 != 0 }
compile hal_diag.c
}
 
cdl_interface CYGINT_HAL_V850_VARIANT_SA1 {
display "Defined if CPU is a V850/SA1"
}
 
cdl_interface CYGINT_HAL_V850_VARIANT_SB1 {
display "Defined if CPU is a V850/SB1"
}
 
requires 1 == CYGINT_HAL_V850_VARIANT_SA1 ^ 1 == CYGINT_HAL_V850_VARIANT_SB1
# by virtue of the above requires:
implements CYGINT_HAL_V85X_VARIANT
 
cdl_option CYGDBG_HAL_V850_ICE {
display "Support debugging via ICE"
default_value { (0 != CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT) && \
("RAM" != CYG_HAL_STARTUP) }
requires CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT
implements CYGINT_HAL_V85X_ICE_DEBUG
compile -library=libextras.a v850_ice.cxx
description \
"This option enables additional support for debugging via
ICE, chiefly in the form of an interface to gdbserv which
allows it to provide eCos thread data in GDB."
}
 
make {
<PREFIX>/lib/target.ld: <PACKAGE>/src/v85x_v850.ld
$(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $<
@echo $@ ": \\" > $(notdir $@).deps
@tail +2 target.tmp >> $(notdir $@).deps
@echo >> $(notdir $@).deps
@rm target.tmp
}
 
cdl_option CYGBLD_LINKER_SCRIPT {
display "Linker script"
flavor data
no_define
calculated { "src/v85x_v850.ld" }
}
 
}
/v850/v2_0/tests/nmitest.c
0,0 → 1,97
//==========================================================================
//
// nmitest.c
//
// V850 NMI test program
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jlarmour
// Contributors: jlarmour
// Date: 2001-02-01
// Purpose: Test NMI function
// Description: This test allows the NMI functionality to be tested.
// It is not built by default.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <cyg/hal/hal_intr.h>
#include <cyg/infra/diag.h>
 
#include <cyg/kernel/kapi.h>
 
int nmicount;
char stack[4096];
static cyg_handle_t thr0h;
static cyg_thread thr0;
 
void
nmi_handler(cyg_addrword_t data, cyg_code_t exception_number,
cyg_addrword_t info)
{
nmicount++;
}
 
static void
entry0( cyg_addrword_t data )
{
int oldnmicount=0;
 
cyg_exception_set_handler( CYGNUM_HAL_VECTOR_NMI,
&nmi_handler,
0,
NULL,
NULL );
for (;;) {
if ( oldnmicount != nmicount ) {
diag_printf("Caught NMI\n");
oldnmicount = nmicount;
}
}
}
 
void
cyg_user_start(void)
{
cyg_thread_create(4, entry0, (cyg_addrword_t)0, "thread 0",
(void *)&stack[0], sizeof(stack), &thr0h, &thr0 );
cyg_thread_resume(thr0h);
}
 
// EOF nmitest.c
/v850/v2_0/include/v850_common.h
0,0 → 1,562
#ifndef CYGONCE_V850_COMMON_H
#define CYGONCE_V850_COMMON_H
 
/*=============================================================================
//
// v850_common.h
//
// NEC/V850 common definitions
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): gthomas, jlarmour
// Contributors: gthomas, jlarmour
// Date: 2000-03-10
// Purpose: NEC/V850 CPU family hardware description
// Description:
// Usage: #include <cyg/hal/v850_common.h>
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
// Note: these defintions match the documentation, thus no attempt is made
// to sanitise (mangle) the names. Also, care should be taken to keep this
// clean for use in assembly code (no "C" constructs).
 
#include <pkgconf/hal.h>
 
// These definitions are for the NEC V850/SA1 (70301x)
 
#if CYGINT_HAL_V850_VARIANT_SA1
 
#define V850_REGS 0xFFFFF000
 
#define V850_REG_P0 0xFFFFF000
#define V850_REG_P1 0xFFFFF002
#define V850_REG_P2 0xFFFFF004
#define V850_REG_P3 0xFFFFF006
#define V850_REG_P4 0xFFFFF008
#define V850_REG_P5 0xFFFFF00A
#define V850_REG_P6 0xFFFFF00C
#define V850_REG_P7 0xFFFFF00E
#define V850_REG_P8 0xFFFFF010
#define V850_REG_P9 0xFFFFF012
#define V850_REG_P10 0xFFFFF014
#define V850_REG_P11 0xFFFFF016
#define V850_REG_P12 0xFFFFF018
 
#define V850_REG_PM0 0xFFFFF020
#define V850_REG_PM1 0xFFFFF022
#define V850_REG_PM2 0xFFFFF024
#define V850_REG_PM3 0xFFFFF026
#define V850_REG_PM4 0xFFFFF028
#define V850_REG_PM5 0xFFFFF02A
#define V850_REG_PM6 0xFFFFF02C
#define V850_REG_PM9 0xFFFFF032
#define V850_REG_PM10 0xFFFFF034
#define V850_REG_PM11 0xFFFFF036
#define V850_REG_PM12 0xFFFFF038
 
#define V850_REG_MM 0xFFFFF04C
 
#define V850_REG_PMC12 0xFFFFF058
 
#define V850_REG_DWC 0xFFFFF060
#define V850_REG_BCC 0xFFFFF062
#define V850_REG_SYC 0xFFFFF064
#define V850_REG_MAM 0xFFFFF068
 
#define V850_REG_PSC 0xFFFFF070
#define V850_REG_PCC 0xFFFFF074
#define V850_REG_SYS 0xFFFFF078
 
#define V850_REG_PU0 0xFFFFF080
#define V850_REG_PU1 0xFFFFF082
#define V850_REG_PU2 0xFFFFF084
#define V850_REG_PU3 0xFFFFF086
#define V850_REG_PU10 0xFFFFF094
#define V850_REG_PU11 0xFFFFF096
 
#define V850_REG_PF1 0xFFFFF0A2
#define V850_REG_PF2 0xFFFFF0A4
#define V850_REG_PF10 0xFFFFF0B4
 
#define V850_REG_EGP0 0xFFFFF0C0
#define V850_REG_EGN0 0xFFFFF0C2
 
#define V850_REG_WDTIC 0xFFFFF100
#define V850_REG_PIC0 0xFFFFF102
#define V850_REG_PIC1 0xFFFFF104
#define V850_REG_PIC2 0xFFFFF106
#define V850_REG_PIC3 0xFFFFF108
#define V850_REG_PIC4 0xFFFFF10A
#define V850_REG_PIC5 0xFFFFF10C
#define V850_REG_PIC6 0xFFFFF10E
#define V850_REG_WTIIC 0xFFFFF110
#define V850_REG_WTNIIC 0xFFFFF110
#define V850_REG_TMIC00 0xFFFFF112
#define V850_REG_TMIC01 0xFFFFF114
#define V850_REG_TMIC10 0xFFFFF116
#define V850_REG_TMIC11 0xFFFFF118
#define V850_REG_TMIC2 0xFFFFF11A
#define V850_REG_TMIC3 0xFFFFF11C
#define V850_REG_TMIC4 0xFFFFF11E
#define V850_REG_TMIC5 0xFFFFF120
#define V850_REG_CSIC0 0xFFFFF122
#define V850_REG_SERIC0 0xFFFFF124
#define V850_REG_CSIC1 0xFFFFF126
#define V850_REG_SRIC0 0xFFFFF126
#define V850_REG_STIC0 0xFFFFF128
#define V850_REG_CSIC2 0xFFFFF12A
#define V850_REG_SRIC2 0xFFFFF12A
#define V850_REG_SERIC1 0xFFFFF12C
#define V850_REG_SRIC1 0xFFFFF12E
#define V850_REG_STIC1 0xFFFFF130
#define V850_REG_ADIC 0xFFFFF132
#define V850_REG_DMAIC0 0xFFFFF134
#define V850_REG_DMAIC1 0xFFFFF136
#define V850_REG_DMAIC2 0xFFFFF138
#define V850_REG_WTIC 0xFFFFF13A
#define V850_REG_WTNIC 0xFFFFF13A
 
#define V850_REG_ISPR 0xFFFFF166
#define V850_REG_PRCMD 0xFFFFF170
 
#define V850_REG_DIOA0 0xFFFFF180
#define V850_REG_DRA0 0xFFFFF182
#define V850_REG_DBC0 0xFFFFF184
#define V850_REG_DCHC0 0xFFFFF186
 
#define V850_REG_DIOA1 0xFFFFF190
#define V850_REG_DRA1 0xFFFFF192
#define V850_REG_DBC1 0xFFFFF194
#define V850_REG_DCHC1 0xFFFFF196
 
#define V850_REG_DIOA2 0xFFFFF1A0
#define V850_REG_DRA2 0xFFFFF1A2
#define V850_REG_DBC2 0xFFFFF1A4
#define V850_REG_DCHC2 0xFFFFF1A6
 
#define V850_REG_TM0 0xFFFFF200
#define V850_REG_CR00 0xFFFFF202
#define V850_REG_CR01 0xFFFFF204
#define V850_REG_PRM0 0xFFFFF206
#define V850_REG_PRM00 0xFFFFF206
#define V850_REG_TMC0 0xFFFFF208
#define V850_REG_CRC0 0xFFFFF20A
#define V850_REG_TOC0 0xFFFFF20C
#define V850_REG_PRM01 0xFFFFF20E
 
#define V850_REG_TM1 0xFFFFF210
#define V850_REG_CR10 0xFFFFF212
#define V850_REG_CR11 0xFFFFF214
#define V850_REG_PRM1 0xFFFFF216
#define V850_REG_PRM10 0xFFFFF216
#define V850_REG_TMC1 0xFFFFF218
#define V850_REG_CRC1 0xFFFFF21A
#define V850_REG_TOC1 0xFFFFF21C
#define V850_REG_PRM11 0xFFFFF21E
 
#define V850_REG_TM2 0xFFFFF240
#define V850_REG_CR20 0xFFFFF242
#define V850_REG_TCL2 0xFFFFF244
#define V850_REG_TMC2 0xFFFFF246
#define V850_REG_TM23 0xFFFFF24A
#define V850_REG_CR23 0xFFFFF24C
#define V850_REG_TCL21 0xFFFFF24E
 
#define V850_REG_TM3 0xFFFFF250
#define V850_REG_CR30 0xFFFFF252
#define V850_REG_TCL3 0xFFFFF254
#define V850_REG_TMC3 0xFFFFF256
#define V850_REG_TCL31 0xFFFFF25E
 
#define V850_REG_TM4 0xFFFFF260
#define V850_REG_CR40 0xFFFFF262
#define V850_REG_TCL4 0xFFFFF264
#define V850_REG_TMC4 0xFFFFF266
#define V850_REG_TM45 0xFFFFF26A
#define V850_REG_CR45 0xFFFFF26C
#define V850_REG_TCL41 0xFFFFF26E
 
#define V850_REG_TM5 0xFFFFF270
#define V850_REG_CR50 0xFFFFF272
#define V850_REG_TCL5 0xFFFFF274
#define V850_REG_TMC5 0xFFFFF276
#define V850_REG_TCL51 0xFFFFF27E
 
#define V850_REG_SIO0 0xFFFFF2A0
#define V850_REG_CSIM0 0xFFFFF2A2
#define V850_REG_CSIS0 0xFFFFF2A4
 
#define V850_REG_SIO1 0xFFFFF2B0
#define V850_REG_CSIM1 0xFFFFF2B2
#define V850_REG_CSIS1 0xFFFFF2B4
 
#define V850_REG_SIO2 0xFFFFF2C0
#define V850_REG_CSIM2 0xFFFFF2C2
#define V850_REG_CSIS2 0xFFFFF2C4
 
#define V850_REG_ASIM0 0xFFFFF300
#define V850_REG_ASIS0 0xFFFFF302
#define V850_REG_BRGC0 0xFFFFF304
#define V850_REG_TXS0 0xFFFFF306
#define V850_REG_RXB0 0xFFFFF308
#define V850_REG_BRGMC0 0xFFFFF30E
#define V850_REG_BRGMC00 0xFFFFF30E
 
#define V850_REG_ASIM1 0xFFFFF310
#define V850_REG_ASIS1 0xFFFFF312
#define V850_REG_BRGC1 0xFFFFF314
#define V850_REG_TXS1 0xFFFFF316
#define V850_REG_RXB1 0xFFFFF318
#define V850_REG_BRGMC1 0xFFFFF31E
#define V850_REG_BRGMC10 0xFFFFF31E
#define V850_REG_BRGMC01 0xFFFFF320
 
#define V850_REG_IICC0 0xFFFFF340
#define V850_REG_IICS0 0xFFFFF342
#define V850_REG_IICCL0 0xFFFFF344
#define V850_REG_SVA0 0xFFFFF346
#define V850_REG_IIC0 0xFFFFF348
#define V850_REG_IICX0 0xFFFFF34A
 
#define V850_REG_WTM 0xFFFFF360
#define V850_REG_OSTS 0xFFFFF380
#define V850_REG_WDCS 0xFFFFF382
#define V850_REG_WDTM 0xFFFFF384
 
#define V850_REG_RTBL 0xFFFFF3A0
#define V850_REG_RTBH 0xFFFFF3A2
#define V850_REG_RTPM 0xFFFFF3A4
#define V850_REG_RTPC 0xFFFFF3A6
 
#define V850_REG_ADM 0xFFFFF3C0
#define V850_REG_ADS 0xFFFFF3C2
#define V850_REG_ADCR 0xFFFFF3C4
#define V850_REG_ADCRH 0xFFFFF3C6
 
/*---------------------------------------------------------------------------*/
 
// These definitions are for the NEC V850/SB1 (70303x)
 
#elif CYGINT_HAL_V850_VARIANT_SB1
 
#define V850_REGS 0xFFFFF000
 
#define V850_REG_P0 0xFFFFF000
#define V850_REG_P1 0xFFFFF002
#define V850_REG_P2 0xFFFFF004
#define V850_REG_P3 0xFFFFF006
#define V850_REG_P4 0xFFFFF008
#define V850_REG_P5 0xFFFFF00A
#define V850_REG_P6 0xFFFFF00C
#define V850_REG_P7 0xFFFFF00E
#define V850_REG_P8 0xFFFFF010
#define V850_REG_P9 0xFFFFF012
#define V850_REG_P10 0xFFFFF014
#define V850_REG_P11 0xFFFFF016
 
#define V850_REG_PM0 0xFFFFF020
#define V850_REG_PM1 0xFFFFF022
#define V850_REG_PM2 0xFFFFF024
#define V850_REG_PM3 0xFFFFF026
#define V850_REG_PM4 0xFFFFF028
#define V850_REG_PM5 0xFFFFF02A
#define V850_REG_PM6 0xFFFFF02C
#define V850_REG_PM9 0xFFFFF032
#define V850_REG_PM10 0xFFFFF034
#define V850_REG_PM11 0xFFFFF036
 
#define V850_REG_PAC 0xFFFFF040
#define V850_REG_MM 0xFFFFF04C
 
#define V850_REG_DWC 0xFFFFF060
#define V850_REG_BCC 0xFFFFF062
#define V850_REG_SYC 0xFFFFF064
#define V850_REG_MAM 0xFFFFF068
 
#define V850_REG_PSC 0xFFFFF070
#define V850_REG_PCC 0xFFFFF074
#define V850_REG_SYS 0xFFFFF078
 
#define V850_REG_PU0 0xFFFFF080
#define V850_REG_PU1 0xFFFFF082
#define V850_REG_PU2 0xFFFFF084
#define V850_REG_PU3 0xFFFFF086
#define V850_REG_PU10 0xFFFFF094
#define V850_REG_PU11 0xFFFFF096
 
#define V850_REG_PF1 0xFFFFF0A2
#define V850_REG_PF2 0xFFFFF0A4
#define V850_REG_PF3 0xFFFFF0A6
#define V850_REG_PF10 0xFFFFF0B4
 
#define V850_REG_EGP0 0xFFFFF0C0
#define V850_REG_EGN0 0xFFFFF0C2
 
#define V850_REG_WDTIC 0xFFFFF100
#define V850_REG_PIC0 0xFFFFF102
#define V850_REG_PIC1 0xFFFFF104
#define V850_REG_PIC2 0xFFFFF106
#define V850_REG_PIC3 0xFFFFF108
#define V850_REG_PIC4 0xFFFFF10A
#define V850_REG_PIC5 0xFFFFF10C
#define V850_REG_PIC6 0xFFFFF10E
#define V850_REG_WTNIIC 0xFFFFF118
#define V850_REG_TMIC00 0xFFFFF11A
#define V850_REG_TMIC01 0xFFFFF11C
#define V850_REG_TMIC10 0xFFFFF11E
#define V850_REG_TMIC11 0xFFFFF120
#define V850_REG_TMIC2 0xFFFFF122
#define V850_REG_TMIC3 0xFFFFF124
#define V850_REG_TMIC4 0xFFFFF126
#define V850_REG_TMIC5 0xFFFFF128
#define V850_REG_TMIC6 0xFFFFF12A
#define V850_REG_TMIC7 0xFFFFF12C
#define V850_REG_CSIC0 0xFFFFF12E
#define V850_REG_SERIC0 0xFFFFF130
#define V850_REG_CSIC1 0xFFFFF132
#define V850_REG_SRIC0 0xFFFFF132
#define V850_REG_STIC0 0xFFFFF134
#define V850_REG_CSIC2 0xFFFFF136
#define V850_REG_SRIC2 0xFFFFF136
#define V850_REG_IICIC1 0xFFFFF138
#define V850_REG_SERIC1 0xFFFFF13A
#define V850_REG_CSIC3 0xFFFFF13C
#define V850_REG_SRIC3 0xFFFFF13C
#define V850_REG_STIC1 0xFFFFF13E
#define V850_REG_CSIC4 0xFFFFF140
#define V850_REG_SRIC4 0xFFFFF140
#define V850_REG_IEBIC1 0xFFFFF142
#define V850_REG_IEBIC2 0xFFFFF144
#define V850_REG_ADIC 0xFFFFF146
#define V850_REG_DMAIC0 0xFFFFF148
#define V850_REG_DMAIC1 0xFFFFF14A
#define V850_REG_DMAIC2 0xFFFFF14C
#define V850_REG_DMAIC3 0xFFFFF14E
#define V850_REG_DMAIC4 0xFFFFF150
#define V850_REG_DMAIC5 0xFFFFF152
#define V850_REG_WTNIC 0xFFFFF154
#define V850_REG_KRIC 0xFFFFF156
 
#define V850_REG_ISPR 0xFFFFF166
#define V850_REG_PRCMD 0xFFFFF170
 
#define V850_REG_DIOA0 0xFFFFF180
#define V850_REG_DRA0 0xFFFFF182
#define V850_REG_DBC0 0xFFFFF184
#define V850_REG_DCHC0 0xFFFFF186
 
#define V850_REG_DIOA1 0xFFFFF190
#define V850_REG_DRA1 0xFFFFF192
#define V850_REG_DBC1 0xFFFFF194
#define V850_REG_DCHC1 0xFFFFF196
 
#define V850_REG_DIOA2 0xFFFFF1A0
#define V850_REG_DRA2 0xFFFFF1A2
#define V850_REG_DBC2 0xFFFFF1A4
#define V850_REG_DCHC2 0xFFFFF1A6
 
#define V850_REG_DIOA3 0xFFFFF1B0
#define V850_REG_DRA3 0xFFFFF1B2
#define V850_REG_DBC3 0xFFFFF1B4
#define V850_REG_DCHC3 0xFFFFF1B6
 
#define V850_REG_DIOA4 0xFFFFF1C0
#define V850_REG_DRA4 0xFFFFF1C2
#define V850_REG_DBC4 0xFFFFF1C4
#define V850_REG_DCHC4 0xFFFFF1C6
 
#define V850_REG_DIOA5 0xFFFFF1D0
#define V850_REG_DRA5 0xFFFFF1D2
#define V850_REG_DBC5 0xFFFFF1D4
#define V850_REG_DCHC5 0xFFFFF1D6
 
#define V850_REG_TM0 0xFFFFF200
#define V850_REG_CR00 0xFFFFF202
#define V850_REG_CR01 0xFFFFF204
#define V850_REG_PRM00 0xFFFFF206
#define V850_REG_TMC0 0xFFFFF208
#define V850_REG_CRC0 0xFFFFF20A
#define V850_REG_TOC0 0xFFFFF20C
#define V850_REG_PRM01 0xFFFFF20E
 
#define V850_REG_TM1 0xFFFFF210
#define V850_REG_CR10 0xFFFFF212
#define V850_REG_CR11 0xFFFFF214
#define V850_REG_PRM10 0xFFFFF216
#define V850_REG_TMC1 0xFFFFF218
#define V850_REG_CRC1 0xFFFFF21A
#define V850_REG_TOC1 0xFFFFF21C
#define V850_REG_PRM11 0xFFFFF21E
 
#define V850_REG_TM2 0xFFFFF240
#define V850_REG_CR20 0xFFFFF242
#define V850_REG_TCL20 0xFFFFF244
#define V850_REG_TMC2 0xFFFFF246
#define V850_REG_TM23 0xFFFFF24A
#define V850_REG_CR23 0xFFFFF24C
#define V850_REG_TCL21 0xFFFFF24E
 
#define V850_REG_TM3 0xFFFFF250
#define V850_REG_CR30 0xFFFFF252
#define V850_REG_TCL30 0xFFFFF254
#define V850_REG_TMC3 0xFFFFF256
#define V850_REG_TCL31 0xFFFFF25E
 
#define V850_REG_TM4 0xFFFFF260
#define V850_REG_CR40 0xFFFFF262
#define V850_REG_TCL40 0xFFFFF264
#define V850_REG_TMC4 0xFFFFF266
#define V850_REG_TM45 0xFFFFF26A
#define V850_REG_CR45 0xFFFFF26C
#define V850_REG_TCL41 0xFFFFF26E
 
#define V850_REG_TM5 0xFFFFF270
#define V850_REG_CR50 0xFFFFF272
#define V850_REG_TCL50 0xFFFFF274
#define V850_REG_TMC5 0xFFFFF276
#define V850_REG_TCL51 0xFFFFF27E
 
#define V850_REG_TM6 0xFFFFF280
#define V850_REG_CR60 0xFFFFF282
#define V850_REG_TCL60 0xFFFFF284
#define V850_REG_TMC6 0xFFFFF286
#define V850_REG_TM67 0xFFFFF28A
#define V850_REG_CR67 0xFFFFF28C
#define V850_REG_TCL61 0xFFFFF28E
 
#define V850_REG_TM7 0xFFFFF290
#define V850_REG_CR70 0xFFFFF292
#define V850_REG_TCL70 0xFFFFF294
#define V850_REG_TMC7 0xFFFFF296
#define V850_REG_TCL71 0xFFFFF29E
 
#define V850_REG_SIO0 0xFFFFF2A0
#define V850_REG_CSIM0 0xFFFFF2A2
#define V850_REG_CSIS0 0xFFFFF2A4
 
#define V850_REG_SIO1 0xFFFFF2B0
#define V850_REG_CSIM1 0xFFFFF2B2
#define V850_REG_CSIS1 0xFFFFF2B4
 
#define V850_REG_SIO2 0xFFFFF2C0
#define V850_REG_CSIM2 0xFFFFF2C2
#define V850_REG_CSIS2 0xFFFFF2C4
 
#define V850_REG_SIO3 0xFFFFF2D0
#define V850_REG_CSIM3 0xFFFFF2D2
#define V850_REG_CSIS3 0xFFFFF2D4
 
#define V850_REG_SIO4 0xFFFFF2E0
#define V850_REG_CSIM4 0xFFFFF2E2
#define V850_REG_CSIB4 0xFFFFF2E4
#define V850_REG_BRGCN4 0xFFFFF2E6
#define V850_REG_BRGCK4 0xFFFFF2E8
 
#define V850_REG_ASIM0 0xFFFFF300
#define V850_REG_ASIS0 0xFFFFF302
#define V850_REG_BRGC0 0xFFFFF304
#define V850_REG_TXS0 0xFFFFF306
#define V850_REG_RXB0 0xFFFFF308
#define V850_REG_BRGMC00 0xFFFFF30E
 
#define V850_REG_ASIM1 0xFFFFF310
#define V850_REG_ASIS1 0xFFFFF312
#define V850_REG_BRGC1 0xFFFFF314
#define V850_REG_TXS1 0xFFFFF316
#define V850_REG_RXB1 0xFFFFF318
#define V850_REG_BRGMC10 0xFFFFF31E
#define V850_REG_BRGMC01 0xFFFFF320
#define V850_REG_BRGMC11 0xFFFFF322
 
#define V850_REG_IICC0 0xFFFFF340
#define V850_REG_IICS0 0xFFFFF342
#define V850_REG_IICCL0 0xFFFFF344
#define V850_REG_SVA0 0xFFFFF346
#define V850_REG_IIC0 0xFFFFF348
#define V850_REG_IICX0 0xFFFFF34A
#define V850_REG_IICCE0 0xFFFFF34C
 
#define V850_REG_IICC1 0xFFFFF350
#define V850_REG_IICS1 0xFFFFF352
#define V850_REG_IICCL1 0xFFFFF354
#define V850_REG_SVA1 0xFFFFF356
#define V850_REG_IIC1 0xFFFFF358
#define V850_REG_IICX1 0xFFFFF35A
#define V850_REG_IICCE1 0xFFFFF35C
 
#define V850_REG_WTNM 0xFFFFF360
#define V850_REG_WTNCS 0xFFFFF364
 
#define V850_REG_CORCN 0xFFFFF36C
#define V850_REG_CORRQ 0xFFFFF36E
#define V850_REG_CORAD0 0xFFFFF370
#define V850_REG_CORAD1 0xFFFFF374
#define V850_REG_CORAD2 0xFFFFF378
#define V850_REG_CORAD3 0xFFFFF37C
 
#define V850_REG_OSTS 0xFFFFF380
#define V850_REG_WDCS 0xFFFFF382
#define V850_REG_WDTM 0xFFFFF384
#define V850_REG_DMAS 0xFFFFF38E
 
#define V850_REG_RTBL 0xFFFFF3A0
#define V850_REG_RTBH 0xFFFFF3A2
#define V850_REG_RTPM 0xFFFFF3A4
#define V850_REG_RTPC 0xFFFFF3A6
 
#define V850_REG_ADM1 0xFFFFF3C0
#define V850_REG_ADS 0xFFFFF3C2
#define V850_REG_ADCR 0xFFFFF3C4
#define V850_REG_ADCRH 0xFFFFF3C6
#define V850_REG_ADM2 0xFFFFF3C8
 
#define V850_REG_KRM 0xFFFFF3D0
 
#define V850_REG_NCC 0xFFFFF3D4
 
#else // elif CYGINT_HAL_V850_VARIANT_SB1
# error No v850 variant defined
#endif
 
 
/*---------------------------------------------------------------------------*/
/* end of v850_common.h */
#endif /* CYGONCE_V850_COMMON_H */
/v850/v2_0/include/var_cache.h
0,0 → 1,80
#ifndef CYGONCE_VAR_CACHE_H
#define CYGONCE_VAR_CACHE_H
 
//=============================================================================
//
// var_cache.h
//
// HAL cache control API
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg,jlarmour
// Date: 2001-03-21
// Purpose: Cache control API
// Description: The macros defined here provide the HAL APIs for handling
// cache control operations.
// Usage:
// #include <cyg/hal/var_cache.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <cyg/hal/plf_cache.h>
 
// No caches defined in this variant by default
#ifndef HAL_ICACHE_ENABLE
# define HAL_ICACHE_ENABLE()
# define HAL_ICACHE_DISABLE()
# define HAL_ICACHE_SYNC()
# define HAL_ICACHE_INVALIDATE_ALL()
#endif
 
#ifndef HAL_DCACHE_ENABLE
# define HAL_DCACHE_ENABLE()
# define HAL_DCACHE_DISABLE()
# define HAL_DCACHE_SYNC()
# define HAL_DCACHE_INVALIDATE_ALL()
#endif
 
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_VAR_CACHE_H
// End of var_cache.h
/v850/v2_0/include/var_intr.h
0,0 → 1,272
#ifndef CYGONCE_HAL_VAR_INTR_H
#define CYGONCE_HAL_VAR_INTR_H
 
//==========================================================================
//
// var_intr.h
//
// NEC V850 Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jskov, gthomas, jlarmour
// Date: 2001-03-21
// Purpose: NEC V850 Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for variants of the NEC V85x
// architecture.
//
// Usage:
// #include <cyg/hal/var_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
#include <cyg/hal/plf_intr.h>
 
//--------------------------------------------------------------------------
// NEC V850/SA1 (70301x) and V850/SB1 (70303x) vectors.
 
// These are the exception codes presented in the Cause register and
// correspond to VSRs. These values are the ones to use for HAL_VSR_GET/SET
 
#define CYGNUM_HAL_VECTOR_RESET 0x00
#define CYGNUM_HAL_VECTOR_NMI 0x01
#define CYGNUM_HAL_VECTOR_INTWDT 0x02 // watchdog timer NMI
#define CYGNUM_HAL_VECTOR_TRAP00 0x04
#define CYGNUM_HAL_VECTOR_TRAP10 0x05
#define CYGNUM_HAL_VECTOR_ILGOP 0x06 // illegal opcode
#define CYGNUM_HAL_VECTOR_INTWDTM 0x08 // watchdog timer maskable
#define CYGNUM_HAL_VECTOR_INTP0 0x09
#define CYGNUM_HAL_VECTOR_INTP1 0x0A
#define CYGNUM_HAL_VECTOR_INTP2 0x0B
#define CYGNUM_HAL_VECTOR_INTP3 0x0C
#define CYGNUM_HAL_VECTOR_INTP4 0x0D
#define CYGNUM_HAL_VECTOR_INTP5 0x0E
#define CYGNUM_HAL_VECTOR_INTP6 0x0F
 
#if CYGINT_HAL_V850_VARIANT_SA1
#define CYGNUM_HAL_VECTOR_INTWTNI 0x10
#define CYGNUM_HAL_VECTOR_INTTM00 0x11
#define CYGNUM_HAL_VECTOR_INTTM01 0x12
#define CYGNUM_HAL_VECTOR_INTTM10 0x13
#define CYGNUM_HAL_VECTOR_INTTM11 0x14
#define CYGNUM_HAL_VECTOR_INTTM2 0x15
#define CYGNUM_HAL_VECTOR_INTTM3 0x16
#define CYGNUM_HAL_VECTOR_INTTM4 0x17
#define CYGNUM_HAL_VECTOR_INTTM5 0x18
#define CYGNUM_HAL_VECTOR_INTIIC0 0x19
#define CYGNUM_HAL_VECTOR_INTCSI0 0x19
#define CYGNUM_HAL_VECTOR_INTSER0 0x1A
#define CYGNUM_HAL_VECTOR_INTSR0 0x1B
#define CYGNUM_HAL_VECTOR_INTCSI1 0x1B
#define CYGNUM_HAL_VECTOR_INTST0 0x1C
#define CYGNUM_HAL_VECTOR_INTCSI2 0x1D
#define CYGNUM_HAL_VECTOR_INTSER1 0x1E
#define CYGNUM_HAL_VECTOR_INTSR1 0x1F
#define CYGNUM_HAL_VECTOR_INTST1 0x20
#define CYGNUM_HAL_VECTOR_INTAD 0x21
#define CYGNUM_HAL_VECTOR_INTDMA0 0x22
#define CYGNUM_HAL_VECTOR_INTDMA1 0x23
#define CYGNUM_HAL_VECTOR_INTDMA2 0x24
#define CYGNUM_HAL_VECTOR_INTWTN 0x25
 
#define CYGNUM_HAL_VSR_MIN 0
#define CYGNUM_HAL_VSR_MAX 0x25
#define CYGNUM_HAL_VSR_COUNT 0x26
 
#elif CYGINT_HAL_V850_VARIANT_SB1
 
#define CYGNUM_HAL_VECTOR_INTWTNI 0x14
#define CYGNUM_HAL_VECTOR_INTTM00 0x15
#define CYGNUM_HAL_VECTOR_INTTM01 0x16
#define CYGNUM_HAL_VECTOR_INTTM10 0x17
#define CYGNUM_HAL_VECTOR_INTTM11 0x18
#define CYGNUM_HAL_VECTOR_INTTM2 0x19
#define CYGNUM_HAL_VECTOR_INTTM3 0x1A
#define CYGNUM_HAL_VECTOR_INTTM4 0x1B
#define CYGNUM_HAL_VECTOR_INTTM5 0x1C
#define CYGNUM_HAL_VECTOR_INTTM6 0x1D
#define CYGNUM_HAL_VECTOR_INTTM7 0x1E
#define CYGNUM_HAL_VECTOR_INTIIC0 0x1F
#define CYGNUM_HAL_VECTOR_INTCSI0 0x1F
#define CYGNUM_HAL_VECTOR_INTSER0 0x20
#define CYGNUM_HAL_VECTOR_INTSR0 0x21
#define CYGNUM_HAL_VECTOR_INTCSI1 0x21
#define CYGNUM_HAL_VECTOR_INTST0 0x22
#define CYGNUM_HAL_VECTOR_INTCSI2 0x23
#define CYGNUM_HAL_VECTOR_INTIIC1 0x24
#define CYGNUM_HAL_VECTOR_INTSER1 0x25
#define CYGNUM_HAL_VECTOR_INTSR1 0x26
#define CYGNUM_HAL_VECTOR_INTCSI3 0x26
#define CYGNUM_HAL_VECTOR_INTST1 0x27
#define CYGNUM_HAL_VECTOR_INTCSI4 0x28
#ifdef __SB2
#define CYGNUM_HAL_VECTOR_INTIE1 0x29
#define CYGNUM_HAL_VECTOR_INTIE2 0x2A
#endif
#define CYGNUM_HAL_VECTOR_INTAD 0x2B
#define CYGNUM_HAL_VECTOR_INTDMA0 0x2C
#define CYGNUM_HAL_VECTOR_INTDMA1 0x2D
#define CYGNUM_HAL_VECTOR_INTDMA2 0x2E
#define CYGNUM_HAL_VECTOR_INTDMA3 0x2F
#define CYGNUM_HAL_VECTOR_INTDMA4 0x30
#define CYGNUM_HAL_VECTOR_INTDMA5 0x31
#define CYGNUM_HAL_VECTOR_INTWTN 0x32
#define CYGNUM_HAL_VECTOR_INTKR 0x33
 
 
#define CYGNUM_HAL_VSR_MIN 0
#define CYGNUM_HAL_VSR_MAX 0x33
#define CYGNUM_HAL_VSR_COUNT ((CYGNUM_HAL_VSR_MAX-CYGNUM_HAL_VSR_MIN)+1)
 
#else
# error No v850 variant implemented!
#endif
 
// Min/Max exception numbers and how many there are
#define CYGNUM_HAL_EXCEPTION_MIN 0
#define CYGNUM_HAL_EXCEPTION_MAX 7
#define CYGNUM_HAL_EXCEPTION_COUNT ((CYGNUM_HAL_EXCEPTION_MAX-CYGNUM_HAL_EXCEPTION_MIN)+1)
 
// Min/Max ISR numbers and how many there are
#define CYGNUM_HAL_ISR_MIN 0x08
#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_VSR_MAX
#define CYGNUM_HAL_ISR_COUNT ((CYGNUM_HAL_ISR_MAX-CYGNUM_HAL_ISR_MIN)+1)
 
// The vector used by the Real time clock.
#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_VECTOR_INTTM10
 
// Mapping from interrupt numbers to hardware registers
#if CYGINT_HAL_V850_VARIANT_SA1
#define CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS \
(volatile unsigned char *)V850_REG_WDTIC, \
(volatile unsigned char *)V850_REG_PIC0, \
(volatile unsigned char *)V850_REG_PIC1, \
(volatile unsigned char *)V850_REG_PIC2, \
(volatile unsigned char *)V850_REG_PIC3, \
(volatile unsigned char *)V850_REG_PIC4, \
(volatile unsigned char *)V850_REG_PIC5, \
(volatile unsigned char *)V850_REG_PIC6, \
(volatile unsigned char *)V850_REG_WTNIIC, \
(volatile unsigned char *)V850_REG_TMIC00, \
(volatile unsigned char *)V850_REG_TMIC01, \
(volatile unsigned char *)V850_REG_TMIC10, \
(volatile unsigned char *)V850_REG_TMIC11, \
(volatile unsigned char *)V850_REG_TMIC2, \
(volatile unsigned char *)V850_REG_TMIC3, \
(volatile unsigned char *)V850_REG_TMIC4, \
(volatile unsigned char *)V850_REG_TMIC5, \
(volatile unsigned char *)V850_REG_CSIC0, \
(volatile unsigned char *)V850_REG_SERIC0, \
(volatile unsigned char *)V850_REG_CSIC1, \
(volatile unsigned char *)V850_REG_STIC0, \
(volatile unsigned char *)V850_REG_CSIC2, \
(volatile unsigned char *)V850_REG_SERIC1, \
(volatile unsigned char *)V850_REG_SRIC1, \
(volatile unsigned char *)V850_REG_STIC1, \
(volatile unsigned char *)V850_REG_ADIC, \
(volatile unsigned char *)V850_REG_DMAIC0, \
(volatile unsigned char *)V850_REG_DMAIC1, \
(volatile unsigned char *)V850_REG_DMAIC2, \
(volatile unsigned char *)V850_REG_WTNIC
 
#elif CYGINT_HAL_V850_VARIANT_SB1
#define CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS \
(volatile unsigned char *)V850_REG_WDTIC, \
(volatile unsigned char *)V850_REG_PIC0, \
(volatile unsigned char *)V850_REG_PIC1, \
(volatile unsigned char *)V850_REG_PIC2, \
(volatile unsigned char *)V850_REG_PIC3, \
(volatile unsigned char *)V850_REG_PIC4, \
(volatile unsigned char *)V850_REG_PIC5, \
(volatile unsigned char *)V850_REG_PIC6, \
NULL, \
NULL, \
NULL, \
NULL, \
(volatile unsigned char *)V850_REG_WTNIIC, \
(volatile unsigned char *)V850_REG_TMIC00, \
(volatile unsigned char *)V850_REG_TMIC01, \
(volatile unsigned char *)V850_REG_TMIC10, \
(volatile unsigned char *)V850_REG_TMIC11, \
(volatile unsigned char *)V850_REG_TMIC2, \
(volatile unsigned char *)V850_REG_TMIC3, \
(volatile unsigned char *)V850_REG_TMIC4, \
(volatile unsigned char *)V850_REG_TMIC5, \
(volatile unsigned char *)V850_REG_TMIC6, \
(volatile unsigned char *)V850_REG_TMIC7, \
(volatile unsigned char *)V850_REG_CSIC0, \
(volatile unsigned char *)V850_REG_SERIC0, \
(volatile unsigned char *)V850_REG_CSIC1, \
(volatile unsigned char *)V850_REG_STIC0, \
(volatile unsigned char *)V850_REG_CSIC2, \
(volatile unsigned char *)V850_REG_IICIC1, \
(volatile unsigned char *)V850_REG_SERIC1, \
(volatile unsigned char *)V850_REG_CSIC3, \
(volatile unsigned char *)V850_REG_STIC1, \
(volatile unsigned char *)V850_REG_CSIC4, \
(volatile unsigned char *)V850_REG_IEBIC1, \
(volatile unsigned char *)V850_REG_IEBIC2, \
(volatile unsigned char *)V850_REG_ADIC, \
(volatile unsigned char *)V850_REG_DMAIC0, \
(volatile unsigned char *)V850_REG_DMAIC1, \
(volatile unsigned char *)V850_REG_DMAIC2, \
(volatile unsigned char *)V850_REG_DMAIC3, \
(volatile unsigned char *)V850_REG_DMAIC4, \
(volatile unsigned char *)V850_REG_DMAIC5, \
(volatile unsigned char *)V850_REG_WTNIC, \
(volatile unsigned char *)V850_REG_KRIC
 
#endif // elif CYGINT_HAL_V850_VARIANT_SB1
 
//--------------------------------------------------------------------------
// Clock control
 
// This is handled by the default code
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_VAR_INTR_H
// End of var_intr.h
/v850/v2_0/include/var_arch.h
0,0 → 1,93
#ifndef CYGONCE_HAL_VAR_ARCH_H
#define CYGONCE_HAL_VAR_ARCH_H
 
//==========================================================================
//
// var_arch.h
//
// Architecture specific abstractions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, gthomas
// Date: 1999-02-17
// Purpose: Define architecture abstractions
// Description: This file contains any extra or modified definitions for
// this variant of the architecture.
// Usage: #include <cyg/hal/var_arch.h>
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <cyg/infra/cyg_type.h>
 
#define CYG_HAL_GDB_REG CYG_WORD32
 
// Copy a set of registers from a HAL_SavedRegisters structure into a
// GDB ordered array.
#define HAL_GET_GDB_REGISTERS( _aregval_ , _regs_ ) \
{ \
CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \
int _i_; \
\
for( _i_ = 0; _i_ < 32; _i_++ ) \
_regval_[_i_] = (_regs_)->d[_i_]; \
\
_regval_[37] = (_regs_)->psw; \
_regval_[36] = (_regs_)->cause; \
_regval_[64] = (_regs_)->pc; \
}
 
// Copy a GDB ordered array into a HAL_SavedRegisters structure.
#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \
{ \
CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \
int _i_; \
\
for( _i_ = 0; _i_ < 32; _i_++ ) \
(_regs_)->d[_i_] = _regval_[_i_]; \
\
(_regs_)->psw = _regval_[37]; \
(_regs_)->cause = _regval_[36]; \
(_regs_)->pc = _regval_[64]; \
}
 
//--------------------------------------------------------------------------
#endif // CYGONCE_HAL_VAR_ARCH_H
// End of var_arch.h
/v850/v2_0/ChangeLog
0,0 → 1,175
2003-04-10 Nick Garnett <nickg@balti.calivar.com>
 
* src/v85x_v850.ld:
Added .eh_frame to data section. This is a stopgap fix to allow
C++ programs that define exceptions to link and run. It does not
allow them to actually throw exceptions, since that depends on
compiler changes that have not been made. Further, more
far-reaching, linker script changes will also be needs when that
happens.
Added libsupc++.a to GROUP() directive for GCC versions later than
3.0.
 
2002-05-23 Jesper Skov <jskov@redhat.com>
 
* cdl/hal_v85x_v850.cdl: Don't run cache tests.
 
2001-06-21 Jonathan Larmour <jlarmour@redhat.com>
 
* include/v850_common.h: Add register defns for other V850/SA1 models.
 
2001-04-24 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_v850.cdl: Separate v850_ice.cxx into separate file
and only build if CYGDBG_HAL_V850_ICE. Also only build for ROM
or ROMRAM startup.
* src/hal_diag.c: msec_timeout can be static
* src/v850_stub.c: Separate ICE support into new v850_ice.cxx file from
here
* src/v850_ice.cxx: New file
* src/v85x_v850.ld: Enter at reset_vector for ROM or ROMRAM startup.
This is better when loading via ICE.
 
2001-03-29 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_v850.cdl: Fix typo.
 
2001-03-28 Jonathan Larmour <jlarmour@redhat.com>
 
* src/hal_diag.c: Move here from platform HALs - on-board serial0
is generic for V850 platforms.
 
* cdl/hal_v85x_v850.cdl: Build hal_diag.c
Add interfaces indicating variant.
Add option for ICE debugging.
 
* include/v850_common.h: Move register definitions here from
platform HAL and define both SA1 and SB1 variants.
Also rename some to match official docs.
 
* include/var_arch.h: No need to include <pkgconf/hal.h>
 
* include/var_cache.h: Provide empty default cache macros here.
 
* include/var_intr.h: Move interrupt definitions here from
platform HAL and define for both SA1 and SB1 variants.
Also rename some to match official docs.
 
* src/v850_misc.c: Doesn't use tracing, so don't include header.
 
* src/v850_stub.c: Reflect CYGNUM_HAL_VECTOR_WATCHDOG_TIMER ->
CYGNUM_HAL_VECTOR_INTWDT renaming.
Add support for debugging via ICE and gdbserv.
 
* src/v85x_v850.ld: Start at "start" not "reset_vector".
Support ram_vectors section (separated out to support ROMRAM startup).
 
* src/nec.ld: Remove - redundant.
 
* tests/nmitest.c: Added. Standalone test for checking if we've
received an NMI.
 
2000-09-06 Gary Thomas <gthomas@redhat.com>
 
* cdl/hal_v85x_v850.cdl: Improve [CPU] variant support.
 
2000-07-24 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* src/v850_stub.c (__is_breakpoint_function): Removed use
of CYG_LABEL_NAME() and added underscore to _breakinst.
 
* src/nec.ld, src/v85x_v850.ld:
Switched to new table definition mechanism.
 
2000-06-12 Gary Thomas <gthomas@redhat.com>
 
* src/v850_misc.c (hal_interrupt_unmask): Remove [extra]
debug message.
 
2000-06-09 Gary Thomas <gthomas@redhat.com>
 
* src/v850_misc.c: Make interrupt handling routines safe.
Also add asserts to verify.
 
2000-05-25 Gary Thomas <gthomas@redhat.com>
 
* src/v85x_v850.ld: Add platform specifics. In particular the
special, hardwired symbol "hal_vsr_table" needs to be platform
specific.
 
2000-05-24 Gary Thomas <gthomas@redhat.com>
 
* include/v850_common.h: Split into platform specific files.
 
2000-04-25 Gary Thomas <gthomas@redhat.com>
 
* src/v85x_v850.ld: Fix linking problem with "_etext".
 
2000-04-14 Gary Thomas <gthomas@redhat.com>
 
* src/v850_stub.c: Use 'br *' with a watchdog to emulate a
breakpoint since the hardware does not support them directly.
 
2000-04-11 Gary Thomas <gthomas@redhat.com>
 
* src/v850_stub.c (next_pc): Instruction "jmp [Rn]" was being
decoded incorrectly, leading to erroneous single step behaviour.
 
2000-03-31 Gary Thomas <gthomas@redhat.com>
 
* src/context.S: Use SLD/SST for smaller, faster code in context
save/restore functions.
 
2000-03-30 Gary Thomas <gthomas@redhat.com>
 
* src/context.S (_hal_longjmp):
(_hal_setjmp): Need to save R1/R2/R4/R5 since GCC seems to use them.
 
2000-03-27 Gary Thomas <gthomas@redhat.com>
 
* include/var_intr.h: Remove extra junk left over from cut&paste.
 
* src/context.S: Add setjmp/longjmp support.
 
2000-03-21 Gary Thomas <gthomas@redhat.com>
 
* src/v850_stub.c (__skipinst): Use single step code properly.
 
2000-03-20 Gary Thomas <gthomas@redhat.com>
 
* src/v850_stub.c: Add single step support.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
/v850/v2_0/src/v850_stub.c
0,0 → 1,326
//========================================================================
//
// v850_stub.c
//
// Helper functions for stub, generic to all NEC processors
//
//========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): Red Hat, gthomas, jlarmour
// Contributors: Red Hat, gthomas, jskov
// Date: 1998-11-26
// Purpose:
// Description: Helper functions for stub, generic to all NEC processors
// Usage:
//
//####DESCRIPTIONEND####
//
//========================================================================
 
#include <stddef.h>
 
#include <pkgconf/hal.h>
#ifdef CYGPKG_CYGMON
#include <pkgconf/cygmon.h>
#endif
 
#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
#include <cyg/hal/dbg-threads-api.h>
#endif
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/hal/hal_stub.h>
#include <cyg/hal/hal_arch.h>
#include <cyg/hal/hal_intr.h>
 
#ifndef FALSE
#define FALSE 0
#define TRUE 1
#endif
 
/* Given a trap value TRAP, return the corresponding signal. */
 
int __computeSignal (unsigned int trap_number)
{
unsigned short curins, *pc;
switch (trap_number) {
case CYGNUM_HAL_VECTOR_INTWDT: // watchdog timer NMI
pc = (unsigned short *)_hal_registers->pc;
curins = *pc;
if (curins == 0x0585) {
// "br *" - used for breakpoint
return SIGTRAP;
} else {
// Anything else - just ignore it happened
return 0;
}
case CYGNUM_HAL_VECTOR_NMI:
return SIGINT;
default:
return SIGTRAP;
}
}
 
 
/* Return the trap number corresponding to the last-taken trap. */
int __get_trap_number (void)
{
// The vector is not not part of the GDB register set so get it
// directly from the save context.
return _hal_registers->vector;
}
 
/* Set the currently-saved pc register value to PC. */
 
void set_pc (target_register_t pc)
{
put_register (PC, pc);
}
 
 
/*----------------------------------------------------------------------
* Single-step support
*/
 
/* Set things up so that the next user resume will execute one instruction.
This may be done by setting breakpoints or setting a single step flag
in the saved user registers, for example. */
 
static unsigned short *ss_saved_pc = 0;
static unsigned short ss_saved_instr[2];
static int ss_saved_instr_size;
 
#define FIXME() {diag_printf("FIXME - %s\n", __FUNCTION__); }
 
static unsigned short *
next_pc(unsigned short *pc)
{
unsigned short curins = *pc;
unsigned short *newpc = pc;
 
switch ((curins & 0x0780) >> 7) {
case 0x0:
if ((curins & 0x60) == 0x60) {
int Rn = curins & 0x1F;
newpc = (unsigned short *)get_register(Rn);
} else {
newpc = pc+1;
}
break;
case 0x1:
case 0x2:
case 0x3:
case 0x4:
case 0x5:
// Arithmetic - no branch opcodes
newpc = pc+1;
break;
case 0x6:
case 0x7:
case 0x8:
case 0x9:
case 0xA:
// Load and store - no branch opcodes
newpc = pc+2;
break;
case 0xB:
// Conditional branch
if (1) {
unsigned long psw = get_register(PSW);
#define PSW_SAT 0x10
#define PSW_CY 0x08
#define PSW_OV 0x04
#define PSW_S 0x02
#define PSW_Z 0x01
long disp = ((curins & 0xF800) >> 8) | ((curins & 0x70) >> 4);
int cc = curins & 0x0F;
int S = (psw & PSW_S) != 0;
int Z = (psw & PSW_Z) != 0;
int OV = (psw & PSW_OV) != 0;
int CY = (psw & PSW_CY) != 0;
int do_branch = 0;
if (curins & 0x8000) disp |= 0xFFFFFF00;
switch (cc) {
case 0x0: // BV
do_branch = (OV == 1);
break;
case 0x1: // BL
do_branch = (CY == 1);
break;
case 0x2: // BE
do_branch = (Z == 1);
break;
case 0x3: // BNH
do_branch = ((CY | Z) == 1);
break;
case 0x4: // BN
do_branch = (S == 1);
break;
case 0x5: // - always
do_branch = 1;
break;
case 0x6: // BLT
do_branch = ((S ^ OV) == 1);
break;
case 0x7: // BLE
do_branch = (((S ^ OV) | Z) == 1);
break;
case 0x8: // BNV
do_branch = (OV == 0);
break;
case 0x9: // BNL
do_branch = (CY == 0);
break;
case 0xA: // BNE
do_branch = (Z == 0);
break;
case 0xB: // BH
do_branch = ((CY | Z) == 0);
break;
case 0xC: // BP
do_branch = (S == 0);
break;
case 0xD: // BSA
do_branch = ((psw & PSW_SAT) != 0);
break;
case 0xE: // BGE
do_branch = ((S ^ OV) == 0);
break;
case 0xF: // BGT
do_branch = (((S ^ OV) | Z) == 0);
break;
}
if (do_branch) {
newpc = pc + disp;
} else {
newpc = pc + 1;
}
}
break;
case 0xC:
case 0xD:
case 0xE:
// Arithmetic & load/store - no branch opcodes
newpc = pc+2;
break;
case 0xF:
if ((curins & 0x60) >= 0x40) {
// Bitfield and extended instructions - no branch opcodes
newpc = pc+2;
} else {
// JR/JARL
long disp = ((curins & 0x3F) << 16) | *(pc+1);
if (curins & 0x20) disp |= 0xFFC00000;
newpc = pc + (disp>>1);
}
}
return newpc;
}
 
void __single_step (void)
{
unsigned short *pc = (unsigned short *)get_register(PC);
unsigned short *break_pc;
unsigned short _breakpoint[] = {0x07E0, 0x0780};
unsigned short *breakpoint = _breakpoint;
// If the current instruction is a branch, decide if the branch will
// be taken to determine where to set the breakpoint.
break_pc = next_pc(pc);
// Now see what kind of breakpoint can be used.
// Note: since this is a single step, always use the 32 bit version.
ss_saved_pc = break_pc;
ss_saved_instr_size = 2;
ss_saved_instr[0] = *break_pc;
*break_pc++ = *breakpoint++;
ss_saved_instr[1] = *break_pc;
*break_pc++ = *breakpoint++;
}
 
/* Clear the single-step state. */
 
void __clear_single_step (void)
{
unsigned short *pc, *val;
int i;
if (ss_saved_instr_size != 0) {
pc = ss_saved_pc;
val = ss_saved_instr;
for (i = 0; i < ss_saved_instr_size; i++) {
*pc++ = *val++;
}
ss_saved_instr_size = 0;
}
}
 
#if !defined(CYGPKG_CYGMON)
void __install_breakpoints (void)
{
// FIXME();
}
 
void __clear_breakpoints (void)
{
// FIXME();
}
#endif // !CYGPKG_CYGMON
 
/* If the breakpoint we hit is in the breakpoint() instruction, return a
non-zero value. */
 
int
__is_breakpoint_function ()
{
return get_register (PC) == (target_register_t)&_breakinst;
}
 
 
/* Skip the current instruction. Since this is only called by the
stub when the PC points to a breakpoint or trap instruction,
*/
 
void __skipinst (void)
{
unsigned short *pc = (unsigned short *)get_register(PC);
pc = next_pc(pc);
put_register(PC, (unsigned long)pc);
}
 
 
#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
// EOF v850_stub.c
/v850/v2_0/src/v850_ice.cxx
0,0 → 1,573
//========================================================================
//
// v850_ice.cxx
//
// ICE debugging support for V850 processors
//
//========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jlarmour
// Contributors:
// Date: 2001-03-12
// Purpose:
// Description: ICE debugging support for V850 processors
// Usage:
//
//####DESCRIPTIONEND####
//
//========================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_V850_ICE
 
#include <stddef.h>
#include <cyg/infra/cyg_type.h>
#include <cyg/hal/dbg-threads-api.h>
#include <cyg/hal/nec-stub.h>
#include <cyg/hal/hal_arch.h>
 
#define ICEDEBUG 0
 
#if ICEDEBUG
#include <cyg/infra/diag.h>
#endif
 
/* ----------------------------------------------------------------------- */
/* Common ICE syscall information */
 
/* Magic area for syscall information, from vectors.S */
__externC char hal_v85x_ice_syscall_info[];
 
/* Syscall operation codes. This is a "contract" with the host. */
 
#define V850ICE_SYSCALL_GET_THREADNEXT 1
#define V850ICE_SYSCALL_GET_THREADREGS 2
#define V850ICE_SYSCALL_SET_THREADREGS 3
#define V850ICE_SYSCALL_GET_CURRTHREAD 4
#define V850ICE_SYSCALL_GET_THREADINFO 5
#define V850ICE_SYSCALL_CONSOLE_INPUT 6
 
/* System call information area layout */
#define ICE_SYSCALL_INFO_VALIDATOR (*(int *)&hal_v85x_ice_syscall_info[0])
#define ICE_SYSCALL_INFO_STARTPC (*(int *)&hal_v85x_ice_syscall_info[4])
#define ICE_SYSCALL_INFO_ENDPC (*(int *)&hal_v85x_ice_syscall_info[8])
#define ICE_SYSCALL_INFO_STACK (*(int *)&hal_v85x_ice_syscall_info[12])
#define ICE_SYSCALL_INFO_IOBUF (*(int *)&hal_v85x_ice_syscall_info[16])
#define ICE_SYSCALL_INFO_DIAGOUTPC (*(int *)&hal_v85x_ice_syscall_info[20])
#define ICE_SYSCALL_INFO_DIAGOUTBUF (*(int *)&hal_v85x_ice_syscall_info[24])
#define ICE_SYSCALL_INFO_DIAGOUTBUFEND (*(int *)&hal_v85x_ice_syscall_info[28])
 
/* We can't use normal memcpy when invoked via the ICE. It may be unsafe. */
static void
my_memcpy( void *vd, const void *vs, int n)
{
char *d = (char *)vd;
char *s = (char *)vs;
 
while (n--)
*d++=*s++;
}
 
static void
my_memset( void *vs, char c, int n)
{
char *s = (char *)vs;
 
while (n--)
*s++ = c;
}
 
/* ----------------------------------------------------------------------- */
/* Support for diag output via ICE */
 
#ifdef CYGDBG_HAL_V85X_V850_ICE_DIAG
 
#include <cyg/hal/hal_if.h>
 
static volatile cyg_uint8 v850ice_output_buf[128];
static volatile cyg_uint8 *v850ice_output_end = v850ice_output_buf;
#define OUTPUT_BUF_END (&v850ice_output_buf[ sizeof(v850ice_output_buf)])
static volatile cyg_uint8 v850ice_input_buf[128];
#define INPUT_BUF_END (&v850ice_input_buf[ sizeof(v850ice_input_buf)])
static volatile cyg_uint8 *v850ice_input_ptr_put = v850ice_input_buf;
static volatile cyg_uint8 *v850ice_input_ptr_get = v850ice_input_buf;
static volatile cyg_uint8 v850ice_input_buf_bytes_used = 0;
 
__externC void hal_v850_ice_output_break(void);
 
static void
hal_v850_ice_indicate_output(void)
{
HAL_BREAKPOINT(hal_v850_ice_output_break);
}
 
// Actually write character
void
cyg_hal_plf_diag_ice_putc(void* __ch_data, cyg_uint8 c)
{
CYGARC_HAL_SAVE_GP();
 
// Send character
*v850ice_output_end++ = c;
 
if (c == '\n' ||
v850ice_output_end == OUTPUT_BUF_END) {
hal_v850_ice_indicate_output();
v850ice_output_end = v850ice_output_buf;
}
 
CYGARC_HAL_RESTORE_GP();
}
 
static cyg_bool
cyg_hal_plf_diag_ice_getc_nonblock(void* __ch_data, cyg_uint8* ch)
{
if ( v850ice_input_buf_bytes_used == 0 )
return false; // buffer empty
 
*ch = *v850ice_input_ptr_get++;
if ( v850ice_input_ptr_get == INPUT_BUF_END ) {
v850ice_input_ptr_get = v850ice_input_buf;
}
 
v850ice_input_buf_bytes_used--;
 
return true;
}
 
cyg_uint8
cyg_hal_plf_diag_ice_getc(void* __ch_data)
{
cyg_uint8 ch;
CYGARC_HAL_SAVE_GP();
 
while(!cyg_hal_plf_diag_ice_getc_nonblock(__ch_data, &ch));
 
CYGARC_HAL_RESTORE_GP();
return ch;
}
 
static cyg_bool
cyg_hal_plf_diag_ice_receive_char(cyg_uint8 ch)
{
/* buffer full? */
if ( v850ice_input_buf_bytes_used == sizeof(v850ice_input_buf) )
return false;
 
*v850ice_input_ptr_put++ = ch;
if ( v850ice_input_ptr_put == INPUT_BUF_END ) {
v850ice_input_ptr_put = v850ice_input_buf;
}
return true;
}
 
static void
cyg_hal_plf_diag_ice_write(void* __ch_data, const cyg_uint8* __buf,
cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
 
#define MIN(__x, __y) ((__x) < (__y) ? (__x) : (__y))
 
while(__len > 0) {
int copylen = MIN(__len,
(cyg_uint32) (OUTPUT_BUF_END - v850ice_output_end));
 
my_memcpy( (void *)v850ice_output_buf, __buf, copylen );
__len -= copylen;
v850ice_output_end += copylen;
hal_v850_ice_indicate_output();
v850ice_output_end = v850ice_output_buf;
}
CYGARC_HAL_RESTORE_GP();
}
 
static void
cyg_hal_plf_diag_ice_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
 
while(__len-- > 0)
*__buf++ = cyg_hal_plf_diag_ice_getc(__ch_data);
 
CYGARC_HAL_RESTORE_GP();
}
 
static cyg_int32 msec_timeout = 1000;
 
cyg_bool
cyg_hal_plf_diag_ice_getc_timeout(void* __ch_data, cyg_uint8* ch)
{
int delay_count = msec_timeout * 10; // delay in .1 ms steps
cyg_bool res;
CYGARC_HAL_SAVE_GP();
 
for(;;) {
res = cyg_hal_plf_diag_ice_getc_nonblock(__ch_data, ch);
if (res || 0 == delay_count--)
break;
CYGACC_CALL_IF_DELAY_US(100);
}
 
CYGARC_HAL_RESTORE_GP();
return res;
}
 
static int
cyg_hal_plf_diag_ice_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
static int irq_state = 0;
int ret = 0;
CYGARC_HAL_SAVE_GP();
 
switch (__func) {
case __COMMCTL_IRQ_ENABLE:
irq_state = 1;
break;
case __COMMCTL_IRQ_DISABLE:
ret = irq_state;
irq_state = 0;
break;
case __COMMCTL_DBG_ISR_VECTOR:
ret = 0;
break;
case __COMMCTL_SET_TIMEOUT:
{
va_list ap;
 
va_start(ap, __func);
 
ret = msec_timeout;
msec_timeout = va_arg(ap, cyg_uint32);
 
va_end(ap);
}
default:
break;
}
CYGARC_HAL_RESTORE_GP();
return ret;
}
 
static int
cyg_hal_plf_diag_ice_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
CYGARC_HAL_SAVE_GP();
*__ctrlc = 0;
CYGARC_HAL_RESTORE_GP();
return 0;
}
 
__externC void
cyg_hal_plf_ice_diag_init()
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
 
// Init channels
ICE_SYSCALL_INFO_DIAGOUTPC = (int)&hal_v850_ice_output_break;
ICE_SYSCALL_INFO_DIAGOUTBUF = (int)&v850ice_output_buf[0];
ICE_SYSCALL_INFO_DIAGOUTBUFEND = (int)&v850ice_output_end;
 
// Setup procs in the vector table
 
// Set channel 1
CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, 0);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_diag_ice_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_diag_ice_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_diag_ice_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_diag_ice_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_diag_ice_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_diag_ice_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_diag_ice_getc_timeout);
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
 
#endif // ifdef CYGDBG_HAL_V85X_V850_ICE_DIAG
 
 
/* ----------------------------------------------------------------------- */
/* Support for debugging via ICE */
 
#define ICE_STACK_SIZE 1024/sizeof(int)
static int ice_stack[ICE_STACK_SIZE]; // ints so as to ensure alignment
static int ice_iobuf[128];
 
static void
hal_v85x_ice_syscall_end(void)
{
for (;;);
}
 
static void
hal_v85x_ice_syscall(void)
{
int code, len;
code = ice_iobuf[0];
len = ice_iobuf[1];
switch (code) {
case V850ICE_SYSCALL_GET_THREADNEXT:
{
int ret;
threadref currthread, nextthread;
int thread_id;
 
/* Unmarshall thread ref */
my_memcpy( &currthread, &ice_iobuf[2], 8 );
#if ICEDEBUG
diag_printf("*NEXTTHREAD* currthread=%08x,%08x\n",
*(int *)&currthread[0],
*(int *)(((char *)&currthread[0])+4));
#endif
// null threadref?
if ((ice_iobuf[2] == 0) &&
(ice_iobuf[3] == 0)) {
#if ICEDEBUG
diag_printf("null threadref\n");
#endif
ret = dbg_threadlist( 1, NULL, &nextthread );
} else {
#if ICEDEBUG
diag_printf("non-null threadref\n");
#endif
ret = dbg_threadlist( 0, &currthread, &nextthread );
}
#if ICEDEBUG
diag_printf("*NEXTTHREAD* nextthread=%08x,%08x\n",
*(int *)&nextthread[0],
*(int *)(((char *)&nextthread[0])+4));
#endif
if (ret) { // if valid thread found
thread_id = dbg_thread_id( &nextthread );
/* Returns 0 on error */
if (thread_id != 0) {
ice_iobuf[1] = thread_id;
my_memcpy( &ice_iobuf[2], nextthread, 8 );
// set return data size to 12
ice_iobuf[0] = 12;
#if ICEDEBUG
{
int i;
for (i=0; i<3; i++)
diag_printf("%x, ", ice_iobuf[i]);
diag_printf("\n");
}
#endif
} else {
ret = 0;
}
}
if (!ret) {
// set to null
my_memset( &ice_iobuf[1], 0, 12 );
}
}
break;
case V850ICE_SYSCALL_GET_THREADREGS:
{
int ret;
threadref thread;
 
/* Unmarshall thread ref */
my_memcpy( &thread, &ice_iobuf[2], 8 );
#if ICEDEBUG
diag_printf("*GTHREADREGS* thread=%08x,%08x\n", *(int *)&thread[0],
*(int *)(((char *)&thread[0])+4));
#endif
ret = dbg_getthreadreg( &thread, NUMREGS, &ice_iobuf[1]);
if (ret)
ice_iobuf[0] = NUMREGS * 4;
else
ice_iobuf[0] = 0;
}
break;
case V850ICE_SYSCALL_SET_THREADREGS:
{
int ret;
threadref thread;
 
/* Unmarshall thread ref */
my_memcpy( &thread, &ice_iobuf[2], 8 );
#if ICEDEBUG
diag_printf("*STHREADREGS* thread=%08x,%08x\n", *(int *)&thread[0],
*(int *)(((char *)&thread[0])+4));
#endif
ret = dbg_setthreadreg( &thread, NUMREGS, &ice_iobuf[4]);
if (ret)
ice_iobuf[0] = 1;
else
ice_iobuf[0] = 0;
}
break;
case V850ICE_SYSCALL_GET_CURRTHREAD:
{
int ret, thread_id;
threadref thread;
 
ret = dbg_currthread( &thread );
#if ICEDEBUG
diag_printf("*CURRTHREAD* thread=%08x,%08x\n", *(int *)&thread[0],
*(int *)(((char *)&thread[0])+4));
#endif
if (ret) {
thread_id = dbg_thread_id( &thread );
/* Returns 0 on error */
if (thread_id != 0) {
ice_iobuf[1] = thread_id;
my_memcpy( &ice_iobuf[2], thread, 8 );
}
else {
ret = 0;
}
}
if (ret)
ice_iobuf[0] = 12;
else
ice_iobuf[0] = 0;
}
break;
case V850ICE_SYSCALL_GET_THREADINFO:
{
int ret;
threadref thread;
struct cygmon_thread_debug_info info;
char *s=(char *)&ice_iobuf[1], *p;
 
/* Unmarshall thread ref */
my_memcpy( &thread, &ice_iobuf[2], 8 );
#if ICEDEBUG
diag_printf("*INFO* thread=%08x,%08x\n", *(int *)&thread[0],
*(int *)(((char *)&thread[0])+4));
#endif
 
ret = dbg_threadinfo( &thread, &info );
if (ret) {
if (info.thread_display) {
my_memcpy (s, "State: ", 7);
s += 7;
p = info.thread_display;
while (*p) {
*s++ = *p++;
}
}
 
if (info.unique_thread_name && info.unique_thread_name[0]) {
my_memcpy (s, ", Name: ", 8);
s += 8;
p = info.unique_thread_name;
while (*p) {
*s++ = *p++;
}
}
 
if (info.more_display) {
my_memcpy (s, ", ", 2);
s += 2;
p = info.more_display;
while (*p) {
*s++ = *p++;
}
}
 
}
*s++ = '\0';
if (ret)
ice_iobuf[0] = s - (char *)&ice_iobuf[1];
else
ice_iobuf[0] = 0;
}
break;
case V850ICE_SYSCALL_CONSOLE_INPUT:
{
#ifdef CYGDBG_HAL_V85X_V850_ICE_DIAG
int len = ice_iobuf[0];
int i;
 
for (i=1; i <= len; i++) {
if (false == cyg_hal_plf_diag_ice_receive_char(ice_iobuf[i]))
break;
}
ice_iobuf[0] = i-1;
#else
ice_iobuf[0] = 0;
#endif
}
break;
default:
// set return data size to 0
ice_iobuf[0] = 0;
break;
}
hal_v85x_ice_syscall_end();
}
 
class Cyg_dummy_ice_syscall_init_class {
public:
Cyg_dummy_ice_syscall_init_class() {
 
const int valid_string = 0x45434956; // "VICE"
 
ICE_SYSCALL_INFO_STARTPC = (int)&hal_v85x_ice_syscall;
ICE_SYSCALL_INFO_ENDPC = (int)&hal_v85x_ice_syscall_end;
// top of stack, less 4 ints for parameter flushback area as per ABI
ICE_SYSCALL_INFO_STACK = (int)&ice_stack[ICE_STACK_SIZE-4];
ICE_SYSCALL_INFO_IOBUF = (int)&ice_iobuf[0];
 
HAL_REORDER_BARRIER();
 
// Leave validation string to last
ICE_SYSCALL_INFO_VALIDATOR = valid_string;
}
};
 
static Cyg_dummy_ice_syscall_init_class dummy_syscall_class;
 
#endif // ifdef CYGDBG_HAL_V850_ICE
 
// EOF v850_ice.cxx
/v850/v2_0/src/context.S
0,0 → 1,214
// #=============================================================================
// #
// # context.S
// #
// # NEC/V850 context switch code
// #
// #=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
// #=============================================================================
// ######DESCRIPTIONBEGIN####
// #
// # Author(s): nickg, gthomas
// # Contributors: nickg, gthomas
// # Date: 1998-09-15
// # Purpose: NEC/V850 context switch code
// # Description: This file contains implementations of the thread context
// # switch routines. It also contains the longjmp() and setjmp() routines.
// #
// #####DESCRIPTIONEND####
// #
// #=============================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/nec_offsets.inc>
 
.text
// ------------------------------------------------------------------------------
// hal_thread_switch_context
// Switch thread contexts
// R6 = address of sp of next thread to execute
// R7 = address of sp save location of current thread
.globl __hal_thread_switch_context
__hal_thread_switch_context:
addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp
st.w ep,CYGARC_REG_EP[sp]
mov sp,ep
sst.w r1,CYGARC_REG_R1[ep]
sst.w r2,CYGARC_REG_R2[ep]
addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1
sst.w r1,CYGARC_REG_SP[ep] // sp
sst.w r4,CYGARC_REG_R4[ep]
sst.w r5,CYGARC_REG_R5[ep]
sst.w r6,CYGARC_REG_R6[ep]
sst.w r7,CYGARC_REG_R7[ep]
sst.w r8,CYGARC_REG_R8[ep]
sst.w r9,CYGARC_REG_R9[ep]
sst.w r10,CYGARC_REG_R10[ep]
sst.w r11,CYGARC_REG_R11[ep]
sst.w r12,CYGARC_REG_R12[ep]
sst.w r13,CYGARC_REG_R13[ep]
sst.w r14,CYGARC_REG_R14[ep]
sst.w r15,CYGARC_REG_R15[ep]
sst.w r16,CYGARC_REG_R16[ep]
sst.w r17,CYGARC_REG_R17[ep]
sst.w r18,CYGARC_REG_R18[ep]
sst.w r19,CYGARC_REG_R19[ep]
sst.w r20,CYGARC_REG_R20[ep]
sst.w r21,CYGARC_REG_R21[ep]
sst.w r22,CYGARC_REG_R22[ep]
sst.w r23,CYGARC_REG_R23[ep]
sst.w r24,CYGARC_REG_R24[ep]
sst.w r25,CYGARC_REG_R25[ep]
sst.w r26,CYGARC_REG_R26[ep]
sst.w r27,CYGARC_REG_R27[ep]
sst.w r28,CYGARC_REG_R28[ep]
sst.w r29,CYGARC_REG_R29[ep]
sst.w lp,CYGARC_REG_LP[ep]
sst.w lp,CYGARC_REG_PC[ep]
stsr PSW,r1
st.w r1,CYGARC_REG_PSW[ep]
st.w sp,0[r7] // return new stack pointer
 
# Now load the destination thread by dropping through
# to hal_thread_load_context
// ------------------------------------------------------------------------------
// hal_thread_load_context
// Load thread context
// R6 = address of sp of next thread to execute
// Note that this function is also the second half of hal_thread_switch_context
// and is simply dropped into from it.
 
.globl __hal_thread_load_context
__hal_thread_load_context:
di // disable interrupts while updating state
ld.w 0[r6],ep // get pointer to saved state
ld.w CYGARC_REG_PSW[ep],r6
sld.w CYGARC_REG_LP[ep],r7
sld.w CYGARC_REG_R1[ep],r1 // restore volatile registers
sld.w CYGARC_REG_R2[ep],r2
ldsr r6,EIPSW // avoids pipline bubble
ldsr r7,EIPC
sld.w CYGARC_REG_R4[ep],r4
sld.w CYGARC_REG_R5[ep],r5
sld.w CYGARC_REG_R6[ep],r6
sld.w CYGARC_REG_R7[ep],r7
sld.w CYGARC_REG_R8[ep],r8
sld.w CYGARC_REG_R9[ep],r9
sld.w CYGARC_REG_R10[ep],r10
sld.w CYGARC_REG_R11[ep],r11
sld.w CYGARC_REG_R12[ep],r12
sld.w CYGARC_REG_R13[ep],r13
sld.w CYGARC_REG_R14[ep],r14
sld.w CYGARC_REG_R15[ep],r15
sld.w CYGARC_REG_R16[ep],r16
sld.w CYGARC_REG_R17[ep],r17
sld.w CYGARC_REG_R18[ep],r18
sld.w CYGARC_REG_R19[ep],r19
sld.w CYGARC_REG_R20[ep],r20
sld.w CYGARC_REG_R21[ep],r21
sld.w CYGARC_REG_R22[ep],r22
sld.w CYGARC_REG_R23[ep],r23
sld.w CYGARC_REG_R24[ep],r24
sld.w CYGARC_REG_R25[ep],r25
sld.w CYGARC_REG_R26[ep],r26
sld.w CYGARC_REG_R27[ep],r27
sld.w CYGARC_REG_R28[ep],r28
sld.w CYGARC_REG_R29[ep],r29
sld.w CYGARC_REG_LP[ep],lp
sld.w CYGARC_REG_SP[ep],sp
sld.w CYGARC_REG_EP[ep],ep
reti
// ------------------------------------------------------------------------------
// HAL longjmp, setjmp implementations
 
#define fp r29
 
.globl _hal_setjmp
_hal_setjmp:
st.w r1,CYGARC_JMPBUF_R1[r6]
st.w r2,CYGARC_JMPBUF_R2[r6]
st.w r4,CYGARC_JMPBUF_R4[r6]
st.w r5,CYGARC_JMPBUF_R5[r6]
st.w sp,CYGARC_JMPBUF_SP[r6]
st.w gp,CYGARC_JMPBUF_GP[r6]
st.w tp,CYGARC_JMPBUF_TP[r6]
st.w r20,CYGARC_JMPBUF_R20[r6]
st.w r21,CYGARC_JMPBUF_R21[r6]
st.w r22,CYGARC_JMPBUF_R22[r6]
st.w r23,CYGARC_JMPBUF_R23[r6]
st.w r24,CYGARC_JMPBUF_R24[r6]
st.w r25,CYGARC_JMPBUF_R25[r6]
st.w r26,CYGARC_JMPBUF_R26[r6]
st.w r27,CYGARC_JMPBUF_R27[r6]
st.w r28,CYGARC_JMPBUF_R28[r6]
st.w fp,CYGARC_JMPBUF_FP[r6]
st.w ep,CYGARC_JMPBUF_EP[r6]
st.w lp,CYGARC_JMPBUF_LP[r6]
mov r0,r10
jmp [lp]
 
// hal_longjmp loads state from [arg0] and returns arg1
 
.globl _hal_longjmp
_hal_longjmp:
ld.w CYGARC_JMPBUF_SP[r6],sp
ld.w CYGARC_JMPBUF_GP[r6],gp
ld.w CYGARC_JMPBUF_TP[r6],tp
ld.w CYGARC_JMPBUF_R1[r6],r1
ld.w CYGARC_JMPBUF_R2[r6],r2
ld.w CYGARC_JMPBUF_R4[r6],r4
ld.w CYGARC_JMPBUF_R5[r6],r5
ld.w CYGARC_JMPBUF_R20[r6],r20
ld.w CYGARC_JMPBUF_R21[r6],r21
ld.w CYGARC_JMPBUF_R22[r6],r22
ld.w CYGARC_JMPBUF_R23[r6],r23
ld.w CYGARC_JMPBUF_R24[r6],r24
ld.w CYGARC_JMPBUF_R25[r6],r25
ld.w CYGARC_JMPBUF_R26[r6],r26
ld.w CYGARC_JMPBUF_R27[r6],r27
ld.w CYGARC_JMPBUF_R28[r6],r28
ld.w CYGARC_JMPBUF_FP[r6],fp
ld.w CYGARC_JMPBUF_EP[r6],ep
ld.w CYGARC_JMPBUF_LP[r6],lp
mov r7,r10
jmp [lp]
 
// ------------------------------------------------------------------------------
// end of context.S
 
/v850/v2_0/src/hal_diag.c
0,0 → 1,452
/*=============================================================================
//
// hal_diag.c
//
// HAL diagnostic output code
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg, gthomas
// Contributors:nickg, gthomas, jlarmour
// Date: 2001-03-21
// Purpose: HAL diagnostic output
// Description: Implementations of HAL diagnostic output support.
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/hal.h>
 
#if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0
 
#include <pkgconf/system.h>
#include CYGBLD_HAL_PLATFORM_H
 
#include <cyg/infra/cyg_type.h> // base types
#include <cyg/infra/cyg_ass.h> // assertion macros
 
#include <cyg/hal/hal_arch.h> // basic machine info
#include <cyg/hal/hal_intr.h> // interrupt macros
#include <cyg/hal/hal_io.h> // IO macros
#include <cyg/hal/hal_diag.h>
 
#include <cyg/hal/hal_stub.h> // target_register_t
#include <cyg/hal/hal_if.h> // Calling interface definitions
#include <cyg/hal/hal_misc.h> // Helper functions
#include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
 
#include <cyg/hal/v850_common.h> // hardware registers, etc.
 
 
#define BAUD_COUNT ((CYGHWR_HAL_V85X_CPU_FREQ/2)/CYGHWR_HAL_V85X_V850_DIAG_BAUD)
#define BAUD_DIVISOR 1
 
/*---------------------------------------------------------------------------*/
// V850
 
void
init_serial_channel(void* base)
{
volatile unsigned char *mode = (volatile unsigned char *)V850_REG_ASIM0;
volatile unsigned char *brgc = (volatile unsigned char *)V850_REG_BRGC0;
volatile unsigned char *brgm0 = (volatile unsigned char *)V850_REG_BRGMC00;
#ifdef V850_REG_BRGMC01
volatile unsigned char *brgm1 = (volatile unsigned char *)V850_REG_BRGMC01;
#endif
volatile unsigned char *rxstat = (volatile unsigned char *)V850_REG_SRIC0;
volatile unsigned char *rxerr = (volatile unsigned char *)V850_REG_SERIC0;
volatile unsigned char *txstat = (volatile unsigned char *)V850_REG_STIC0;
int count = BAUD_COUNT;
int divisor = BAUD_DIVISOR;
 
while (count > 0xFF) {
count >>= 1;
divisor++;
}
 
*mode = 0xC8;
*brgc = count;
*brgm0 = divisor & 0x07;
#ifdef V850_REG_BRGMC01
*brgm1 = divisor >> 3;
#endif
*rxstat = 0x47;
*rxerr = 0;
*txstat = 0x47;
}
 
// Actually send character down the wire
void
cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 c)
{
volatile unsigned char *TxDATA = (volatile unsigned char *)V850_REG_TXS0;
volatile unsigned char *TxSTAT = (volatile unsigned char *)V850_REG_STIC0;
int timeout = 0xFFFF;
 
CYGARC_HAL_SAVE_GP();
 
// Send character
*TxDATA = (unsigned char)c;
// Wait for Tx not busy
while ((*TxSTAT & 0x80) == 0x00) {
if (--timeout == 0)
break;
}
*TxSTAT &= ~0x80;
 
CYGARC_HAL_RESTORE_GP();
}
 
static cyg_bool
cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
{
volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0;
volatile unsigned char *RxSTAT = (volatile unsigned char *)V850_REG_SRIC0;
 
if ((*RxSTAT & 0x80) == 0x00)
return false;
 
*ch = (char)*RxDATA;
*RxSTAT &= ~0x80;
return true;
}
 
cyg_uint8
cyg_hal_plf_serial_getc(void* __ch_data)
{
cyg_uint8 ch;
CYGARC_HAL_SAVE_GP();
 
while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
 
CYGARC_HAL_RESTORE_GP();
return ch;
}
 
static void
cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
 
while(__len-- > 0)
cyg_hal_plf_serial_putc(__ch_data, *__buf++);
 
CYGARC_HAL_RESTORE_GP();
}
 
static void
cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
 
while(__len-- > 0)
*__buf++ = cyg_hal_plf_serial_getc(__ch_data);
 
CYGARC_HAL_RESTORE_GP();
}
 
static cyg_int32 msec_timeout = 1000;
 
cyg_bool
cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
{
int delay_count = msec_timeout * 10; // delay in .1 ms steps
cyg_bool res;
CYGARC_HAL_SAVE_GP();
 
for(;;) {
res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
if (res || 0 == delay_count--)
break;
CYGACC_CALL_IF_DELAY_US(100);
}
 
CYGARC_HAL_RESTORE_GP();
return res;
}
 
static int
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
static int irq_state = 0;
int ret = 0;
CYGARC_HAL_SAVE_GP();
 
switch (__func) {
case __COMMCTL_IRQ_ENABLE:
HAL_INTERRUPT_UNMASK(CYGNUM_HAL_VECTOR_INTCSI1);
irq_state = 1;
break;
case __COMMCTL_IRQ_DISABLE:
ret = irq_state;
irq_state = 0;
HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1);
break;
case __COMMCTL_DBG_ISR_VECTOR:
ret = CYGNUM_HAL_VECTOR_INTCSI1;
break;
case __COMMCTL_SET_TIMEOUT:
{
va_list ap;
 
va_start(ap, __func);
 
ret = msec_timeout;
msec_timeout = va_arg(ap, cyg_uint32);
 
va_end(ap);
}
default:
break;
}
CYGARC_HAL_RESTORE_GP();
return ret;
}
 
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0;
cyg_uint8 c;
int res = 0;
CYGARC_HAL_SAVE_GP();
 
c = (char)*RxDATA;
*__ctrlc = 0;
if( cyg_hal_is_break( &c , 1 ) )
*__ctrlc = 1;
 
cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1);
 
res = CYG_ISR_HANDLED;
 
CYGARC_HAL_RESTORE_GP();
return res;
}
 
static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
 
// Disable interrupts.
HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1);
 
// Init channels
init_serial_channel((cyg_uint8*)0);
 
// Setup procs in the vector table
 
// Set channel 0
CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, 0);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
 
__externC void cyg_hal_plf_ice_diag_init();
 
void
cyg_hal_plf_comms_init(void)
{
static int initialized = 0;
 
if (initialized)
return;
 
initialized = 1;
 
cyg_hal_plf_serial_init();
 
#ifdef CYGDBG_HAL_V85X_V850_ICE_DIAG
cyg_hal_plf_ice_diag_init();
#endif
}
 
//=============================================================================
// Compatibility with older stubs
//=============================================================================
 
#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
 
// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e.
// totally stand-alone) system.
 
//#ifdef CYGSEM_HAL_ROM_MONITOR
//#define CYG_HAL_STARTUP_ROM
//#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
//#endif
 
#if (defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)) \
&& !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
#define HAL_DIAG_USES_HARDWARE
#else
#if !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN)
#define HAL_DIAG_USES_HARDWARE
#endif
#endif
 
void hal_diag_init(void)
{
init_serial_channel(0);
}
 
#ifdef HAL_DIAG_USES_HARDWARE
 
void hal_diag_write_char(char c)
{
CYG_INTERRUPT_STATE old;
HAL_DISABLE_INTERRUPTS(old);
cyg_hal_plf_serial_putc(0, c);
HAL_RESTORE_INTERRUPTS(old);
}
 
void hal_diag_read_char(char *c)
{
*c = cyg_hal_plf_serial_getc(0);
}
 
#else // HAL_DIAG relies on GDB
 
void
hal_diag_read_char(char *c)
{
*c = cyg_hal_plf_serial_getc(0);
}
 
void
hal_diag_write_char(char c)
{
static char line[100];
static int pos = 0;
 
// No need to send CRs
if( c == '\r' ) return;
 
line[pos++] = c;
 
if( c == '\n' || pos == sizeof(line) )
{
CYG_INTERRUPT_STATE old;
 
// Disable interrupts. This prevents GDB trying to interrupt us
// while we are in the middle of sending a packet. The serial
// receive interrupt will be seen when we re-enable interrupts
// later.
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);
#else
HAL_DISABLE_INTERRUPTS(old);
#endif
 
while(1)
{
static char hex[] = "0123456789ABCDEF";
cyg_uint8 csum = 0;
int i;
char c1;
cyg_hal_plf_serial_putc(0, '$');
cyg_hal_plf_serial_putc(0, 'O');
csum += 'O';
for( i = 0; i < pos; i++ )
{
char ch = line[i];
char h = hex[(ch>>4)&0xF];
char l = hex[ch&0xF];
cyg_hal_plf_serial_putc(0, h);
cyg_hal_plf_serial_putc(0, l);
csum += h;
csum += l;
}
cyg_hal_plf_serial_putc(0, '#');
cyg_hal_plf_serial_putc(0, hex[(csum>>4)&0xF]);
cyg_hal_plf_serial_putc(0, hex[csum&0xF]);
 
// Wait for the ACK character '+' from GDB here and handle
// receiving a ^C instead. This is the reason for this clause
// being a loop.
c1 = cyg_hal_plf_serial_getc(0);
 
if( c1 == '+' )
break; // a good acknowledge
 
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && \
defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1);
if( c1 == 3 ) {
// Ctrl-C: breakpoint.
cyg_hal_gdb_interrupt (__builtin_return_address(0));
break;
}
#endif
// otherwise, loop round again
}
pos = 0;
 
// And re-enable interrupts
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);
#else
HAL_RESTORE_INTERRUPTS(old);
#endif
}
}
#endif // USE HARDWARE
 
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
 
#endif // #if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0
 
/*---------------------------------------------------------------------------*/
/* End of hal_diag.c */
/v850/v2_0/src/v85x_v850.ld
0,0 → 1,153
//=============================================================================
//
// MLT linker script for NEC
// adapted from packages/hal/arm/pid/v1_1/src/pid.ld
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
 
#include <pkgconf/system.h>
 
STARTUP(vectors.o)
// Enter at reset_vector in non-RAM startups so they are more representative
// of actual execution when loaded over ICE
#ifdef CYG_HAL_STARTUP_RAM
ENTRY(start)
#else
ENTRY(reset_vector)
#endif
#ifdef EXTRAS
INPUT(extras.o)
#endif
#if (__GNUC__ >= 3)
GROUP(libtarget.a libgcc.a libsupc++.a)
#else
GROUP(libtarget.a libgcc.a)
#endif
 
#define ALIGN_LMA 4
#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))
#define LMA_EQ_VMA
#define FORCE_OUTPUT . = .
 
#define SECTIONS_BEGIN \
/* Debug information */ \
.debug_aranges 0 : { *(.debug_aranges) } \
.debug_pubnames 0 : { *(.debug_pubnames) } \
.debug_info 0 : { *(.debug_info) } \
.debug_abbrev 0 : { *(.debug_abbrev) } \
.debug_line 0 : { *(.debug_line) } \
.debug_frame 0 : { *(.debug_frame) } \
.debug_str 0 : { *(.debug_str) } \
.debug_loc 0 : { *(.debug_loc) } \
.debug_macinfo 0 : { *(.debug_macinfo) }
 
#define SECTION_rom_vectors(_region_, _vma_, _lma_) \
.rom_vectors _vma_ : _lma_ \
{ FORCE_OUTPUT; KEEP (*(.vectors)) } \
> _region_
 
#define SECTION_ram_vectors(_region_, _vma_, _lma_) \
.ram_vectors _vma_ : _lma_ \
{ ___ram_vectors_start = ABSOLUTE(.); \
FORCE_OUTPUT; KEEP (*(.ram_vectors)) \
___ram_vectors_end = ABSOLUTE(.); \
} > _region_ \
___ram_vectors_loadaddr = LOADADDR(.ram_vectors);
 
#define SECTION_text(_region_, _vma_, _lma_) \
.text _vma_ : _lma_ \
{ stext = ABSOLUTE(.); \
PROVIDE (__stext = ABSOLUTE(.)); \
*(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) \
*(.glue_7) *(.glue_7t) \
} > _region_ \
etext = .; PROVIDE (__etext = .);
 
#define SECTION_fini(_region_, _vma_, _lma_) \
.fini _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.fini) } \
> _region_
 
#define SECTION_rodata(_region_, _vma_, _lma_) \
.rodata _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.rodata*) } \
> _region_
 
#define SECTION_rodata1(_region_, _vma_, _lma_) \
.rodata1 _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.rodata1) } \
> _region_
 
#define SECTION_fixup(_region_, _vma_, _lma_) \
.fixup _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.fixup) } \
> _region_
 
#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \
.gcc_except_table _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.gcc_except_table) } \
> _region_
 
#define SECTION_data(_region_, _vma_, _lma_) \
.data _vma_ : _lma_ \
{ ___ram_data_start = ABSOLUTE (.); *(.data*) *(.data1); \
_GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \
_GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \
. = ALIGN (4); \
KEEP(*( SORT (.ecos.table.*))) ; \
___CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) ___CTOR_END__ = ABSOLUTE (.); \
___DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) ___DTOR_END__ = ABSOLUTE (.); \
*(.eh_frame) \
*(.dynamic) *(.sdata*) *(.sbss*) } \
> _region_ \
___rom_data_start = LOADADDR (.data); \
___ram_data_end = .; PROVIDE (___ram_data_end = .); _edata = .; PROVIDE (edata = .); \
PROVIDE (___rom_data_end = LOADADDR (.data) + SIZEOF(.data));
 
#define SECTION_bss(_region_, _vma_, _lma_) \
.bss _vma_ : _lma_ \
{ ___bss_start = ABSOLUTE (.); \
*(.scommon) *(.dynbss) *(.bss*) *(COMMON) \
___bss_end = ABSOLUTE (.); } \
> _region_
 
#include <cyg/hal/plf_sections.h>
 
#include <pkgconf/hal_v85x.h>
#include <pkgconf/hal_v85x_v850.h>
#include CYGHWR_MEMORY_LAYOUT_LDI
 
// EOF v85x_v850.ld
/v850/v2_0/src/v850_misc.c
0,0 → 1,150
//==========================================================================
//
// v850_misc.c
//
// HAL CPU variant miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): gthomas
// Contributors: gthomas
// Date: 2000-03-15
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // Base types
#include <cyg/infra/cyg_ass.h> // assertion macros
 
#include <cyg/hal/hal_intr.h>
#include <cyg/hal/v850_common.h>
 
externC void cyg_hal_platform_hardware_init(void);
 
//
// Interrupt management functions
//
 
static volatile unsigned char *interrupt_control_registers[] = {
CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS // Defined in <plf_intr.h>
};
 
#define INT_CONTROL_PENDING 0x80
#define INT_CONTROL_DISABLE 0x40
#define INT_CONTROL_LEVEL(n) n
 
#define INT_CONTROL_DEFAULT INT_CONTROL_DISABLE|INT_CONTROL_LEVEL(7)
 
//
// Mask, i.e. disable, interrupt #vector from occurring
//
void
hal_interrupt_mask(int vector)
{
volatile unsigned char *ctl;
CYG_ASSERT(vector >= CYGNUM_HAL_ISR_MIN, "invalid interrupt vector [< MIN]");
CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX, "invalid interrupt vector [> MAX]");
ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN];
CYG_ASSERT((void *)ctl != 0, "invalid interrupt vector [not defined]");
if (ctl ) {
*ctl |= INT_CONTROL_DISABLE;
}
}
 
//
// Unmask, i.e. enable, interrupt #vector
//
void
hal_interrupt_unmask(int vector)
{
volatile unsigned char *ctl;
CYG_ASSERT(vector >= CYGNUM_HAL_ISR_MIN, "invalid interrupt vector [< MIN]");
CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX, "invalid interrupt vector [> MAX]");
ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN];
CYG_ASSERT((void *)ctl != 0, "invalid interrupt vector [not defined]");
if (ctl ) {
*ctl &= ~INT_CONTROL_DISABLE;
}
}
 
//
// Acknowledge, i.e. clear, interrupt #vector
//
void
hal_interrupt_acknowledge(int vector)
{
volatile unsigned char *ctl;
CYG_ASSERT(vector >= CYGNUM_HAL_ISR_MIN, "invalid interrupt vector [< MIN]");
CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX, "invalid interrupt vector [> MAX]");
ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN];
CYG_ASSERT((void *)ctl != 0, "invalid interrupt vector [not defined]");
if (ctl ) {
*ctl &= ~INT_CONTROL_PENDING;
}
}
 
static void
init_interrupts(void)
{
int i;
volatile unsigned char *ctl;
for (i = CYGNUM_HAL_ISR_MIN; i <= CYGNUM_HAL_ISR_MAX; i++) {
ctl = interrupt_control_registers[i-CYGNUM_HAL_ISR_MIN];
if (ctl) {
*ctl = INT_CONTROL_DEFAULT;
}
}
}
 
//
// Initialize the hardware. This may involve platform specific code.
//
void
cyg_hal_hardware_init(void)
{
init_interrupts();
cyg_hal_platform_hardware_init();
}
 
/*------------------------------------------------------------------------*/
/* End of v850_misc.c */
/ceb_v850/v2_0/cdl/hal_v85x_ceb_v850.cdl
0,0 → 1,365
# ====================================================================
#
# hal_v85x_v850_ceb.cdl
#
# V850/CEB board HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): gthomas, jlarmour
# Original data: bartv, jskov
# Contributors:
# Date: 2000-03-10
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_V85X_V850_CEB {
display "Cosmo CEB-V850 board"
parent CYGPKG_HAL_V85X
requires CYGPKG_HAL_V85X_V850
define_header hal_v85x_v850_ceb.h
include_dir cyg/hal
description "
The CEB-v850 HAL supports the CEB-V850 evaluation board fitted
with a NEC V850/SA1 or NEC V850/SB1."
 
compile plf_misc.c plf_stub.c
 
implements CYGINT_HAL_DEBUG_GDB_STUBS
implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
implements CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0
 
define_proc {
puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_v85x_v850.h>"
puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_v85x_v850_ceb.h>"
 
puts $::cdl_header "#define CYGPRI_KERNEL_TESTS_DHRYSTONE_PASSES 20000"
}
 
cdl_option CYG_HAL_STARTUP {
display "Startup type"
flavor data
legal_values {"RAM" "ROM" "ROMRAM" }
default_value {"RAM"}
no_define
define -file system.h CYG_HAL_STARTUP
description "
When targetting the CEB board it is possible to build
the system for either RAM bootstrap, ROM bootstrap, or ROMRAM
bootstrap. RAM bootstrap generally requires that the board
is equipped with ROMs containing a suitable ROM monitor or
equivalent software that allows GDB to download the eCos
application on to the board. The ROM bootstrap typically
requires that the eCos application be blown into EPROMs or
equivalent technology. ROMRAM bootstrap is similar to ROM
bootstrap, but everything is copied to RAM before execution
starts thus improving performance, but at the cost of an
increased RAM footprint."
}
 
cdl_option CYG_HAL_V85X_STARTUP_FLASH {
display "Build for on-chip FLASH"
active_if {CYG_HAL_STARTUP == "ROM"} || \
{CYG_HAL_STARTUP == "ROMRAM"}
default_value 0
description "
When building for ROM or ROMRAM startup, you can specify
that you actually wish to target the internal FLASH rather
than the external EPROM."
}
 
cdl_component CYGHWR_HAL_V85X_V850_VARIANT {
display "V850 variant"
flavor none
no_define
description "
This component allows you to choose the V850 variant
you have on your board."
 
cdl_option CYGHWR_HAL_V85X_V850_VARIANT_SA1 {
display "SA1"
default_value 1
requires { 0 == CYGHWR_HAL_V85X_V850_VARIANT_SB1 }
implements CYGINT_HAL_V850_VARIANT_SA1
description "
Choose this if you have the V850/SA1."
}
 
cdl_option CYGHWR_HAL_V85X_V850_VARIANT_SB1 {
display "SB1"
default_value 0
requires { 0 == CYGHWR_HAL_V85X_V850_VARIANT_SA1 }
implements CYGINT_HAL_V850_VARIANT_SB1
description "
Choose this if you have the V850/SB1."
}
}
 
cdl_option CYGHWR_HAL_V85X_CPU_FREQ {
display "CPU frequency in Hz"
flavor data
legal_values { 4194304 5000000 8000000 10000000 12580000 16000000 \
17000000 20000000 }
default_value { CYGHWR_HAL_V85X_V850_VARIANT_SA1 ? 17000000 : 16000000 }
description "
This option contains the frequency of the board oscillator
connected to the CPU, in Hertz.
Choose the frequency to match the oscillator on your board.
This may affect thing like serial device, interval clock and
memory access speed settings."
}
 
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
display "Number of communication channels on the board"
flavor data
# calculated { CYGDBG_HAL_V85X_V850_ICE_DIAG ? 2 : 1 }
calculated 1
}
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
display "Debug serial port"
# active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE
flavor data
calculated 0
# description "
# The CEB board has one serial port (channel 0), and a
# communication channel for communicating with an ICE, if support
# has been included (channel 1). This option chooses which port
# will be used to connect to a host running GDB."
}
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
display "Diagnostic serial port"
# active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE
flavor data
calculated 0
# legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
# default_value 0
# description "
# The CEB board has one serial port (channel 0), and a
# communication channel for communicating with an ICE, if support
# has been included (channel 1). This option chooses which port
# will be used for diagnostic output."
}
 
cdl_option CYGHWR_HAL_V85X_V850_DIAG_BAUD {
display "Diagnostic serial port baud rate"
flavor data
legal_values 1200 2400 4800 9600 19200 38400
default_value 38400
description "
This option selects the baud rate used for the diagnostic port."
}
 
# cdl_option CYGDBG_HAL_V85X_V850_ICE_DIAG {
# display "Enable diagnostic output channel via ICE"
# flavor bool
# default_value 0
# parent CYGDBG_HAL_V850_ICE
# description "
# This allows a channel to be made available to output
# diagnostic output via the ICE, talking to a correctly
# configured gdbserv process running on the host.
# To make this channel the default, set
# CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL to channel 1."
# }
 
# Real-time clock/counter specifics
cdl_component CYGNUM_HAL_RTC_CONSTANTS {
display "Real-time clock constants."
flavor none
cdl_option CYGNUM_HAL_RTC_NUMERATOR {
display "Real-time clock numerator"
flavor data
calculated 1000000000
}
cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
display "Real-time clock denominator"
flavor data
calculated 100
}
cdl_option CYGNUM_HAL_RTC_PERIOD {
display "Real-time clock period"
flavor data
calculated { CYGHWR_HAL_V85X_CPU_FREQ / 400 }
}
}
 
cdl_component CYGBLD_GLOBAL_OPTIONS {
display "Global build options"
flavor none
parent CYGPKG_NONE
no_define
description "
Global build options including control over
compiler flags, linker flags and choice of toolchain."
 
 
cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
display "Global command prefix"
flavor data
no_define
default_value { "v850-elf" }
description "
This option specifies the command prefix used when
invoking the build tools."
}
 
cdl_option CYGBLD_GLOBAL_CFLAGS {
display "Global compiler flags"
flavor data
no_define
default_value { "-mv850 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
description "
This option controls the global compiler flags which
are used to compile all packages by
default. Individual packages may define
options which override these global flags."
}
 
cdl_option CYGBLD_GLOBAL_LDFLAGS {
display "Global linker flags"
flavor data
no_define
default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static" }
description "
This option controls the global linker flags. Individual
packages may define options which override these global flags."
}
 
cdl_option CYGBLD_BUILD_GDB_STUBS {
display "Build GDB stub ROM image"
default_value 0
requires { CYG_HAL_STARTUP == "ROM" }
requires CYGSEM_HAL_ROM_MONITOR
requires CYGBLD_BUILD_COMMON_GDB_STUBS
requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
requires ! CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT
requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
no_define
description "
This option enables the building of the GDB stubs for the
board. The common HAL controls takes care of most of the
build process, but the final conversion from ELF image to
binary data is handled by the platform CDL, allowing
relocation of the data if necessary."
 
make -priority 320 {
<PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img
$(OBJCOPY) -O binary $< $@
}
make -priority 320 {
<PREFIX>/bin/gdb_module.sre : <PREFIX>/bin/gdb_module.img
$(OBJCOPY) -O srec $< $@
}
}
}
 
cdl_component CYGHWR_MEMORY_LAYOUT {
display "Memory layout"
flavor data
no_define
calculated { CYG_HAL_STARTUP == "RAM" ? "v85x_v850_ceb_ram" : \
CYG_HAL_STARTUP == "ROM" ? \
CYG_HAL_V85X_STARTUP_FLASH == 0 ? "v85x_v850_ceb_rom" : "v85x_v850_ceb_flash" : \
CYG_HAL_V85X_STARTUP_FLASH == 0 ? "v85x_v850_ceb_romram" : "v85x_v850_ceb_flashromram" }
 
cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
display "Memory layout linker script fragment"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_v85x_v850_ceb_ram.ldi>" : \
CYG_HAL_STARTUP == "ROM" ? \
CYG_HAL_V85X_STARTUP_FLASH == 0 ? "<pkgconf/mlt_v85x_v850_ceb_rom.ldi>" : "<pkgconf/mlt_v85x_v850_ceb_flash.ldi>" : \
CYG_HAL_V85X_STARTUP_FLASH == 0 ? "<pkgconf/mlt_v85x_v850_ceb_romram.ldi>" : "<pkgconf/mlt_v85x_v850_ceb_flashromram.ldi>" }
}
 
cdl_option CYGHWR_MEMORY_LAYOUT_H {
display "Memory layout header file"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_H
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_v85x_v850_ceb_ram.h>" : \
CYG_HAL_STARTUP == "ROM" ? \
CYG_HAL_V85X_STARTUP_FLASH == 0 ? "<pkgconf/mlt_v85x_v850_ceb_rom.h>" : "<pkgconf/mlt_v85x_v850_ceb_flash.h>" : \
CYG_HAL_V85X_STARTUP_FLASH == 0 ? "<pkgconf/mlt_v85x_v850_ceb_romram.h>" : "<pkgconf/mlt_v85x_v850_ceb_flashromram.h>" }
}
}
 
cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
display "Work with a ROM monitor"
flavor booldata
legal_values { "Generic" "GDB_stubs" }
default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
parent CYGPKG_HAL_ROM_MONITOR
requires { CYG_HAL_STARTUP == "RAM" }
description "
Support can be enabled for three different varieties of ROM monitor.
This support changes various eCos semantics such as the encoding
of diagnostic output, or the overriding of hardware interrupt
vectors.
Firstly there is \"Generic\" support which prevents the HAL
from overriding the hardware vectors that it does not use, to
instead allow an installed ROM monitor to handle them. This is
the most basic support which is likely to be common to most
implementations of ROM monitor.
\"GDB_stubs\" provides support when GDB stubs are included in
the ROM monitor or boot ROM."
}
 
cdl_option CYGSEM_HAL_ROM_MONITOR {
display "Behave as a ROM monitor"
flavor bool
default_value 0
parent CYGPKG_HAL_ROM_MONITOR
requires { CYG_HAL_STARTUP == "ROM" }
description "
Enable this option if this program is to be used as a ROM monitor,
i.e. applications will be loaded into RAM on the board, and this
ROM monitor may process exceptions or interrupts generated from the
application. This enables features such as utilizing a separate
interrupt stack when exceptions are generated."
}
}
/ceb_v850/v2_0/include/plf_intr.h
0,0 → 1,67
#ifndef CYGONCE_HAL_PLF_INTR_H
#define CYGONCE_HAL_PLF_INTR_H
 
//==========================================================================
//
// plf_intr.h
//
// NEC/V85x Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jlarmour
// Contributors: jlarmour
// Date: 2001-03-21
// Purpose: Define Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for platforms of the NEC V85x
// architecture.
//
// Usage:
// #include <cyg/hal/plf_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
// Nothing to do here. Handled by default variant code.
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLF_INTR_H
// End of plf_intr.h
/ceb_v850/v2_0/include/plf_stub.h
0,0 → 1,84
#ifndef CYGONCE_HAL_PLF_STUB_H
#define CYGONCE_HAL_PLF_STUB_H
 
//=============================================================================
//
// plf_stub.h
//
// Platform header for GDB stub support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:jskov, gthomas
// Date: 2000-03-10
// Purpose: Platform HAL stub support for NEC/CEB-V850
// Usage: #include <cyg/hal/plf_stub.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM
 
#include <cyg/hal/nec-stub.h> // architecture stub support
 
//----------------------------------------------------------------------------
// Define serial stuff.
externC void cyg_hal_plf_comms_init(void);
 
#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init()
#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud))
#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0
#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT
 
//----------------------------------------------------------------------------
// Stub initializer.
 
extern void hal_plf_stub_init(void);
 
#define HAL_STUB_PLATFORM_INIT() hal_plf_stub_init();
 
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_PLF_STUB_H
// End of plf_stub.h
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_flashromram.h
0,0 → 1,20
// eCos memory layout - Fri Jan 26 09:09:49 2001
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_rom (0)
#define CYGMEM_REGION_rom_SIZE (0x80000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#define CYGMEM_REGION_ram (0xfc0000)
#define CYGMEM_REGION_ram_SIZE (0x3c000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0xffc000 - (size_t) CYG_LABEL_NAME (__heap1))
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_flashromram.ldi
0,0 → 1,28
// eCos memory layout - Fri Jan 26 09:09:49 2001
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
rom : ORIGIN = 0, LENGTH = 0x80000
ram : ORIGIN = 0xfc0000, LENGTH = 0x3c000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (ram, 0xfc0000, AT (0))
SECTION_ram_vectors (ram, ALIGN (0x4), FOLLOWING (.rom_vectors))
SECTION_text (ram, ALIGN (0x4), FOLLOWING (.ram_vectors))
SECTION_fini (ram, ALIGN (0x4), FOLLOWING (.text))
SECTION_rodata (ram, ALIGN (0x4), FOLLOWING (.fini))
SECTION_rodata1 (ram, ALIGN (0x4), FOLLOWING (.rodata))
SECTION_fixup (ram, ALIGN (0x4), FOLLOWING (.rodata1))
SECTION_gcc_except_table (ram, ALIGN (0x4), FOLLOWING (.fixup))
SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table))
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_flash.h
0,0 → 1,20
// eCos memory layout - Fri Jan 26 09:43:36 2001
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_rom (0)
#define CYGMEM_REGION_rom_SIZE (0x80000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#define CYGMEM_REGION_ram (0xfc0000)
#define CYGMEM_REGION_ram_SIZE (0x3c000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0xffc000 - (size_t) CYG_LABEL_NAME (__heap1))
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_rom.h
0,0 → 1,20
// eCos memory layout - Fri Jan 26 09:44:26 2001
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_rom (0x100000)
#define CYGMEM_REGION_rom_SIZE (0x80000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#define CYGMEM_REGION_ram (0xfc0000)
#define CYGMEM_REGION_ram_SIZE (0x3c000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0xffc000 - (size_t) CYG_LABEL_NAME (__heap1))
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_romram.h
0,0 → 1,20
// eCos memory layout - Tue Jan 23 18:50:05 2001
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_rom (0x100000)
#define CYGMEM_REGION_rom_SIZE (0x80000)
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#define CYGMEM_REGION_ram (0xfc0000)
#define CYGMEM_REGION_ram_SIZE (0x3c000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0xffc000 - (size_t) CYG_LABEL_NAME (__heap1))
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_flash.ldi
0,0 → 1,28
// eCos memory layout - Fri Jan 26 09:43:36 2001
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
rom : ORIGIN = 0, LENGTH = 0x80000
ram : ORIGIN = 0xfc0000, LENGTH = 0x3c000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (rom, 0, LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_ram_vectors (ram, 0xfc0000, FOLLOWING (.gcc_except_table))
SECTION_data (ram, ALIGN (0x4), FOLLOWING (.ram_vectors))
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_rom.ldi
0,0 → 1,28
// eCos memory layout - Fri Jan 26 09:44:26 2001
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
rom : ORIGIN = 0x100000, LENGTH = 0x80000
ram : ORIGIN = 0xfc0000, LENGTH = 0x3c000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (rom, 0x100000, LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_ram_vectors (ram, 0xfc0000, FOLLOWING (.gcc_except_table))
SECTION_data (ram, ALIGN (0x4), FOLLOWING (.ram_vectors))
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_romram.ldi
0,0 → 1,28
// eCos memory layout - Tue Jan 23 18:50:05 2001
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
rom : ORIGIN = 0x100000, LENGTH = 0x80000
ram : ORIGIN = 0xfc0000, LENGTH = 0x3c000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (ram, 0xfc0000, AT (0x100000))
SECTION_ram_vectors (ram, ALIGN (0x4), FOLLOWING (.rom_vectors))
SECTION_text (ram, ALIGN (0x4), FOLLOWING (.ram_vectors))
SECTION_fini (ram, ALIGN (0x4), FOLLOWING (.text))
SECTION_rodata (ram, ALIGN (0x4), FOLLOWING (.fini))
SECTION_rodata1 (ram, ALIGN (0x4), FOLLOWING (.rodata))
SECTION_fixup (ram, ALIGN (0x4), FOLLOWING (.rodata1))
SECTION_gcc_except_table (ram, ALIGN (0x4), FOLLOWING (.fixup))
SECTION_data (ram, ALIGN (0x4), FOLLOWING (.gcc_except_table))
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_ram.h
0,0 → 1,22
// eCos memory layout - Fri Jan 26 09:07:19 2001
 
// This is a generated file - do not edit
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
#define CYGMEM_REGION_ram (0xfc0000)
#define CYGMEM_REGION_ram_SIZE (0x3c000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved) [];
#endif
#define CYGMEM_SECTION_reserved (CYG_LABEL_NAME (__reserved))
#define CYGMEM_SECTION_reserved_SIZE (0x4000)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0xffc000 - (size_t) CYG_LABEL_NAME (__heap1))
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_flashromram.mlt
0,0 → 1,14
version 0
region rom 0 80000 1 !
region ram fc0000 3c000 0 !
section rom_vectors 0 1 1 1 1 1 1 1 fc0000 0 ram_vectors ram_vectors !
section ram_vectors 0 4 1 1 0 1 0 1 text text !
section text 0 4 1 1 0 1 0 1 fini fini !
section fini 0 4 1 1 0 1 0 1 rodata rodata !
section rodata 0 4 1 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 4 1 1 0 1 0 1 fixup fixup !
section fixup 0 4 1 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 4 1 1 0 1 0 1 data data !
section data 0 4 1 1 0 1 0 0 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_ram.ldi
0,0 → 1,27
// eCos memory layout - Fri Jan 26 09:07:19 2001
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
MEMORY
{
ram : ORIGIN = 0xfc0000, LENGTH = 0x3c000
}
 
SECTIONS
{
SECTIONS_BEGIN
CYG_LABEL_DEFN(__reserved) = 0xfc0000; . = CYG_LABEL_DEFN(__reserved) + 0x4000;
SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_ram_vectors (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_flash.mlt
0,0 → 1,14
version 0
region rom 0 80000 1 !
region ram fc0000 3c000 0 !
section rom_vectors 0 1 0 1 1 1 1 1 0 0 text text !
section text 0 4 0 1 0 1 0 1 fini fini !
section fini 0 4 0 1 0 1 0 1 rodata rodata !
section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 4 0 1 0 1 0 1 fixup fixup !
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 4 0 1 0 0 0 1 ram_vectors !
section ram_vectors 0 1 1 1 1 1 0 1 fc0000 data data !
section data 0 4 1 1 0 1 0 0 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_rom.mlt
0,0 → 1,14
version 0
region rom 100000 80000 1 !
region ram fc0000 3c000 0 !
section rom_vectors 0 1 0 1 1 1 1 1 100000 100000 text text !
section text 0 4 0 1 0 1 0 1 fini fini !
section fini 0 4 0 1 0 1 0 1 rodata rodata !
section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 4 0 1 0 1 0 1 fixup fixup !
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 4 0 1 0 0 0 1 ram_vectors !
section ram_vectors 0 1 1 1 1 1 0 1 fc0000 data data !
section data 0 4 1 1 0 1 0 0 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_romram.mlt
0,0 → 1,14
version 0
region rom 100000 80000 1 !
region ram fc0000 3c000 0 !
section rom_vectors 0 1 1 1 1 1 1 1 fc0000 100000 ram_vectors ram_vectors !
section ram_vectors 0 4 1 1 0 1 0 1 text text !
section text 0 4 1 1 0 1 0 1 fini fini !
section fini 0 4 1 1 0 1 0 1 rodata rodata !
section rodata 0 4 1 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 4 1 1 0 1 0 1 fixup fixup !
section fixup 0 4 1 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 4 1 1 0 1 0 1 data data !
section data 0 4 1 1 0 1 0 0 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/ceb_v850/v2_0/include/pkgconf/mlt_v85x_v850_ceb_ram.mlt
0,0 → 1,12
version 0
region ram fc0000 3c000 0 !
section reserved 4000 1 0 0 1 1 1 1 fc0000 fc0000 text text !
section text 0 4 0 1 0 1 0 1 fini fini !
section fini 0 4 0 1 0 1 0 1 rodata rodata !
section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 4 0 1 0 1 0 1 fixup fixup !
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 4 0 1 0 1 0 1 data data !
section data 0 4 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/ceb_v850/v2_0/include/plf_cache.h
0,0 → 1,66
#ifndef CYGONCE_PLF_CACHE_H
#define CYGONCE_PLF_CACHE_H
 
//=============================================================================
//
// plf_cache.h
//
// HAL cache control API
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg,jlarmour
// Date: 2001-03-21
// Purpose: Cache control API
// Description: The macros defined here provide the HAL APIs for handling
// cache control operations.
// Usage:
// #include <cyg/hal/plf_cache.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
// Nothing to do here
 
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_PLF_CACHE_H
// End of plf_cache.h
 
/ceb_v850/v2_0/include/hal_diag.h
0,0 → 1,67
#ifndef CYGONCE_HAL_HAL_DIAG_H
#define CYGONCE_HAL_HAL_DIAG_H
 
/*=============================================================================
//
// hal_diag.h
//
// HAL Support for Kernel Diagnostic Routines
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, gthomas,jlarmour
// Date: 2001-03-21
// Purpose: HAL Support for Kernel Diagnostic Routines
// Description: Diagnostic routines for use during kernel development.
// Usage: #include <cyg/hal/hal_diag.h>
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
/*---------------------------------------------------------------------------*/
 
#include <cyg/hal/hal_if.h>
 
#define HAL_DIAG_INIT() hal_if_diag_init()
#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_)
#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_)
 
/*---------------------------------------------------------------------------*/
/* end of hal_diag.h */
#endif /* CYGONCE_HAL_HAL_DIAG_H */
/ceb_v850/v2_0/include/hal_platform_setup.h
0,0 → 1,190
#ifndef CYGONCE_HAL_PLATFORM_SETUP_H
#define CYGONCE_HAL_PLATFORM_SETUP_H
 
/*=============================================================================
//
// hal_platform_setup.h
//
// Platform specific support for HAL (assembly code)
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): gthomas
// Contributors: gthomas, jlarmour
// Date: 2000-03-10
// Purpose: NEC CEB/V850 platform specific support routines
// Description:
// Usage: #include <cyg/hal/hal_platform_setup.h>
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/system.h> // System-wide configuration info
#include <pkgconf/hal.h> // Architecture independent configuration
#include <cyg/hal/v850_common.h>
#include CYGBLD_HAL_PLATFORM_H // Platform specific configuration
 
.macro lea addr,reg
movhi hi(\addr),r0,\reg
movea lo(\addr),\reg,\reg
.endm
.macro PLATFORM_SETUP1
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
movhi hi(V850_REGS),r0,r6
 
// set bus control signals
mov 0x01,r1
st.b r1,lo(V850_REG_SYC)[r6]
 
// Internal RAM, internal ROM and I/O - no wait states, regardless
// of the setting of DWC
// External RAM is 70ns, External ROM is 120ns. Therefore...
#if CYGHWR_HAL_V85X_CPU_FREQ < 14285714
// External RAM - 0 wait states
movea 0x3F00,r0,r1
#elif CYGHWR_HAL_V85X_CPU_FREQ < 28571428
// External RAM - 1 wait state
movea 0x7F00,r0,r1
#elif CYGHWR_HAL_V85X_CPU_FREQ < 42857142
// External RAM - 2 wait states
movea 0xBF00,r0,r1
#else
// External RAM - 3 wait states
movea 0xFF00,r0,r1
#endif
#if CYGHWR_HAL_V85X_CPU_FREQ < 8333333
// External ROM - 0 wait states
ori 0x00FC,r1,r1
#elif CYGHWR_HAL_V85X_CPU_FREQ < 16666667
// External ROM - 1 wait states
ori 0x00FD,r1,r1
#elif CYGHWR_HAL_V85X_CPU_FREQ < 25000000
// External ROM - 2 wait states
ori 0x00FE,r1,r1
#else
// External ROM - 3 wait states
ori 0x00FF,r1,r1
#endif
st.h r1,lo(V850_REG_DWC)[r6]
 
// Internal RAM, ROM, I/O - always 0 idle regardless of the setting
// of BCC
// External RAM - 0 idle
// External ROM - 0 idle
movea 0x2AA8,r0,r1
st.h r1,lo(V850_REG_BCC)[r6]
 
// No INTs on rising edge
mov 0x00,r1
st.b r1,lo(V850_REG_EGP0)[r6]
 
// enable INTP0 (serial) IRQ only, set for falling edge
mov 0x01,r1
st.b r1,lo(V850_REG_EGN0)[r6]
 
// Port 1 mode: set serial DSR, RXD and CTS as inputs, and others
// as outputs
movea 0x2C,r0,r1
st.b r1,lo(V850_REG_PM1)[r6]
 
// Port 3 mode: SW2 read port: set to all input
movea 0xFF,r0,r1
st.b r1,lo(V850_REG_PM3)[r6]
 
// Set serial port control inputs (DSR, RXD, CTS) to 1
// FIXME Why? Also I don't get why the top two bits are set.
movea 0xEC,r0,r1
st.b r1,lo(V850_REG_P1)[r6]
 
// Enable all outputs for 7-segment LED
mov 0x00,r1
st.b r1,lo(V850_REG_PM10)[r6]
 
// Set LED to 0
mov 0x00,r1
st.b r1,lo(V850_REG_P10)[r6]
 
// Init serial port 0 baud rate to divide clock down to 9600 baud
// by setting baud count here
// This may seem unnecessary, but setting up the serial allows
// us to do diag output before HAL diag is initialized. The values
// are clock dependent however, but this is only for debug so we
// don't care.
movea 0xDD,r0,r1
st.b r1,lo(V850_REG_BRGC0)[r6]
 
// and divisor here
mov 0x03,r1
st.b r1,lo(V850_REG_BRGMC00)[r6]
 
// set serial 0 to enable tx/rx and 8-N-1
movea 0xC8,r0,r1
st.b r1,lo(V850_REG_ASIM0)[r6]
 
// disable reception of serial interrupts, and set serial interrupt
// priority to level 7 (lowest)
movea 0x47,r0,r1
st.b r1,lo(V850_REG_STIC0)[r6]
 
// Memory expansion mode - set to 4MB
// We could probably set this to 256K (MM==0x4), but there seems
// no advantage
mov 0x07,r1
st.b r1,lo(V850_REG_MM)[r6]
 
// Setting the PCC register is tricky - it is a "specific register"
// We set the CPU clock to full speed
stsr PSW,r7
ori CYGARC_PSW_NP,r7,r8
ldsr r8,PSW
mov 0x00,r1
st.b r1,lo(V850_REG_PRCMD)[r6]
st.b r1,lo(V850_REG_PCC)[r6]
ldsr r7,PSW
nop
nop
nop
nop
nop
#endif
.endm
 
/*---------------------------------------------------------------------------*/
/* end of hal_platform_setup.h */
#endif /* CYGONCE_HAL_PLATFORM_SETUP_H */
/ceb_v850/v2_0/include/plf_io.h
0,0 → 1,63
#ifndef CYGONCE_PLF_IO_H
#define CYGONCE_PLF_IO_H
 
//=============================================================================
//
// plf_io.h
//
// Platform specific IO support
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jlarmour
// Contributors:
// Date: 2001-01-12
// Purpose: NEC platform specific IO support, e.g. for PCI support
// Description:
// Usage: #include <cyg/hal/hal_io.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
//-----------------------------------------------------------------------------
 
// Nothing yet
 
//-----------------------------------------------------------------------------
// end of plf_io.h
#endif // CYGONCE_PLF_IO_H
/ceb_v850/v2_0/include/plf_sections.h
0,0 → 1,73
//==========================================================================
//
// plf_sections.h
//
// V85x layout definitions - hardwired sections
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): gthomas
// Contributors: gthomas, jlarmour
// Date: 2000-05-24
// Purpose: Hardwired layout definitions
// Description: Used only in linker scripts
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
 
#if CYGINT_HAL_V850_VARIANT_SA1
 
#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \
PROVIDE(_hal_vsr_table = 0x00FC0260); \
PROVIDE(__allow_nmi = 0x00FC02F8); \
PROVIDE(_hal_virtual_vector_table = 0x00FC0300);
 
#elif CYGINT_HAL_V850_VARIANT_SB1
 
#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \
PROVIDE(_hal_vsr_table = 0x00FC0340); \
PROVIDE(__allow_nmi = 0x00FC0410); \
PROVIDE(_hal_virtual_vector_table = 0x00FC0440);
 
#else
# error No v850 variant defined
#endif
 
// EOF plf_sections.h
/ceb_v850/v2_0/ChangeLog
0,0 → 1,280
2003-04-10 Nick Garnett <nickg@balti.calivar.com>
 
* include/pkgconf/mlt_v85x_v850_ceb_ram.ldi:
Added SECTION_ram_vectors().
 
2002-05-28 Jonathan Larmour <jlarmour@redhat.com>
 
* include/hal_platform_setup.h: Correctly calculate wait states based
on external RAM/ROM timing.
 
2002-04-24 Jesper Skov <jskov@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl: CYGPRI_KERNEL_TESTS_DHRYSTONE_PASSES
defined.
 
2001-10-25 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl (CYGBLD_GLOBAL_CFLAGS): Always use
-mv850 just in case we're using tools that don't do that by default.
 
2001-06-18 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl (CYGHWR_MEMORY_LAYOUT_H): Fix name for
flash startup.
* include/pkgconf/mlt_v85x_v850_ceb_flash.h:
* include/pkgconf/mlt_v85x_v850_ceb_flash.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_flash.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_flashromram.h:
* include/pkgconf/mlt_v85x_v850_ceb_flashromram.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_flashromram.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_ram.h:
* include/pkgconf/mlt_v85x_v850_ceb_ram.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_ram.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_rom.h:
* include/pkgconf/mlt_v85x_v850_ceb_rom.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_rom.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_romram.h:
* include/pkgconf/mlt_v85x_v850_ceb_romram.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_romram.mlt:
Resize RAM to 0x3c000 long (i.e. top of RAM is 0xffc000).
This avoids problems with variable sizes of internal RAM.
 
2001-05-21 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl: Change tools back to v850-elf now.
 
2001-05-09 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl: Change default tools to v850e-elf, and
compile with -mv850 flag
 
2001-04-24 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl: Embryonic attempt at diag output via
ICE failed, but checked in for posterity anyway.
* src/v850flash.S: Use standard Cosmo flash image
* images/v850flash.img: Regenerate
* images/v850flash.hex: Regenerate
* images/v850sa1/gdb_module.*: Regenerate
* images/v850sb1/16mhz/gdb_module.*: Regenerate
* images/v850sb1/8mhz/gdb_module.*: Regenerate
 
2001-03-21 Jonathan Larmour <jlarmour@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl: Support choice between V850/SA1 and
V850/SB1, and adjust descriptions accordingly.
Support ROMRAM startup.
Support booting from FLASH.
Use generic V850 diag driver.
Allow setting of CPU frequency.
Add extra baud rates.
Build SREC GDB stub images as well as binary images.
 
* include/hal_diag.h: We only support virtual vectors now.
 
* include/hal_platform_setup.h: Comment better.
Support different wait states for different CPU speeds.
 
* include/plf_cache.h: Just empty now - defaults are in variant HAL.
* include/plf_intr.h: Ditto.
* include/plf_io.h: Ditto.
* include/plf_sections.h: Support V850/SB1 differences, and
add __allow_nmi as per recent arch HAL vectors.S change.
 
* src/plf_misc.c: Update register names with new versions defined
in variant HAL.
 
* src/plf_stub.c: Remove unnecessary includes. Add some comments.
* include/v850_regs.h: Remove. Content moved to v850 HAL.
 
* src/hal_diag.c: Remove. Consolidated into v850 HAL.
 
* src/v850flash.S: Sample image to program into flash for EPROM
startup.
 
* include/pkgconf/mlt_v85x_v850_ceb_flash.h:
* include/pkgconf/mlt_v85x_v850_ceb_flash.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_flash.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_flashromram.h:
* include/pkgconf/mlt_v85x_v850_ceb_flashromram.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_flashromram.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_romram.h:
* include/pkgconf/mlt_v85x_v850_ceb_romram.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_romram.mlt:
Create.
 
* include/pkgconf/mlt_v85x_v850_ceb_ram.h:
* include/pkgconf/mlt_v85x_v850_ceb_ram.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_ram.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_rom.h:
* include/pkgconf/mlt_v85x_v850_ceb_rom.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_rom.mlt:
Support new ram_vectors section, and fix ram region size (don't
allow the use of I/O space).
 
2001-03-08 Jesper Skov <jskov@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl: Removed
CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_GUARANTEED which is now the
default.
 
2001-02-08 Jesper Skov <jskov@redhat.com>
 
* src/hal_diag.c: Replace CYGSEM_HAL_DIAG_MANGLER_None with
CYGDBG_HAL_DIAG_TO_DEBUG_CHAN.
 
2001-01-31 Jesper Skov <jskov@redhat.com>
 
* src/hal_diag.c: Replaced CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL
with CYGSEM_HAL_DIAG_MANGLER_None
* cdl/hal_v85x_ceb_v850.cdl: Same.
* src/hal_diag.c: Get rid of CYGPRI_HAL_IMPLEMENTS_IF_SERVICES
checks.
 
2001-01-26 Jonathan Larmour <jlarmour@redhat.com>
 
* include/plf_stub.h (HAL_STUB_PLATFORM_RESET): Move to arch HAL
hal_intr.h
(HAL_STUB_PLATFORM_RESET_ENTRY): Ditto
 
2000-10-20 Jonathan Larmour <jlarmour@redhat.com>
 
* include/pkgconf/mlt_v85x_v850_ceb_ram.mlt:
* include/pkgconf/mlt_v85x_v850_ceb_rom.mlt:
Add heap1 section
 
* include/pkgconf/mlt_v85x_v850_ceb_ram.h:
* include/pkgconf/mlt_v85x_v850_ceb_rom.h:
* include/pkgconf/mlt_v85x_v850_ceb_ram.ldi:
* include/pkgconf/mlt_v85x_v850_ceb_rom.ldi:
Regenerated
 
2000-06-30 Jesper Skov <jskov@redhat.com>
 
* src/hal_diag.c: calling i/f macro changes.
 
2000-06-27 Jesper Skov <jskov@redhat.com>
 
* src/plf_misc.c: Fix compiler warnings.
 
* src/plf_stub.c:
* src/hal_diag.c:
* include/plf_stub.h:
* include/plf_intr.h:
* include/hal_diag.h:
Moved Ctrl-c handling to driver code. Use new comms procs
semantics.
 
2000-06-17 Gary Thomas <gthomas@redhat.com>
 
* include/plf_intr.h:
* include/plf_stub.h:
* include/hal_diag.h:
* include/plf_sections.h:
* src/hal_diag.c:
* src/plf_stub.c:
* src/plf_misc.c:
* cdl/hal_v85x_ceb_v850.cdl: Support new virtual vector ROM mode.
 
2000-05-25 John Dallaway <jld@redhat.com>
 
* cdl/hal_v85x_ceb_v850.cdl: Tidy display strings.
 
2000-05-25 Gary Thomas <gthomas@redhat.com>
 
* include/plf_intr.h: Interrupt mappings now are in this file.
 
2000-05-24 Gary Thomas <gthomas@redhat.com>
 
* include/plf_sections.h:
* include/v850_regs.h: New file(s).
 
2000-05-03 Gary Thomas <gthomas@redhat.com>
 
* src/hal_diag.c (hal_diag_write_char): Work around which fixes ^C
handling - GCC function __builtin_return_address() doesn't work.
 
2000-04-25 John Dallaway <jld@cygnus.co.uk>
 
* cdl/hal_nec_ceb_v850.cdl: Parent this package under the
V85X architecture package.
 
2000-04-14 Gary Thomas <gthomas@redhat.com>
 
* src/plf_stub.c (hal_plf_stub_init): Use watchdog timer to
emulate a breakpoint since this hardware doesn't have one.
 
2000-04-11 Gary Thomas <gthomas@redhat.com>
 
* src/plf_stub.c (hal_plf_get_char): Use LED for "interesting"
display during GDB I/O.
 
* src/hal_diag.c (hal_diag_write_char): Disable interrupts
while sending character - necessary because there is no way to
determine that a character has been sent other than to see that
there is an interrupt pending.
 
* cdl/hal_nec_ceb_v850.cdl: Add implementation of "GDB protocol
suppressed" functionality.
 
2000-03-30 Gary Thomas <gthomas@redhat.com>
 
* src/hal_diag.c (hal_diag_write_char): GDB break support only
present if GDB stubs in place.
 
2000-03-27 Gary Thomas <gthomas@redhat.com>
 
* src/plf_stub.c:
* include/plf_stub.h: Adding GDB break support.
 
* include/plf_intr.h: Remove garbage left over from cut&paste.
 
* include/plf_cache.h: Add missing INVALIDATE macros.
 
2000-03-21 Gary Thomas <gthomas@redhat.com>
 
* src/hal_diag.c: Remove ROM startup messages.
 
* include/pkgconf/mlt_nec_v850_ceb_rom.mlt:
* include/pkgconf/mlt_nec_v850_ceb_rom.ldi:
* include/pkgconf/mlt_nec_v850_ceb_rom.h: Use proper RAM layout.
 
* include/plf_stub.h (HAL_STUB_PLATFORM_RESET): Add board reset.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
/ceb_v850/v2_0/src/plf_stub.c
0,0 → 1,75
//=============================================================================
//
// plf_stub.c
//
// Platform specific code for GDB stub support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg, jskov (based on the old tx39 hal_stub.c)
// Contributors:nickg, jskov, gthomas
// Date: 2000-03-10
// Purpose: Platform specific code for GDB stub support.
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/hal/hal_stub.h>
#include <cyg/hal/v850_common.h>
 
//-----------------------------------------------------------------------------
// Stub init
 
void hal_plf_stub_init(void)
{
// Set up watchdog timer since we have to use it to emulate a breakpoint
volatile unsigned char *wdcs = (volatile unsigned char *)V850_REG_WDCS;
volatile unsigned char *wdtm = (volatile unsigned char *)V850_REG_WDTM;
 
*wdcs = 0x07; // lowest possible overhead - 246.7ms for 17MHz V850/SA1
// 209.7ms for 20MHz SB1
*wdtm = 0x90; // Start watchdog
}
 
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
//-----------------------------------------------------------------------------
// End of plf_stub.c
/ceb_v850/v2_0/src/v850flash.S
0,0 → 1,78
/*=============================================================================
//
// v850flash.S
//
// CEB v850 flash boot code
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jlarmour
// Contributors:
// Date: 2001-03-21
// Purpose: Loader image to program into V850 internal flash to allow
// programming of eCos ROM startup applications into the EPROM.
// Description: Compile with:
// v850-elf-gcc -o v850flash.img v850flash.S -Ttext=0 -nostartfiles
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
.text
.org 0
.globl _start // dummy _start to keep linker happy
_start:
mov 7,r1
st.b r1,0xFFFFF04C[r0]
mov 1,r1
st.b r1,0xFFFFF064[r0]
 
jr 0x0FFFF4 // jump to 0x100000
jr 0x0FFFF2 // jump to 0x100002
.org 0x20
.rept 0x3E
jr 0xFFFC0000 // jump to symmetric location in RAM
nop
nop
nop
nop
nop
nop
.endr
 
// EOF v850flash.S
/ceb_v850/v2_0/src/plf_misc.c
0,0 → 1,330
//==========================================================================
//
// plf_misc.c
//
// HAL platform miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, gthomas, jlarmour
// Date: 2000-03-10
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // Base types
#include <cyg/infra/cyg_trac.h> // tracing macros
#include <cyg/infra/cyg_ass.h> // assertion macros
 
#include <cyg/hal/hal_arch.h> // architectural definitions
 
#include <cyg/hal/hal_intr.h> // Interrupt handling
#include <cyg/hal/v850_common.h> // Hardware definitions
 
#include <cyg/hal/hal_if.h> // ROM monitor interfaces
 
#include <cyg/infra/diag.h> // diag_printf
 
extern void show_hex4(unsigned long val);
extern void show_hex1(unsigned long val);
extern void show_8bit_reg(void *addr);
extern void show_led(int p);
 
void
cyg_hal_platform_hardware_init(void)
{
hal_if_init(); // Initialize GDB[ROM]/eCos interfaces
show_led(' ');
show_led(' ');
}
 
void
show_hex4(unsigned long val)
{
show_hex1(val>>24);
show_hex1(val>>16);
show_hex1(val>>8);
show_hex1(val);
}
 
void
show_hex1(unsigned long val)
{
static char *hex = "0123456789ABCDEF";
show_led(hex[(val & 0xF0) >> 4]);
show_led(hex[val & 0x0F]);
}
 
void
show_8bit_reg(void *addr)
{
unsigned char *reg = (unsigned char *)addr;
unsigned char val = *reg;
show_led(' ');
show_hex4((unsigned long)reg);
show_led('=');
show_hex1((unsigned long)val);
show_led('/');
}
 
#define SEG_0 0x00
#define SEG_A 0x01
#define SEG_B 0x02
#define SEG_C 0x04
#define SEG_D 0x08
#define SEG_E 0x10
#define SEG_F 0x20
#define SEG_G 0x40
#define SEG_H 0x80
#define LED(a,b,c,d,e,f,g,h) SEG_##a|SEG_##b|SEG_##c|SEG_##d|SEG_##e|SEG_##f|SEG_##g|SEG_##h
 
static unsigned char led_bits[] = {
LED(H,0,0,0,0,0,0,0), // 0x20
0x30, // 0x21 !
0x00, // 0x22 @
0x00, // 0x23
0x00, // 0x24
0x00, // 0x25
0x00, // 0x26
0x00, // 0x27
0x00, // 0x28
0x00, // 0x29
0x00, // 0x2A
0x00, // 0x2B
0x00, // 0x2C
0x00, // 0x2D
0x00, // 0x2E
LED(E,G,B,0,0,0,0,0), // 0x2F
LED(A,B,C,D,E,F,0,0), // 0x30
LED(0,B,C,0,0,0,0,0), // 0x31
LED(A,B,G,E,D,0,0,0), // 0x32
LED(A,B,G,C,D,0,0,0), // 0x33
LED(F,G,B,C,0,0,0,0), // 0x34
LED(A,F,G,C,D,0,0,0), // 0x35
LED(A,F,G,C,D,E,0,0), // 0x36
LED(A,B,C,0,0,0,0,0), // 0x37
LED(A,B,C,D,E,F,G,0), // 0x38
LED(A,F,G,B,C,0,0,0), // 0x39
LED(0,0,0,0,0,0,0,0), // 0x3A
LED(0,0,0,0,0,0,0,0), // 0x3B
LED(0,0,0,0,0,0,0,0), // 0x3C
LED(D,G,0,0,0,0,0,0), // 0x3D - =
LED(0,0,0,0,0,0,0,0), // 0x3E
LED(0,0,0,0,0,0,0,0), // 0x3F
LED(0,0,0,0,0,0,0,0), // 0x40
LED(A,F,G,B,E,C,0,0), // 0x41 - A
LED(F,G,E,D,C,0,0,0), // 0x42 - B
LED(A,F,E,D,0,0,0,0), // 0x43 - C
LED(B,G,E,D,C,0,0,0), // 0x44 - D
LED(A,F,G,E,D,0,0,0), // 0x45 - E
LED(A,F,G,E,0,0,0,0), // 0x46 - F
LED(0,0,0,0,0,0,0,0), // 0x47
LED(0,0,0,0,0,0,0,0), // 0x48
LED(0,0,0,0,0,0,0,0), // 0x49
LED(0,0,0,0,0,0,0,0), // 0x4A
LED(0,0,0,0,0,0,0,0), // 0x4B
LED(0,0,0,0,0,0,0,0), // 0x4C
LED(0,0,0,0,0,0,0,0), // 0x4D
LED(0,0,0,0,0,0,0,0), // 0x4E
LED(0,0,0,0,0,0,0,0), // 0x4F
LED(0,0,0,0,0,0,0,0), // 0x50
LED(0,0,0,0,0,0,0,0), // 0x51
LED(0,0,0,0,0,0,0,0), // 0x52
LED(0,0,0,0,0,0,0,0), // 0x53
LED(0,0,0,0,0,0,0,0), // 0x54
LED(0,0,0,0,0,0,0,0), // 0x55
LED(0,0,0,0,0,0,0,0), // 0x56
LED(0,0,0,0,0,0,0,0), // 0x57
LED(0,0,0,0,0,0,0,0), // 0x58
LED(0,0,0,0,0,0,0,0), // 0x59
LED(0,0,0,0,0,0,0,0), // 0x5A
LED(0,0,0,0,0,0,0,0), // 0x5B
LED(0,0,0,0,0,0,0,0), // 0x5C
LED(0,0,0,0,0,0,0,0), // 0x5D
LED(0,0,0,0,0,0,0,0), // 0x5E
LED(0,0,0,0,0,0,0,0), // 0x5F
LED(0,0,0,0,0,0,0,0), // 0x60
LED(0,0,0,0,0,0,0,0), // 0x61
LED(0,0,0,0,0,0,0,0), // 0x62
LED(0,0,0,0,0,0,0,0), // 0x63
LED(0,0,0,0,0,0,0,0), // 0x64
LED(0,0,0,0,0,0,0,0), // 0x65
LED(0,0,0,0,0,0,0,0), // 0x66
LED(0,0,0,0,0,0,0,0), // 0x67
LED(0,0,0,0,0,0,0,0), // 0x68
LED(0,0,0,0,0,0,0,0), // 0x69
LED(0,0,0,0,0,0,0,0), // 0x6A
LED(0,0,0,0,0,0,0,0), // 0x6B
LED(0,0,0,0,0,0,0,0), // 0x6C
LED(0,0,0,0,0,0,0,0), // 0x6D
LED(0,0,0,0,0,0,0,0), // 0x6E
LED(0,0,0,0,0,0,0,0), // 0x6F
LED(0,0,0,0,0,0,0,0), // 0x70
LED(0,0,0,0,0,0,0,0), // 0x71
LED(0,0,0,0,0,0,0,0), // 0x72
LED(0,0,0,0,0,0,0,0), // 0x73
LED(0,0,0,0,0,0,0,0), // 0x74
LED(0,0,0,0,0,0,0,0), // 0x75
LED(0,0,0,0,0,0,0,0), // 0x76
LED(0,0,0,0,0,0,0,0), // 0x77
LED(0,0,0,0,0,0,0,0), // 0x78
LED(0,0,0,0,0,0,0,0), // 0x79
LED(0,0,0,0,0,0,0,0), // 0x7A
LED(0,0,0,0,0,0,0,0), // 0x7B
LED(0,0,0,0,0,0,0,0), // 0x7C
LED(0,0,0,0,0,0,0,0), // 0x7D
LED(A,0,0,0,0,0,0,0), // 0x7E - ~
LED(0,0,0,0,0,0,0,0), // 0x7F
};
 
#define DELAY 10000
 
void
show_led(int p)
{
volatile unsigned char *led = (volatile unsigned char *)0xFFFFF014;
int j;
for (j = 0; j < DELAY; j++) {
*led = led_bits[p-0x20];
}
for (j = 0; j < DELAY*3; j++) {
*led = 0;
}
}
 
void
FAIL(char *m)
{
static char *fail_reason;
fail_reason = m;
#if 0
while (1) {
show_led('~');
show_hex4(m);
show_led('/');
}
#else
diag_printf("FAIL: %s\n", m);
#endif
}
 
void
ALERT(char *m)
{
static char *alert_reason;
alert_reason = m;
#if 0
show_led('~');
show_led('~');
show_hex4(m);
show_led('/');
#else
diag_printf("ALERT: %s\n", m);
#endif
}
 
//
// Clock support, using 16 bit timer TM1
//
 
CYG_WORD32 cyg_hal_clock_period;
 
void
hal_clock_initialize(cyg_int32 period)
{
volatile unsigned char *tmc = (volatile unsigned char *)V850_REG_TMC1;
volatile unsigned char *crc = (volatile unsigned char *)V850_REG_CRC1;
volatile unsigned char *prm = (volatile unsigned char *)V850_REG_PRM10;
volatile unsigned short *cmp0 = (volatile unsigned short *)V850_REG_CR10;
volatile unsigned short *cmp1 = (volatile unsigned short *)V850_REG_CR11;
*tmc = 0x00; // Halt timer
*crc = 0x00; // Select simple compare mode
*prm = 0x01; // System clock / 4
*cmp0 = period;
*cmp1 = period;
*tmc = 0x0C; // Continuous, reset mode (interval timer)
cyg_hal_clock_period = period;
}
 
void
hal_clock_reset(int vector, cyg_uint32 period)
{
hal_clock_initialize(period);
}
 
//
// Return the number of clock "ticks" since last interrupt
//
cyg_uint32 hal_clock_read(void)
{
volatile unsigned short *timer = (volatile unsigned short *)V850_REG_TM1;
return (cyg_uint32)*timer;
}
 
 
extern void _hal_thread_load_context(HAL_SavedRegisters **to)
CYGBLD_ATTRIB_NORET;
extern void _hal_thread_switch_context(HAL_SavedRegisters **to, HAL_SavedRegisters **from);
 
void hal_thread_load_context(CYG_ADDRESS to)
{
HAL_SavedRegisters **new_context = (HAL_SavedRegisters **)to;
#if 0
diag_printf("Load context: %x\n", *new_context);
show_regs(*new_context);
#endif
_hal_thread_load_context(new_context);
}
 
void hal_thread_switch_context(CYG_ADDRESS to, CYG_ADDRESS from)
{
HAL_SavedRegisters **old_context = (HAL_SavedRegisters **)from;
HAL_SavedRegisters **new_context = (HAL_SavedRegisters **)to;
#if 0
diag_printf("Switch context - old: %x, new: %x\n", *old_context, *new_context);
show_regs(*new_context);
#endif
_hal_thread_switch_context(new_context, old_context);
}
 
/arch/v2_0/cdl/hal_v85x.cdl
0,0 → 1,107
# ====================================================================
#
# hal_v85x.cdl
#
# NEC architectural HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): gthomas
# Contributors: jlarmour
# Date: 2001-03-21
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_V85X {
display "NEC V85x architecture"
parent CYGPKG_HAL
hardware
include_dir cyg/hal
define_header hal_v85x.h
description "
The NEC V85x architecture HAL package provides generic support
for this processor architecture. It is also necessary to
select a CPU variant and a specific target platform HAL
package."
 
cdl_interface CYGINT_HAL_V85X_VARIANT {
display "Number of variant implementations in this configuration"
no_define
requires 1 == CYGINT_HAL_V85X_VARIANT
}
 
compile hal_misc.c
 
make -priority 1 {
<PREFIX>/include/cyg/hal/nec_offsets.inc : <PACKAGE>/src/hal_mk_defs.c
$(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,nec_offsets.tmp -o hal_mk_defs.tmp -S $<
fgrep .equ hal_mk_defs.tmp | sed s/#// > $@
@echo $@ ": \\" > $(notdir $@).deps
@tail +2 nec_offsets.tmp >> $(notdir $@).deps
@echo >> $(notdir $@).deps
@rm nec_offsets.tmp hal_mk_defs.tmp
}
 
make {
<PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.S
$(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $<
@echo $@ ": \\" > $(notdir $@).deps
@tail +2 vectors.tmp >> $(notdir $@).deps
@echo >> $(notdir $@).deps
@rm vectors.tmp
}
 
cdl_option CYGSEM_HAL_V85X_INLINE_INTERRUPT_FUNCTIONS {
display "In-line interrupt functions"
flavor bool
default_value 1
description "
This option allows for the HAL interrupt functions,
e.g. HAL_ENABLE_INTERRUPTS() to be coded as either in-line
assembly code or real functions. The primary motivations
for the latter would be debugging, tracing, etc."
}
 
cdl_interface CYGINT_HAL_V85X_ICE_DEBUG {
display "Debugging via ICE support"
description "
This interface is enabled when the underlying variant or platform
supports ICE debugging."
}
}
/arch/v2_0/include/hal_io.h
0,0 → 1,147
#ifndef CYGONCE_HAL_HAL_IO_H
#define CYGONCE_HAL_HAL_IO_H
 
//=============================================================================
//
// hal_io.h
//
// HAL device IO register support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg
// Date: 1998-02-17
// Purpose: Define IO register support
// Description: The macros defined here provide the HAL APIs for handling
// device IO control registers.
//
// Usage:
// #include <cyg/hal/hal_io.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <cyg/infra/cyg_type.h>
 
#include <cyg/hal/plf_io.h>
 
//-----------------------------------------------------------------------------
// IO Register address.
// This type is for recording the address of an IO register.
 
typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
 
//-----------------------------------------------------------------------------
// BYTE Register access.
// Individual and vectorized access to 8 bit registers.
 
#define HAL_READ_UINT8( _register_, _value_ ) \
((_value_) = *((volatile CYG_BYTE *)(_register_)))
 
#define HAL_WRITE_UINT8( _register_, _value_ ) \
(*((volatile CYG_BYTE *)(_register_)) = (_value_))
 
#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
}
 
#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
}
 
 
//-----------------------------------------------------------------------------
// 16 bit access.
// Individual and vectorized access to 16 bit registers.
#define HAL_READ_UINT16( _register_, _value_ ) \
((_value_) = *((volatile CYG_WORD16 *)(_register_)))
 
#define HAL_WRITE_UINT16( _register_, _value_ ) \
(*((volatile CYG_WORD16 *)(_register_)) = (_value_))
 
#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
}
 
#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
}
 
//-----------------------------------------------------------------------------
// 32 bit access.
// Individual and vectorized access to 32 bit registers.
#define HAL_READ_UINT32( _register_, _value_ ) \
((_value_) = *((volatile CYG_WORD32 *)(_register_)))
 
#define HAL_WRITE_UINT32( _register_, _value_ ) \
(*((volatile CYG_WORD32 *)(_register_)) = (_value_))
 
#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
}
 
#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
}
 
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_HAL_IO_H
// End of hal_io.h
/arch/v2_0/include/basetype.h
0,0 → 1,73
#ifndef CYGONCE_HAL_BASETYPE_H
#define CYGONCE_HAL_BASETYPE_H
 
//=============================================================================
//
// basetype.h
//
// Standard types for this architecture.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, gthomas, jlarmour
// Date: 2001-03-21
// Purpose: Define architecture base types.
// Usage: Included by <cyg/infra/cyg_types.h>, do not use directly
//
//####DESCRIPTIONEND####
//
 
//-----------------------------------------------------------------------------
// Characterize the architecture
 
#define CYG_BYTEORDER CYG_LSBFIRST // Little endian
 
//-----------------------------------------------------------------------------
// NEC usually uses labels with undersores.
 
#define CYG_LABEL_DEFN(_name_) _##_name_
 
//-----------------------------------------------------------------------------
// Define the standard variable sizes
 
// The NEC architecture uses the default definitions of the base types,
// so we do not need to define any here.
 
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_BASETYPE_H
// End of basetype.h
/arch/v2_0/include/hal_intr.h
0,0 → 1,284
#ifndef CYGONCE_HAL_HAL_INTR_H
#define CYGONCE_HAL_HAL_INTR_H
 
//==========================================================================
//
// hal_intr.h
//
// HAL Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jskov,
// gthomas, jlarmour
// Date: 1999-02-16
// Purpose: Define Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock.
//
// Usage:
// #include <cyg/hal/hal_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
#include <pkgconf/hal_v85x.h>
 
#include <cyg/infra/cyg_type.h>
#include <cyg/hal/hal_io.h>
 
#include <cyg/hal/var_intr.h>
 
//--------------------------------------------------------------------------
// Static data used by HAL
 
// ISR tables
externC CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
externC CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
externC CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
 
// VSR table
externC CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
 
//--------------------------------------------------------------------------
// Default ISR
// The #define is used to test whether this routine exists, and to allow
// us to call it.
 
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
 
#define HAL_DEFAULT_ISR hal_default_isr
 
//--------------------------------------------------------------------------
// Interrupt state storage
 
typedef cyg_uint32 CYG_INTERRUPT_STATE;
 
//--------------------------------------------------------------------------
// Interrupt control macros
 
externC cyg_uint32 hal_disable_interrupts(void);
externC void hal_enable_interrupts(void);
externC void hal_restore_interrupts(cyg_uint32);
externC cyg_uint32 hal_query_interrupts(void);
 
#ifdef CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS
#define HAL_DISABLE_INTERRUPTS(_old_) \
CYG_MACRO_START \
asm volatile ( \
"stsr PSW,%0;" \
"di" \
: "=r"(_old_)); \
CYG_MACRO_END
 
#define HAL_ENABLE_INTERRUPTS() \
CYG_MACRO_START \
asm volatile ( \
"ei" \
: ); \
CYG_MACRO_END
 
#define HAL_RESTORE_INTERRUPTS(_old_) \
CYG_MACRO_START \
asm volatile ( \
"ldsr %0,PSW" \
: \
: "r" (_old_)); \
CYG_MACRO_END
#else
#define HAL_DISABLE_INTERRUPTS(_old_) _old_ = hal_disable_interrupts()
#define HAL_ENABLE_INTERRUPTS() hal_enable_interrupts()
#define HAL_RESTORE_INTERRUPTS(_old_) hal_restore_interrupts(_old_)
#endif
 
#define HAL_QUERY_INTERRUPTS( _state_ ) _state_ = hal_query_interrupts()
 
//--------------------------------------------------------------------------
// Routine to execute DSRs using separate interrupt stack
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
externC void hal_interrupt_stack_call_pending_DSRs(void);
#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
hal_interrupt_stack_call_pending_DSRs()
 
// these are offered solely for stack usage testing
// if they are not defined, then there is no interrupt stack.
#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
// use them to declare these extern however you want:
// extern char HAL_INTERRUPT_STACK_BASE[];
// extern char HAL_INTERRUPT_STACK_TOP[];
// is recommended
#endif
 
//--------------------------------------------------------------------------
// Vector translation.
// For chained interrupts we only have a single vector though which all
// are passed. For unchained interrupts we have a vector per interrupt.
// Note: this hardware does not have/support chained interrupts.
 
//--------------------------------------------------------------------------
// Vector translation.
// For chained interrupts we only have a single vector though which all
// are passed. For unchained interrupts we have a vector per interrupt.
 
#ifndef HAL_TRANSLATE_VECTOR
#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN)
#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = 0
#else
#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_-CYGNUM_HAL_ISR_MIN)
#endif
#endif
 
#ifndef HAL_TRANSLATE_VECTOR
#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_-CYGNUM_HAL_ISR_MIN)
#endif
 
//--------------------------------------------------------------------------
// Interrupt and VSR attachment macros
 
#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
CYG_MACRO_START \
cyg_uint32 _index_; \
HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
\
if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \
(_state_) = 0; \
else \
(_state_) = 1; \
CYG_MACRO_END
 
#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
{ \
cyg_uint32 _index_; \
HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \
\
if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \
{ \
hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \
hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \
hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \
} \
}
 
#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
{ \
cyg_uint32 _index_; \
HAL_TRANSLATE_VECTOR( _vector_, _index_ ); \
\
if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \
{ \
hal_interrupt_handlers[_index_] = (CYG_ADDRESS)HAL_DEFAULT_ISR; \
hal_interrupt_data[_index_] = 0; \
hal_interrupt_objects[_index_] = 0; \
} \
}
 
#define HAL_VSR_GET( _vector_, _pvsr_ ) \
*(_pvsr_) = (void (*)())hal_vsr_table[_vector_];
 
#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \
if( _poldvsr_ != NULL) \
*(CYG_ADDRESS *)_poldvsr_ = (CYG_ADDRESS)hal_vsr_table[_vector_]; \
hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \
CYG_MACRO_END
 
// This is an ugly name, but what it means is: grab the VSR back to eCos
// internal handling, or if you like, the default handler. But if
// cooperating with GDB and CygMon, the default behaviour is to pass most
// exceptions to CygMon. This macro undoes that so that eCos handles the
// exception. So use it with care.
 
externC void __default_exception_vsr(void);
externC void __default_interrupt_vsr(void);
 
#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \
HAL_VSR_SET( _vector_, _vector_ == CYGNUM_HAL_VECTOR_INTERRUPT \
? (CYG_ADDRESS)__default_interrupt_vsr \
: (CYG_ADDRESS)__default_exception_vsr, \
_poldvsr_ ); \
CYG_MACRO_END
 
//--------------------------------------------------------------------------
// Interrupt controller access
 
externC void hal_interrupt_mask(int);
externC void hal_interrupt_unmask(int);
externC void hal_interrupt_acknowledge(int);
 
#define HAL_INTERRUPT_MASK( _vector_ ) hal_interrupt_mask(_vector_)
#define HAL_INTERRUPT_UNMASK( _vector_ ) hal_interrupt_unmask(_vector_)
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) hal_interrupt_acknowledge(_vector_)
 
#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )
#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )
 
//--------------------------------------------------------------------------
// Clock control.
 
externC CYG_WORD32 cyg_hal_clock_period;
externC void hal_clock_initialize(cyg_int32);
externC void hal_clock_reset(int, cyg_uint32);
externC cyg_uint32 hal_clock_read(void);
 
#define HAL_CLOCK_INITIALIZE( _period_ ) hal_clock_initialize(_period_)
#define HAL_CLOCK_RESET( _vector_, _period_ ) hal_clock_reset(_vector_,_period_)
#define HAL_CLOCK_READ( _pvalue_ ) *(_pvalue_) = hal_clock_read()
 
#if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY) && \
!defined(HAL_CLOCK_LATENCY)
#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ(_pvalue_)
#endif
 
//--------------------------------------------------------------------------
// Reset.
 
#ifndef HAL_PLATFORM_RESET
extern void hal_reset_board(void);
#define HAL_PLATFORM_RESET() hal_reset_board()
#define HAL_PLATFORM_RESET_ENTRY 0x00000000
#endif
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_HAL_INTR_H
// End of hal_intr.h
/arch/v2_0/include/nec-stub.h
0,0 → 1,118
#ifndef CYGONCE_HAL_NEC_STUB_H
#define CYGONCE_HAL_NEC_STUB_H
//========================================================================
//
// nec-stub.h
//
// NEC-specific definitions for generic stub
//
//========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): Red Hat, nickg
// Contributors: Red Hat, nickg
// Date: 1998-06-08
// Purpose:
// Description: NEC-specific definitions for generic stub
// Usage:
//
//####DESCRIPTIONEND####
//
//========================================================================
 
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define NUMREGS 66
#define REGSIZE(X) 4
typedef unsigned long target_register_t;
 
enum regnames {
R0, R1, SP, R3, R4, R5, R6, R7,
R8, R9 , R10, R11, R12, R13, R14, R15,
R16, R17, R18, R19, R20, R21, R22, R23,
R24, R25, R26, R27, R28, R29, R30, R31,
EIPC, EIPSW, FEPC, FEPSW, ECR, PSW, SR6, SR7,
SR8, SR9 , SR10, SR11, SR12, SR13, SR14, SR15,
SR16, SR17, SR18, SR19, SR20, SR21, SR22, SR23,
SR24, SR25, SR26, SR27, SR28, SR29, SR30, SR31,
PC, FP
};
 
typedef enum regnames regnames_t;
 
/* Given a trap value TRAP, return the corresponding signal. */
extern int __computeSignal (unsigned int trap_number);
 
/* Return the SPARC trap number corresponding to the last-taken trap. */
extern int __get_trap_number (void);
 
/* Return the currently-saved value corresponding to register REG. */
extern target_register_t get_register (regnames_t reg);
 
/* Store VALUE in the register corresponding to WHICH. */
extern void put_register (regnames_t which, target_register_t value);
 
/* Set the currently-saved pc register value to PC. This also updates NPC
as needed. */
extern void set_pc (target_register_t pc);
 
/* Set things up so that the next user resume will execute one instruction.
This may be done by setting breakpoints or setting a single step flag
in the saved user registers, for example. */
void __single_step (void);
 
/* Clear the single-step state. */
void __clear_single_step (void);
 
/* If the breakpoint we hit is in the breakpoint() instruction, return a
non-zero value. */
extern int __is_breakpoint_function (void);
 
/* Skip the current instruction. */
extern void __skipinst (void);
 
extern void __install_breakpoints (void);
 
extern void __clear_breakpoints (void);
 
#ifdef __cplusplus
} /* extern "C" */
#endif
 
#endif // ifndef CYGONCE_HAL_NEC_STUB_H
/arch/v2_0/include/hal_arch.h
0,0 → 1,284
#ifndef CYGONCE_HAL_HAL_ARCH_H
#define CYGONCE_HAL_HAL_ARCH_H
 
//==========================================================================
//
// hal_arch.h
//
// Architecture specific abstractions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg,gthomas
// Contributors: nickg,jlarmour
// Date: 2001-03-21
// Purpose: Define architecture abstractions
// Usage: #include <cyg/hal/hal_arch.h>
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
 
#include <cyg/hal/var_arch.h>
 
//--------------------------------------------------------------------------
// Processor saved states:
 
#define CYG_HAL_NEC_REG CYG_WORD32
#define CYG_HAL_NEC_REG_SIZE 4
 
typedef struct
{
// These are common to all saved states
CYG_HAL_NEC_REG d[32]; /* Data regs */
CYG_ADDRWORD pc; /* Program Counter */
CYG_ADDRWORD psw; /* Status Reg */
// These are only saved for exceptions and interrupts
CYG_ADDRWORD cause; /* Exception cause register */
CYG_ADDRWORD vector; /* Exception/interrupt number */
} HAL_SavedRegisters;
 
//
// Processor state register
//
#define CYGARC_PSW_ID 0x20 // Interrupt disable
#define CYGARC_PSW_EP 0x40 // Exception in progress
#define CYGARC_PSW_NP 0x80 // NMI in progress
 
//--------------------------------------------------------------------------
// Exception handling function.
// This function is defined by the kernel according to this prototype. It is
// invoked from the HAL to deal with any CPU exceptions that the HAL does
// not want to deal with itself. It usually invokes the kernel's exception
// delivery mechanism.
 
externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
 
//--------------------------------------------------------------------------
// Bit manipulation macros
 
externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask);
externC cyg_uint32 hal_msbit_index(cyg_uint32 mask);
 
#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask);
 
#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask);
 
//--------------------------------------------------------------------------
// Context Initialization
 
#define CYG_HAL_NEC_INIT_PSW 0x00000000
 
// Initialize the context of a thread.
// Arguments:
// _sparg_ name of variable containing current sp, will be written with new sp
// _thread_ thread object address, passed as argument to entry point
// _entry_ entry point address.
// _id_ bit pattern used in initializing registers, for debugging.
#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \
{ \
register CYG_WORD _sp_ = ((CYG_WORD)_sparg_)-56; \
register HAL_SavedRegisters *_regs_; \
int _i_; \
_sp_ = _sp_ & 0xFFFFFFF0; \
_regs_ = (HAL_SavedRegisters *)(((_sp_) - sizeof(HAL_SavedRegisters))&0xFFFFFFF0); \
for( _i_ = 0; _i_ < 32; _i_++ ) (_regs_)->d[_i_] = (_id_)|_i_; \
(_regs_)->d[03] = (CYG_HAL_NEC_REG)(_sp_); /* SP = top of stack */ \
(_regs_)->d[04] = (CYG_HAL_NEC_REG)(_sp_); /* GP = top of stack */ \
(_regs_)->d[29] = (CYG_HAL_NEC_REG)(_sp_); /* FP = top of stack */ \
(_regs_)->d[06] = (CYG_HAL_NEC_REG)(_thread_); /* R6 = arg1 = thread ptr */ \
(_regs_)->d[31] = (CYG_HAL_NEC_REG)(_entry_); /* RA(d[31]) = entry point*/ \
(_regs_)->pc = (CYG_WORD)(_entry_); /* PC = entry point */ \
(_regs_)->psw = CYG_HAL_NEC_INIT_PSW; \
_sparg_ = (CYG_ADDRESS)_regs_; \
}
 
//--------------------------------------------------------------------------
// Context switch macros.
// The arguments are pointers to locations where the stack pointer
// of the current thread is to be stored, and from where the sp of the
// next thread is to be fetched.
 
externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
externC void hal_thread_load_context( CYG_ADDRESS to )
__attribute__ ((noreturn));
 
#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \
hal_thread_switch_context( (CYG_ADDRESS)_tspptr_, \
(CYG_ADDRESS)_fspptr_);
 
#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \
hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
 
//--------------------------------------------------------------------------
// Execution reorder barrier.
// When optimizing the compiler can reorder code. In multithreaded systems
// where the order of actions is vital, this can sometimes cause problems.
// This macro may be inserted into places where reordering should not happen.
// The "memory" keyword is potentially unnecessary, but it is harmless to
// keep it.
 
#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
 
//--------------------------------------------------------------------------
// Breakpoint support
// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to
// happen if executed.
// HAL_BREAKINST is the value of the breakpoint instruction and
// HAL_BREAKINST_SIZE is its size in bytes.
 
#define HAL_BREAKPOINT(_label_) \
asm volatile (" .globl _" #_label_ ";" \
"_"#_label_":" \
" br _"#_label_ \
);
 
#define HAL_BREAKINST 0x0585
#define HAL_BREAKINST_SIZE 2
 
//--------------------------------------------------------------------------
// Thread register state manipulation for GDB support.
 
// Default to a 32 bit register size for GDB register dumps.
#ifndef CYG_HAL_GDB_REG
#define CYG_HAL_GDB_REG CYG_WORD32
#endif
 
// Translate a stack pointer as saved by the thread context macros above into
// a pointer to a HAL_SavedRegisters structure.
#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \
(_regs_) = (HAL_SavedRegisters *)(_sp_)
 
 
//--------------------------------------------------------------------------
// HAL setjmp
 
typedef struct {
cyg_uint32 sp;
cyg_uint32 gp;
cyg_uint32 tp;
cyg_uint32 r1,r2,r4,r5;
cyg_uint32 r20, r21, r22, r23;
cyg_uint32 r24, r25, r26, r27, r28;
cyg_uint32 fp;
cyg_uint32 ep;
cyg_uint32 lp;
} hal_jmp_buf_t;
 
#define CYGARC_JMP_BUF_SIZE (sizeof(hal_jmp_buf_t) / sizeof(cyg_uint32))
 
typedef cyg_uint32 hal_jmp_buf[ CYGARC_JMP_BUF_SIZE ];
 
externC int hal_setjmp(hal_jmp_buf env);
externC void hal_longjmp(hal_jmp_buf env, int val);
 
//-------------------------------------------------------------------------
// Idle thread code.
// This macro is called in the idle thread loop, and gives the HAL the
// chance to insert code. Typical idle thread behaviour might be to halt the
// processor.
 
externC void hal_idle_thread_action(cyg_uint32 loop_count);
 
#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)
 
//--------------------------------------------------------------------------
// Hardware specific test exit code. This is defined here simply to make
// setting a breakpoint on this function viable.
//
#define CYGHWR_TEST_PROGRAM_EXIT() \
{ \
static volatile int ctr; \
while (1) ctr++; \
}
 
//--------------------------------------------------------------------------
// Minimal and sensible stack sizes: the intention is that applications
// will use these to provide a stack size in the first instance prior to
// proper analysis. Idle thread stack should be this big.
 
// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
 
// This is not a config option because it should not be adjusted except
// under "enough rope" sort of disclaimers.
 
// Typical case stack frame size: return link + 4 pushed registers + some locals.
#define CYGNUM_HAL_STACK_FRAME_SIZE (48)
 
// Stack needed for a context switch:
#define CYGNUM_HAL_STACK_CONTEXT_SIZE (((32+12)*CYG_HAL_NEC_REG_SIZE)+(32*4))
 
 
// Interrupt + call to ISR, interrupt_end() and the DSR
#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (4+2*CYGNUM_HAL_STACK_CONTEXT_SIZE)
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
// An interrupt stack which is large enough for all possible interrupt
// conditions (and only used for that purpose) exists. "User" stacks
// can be much smaller
 
#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+ \
CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+ \
CYGNUM_HAL_STACK_FRAME_SIZE*8)
#define CYGNUM_HAL_STACK_SIZE_TYPICAL (CYGNUM_HAL_STACK_SIZE_MINIMUM+1024)
 
#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
// No separate interrupt stack exists. Make sure all threads contain
// a stack sufficiently large.
 
#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096)
#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096)
 
#endif
 
//--------------------------------------------------------------------------
// Macros for switching context between two eCos instances (jump from
// code in ROM to code in RAM or vice versa).
#define CYGARC_HAL_SAVE_GP()
#define CYGARC_HAL_RESTORE_GP()
 
//--------------------------------------------------------------------------
#endif // CYGONCE_HAL_HAL_ARCH_H
// End of hal_arch.h
/arch/v2_0/include/hal_cache.h
0,0 → 1,68
#ifndef CYGONCE_HAL_CACHE_H
#define CYGONCE_HAL_CACHE_H
 
//=============================================================================
//
// hal_cache.h
//
// HAL cache control API
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg
// Date: 1998-02-17
// Purpose: Cache control API
// Description: The macros defined here provide the HAL APIs for handling
// cache control operations.
// Usage:
// #include <cyg/hal/hal_cache.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
 
#include <cyg/hal/var_cache.h>
 
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_CACHE_H
// End of hal_cache.h
/arch/v2_0/ChangeLog
0,0 → 1,253
2001-11-26 Jesper Skov <jskov@redhat.com>
 
* src/hal_misc.c (hal_msbit_index): Fixed.
 
2001-04-24 Jonathan Larmour <jlarmour@redhat.com>
 
* src/vectors.S: Support daft platforms like the CEB which have
default on-chip flash that vector NMI to 2 insns after reset.
Also place hal_v85x_ice_syscall_info in fixed location, only
for ROM/ROMRAM builds.
 
2001-03-28 Jonathan Larmour <jlarmour@redhat.com>
 
* src/vectors.S: Overhaul...
Make interrupt processing path faster, especially by implementing
CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
Add ROMRAM startup support
Pass in correct argument to exception_handler
Call DSRs with parameter flushback area
Add __allow_nmi as a somewhat kludgy means of determining
whether NMIs should be ignored - important if the board resets
and the vector tables are temporarily inconsistent.
Initialize __vsr_table statically.
Add some generic elements of ICE debugging support
 
* src/v85x.ld: Remove - redundant.
 
* src/hal_mk_defs.c (main): Update to reflect new vector names
(to match official NEC docs)
 
* src/hal_misc.c (exception_handler): Remove cygmon cruft.
(hal_arch_default_isr): Report spurious interrupts.
(hal_idle_thread_action): use halt instruction
 
* include/hal_arch.h: Remove obsolete comment reference to arch.inc.
 
* include/basetype.h: No need to include <pkgconf/hal.h>
* include/hal_io.h: Ditto.
* include/nec-stub.h: Similarly for <pkgconf/system.h>
 
* cdl/hal_v85x.cdl: Move CYGHWR_HAL_V85X_CPU_FREQ into platforms
(and make Hz, not MHz).
Add generic ICE debugging interface.
Description tidies.
 
2001-01-26 Jonathan Larmour <jlarmour@redhat.com>
 
* include/hal_intr.h: Move HAL_STUB_PLATFORM_RESET and
HAL_STUB_PLATFORM_RESET_ENTRY here from platform stub headers.
Also rename to HAL_PLATFORM_RESET and HAL_PLATFORM_RESET_ENTRY
 
* src/vectors.S (_hal_reset_board): Renamed from hal_plf_reset_board
 
2001-01-18 Nick Garnett <nickg@cygnus.co.uk>
 
* src/vectors.S: Added underscore to reference to
cyg_scheduler_sched_lock, since CYGBLD_ATTRIB_ASM_ALIAS() now adds
one automatically.
 
2000-10-20 Jesper Skov <jskov@redhat.com>
 
* src/hal_misc.c: Update __mem_fault_handler declaration.
 
2000-10-16 Jonathan Larmour <jlarmour@redhat.com>
 
* include/hal_arch.h (CYGARC_JMP_BUF_SIZE): Define hal_jmp_buf in
terms of this.
 
2000-10-09 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (start): Need to handle ^C for all applications.
 
2000-09-13 Jonathan Larmour <jlarmour@redhat.com>
 
* src/vectors.S: When calling C functions, ensure there is 16 bytes
space for the parameter flushback area (as per the calling convention)
on the stack
 
2000-09-07 Jonathan Larmour <jlarmour@redhat.com>
 
* include/basetype.h: Don't need special alignment after all - it was
a bug elsewhere.
 
2000-09-06 Gary Thomas <gthomas@redhat.com>
 
* include/basetype.h: Need special alignment to match the way
the compiler/linker actually do things.
 
* cdl/hal_v85x.cdl: Improve variant handling and specification.
 
2000-08-30 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (start): Allow programs to field NMI exceptions.
 
2000-07-24 Jonathan Larmour <jlarmour@redhat.co.uk>
 
* include/basetype.h: Removed definition of CYG_LABEL_NAME().
 
* src/v85x.ld: Switched to new table definition mechanism.
 
2000-07-21 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (_hal_plf_reset_board): Needs to be defined in all
configurations.
 
2000-06-27 Jesper Skov <jskov@redhat.com>
 
* src/vectors.S:
* src/hal_mk_defs.c:
Fix compiler warnings.
 
* src/hal_misc.c (hal_default_isr): Let common version do the
checks.
 
2000-06-15 Gary Thomas <gthomas@redhat.com>
 
* src/hal_mk_defs.c:
* src/vectors.S:
* src/hal_misc.c (hal_default_isr): Update for new debug
vector support.
 
* include/hal_intr.h:
* src/vectors.S (do_interrupt): Proper handling of chained
interrupts.
 
2000-06-12 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (return_from_exception_or_interrupt): Revert
reorg change (05-26) which broke GDB breakpoints.
 
2000-06-08 Jesper Skov <jskov@redhat.com>
 
* include/hal_arch.h (CYGARC_HAL_SAVE_GP, CYGARC_HAL_RESTORE_GP):
Added.
 
2000-05-26 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S: Slight reorg of trap vectors (more readable).
 
2000-05-25 John Dallaway <jld@redhat.com>
 
* cdl/hal_v85x.cdl: Tidy display strings.
 
2000-05-25 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S: Handle different chips (number of interrupt
sources differs, exception table is altered, etc).
 
* include/hal_intr.h: Actual interrupt layout now defined by
variant/platform since these differ depending on the chip.
 
2000-05-03 Gary Thomas <gthomas@redhat.com>
 
* include/hal_arch.h: New breakpoint instruction ("br *").
 
2000-04-14 Gary Thomas <gthomas@redhat.com>
 
* src/hal_misc.c (exception_handler): Proper handling of nested
[watchdog] interrupts - don't corrupt GDB registers.
 
* src/hal_mk_defs.c: Add some symbols required for NMI handling.
 
* src/vectors.S (return_from_exception_or_interrupt):
Properly handle different cases for exception, NMI and ISR.
 
* include/hal_intr.h (HAL_TRANSLATE_VECTOR): Ignore interrupt
chaining - doesn't happen on this hardware.
 
2000-04-11 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (exception): Handle NMI. In particular, need to
have appropriate bits set so they clear and also get the state
from the proper save registers.
(exception): Register save was wrong - ROM only.
 
2000-03-31 Gary Thomas <gthomas@redhat.com>
 
* src/hal_mk_defs.c: Add definition for 'ep' register.
 
* include/hal_intr.h:
* cdl/hal_nec.cdl: Add config option to choose between inline and
real functions for interrupt macros.
 
* src/vectors.S: Tune up - use SLD/SST for smaller, faster code
in context load/save routines. Also remove IRQ trace/debug code.
 
2000-03-30 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (do_interrupt): Can't use R13 across function calls.
This caused instability when turning on kernel instrumentation.
 
* include/hal_intr.h: Use out-of-line code for interrupt functions
for tracing/testing.
 
* src/vectors.S: Working support for separate interrupt stack.
Some debug/trace code left in.
 
* src/hal_mk_defs.c:
* include/hal_arch.h: Documented API does not match actual GCC
register usage. Need to save R1/R2/R4/R5 for setjmp/longjmp.
 
2000-03-27 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (do_interrupt): Pass regs to ISR & DSR.
 
* include/basetype.h: Endian-ness was incorrect.
 
* include/hal_arch.h:
* src/hal_mk_defs.c: Complete setjmp/longjmp support.
 
* src/vectors.S: Add interrupt stack.
 
2000-03-21 Gary Thomas <gthomas@redhat.com>
 
* src/vectors.S (_hal_plf_reset_board): Add board reset function.
 
* include/hal_arch.h (CYGHWR_TEST_PROGRAM_EXIT): Define RESET for ROM
based programs.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
/arch/v2_0/src/hal_misc.c
0,0 → 1,232
/*==========================================================================
//
// hal_misc.c
//
// HAL miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg, gthomas
// Contributors: nickg, gthomas, jlarmour
// Date: 2001-03-21
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//=========================================================================*/
 
#include <pkgconf/hal.h>
#include <pkgconf/hal_v85x.h>
#ifdef CYGPKG_KERNEL
#include <pkgconf/kernel.h>
#endif
 
#include <cyg/infra/cyg_type.h>
#include <cyg/infra/cyg_trac.h> // tracing macros
#include <cyg/infra/cyg_ass.h> // assertion macros
#include <cyg/infra/diag.h>
 
#include <cyg/hal/hal_arch.h> // HAL header
#include <cyg/hal/hal_intr.h> // HAL header
 
/*------------------------------------------------------------------------*/
/* First level C exception handler. */
 
externC void __handle_exception (void);
 
externC HAL_SavedRegisters *_hal_registers;
externC void* volatile __mem_fault_handler;
 
void
exception_handler(HAL_SavedRegisters *regs)
{
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
// diag_printf("Exception! Frame: %x\n", regs);
// show_regs(regs);
static int gdb_active;
if (gdb_active == 0) {
gdb_active = 1;
_hal_registers = regs;
__handle_exception();
gdb_active = 0;
}
 
#elif defined(CYGPKG_KERNEL_EXCEPTIONS)
 
// We should decode the vector and pass a more appropriate
// value as the second argument. For now we simply pass a
// pointer to the saved registers. We should also divert
// breakpoint and other debug vectors into the debug stubs.
 
cyg_hal_deliver_exception( regs->vector, (CYG_ADDRWORD)regs );
 
#else
 
CYG_FAIL("Exception!!!");
#endif
return;
}
 
/*------------------------------------------------------------------------*/
/* C++ support - run initial constructors */
 
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
cyg_bool cyg_hal_stop_constructors;
#endif
 
typedef void (*pfunc) (void);
extern pfunc __CTOR_LIST__[];
extern pfunc __CTOR_END__[];
 
void
cyg_hal_invoke_constructors (void)
{
 
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
static pfunc *p = &__CTOR_END__[-1];
cyg_hal_stop_constructors = 0;
for (; p >= __CTOR_LIST__; p--) {
(*p) ();
if (cyg_hal_stop_constructors) {
p--;
break;
}
}
#else
pfunc *p;
 
for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--) {
(*p) ();
}
#endif
}
 
/*------------------------------------------------------------------------*/
/* default ISR */
 
#ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
externC cyg_uint32
hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
{
CYG_TRACE1(true, "Interrupt: %d", vector);
 
diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector,
data);
CYG_FAIL("Spurious Interrupt!!!");
return 0;
}
#else
externC cyg_uint32
hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
{
CYG_TRACE1(true, "Interrupt: %d", vector);
 
#ifndef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
#ifdef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT
#ifdef CYGDBG_HAL_CTRLC_ISR
// then see if it is an incoming character interrupt and break
// into the stub ROM if the char is a ^C.
if ( CYGDBG_HAL_CTRLC_ISR( vector, data ) )
return 1; // interrupt handled
#endif
#endif
#endif
 
diag_printf("Spurious Interrupt!!! - vector: %d, data: %x\n", vector,
data);
CYG_FAIL("Spurious Interrupt!!!");
return 0;
}
#endif
 
/*------------------------------------------------------------------------*/
/* Idle thread action */
 
void
hal_idle_thread_action( cyg_uint32 count )
{
// power saving instruction
asm("halt");
}
 
/*-------------------------------------------------------------------------*/
/* Misc functions */
 
cyg_uint32
hal_lsbit_index(cyg_uint32 mask)
{
int i;
for (i = 0; i < 32; i++) {
if (mask & (1<<i)) return ((cyg_uint32)i);
}
return ((cyg_uint32)-1);
}
 
cyg_uint32
hal_msbit_index(cyg_uint32 mask)
{
int i;
for (i = 31; i >= 0; i--) {
if (mask & (1<<i)) return ((cyg_uint32)i);
}
return ((cyg_uint32)-1);
}
 
void
show_regs(HAL_SavedRegisters *regs)
{
int i;
diag_printf("Regs\n");
for (i = 0; i < 32; i++) {
if ((i % 8) == 0) {
diag_printf("R%2d: ", i);
}
diag_printf("0x%08x ", regs->d[i]);
if ((i % 8) == 7) {
diag_printf("\n");
}
}
diag_printf("PC = %x, PSW = %x\n", regs->pc, regs->psw);
}
 
/*------------------------------------------------------------------------*/
// EOF hal_misc.c
/arch/v2_0/src/vectors.S
0,0 → 1,652
// #========================================================================
// #
// # vectors.S
// #
// # NEC/V85x exception/interrupt vectors
// #
// #========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
// #========================================================================
// ######DESCRIPTIONBEGIN####
// #
// # Author(s): gthomas, jlarmour
// # Contributors: gthomas, jlarmour
// # Date: 2001-03-21
// # Purpose: NEC/V85x exception vectors
// # Description: This file defines the code placed into the exception
// # vectors. It also contains the first level default VSRs
// # that save and restore state for both exceptions and
// # interrupts.
// #
// #####DESCRIPTIONEND####
// #
// #========================================================================
 
#include <pkgconf/system.h>
#include <pkgconf/hal.h>
#include <pkgconf/hal_v85x.h>
#ifdef CYGPKG_KERNEL
#include <pkgconf/kernel.h>
#else
# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
# undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
#endif
#include <cyg/hal/hal_platform_setup.h>
#include CYGHWR_MEMORY_LAYOUT_H
 
#include <cyg/hal/nec_offsets.inc>
 
// Two different macros in case we ever decide to differentiate
// between exceptions and interrupts.
.macro EXCEPTION
.org reset_vector+(0x0010*VECTOR)
addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp
st.w r8,CYGARC_REG_R8[sp]
movea VECTOR,r0,r8
jr exception
.set VECTOR, VECTOR+1
.endm
 
.macro INTERRUPT
.org reset_vector+(0x0010*VECTOR)
addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp
st.w r8,CYGARC_REG_R8[sp]
movea VECTOR,r0,r8
jr exception
.set VECTOR, VECTOR+1
.endm
 
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
.section ".vectors","ax"
.globl reset_vector
reset_vector:
//
// These are the hardware exception vectors.
//
__ROM_vsr:
// start of ROM
mov r0,sp // needed for platforms that have NMI 2 insns after reset
// This jump works even for ROMRAM because it is PC relative
jr start
 
.set VECTOR, 1
.rept CYGNUM_HAL_EXCEPTION_COUNT-1
EXCEPTION
.endr
.set VECTOR, CYGNUM_HAL_ISR_MIN
.rept CYGNUM_HAL_ISR_COUNT
INTERRUPT
.endr
#endif
.text
.globl start
start:
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
// Before anything else, *carefully* check if this was actually an NMI
// The assumption is that the stack pointer can only be 0 on reset
// as set above at __ROM_vsr
cmp r0,sp
be 1f
addi -CYGARC_EXCEPTION_FRAME_SIZE,sp,sp
movea 1,r0,r8
jr exception
1:
#endif
// Perform hardware initialization
PLATFORM_SETUP1
 
// Copy everything to the proper VMA base and jump to it.
#if defined(CYG_HAL_STARTUP_ROMRAM)
lea CYGMEM_REGION_rom,r6
lea CYGMEM_REGION_ram,r7
lea ___rom_data_end,r8 // Assume end of .data == end of ROM
1: ld.w 0[r6],r1
st.w r1,0[r7]
addi 4,r6,r6
addi 4,r7,r7
cmp r6,r8
bne 1b
// now jump to RAM
lea ___romram_jump_vector,r1
jmp [r1]
 
___romram_jump_vector:
#elif defined( CYG_HAL_STARTUP_ROM )
// Relocate [copy] data from ROM to RAM
lea ___rom_data_start,r6
lea ___ram_data_start,r7
lea ___ram_data_end,r8
1: ld.w 0[r6],r1
st.w r1,0[r7]
addi 4,r6,r6
addi 4,r7,r7
cmp r7,r8
bne 1b
 
// Initialize RAM vectors
lea ___ram_vectors_loadaddr,r6
lea ___ram_vectors_start,r7
lea ___ram_vectors_end,r8
1: ld.w 0[r6],r1
st.w r1,0[r7]
addi 4,r6,r6
addi 4,r7,r7
cmp r7,r8
bne 1b
#endif
// Initialize stack
lea __startup_stack-16,r1
mov r1,sp
 
// Clear BSS
lea ___bss_start,r6
lea ___bss_end,r7
1: st.w r0,0[r6]
addi 4,r6,r6
cmp r6,r7
bne 1b
 
#if defined(CYG_HAL_STARTUP_RAM)
// Set up VSR pointers into this application/image
lea _hal_vsr_table+(CYGNUM_HAL_ISR_MIN*4),r6
movea CYGNUM_HAL_ISR_COUNT,r0,r7
lea do_interrupt,r8
10: st.w r8,0[r6]
addi 4,r6,r6
addi -1,r7,r7
bne 10b
#endif
 
// Initialize hardware
jarl _cyg_hal_hardware_init,r31
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
# ifdef CYG_HAL_STARTUP_RAM
// Need to handle exceptions as well
lea _hal_vsr_table,r6
movea CYGNUM_HAL_EXCEPTION_COUNT,r0,r7
lea do_exception,r8
10: st.w r8,0[r6]
addi 4,r6,r6
addi -1,r7,r7
bne 10b
# endif
jarl _initialize_stub,r31
#else // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
// All programs need to provide for NMI handlers
lea _hal_vsr_table+4,r6
lea do_exception,r8
st.w r8,0[r6] // NMI pin
#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
// we can process NMIs now
lea __allow_nmi,r1
addi 1,r0,r2
st.w r2,0[r1]
#endif
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
|| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
.extern hal_ctrlc_isr_init
jarl _hal_ctrlc_isr_init,r31
#endif
// Run through static constructors
jarl _cyg_hal_invoke_constructors,r31
 
// Ready to start the eCos kernel
jarl _cyg_start,r31
 
// If we get here, something is _very_ wrong
_start_hang:
br _start_hang
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
// Handle exception
exception:
// save exception context
st.w ep,CYGARC_REG_EP[sp]
mov sp,ep
sst.w r8,CYGARC_REG_VECTOR[ep]
sst.w r1,CYGARC_REG_R1[ep]
addi CYGARC_EXCEPTION_FRAME_SIZE,ep,r1
sst.w r2,CYGARC_REG_R2[ep]
sst.w r1,CYGARC_REG_SP[ep]
sst.w r4,CYGARC_REG_R4[ep]
sst.w r5,CYGARC_REG_R5[ep]
sst.w r6,CYGARC_REG_R6[ep]
sst.w r7,CYGARC_REG_R7[ep]
// sst.w r8,CYGARC_REG_R8[ep]
sst.w r9,CYGARC_REG_R9[ep]
sst.w r10,CYGARC_REG_R10[ep]
sst.w r11,CYGARC_REG_R11[ep]
sst.w r12,CYGARC_REG_R12[ep]
sst.w r13,CYGARC_REG_R13[ep]
sst.w r14,CYGARC_REG_R14[ep]
sst.w r15,CYGARC_REG_R15[ep]
sst.w r16,CYGARC_REG_R16[ep]
sst.w r17,CYGARC_REG_R17[ep]
sst.w r18,CYGARC_REG_R18[ep]
sst.w r19,CYGARC_REG_R19[ep]
#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
sst.w r20,CYGARC_REG_R20[ep]
sst.w r21,CYGARC_REG_R21[ep]
sst.w r22,CYGARC_REG_R22[ep]
sst.w r23,CYGARC_REG_R23[ep]
sst.w r24,CYGARC_REG_R24[ep]
sst.w r25,CYGARC_REG_R25[ep]
sst.w r26,CYGARC_REG_R26[ep]
sst.w r27,CYGARC_REG_R27[ep]
sst.w r28,CYGARC_REG_R28[ep]
#endif
sst.w r29,CYGARC_REG_R29[ep] // NB frame pointer
sst.w lp,CYGARC_REG_LP[ep]
cmp CYGNUM_HAL_VECTOR_TRAP00,r8 // NMI?
bge 05f
stsr FEPC,r6 // saved state differs
stsr FEPSW,r7
lea __allow_nmi,r1 // is the system ready for NMIs?
tst1 0, 0[r1]
bne 10f
// if not processing NMIs, allow restore
sst.w r6,CYGARC_REG_PC[ep]
sst.w r7,CYGARC_REG_PSW[ep]
// Reenable exception processing
stsr PSW,r6
andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6
ldsr r6,PSW
lea return_from_exception_or_interrupt,r1
jmp [r1]
 
05: stsr EIPC,r6
stsr EIPSW,r7
cmp CYGNUM_HAL_VECTOR_ILGOP,r8 // Illegal opcode?
bne 10f
addi -4,r6,r6 // yes, adjust PC
10: sst.w r6,CYGARC_REG_PC[ep]
sst.w r7,CYGARC_REG_PSW[ep]
stsr ECR,r6
sst.w r6,CYGARC_REG_CAUSE[ep]
// Reenable exception processing
stsr PSW,r6
andi ~(CYGARC_PSW_EP|CYGARC_PSW_NP),r6,r6
ldsr r6,PSW
shl 2,r8
lea _hal_vsr_table,r1
add r1,r8
ld.w 0[r8],r1
jmp [r1]
#endif
do_exception:
// pass in saved registers
mov sp,r6
// leave space for the parameter flush back area (as per calling
// conventions)
addi -16,sp,sp
jarl _exception_handler,r31
 
return_from_exception_or_interrupt:
// save sp, but remove space for the parameter flush back area
// (as per calling conventions) at the same time
addi 16,sp,ep
sld.w CYGARC_REG_PSW[ep],r7
sld.w CYGARC_REG_R1[ep],r1
sld.w CYGARC_REG_PC[ep],r6
sld.w CYGARC_REG_R2[ep],r2
// disable interrupts while restoring context
ld.w CYGARC_REG_VECTOR[ep],r4
stsr PSW,r8
cmp CYGNUM_HAL_VECTOR_TRAP00,r4
bge 10f
ori CYGARC_PSW_NP,r8,r8 // returning from NMI
ori CYGARC_PSW_ID,r8,r8 // disable interrupt
ldsr r8,PSW
ldsr r7,FEPSW
ldsr r6,FEPC
br 30f
10: cmp CYGNUM_HAL_ISR_MIN,r4 // exception or interrupt
bge 20f
ori CYGARC_PSW_EP,r8,r8 // returning from exception
20: ori CYGARC_PSW_ID,r8,r8 // disable interrupt
ldsr r8,PSW
ldsr r7,EIPSW // Avoid pipeline bubbles
ldsr r6,EIPC
30: sld.w CYGARC_REG_R4[ep],r4
sld.w CYGARC_REG_R5[ep],r5
sld.w CYGARC_REG_R6[ep],r6
sld.w CYGARC_REG_R7[ep],r7
sld.w CYGARC_REG_R8[ep],r8
sld.w CYGARC_REG_R9[ep],r9
sld.w CYGARC_REG_R10[ep],r10
sld.w CYGARC_REG_R11[ep],r11
sld.w CYGARC_REG_R12[ep],r12
sld.w CYGARC_REG_R13[ep],r13
sld.w CYGARC_REG_R14[ep],r14
sld.w CYGARC_REG_R15[ep],r15
sld.w CYGARC_REG_R16[ep],r16
sld.w CYGARC_REG_R17[ep],r17
sld.w CYGARC_REG_R18[ep],r18
sld.w CYGARC_REG_R19[ep],r19
#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
sld.w CYGARC_REG_R20[ep],r20
sld.w CYGARC_REG_R21[ep],r21
sld.w CYGARC_REG_R22[ep],r22
sld.w CYGARC_REG_R23[ep],r23
sld.w CYGARC_REG_R24[ep],r24
sld.w CYGARC_REG_R25[ep],r25
sld.w CYGARC_REG_R26[ep],r26
sld.w CYGARC_REG_R27[ep],r27
sld.w CYGARC_REG_R28[ep],r28
#endif
sld.w CYGARC_REG_R29[ep],r29 // NB frame pointer
sld.w CYGARC_REG_LP[ep],lp
sld.w CYGARC_REG_SP[ep],sp
sld.w CYGARC_REG_EP[ep],ep
reti
// Handle interrupt - these are typically vectored into user code
do_interrupt:
mov sp,ep // save pointer to regs frame
// leave space for the parameter flush back area (as per calling
// conventions)
addi -16,sp,sp
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
// Switch to interrupt stack
lea irq_level,r6 // current number of nested interrupts
ld.w 0[r6],r7
addi 1,r7,r8
st.w r8,0[r6]
cmp 0,r7 // if was zero, switch stacks
bne 10f
mov sp,r1 // save old stack pointer
lea __interrupt_stack-20,r2
mov r2,sp
st.w r1,16[sp]
10:
#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
// The entire CPU state is now stashed on the stack,
// increment the scheduler lock and handle the interrupt
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
.extern _cyg_scheduler_sched_lock
lea _cyg_scheduler_sched_lock,r7
ld.w 0[r7],r8
addi 1,r8,r8
st.w r8,0[r7]
#endif
 
#if defined(CYGPKG_KERNEL_INSTRUMENT) && \
defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
lea RAISE_INTR,r6 // arg0 = type = INTR,RAISE
ld.w CYGARC_REG_VECTOR[ep],r7 // args = vector
mov r0,r8 // arg2 = 0
jarl _cyg_instrument,r31
#endif
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
|| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
// If we are supporting Ctrl-C interrupts from GDB, we must squirrel
// away a pointer to the save interrupt state here so that we can
// plant a breakpoint at some later time.
.extern _hal_saved_interrupt_state
lea _hal_saved_interrupt_state,r8
st.w ep,0[r8]
#endif
 
#ifdef CYGIMP_KERNEL_INTERRUPTS_CHAIN
mov r0,r8 // vector # (overloaded by kernel)
#else
ld.w CYGARC_REG_VECTOR[ep],r6 // vector #
addi -CYGNUM_HAL_ISR_MIN,r6,r8
shl 2,r8
#endif
lea _hal_interrupt_objects,r1
add r8,r1
ld.w 0[r1],r29 // save object handle
lea _hal_interrupt_data,r1
add r8,r1
ld.w 0[r1],r7 // handler data
lea _hal_interrupt_handlers,r1
add r8,r1
mov ep,r8 // pointer to saved registers
ld.w 0[r1],r1 // handler routine
#ifdef CYGIMP_KERNEL_INTERRUPTS_CHAIN
ld.w CYGARC_REG_VECTOR[ep],r6 // vector #
#endif
jarl call_via_r1,r31
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
// If we are returning from the last nested interrupt, move back
// to the thread stack. interrupt_end() must be called on the
// thread stack since it potentially causes a context switch.
lea irq_level,r6
ld.w 0[r6],r7
addi -1,r7,r8
st.w r8,0[r6]
cmp 0,r8
bne 10f
ld.w 16[sp],sp // Restore non-interrupt stack at last interrupt
// this is offset 16 because of parameter
// flush back area
10:
#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
// The return value from the handler (in r10) will indicate whether a
// DSR is to be posted. Pass this together with a pointer to the
// interrupt object we have just used to the interrupt tidy up routine.
 
mov r10,r6 // interrupt handler return code
mov r29,r7 // object handle
mov ep,r8 // register frame
jarl _interrupt_end,r31 // post any bottom layer handle
#endif
br return_from_exception_or_interrupt
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
.globl _hal_interrupt_stack_call_pending_DSRs
_hal_interrupt_stack_call_pending_DSRs:
stsr PSW,r9
di // disable interrupts while changing stack
// Switch to interrupt stack
lea irq_level,r6 // current number of nested interrupts
mov 1,r7 // note: this can never be non-zero at this point
st.w r7,0[r6]
mov sp,r1 // save old stack pointer
lea __interrupt_stack-32,r8 // 32 for 16-byte parameter flush back
// plus 12 bytes for following reg saves
// plus 4 bytes to preserve alignment
mov r8,sp
st.w r1,16[sp]
st.w r9,20[sp]
st.w lp,24[sp]
ei
jarl _cyg_interrupt_call_pending_DSRs,lp
di
ld.w 24[sp],lp // restore state
ld.w 20[sp],r6
ld.w 16[sp],sp
lea irq_level,r7
st.w r0,0[r7]
ldsr r6,PSW
jmp [lp]
#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
//
// Indirect subroutine call, via R1
 
call_via_r1:
jmp [r1]
//
// Reset the board
//
.globl _hal_reset_board
_hal_reset_board:
di // Turn off interrupts
// Don't process NMIs
lea __allow_nmi,r1
st.w r0,0[r1]
jmp [r0] // Restart machine
 
#if !defined(CYGSEM_HAL_NEC_INLINE_INTERRUPT_FUNCTIONS)
.globl _hal_disable_interrupts
_hal_disable_interrupts:
stsr PSW,r10
di
jmp [lp]
 
.globl _hal_enable_interrupts
_hal_enable_interrupts:
stsr PSW,r6
ei
jmp [lp]
 
.globl _hal_restore_interrupts
_hal_restore_interrupts:
ldsr r6,PSW
jmp [lp]
#endif
// -------------------------------------------------------------------------
.section ".ram_vectors","awx",@progbits
 
#if defined(CYG_HAL_STARTUP_ROM)
// Trap jump table - used by builtin ROM
__vsr_table:
.rept CYGNUM_HAL_VSR_COUNT
.word 0x00000794,0,0,0 // jr 0x0100xx0, nop, nop, nop
.endr
__vsr_table_end:
#endif
 
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
_hal_vsr_table:
.rept CYGNUM_HAL_EXCEPTION_COUNT
.word do_exception
.endr
.rept CYGNUM_HAL_ISR_COUNT
.word do_interrupt
.endr
 
// Flag to indicate whether NMIs are allowed
// Without this, if we do a soft reset (using hal_plf_reset_board above)
// we may process NMIs like the watchdog timeout before the system can
// accept them
__allow_nmi:
.word 0
.balign 64
_hal_virtual_vector_table:
.rept CYGNUM_CALL_IF_TABLE_SIZE
.word 0
.endr
 
#if CYGINT_HAL_V85X_ICE_DEBUG
.globl _hal_v85x_ice_syscall_info
_hal_v85x_ice_syscall_info:
.rept 48
.long 0
.endr
#endif // if CYGINT_HAL_V85X_ICE_DEBUG
#endif // if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
.data
// Initial stack
.rept 1024
.byte 0
.endr
__startup_stack:
 
#ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096
#endif
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
.balign 16
.global _cyg_interrupt_stack_base
_cyg_interrupt_stack_base:
__interrupt_stack_base:
.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
.byte 0
.endr
.balign 16
.global _cyg_interrupt_stack
_cyg_interrupt_stack:
__interrupt_stack:
irq_level:
.long 0
#endif
 
// Interrupt vector tables.
// These tables contain the isr, data and object pointers used to deliver
// interrupts to user code.
 
.extern _hal_default_isr
 
.globl _hal_interrupt_handlers
_hal_interrupt_handlers:
.rept CYGNUM_HAL_ISR_COUNT
.long _hal_default_isr
.endr
 
.globl _hal_interrupt_data
_hal_interrupt_data:
.rept CYGNUM_HAL_ISR_COUNT
.long 0
.endr
 
.globl _hal_interrupt_objects
_hal_interrupt_objects:
.rept CYGNUM_HAL_ISR_COUNT
.long 0
.endr
 
// -------------------------------------------------------------------------
// EOF vectors.S
/arch/v2_0/src/hal_mk_defs.c
0,0 → 1,177
//==========================================================================
//
// hal_mk_defs.c
//
// HAL (architecture) "make defs" program
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): gthomas
// Contributors: gthomas, jskov, jlarmour
// Date: 2000-02-21
// Purpose: V850 architecture dependent definition generator
// Description: This file contains code that can be compiled by the target
// compiler and used to generate machine specific definitions
// suitable for use in assembly code.
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/hal_arch.h> // HAL header
#include <cyg/hal/hal_intr.h> // HAL header
#ifdef CYGPKG_KERNEL
# include <pkgconf/kernel.h>
# include <cyg/kernel/instrmnt.h>
#endif
#include <cyg/hal/hal_if.h>
 
/*
* This program is used to generate definitions needed by
* assembly language modules.
*
* This technique was first used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*/
 
#define DEFINE(sym, val) \
asm volatile("\n\t.equ\t" #sym ",%0" : : "i" (val))
 
int
main(void)
{
// setjmp/longjmp buffer
DEFINE(CYGARC_JMPBUF_SP, offsetof(hal_jmp_buf_t, sp));
DEFINE(CYGARC_JMPBUF_GP, offsetof(hal_jmp_buf_t, gp));
DEFINE(CYGARC_JMPBUF_TP, offsetof(hal_jmp_buf_t, tp));
DEFINE(CYGARC_JMPBUF_R1, offsetof(hal_jmp_buf_t, r1));
DEFINE(CYGARC_JMPBUF_R2, offsetof(hal_jmp_buf_t, r2));
DEFINE(CYGARC_JMPBUF_R4, offsetof(hal_jmp_buf_t, r4));
DEFINE(CYGARC_JMPBUF_R5, offsetof(hal_jmp_buf_t, r5));
DEFINE(CYGARC_JMPBUF_R20, offsetof(hal_jmp_buf_t, r20));
DEFINE(CYGARC_JMPBUF_R21, offsetof(hal_jmp_buf_t, r21));
DEFINE(CYGARC_JMPBUF_R22, offsetof(hal_jmp_buf_t, r22));
DEFINE(CYGARC_JMPBUF_R23, offsetof(hal_jmp_buf_t, r23));
DEFINE(CYGARC_JMPBUF_R24, offsetof(hal_jmp_buf_t, r24));
DEFINE(CYGARC_JMPBUF_R25, offsetof(hal_jmp_buf_t, r25));
DEFINE(CYGARC_JMPBUF_R26, offsetof(hal_jmp_buf_t, r26));
DEFINE(CYGARC_JMPBUF_R27, offsetof(hal_jmp_buf_t, r27));
DEFINE(CYGARC_JMPBUF_R28, offsetof(hal_jmp_buf_t, r28));
DEFINE(CYGARC_JMPBUF_FP, offsetof(hal_jmp_buf_t, fp));
DEFINE(CYGARC_JMPBUF_EP, offsetof(hal_jmp_buf_t, ep));
DEFINE(CYGARC_JMPBUF_LP, offsetof(hal_jmp_buf_t, lp));
 
DEFINE(CYGARC_JMPBUF_SIZE, sizeof(hal_jmp_buf_t));
 
// Exception/interrupt/context save buffer
DEFINE(CYGARC_REG_R1, offsetof(HAL_SavedRegisters, d[1]));
DEFINE(CYGARC_REG_R2, offsetof(HAL_SavedRegisters, d[2]));
DEFINE(CYGARC_REG_R3, offsetof(HAL_SavedRegisters, d[3]));
DEFINE(CYGARC_REG_SP, offsetof(HAL_SavedRegisters, d[3]));
DEFINE(CYGARC_REG_R4, offsetof(HAL_SavedRegisters, d[4]));
DEFINE(CYGARC_REG_R5, offsetof(HAL_SavedRegisters, d[5]));
DEFINE(CYGARC_REG_R6, offsetof(HAL_SavedRegisters, d[6]));
DEFINE(CYGARC_REG_R7, offsetof(HAL_SavedRegisters, d[7]));
DEFINE(CYGARC_REG_R8, offsetof(HAL_SavedRegisters, d[8]));
DEFINE(CYGARC_REG_R9, offsetof(HAL_SavedRegisters, d[9]));
DEFINE(CYGARC_REG_R10, offsetof(HAL_SavedRegisters, d[10]));
DEFINE(CYGARC_REG_R11, offsetof(HAL_SavedRegisters, d[11]));
DEFINE(CYGARC_REG_R12, offsetof(HAL_SavedRegisters, d[12]));
DEFINE(CYGARC_REG_R13, offsetof(HAL_SavedRegisters, d[13]));
DEFINE(CYGARC_REG_R14, offsetof(HAL_SavedRegisters, d[14]));
DEFINE(CYGARC_REG_R15, offsetof(HAL_SavedRegisters, d[15]));
DEFINE(CYGARC_REG_R16, offsetof(HAL_SavedRegisters, d[16]));
DEFINE(CYGARC_REG_R17, offsetof(HAL_SavedRegisters, d[17]));
DEFINE(CYGARC_REG_R18, offsetof(HAL_SavedRegisters, d[18]));
DEFINE(CYGARC_REG_R19, offsetof(HAL_SavedRegisters, d[19]));
DEFINE(CYGARC_REG_R20, offsetof(HAL_SavedRegisters, d[20]));
DEFINE(CYGARC_REG_R21, offsetof(HAL_SavedRegisters, d[21]));
DEFINE(CYGARC_REG_R22, offsetof(HAL_SavedRegisters, d[22]));
DEFINE(CYGARC_REG_R23, offsetof(HAL_SavedRegisters, d[23]));
DEFINE(CYGARC_REG_R24, offsetof(HAL_SavedRegisters, d[24]));
DEFINE(CYGARC_REG_R25, offsetof(HAL_SavedRegisters, d[25]));
DEFINE(CYGARC_REG_R26, offsetof(HAL_SavedRegisters, d[26]));
DEFINE(CYGARC_REG_R27, offsetof(HAL_SavedRegisters, d[27]));
DEFINE(CYGARC_REG_R28, offsetof(HAL_SavedRegisters, d[28]));
DEFINE(CYGARC_REG_R29, offsetof(HAL_SavedRegisters, d[29]));
DEFINE(CYGARC_REG_R30, offsetof(HAL_SavedRegisters, d[30]));
DEFINE(CYGARC_REG_R31, offsetof(HAL_SavedRegisters, d[31]));
DEFINE(CYGARC_REG_EP, offsetof(HAL_SavedRegisters, d[30]));
DEFINE(CYGARC_REG_LP, offsetof(HAL_SavedRegisters, d[31]));
DEFINE(CYGARC_REG_PSW, offsetof(HAL_SavedRegisters, psw));
DEFINE(CYGARC_REG_PC, offsetof(HAL_SavedRegisters, pc));
 
// Below only saved on exceptions/interrupts
DEFINE(CYGARC_REG_CAUSE, offsetof(HAL_SavedRegisters, cause));
DEFINE(CYGARC_REG_VECTOR, offsetof(HAL_SavedRegisters, vector));
 
DEFINE(CYGARC_EXCEPTION_FRAME_SIZE, sizeof(HAL_SavedRegisters));
 
// Some other exception related definitions
DEFINE(CYGNUM_HAL_ISR_MIN, CYGNUM_HAL_ISR_MIN);
DEFINE(CYGNUM_HAL_ISR_COUNT, CYGNUM_HAL_ISR_COUNT);
DEFINE(CYGNUM_HAL_VSR_MAX, CYGNUM_HAL_VSR_MAX);
DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT);
DEFINE(CYGNUM_HAL_EXCEPTION_COUNT, CYGNUM_HAL_EXCEPTION_COUNT);
DEFINE(CYGNUM_HAL_VECTOR_INTWDT, CYGNUM_HAL_VECTOR_INTWDT);
DEFINE(CYGNUM_HAL_VECTOR_TRAP00, CYGNUM_HAL_VECTOR_TRAP00);
DEFINE(CYGNUM_HAL_VECTOR_TRAP10, CYGNUM_HAL_VECTOR_TRAP10);
DEFINE(CYGNUM_HAL_VECTOR_ILGOP, CYGNUM_HAL_VECTOR_ILGOP);
DEFINE(CYGARC_PSW_ID, CYGARC_PSW_ID);
DEFINE(CYGARC_PSW_EP, CYGARC_PSW_EP);
DEFINE(CYGARC_PSW_NP, CYGARC_PSW_NP);
 
#ifdef CYGPKG_KERNEL
DEFINE(RAISE_INTR, CYG_INSTRUMENT_CLASS_INTR|CYG_INSTRUMENT_EVENT_INTR_RAISE);
#endif
 
#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT)
DEFINE(CYGNUM_CALL_IF_TABLE_SIZE, CYGNUM_CALL_IF_TABLE_SIZE);
#endif
 
// Variant definitions - want these to be included instead.
 
return 0;
}
 
//--------------------------------------------------------------------------
// EOF hal_mk_defs.c

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