URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
- from Rev 668 to Rev 675
- ↔ Reverse comparison
Rev 668 → Rev 675
/arch/reset.S
52,7 → 52,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0x200 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
63,7 → 63,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0x300 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
74,7 → 74,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0x400 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
92,7 → 92,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0x600 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
103,7 → 103,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0x700 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
121,7 → 121,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0x900 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
132,7 → 132,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0xa00 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
143,7 → 143,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0xb00 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
162,7 → 162,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0xd00 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
173,7 → 173,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0xe00 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |
184,7 → 184,7
l.nop |
l.sw -4(r1), r3 |
l.addi r3, r0, 0xf00 |
l.sw -132(r1), r3 |
l.sw -260(r1), r3 |
l.lwz r3, -4(r1) |
l.j vPortMiscIntHandler |
l.nop |