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  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/rtos/freertos-6.1.1/Demo
    from Rev 799 to Rev 800
    ↔ Reverse comparison
  •

Rev 799 → Rev 800

/OpenRISC_SIM_GCC/dma/or32_dma.c
0,0 → 1,161
/*
FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
 
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS books - available as PDF or paperback *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
 
This file is part of the FreeRTOS distribution.
 
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
 
1 tab == 4 spaces!
 
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
 
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
 
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
 
/*
* DMA demo task
* testing DMA, D-Cache
*/
 
#include <stdlib.h>
 
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
 
/* Demo program include files. */
#include "or32_dma.h"
#include "dma.h"
#include "support.h"
 
/* The constants used in the dma demo task. */
#define dmaSTACK_SIZE configMINIMAL_STACK_SIZE
 
/*-----------------------------------------------------------*/
/* Structure used to pass parameters to the blocking queue tasks. */
#define DMA_TRANSFER_WORD (256)
typedef struct DMA_DEMO_PARAMETERS
{
unsigned portBASE_TYPE source[DMA_TRANSFER_WORD];
unsigned portBASE_TYPE destination[DMA_TRANSFER_WORD];
} xDmaDemoParameters;
 
static volatile portBASE_TYPE checker;
/* Task function that creates an incrementing number and posts it on a queue. */
static portTASK_FUNCTION_PROTO( vDmaDemoTask, pvParameters );
 
void vStartDmaDemoTasks( unsigned portBASE_TYPE uxPriority )
{
xDmaDemoParameters *pxDmaDemoParamter;
checker = pdTRUE;
 
/* First create the structure used to pass parameters to the demo tasks. */
pxDmaDemoParamter = ( xDmaDemoParameters * ) pvPortMalloc( sizeof( xDmaDemoParameters ) );
 
/* create demo task */
xTaskCreate( vDmaDemoTask, ( signed char * ) "DmaDemo", dmaSTACK_SIZE, ( void * ) pxDmaDemoParamter, uxPriority, ( xTaskHandle * ) NULL );
}
/*-----------------------------------------------------------*/
 
static portTASK_FUNCTION( vDmaDemoTask, pvParameters )
{
xDmaDemoParameters *pxDmaDemoParamter = (xDmaDemoParameters *)pvParameters;
unsigned portBASE_TYPE *source = pxDmaDemoParamter->source;
unsigned portBASE_TYPE *destination = pxDmaDemoParamter->destination;
int i;
 
srand(0);
for( ;; )
{
/* Yield in case cooperative scheduling is being used. */
#if configUSE_PREEMPTION == 0
{
taskYIELD();
}
#endif
/* fill source array with random value */
for(i = 0; i < DMA_TRANSFER_WORD; i++)
{
source[i] = rand();
}
/* flushing dcache for coherency(update memory) */
flush_dcache_range((unsigned long)source, (unsigned long)(source + DMA_TRANSFER_WORD));
portENTER_CRITICAL();
{
/* move DMA_TRANSFER_WORD words from source to destination */
dma_block_transfer(0,
0, (unsigned int)source,
1, (unsigned int)destination,
16, DMA_TRANSFER_WORD, 0);
 
}
portEXIT_CRITICAL();
/* invalidating dcache for coherency(update cache) */
invalidate_dcache_range((unsigned long)destination, (unsigned long)(destination + DMA_TRANSFER_WORD));
 
for(i = 0; i < DMA_TRANSFER_WORD; i++)
{
if(source[i] != destination[i])
checker = pdFAIL;
}
 
/* Yield in case cooperative scheduling is being used. */
#if configUSE_PREEMPTION == 0
{
taskYIELD();
}
#endif
}
}
/*-----------------------------------------------------------*/
 
/* This is called to check that all the created tasks are still running. */
portBASE_TYPE xAreDmaDemoTaskStillRunning( void )
{
portBASE_TYPE xReturn = checker;
return xReturn;
}
 
/OpenRISC_SIM_GCC/dma/or32_dma.h
0,0 → 1,62
/*
FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
 
***************************************************************************
* *
* If you are: *
* *
* + New to FreeRTOS, *
* + Wanting to learn FreeRTOS or multitasking in general quickly *
* + Looking for basic training, *
* + Wanting to improve your FreeRTOS skills and productivity *
* *
* then take a look at the FreeRTOS books - available as PDF or paperback *
* *
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
* http://www.FreeRTOS.org/Documentation *
* *
* A pdf reference manual is also available. Both are usually delivered *
* to your inbox within 20 minutes to two hours when purchased between 8am *
* and 8pm GMT (although please allow up to 24 hours in case of *
* exceptional circumstances). Thank you for your support! *
* *
***************************************************************************
 
This file is part of the FreeRTOS distribution.
 
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
***NOTE*** The exception to the GPL is included to allow you to distribute
a combined work that includes FreeRTOS without being obliged to provide the
source code for proprietary components outside of the FreeRTOS kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
 
1 tab == 4 spaces!
 
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
 
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
 
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
 
#ifndef DMA_DEMO_H
#define DMA_DEMO_H
 
void vStartDmaDemoTasks( unsigned portBASE_TYPE uxPriority );
portBASE_TYPE xAreDmaDemoTaskStillRunning( void );
 
#endif
 
 
/OpenRISC_SIM_GCC/FreeRTOSConfig.h
73,7 → 73,7
#define configCPU_CLOCK_HZ ( ( unsigned long ) SYS_CLK )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 256 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 32 * 1024 ) )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 40 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 32 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
/OpenRISC_SIM_GCC/Makefile.inc
9,6 → 9,7
OBJDUMP = $(TARGET)-objdump
AR = $(TARGET)-ar
RANLIB = $(TARGET)-ranlib
SIZE = $(TARGET)-size
 
#-----------------------------------------------------------
WARNINGS= -Wall -Wextra -Wshadow -Wpointer-arith -Wbad-function-cast -Wcast-align -Wsign-compare \
/OpenRISC_SIM_GCC/main.c
74,11 → 74,14
#include "comtest2.h"
#include "dynamic.h"
 
#include "or32_dma.h"
 
/* BSP headers. */
#include "support.h"
#include "board.h"
#include "uart.h"
#include "gpio.h"
#include "dma.h"
 
#include "interrupts.h"
 
136,6 → 139,7
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vStartDmaDemoTasks( tskIDLE_PRIORITY );
vCreateBlockTimeTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
196,8 → 200,13
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
ulErrorDetected = pdTRUE;
}
}
if( xAreDmaDemoTaskStillRunning() != pdTRUE )
{
ulErrorDetected = pdTRUE;
}
if(ulErrorDetected == pdTRUE)
{
// something was wrong. report negative indicator
225,6 → 234,9
// UART controller use 25 Mhz Wishbone bus clock, define in board.h
uart_init(0);
uart_rxint_enable(0);
// Initialize DMA controller
dma_init((void *)DMA_BASE);
 
// Initialize internal Programmable Interrupt Controller
int_init();
/OpenRISC_SIM_GCC/sim.cfg
332,7 → 332,7
vapi_id = <value> (default: 0)
*/
section dma
enabled = 0
enabled = 1
baseaddr = 0x9a000000
irq = 11
end
/OpenRISC_SIM_GCC/Makefile
25,14 → 25,14
PORT_SRC = $(RTOS_SOURCE_DIR)/portable/GCC/OpenRISC/port.c
PORT_ASM = $(RTOS_SOURCE_DIR)/portable/GCC/OpenRISC/portasm.S
 
DEMO_SRC = main.c serial/serial.c ParTest/ParTest.c
DEMO_SRC = main.c serial/serial.c ParTest/ParTest.c dma/or32_dma.c
ARCH_ASM = ./arch/reset.S
 
INC = -I. -I../../Source/include -I./arch -I./drivers -I../Common/include \
INC = -I. -I../../Source/include -I./arch -I./drivers -I./dma \
-I../Common/include \
-I$(RTOS_SOURCE_DIR)/portable/GCC/OpenRISC
 
CFLAGS = $(WARNINGS) $(INC) \
-I../Common/include $(DEBUG) \
CFLAGS += $(WARNINGS) $(INC) $(DEBUG) \
-D__GCC_OpenRISC__ \
-fomit-frame-pointer -fno-strict-aliasing -fno-builtin
 
64,6 → 64,7
@$(CC) -c $(CFLAGS) -o $@ $<
 
all: $(PROG).or32
@$(SIZE) $(PORT_ASM_OBJ) $(PORT_OBJ) $(RTOS_OBJ) $(DEMO_OBJ) $(APP_OBJ) $(PROG).or32
 
$(PROG).or32 : $(PORT_ASM_OBJ) $(PORT_OBJ) $(RTOS_OBJ) $(DEMO_OBJ) $(APP_OBJ) Makefile arch drivers
@echo Link....
78,7 → 79,7
@(cd $@; make)
 
clean :
@rm -f $(PORT_ASM_OBJ) $(PORT_OBJ) $(RTOS_OBJ) $(DEMO_OBJ) $(APP_OBJ)
@rm -f $(RTOS_OBJ) $(DEMO_OBJ) $(PORT_OBJ) $(PORT_ASM_OBJ)
@rm -f rtosdemo.or32
@rm -f rtosdemo.map
@rm -f rtosdemo.asm
/OpenRISC_SIM_GCC/arch/board.h
1,13 → 1,6
#ifndef _BOARD_H_
#define _BOARD_H_
 
#define MC_ENABLED 0
 
#define IC_ENABLE 0
#define IC_SIZE 8192
#define DC_ENABLE 0
#define DC_SIZE 8192
 
#define SYS_CLK 25000000
#define IN_CLK 25000000
 
24,4 → 17,7
#define GPIO0_BASE 0x91000000
#define GPIO0_IRQ 3
 
#define DMA_BASE 0x9a000000
#define DMA_IRQ 11
 
#endif
/OpenRISC_SIM_GCC/drivers/dma.c
0,0 → 1,134
#include "board.h"
#include "dma.h"
#include "support.h"
 
static void dma_clear(void);
static volatile struct dma_t *_dma;
 
void dma_init(void *dma_base)
{
_dma = (struct dma_t *)dma_base;
dma_clear();
}
 
unsigned int dma_irq_src_a(void)
{
return _dma->int_src_a;
}
 
unsigned int dma_irq_src_b(void)
{
return _dma->int_src_b;
}
 
unsigned int dma_irq_msk_a(void)
{
return _dma->int_msk_a;
}
 
unsigned int dma_irq_msk_b(void)
{
return _dma->int_msk_b;
}
 
// enable DMA
// mask all interrupt
// disable all DMA channels
static void dma_clear(void)
{
int i;
 
_dma->control = DMA_CSR_GO; // enable DMA
 
_dma->int_msk_a = 0x00000000; // mask interrupt for interface A
_dma->int_msk_b = 0x00000000; // mask interrupt for interface B
// diable all DMA channles
for(i = 0; i < DMA_CHAN_NUMBER; i++) {
_dma->channels[i].control = 0x0;
_dma->channels[i].tranfer_size = 0x0;
_dma->channels[i].src_addr = 0x0;
// _dma->channels[i].src_mask = 0xFFFFFFFC;
_dma->channels[i].dst_addr = 0x0;
// _dma->channels[i].dat_mask = 0xFFFFFFFC;
_dma->channels[i].list_desc = 0x0;
_dma->channels[i].sw_ptr = 0x0;
}
}
 
// FIXME comments
int dma_channel_set(int channel,
unsigned int src_interface, unsigned int src_addr, unsigned int src_addr_incr,
unsigned int dst_interface, unsigned int dst_addr, unsigned int dst_addr_incr,
unsigned int chunk_word, unsigned int transfer_word,
int handshake_mode, int int_enable)
{
unsigned int channel_control = 0x0;
unsigned int channel_transfer_size = 0x0;
 
if(channel < 0 || channel > 31)
return 1;
if(chunk_word > 0x100) // 256 words max
return 1;
if(transfer_word > 0x1000) // 4096 words max
return 1;
// wait until channel is free
do { } while((_dma->channels[channel].control & DMA_CHAN_BUSY_MSK));
 
channel_control = (0x1 << DMA_CHAN_ENABLE_SHT) |
(src_interface << DMA_CHAN_SRC_SEL_SHT ) & DMA_CHAN_SRC_SEL_MSK |
(dst_interface << DMA_CHAN_DST_SEL_SHT ) & DMA_CHAN_SRC_SEL_MSK |
(src_addr_incr << DMA_CHAN_INC_SRC_SHT ) & DMA_CHAN_INC_SRC_MSK |
(dst_addr_incr << DMA_CHAN_INC_DST_SHT ) & DMA_CHAN_INC_DST_MSK |
(handshake_mode << DMA_CHAN_MODE_SHT ) & DMA_CHAN_MODE_MSK |
(int_enable << DMA_CHAN_INE_ERR_SHT ) & DMA_CHAN_INE_ERR_MSK |
(int_enable << DMA_CHAN_INE_DONE_SHT) & DMA_CHAN_INE_DONE_MSK;
 
channel_transfer_size = (transfer_word << DMA_CHAN_TOT_SZ_SHT) & DMA_CHAN_TOT_SZ_MSK |
(chunk_word << DMA_CHAN_CHK_SZ_SHT) & DMA_CHAN_CHK_SZ_MSK ;
// set channel go
_dma->channels[channel].src_addr = src_addr;
_dma->channels[channel].dst_addr = dst_addr;
_dma->channels[channel].tranfer_size = channel_transfer_size;
_dma->channels[channel].control = channel_control;
 
// uart_print_str("setting \n\r");
// uart_print_int(_dma->channels[channel].src_addr); uart_print_str("\n\r");
// uart_print_int(_dma->channels[channel].dst_addr); uart_print_str("\n\r");
// uart_print_int(_dma->channels[channel].tranfer_size); uart_print_str("\n\r");
// uart_print_int(_dma->channels[channel].control); uart_print_str("\n\r");
// uart_print_str("gg \n\r");
 
if(int_enable)
return 0;
 
// wait until dma is done if interrupt is not used
do { } while(!(_dma->channels[channel].control & (DMA_CHAN_DONE_MSK | DMA_CHAN_ERR_MSK)));
channel_control = _dma->channels[channel].control;
if(channel_control & DMA_CHAN_DONE_MSK)
return 0;
 
if(channel_control & DMA_CHAN_ERR_MSK)
return 2;
}
 
 
// FIXME comments
int dma_block_transfer(int channel,
unsigned int src_interface, unsigned int src_addr,
unsigned int dst_interface, unsigned int dst_addr,
unsigned int chunk_word, unsigned int transfer_word,
int int_enable)
{
return dma_channel_set(channel,
src_interface, src_addr, 1,
dst_interface, dst_addr, 1,
chunk_word, transfer_word,
0, int_enable);
}
/OpenRISC_SIM_GCC/drivers/dma.h
0,0 → 1,98
#ifndef _DMA_H_
#define _DMA_H_
 
struct dma_channel_descriptor {
unsigned int control;
unsigned int tranfer_size;
unsigned int src_addr;
unsigned int src_mask;
unsigned int dst_addr;
unsigned int dat_mask;
unsigned int list_desc;
unsigned int sw_ptr;
};
 
#define DMA_CHAN_NUMBER (31)
 
struct dma_t {
unsigned int control;
unsigned int int_msk_a;
unsigned int int_msk_b;
unsigned int int_src_a;
unsigned int int_src_b;
unsigned int padding[3];
struct dma_channel_descriptor channels[DMA_CHAN_NUMBER];
};
 
// DMA main control register
#define DMA_CSR_PAUSE (0x1)
#define DMA_CSR_GO (0x0)
 
// DMA Channel controller register
#define DMA_CHAN_INT_SRC_MSK (0x7 << 20) // channel interrupt source
#define DMA_CHAN_INE_CHK_DONE_MSK (0x1 << 19) // enable channel interrupt on transfer done when 1
#define DMA_CHAN_INE_DONE_MSK (0x1 << 18) // enable channel interrupt on transfer done when 1
#define DMA_CHAN_INE_ERR_MSK (0x1 << 17) // enable channel interrupt on erros when 1
#define DMA_CHAN_RST_EN_MSK (0x1 << 16) // hadware reset enable when 1
#define DMA_CHAN_PRIORITY_MSK (0x7 << 13) // channel Priority, 0 is lowest
#define DMA_CHAN_ERR_MSK (0x1 << 12) // channel stopped due to error when 1
#define DMA_CHAN_DONE_MSK (0x1 << 11) // channel stopped due to error when 1
#define DMA_CHAN_BUSY_MSK (0x1 << 10) // channel is busy when 1
#define DMA_CHAN_STOP_MSK (0x1 << 9) // stop current transfer, and set the ERR bit
#define DMA_CHAN_SZ_WB_MSK (0x1 << 8) // if this bit is set, enables the writting back of
// remaining size of the DEST_CSR when USE_ED is set
#define DMA_CHAN_USE_ED_MSK (0x1 << 7) // use external descriptor linked list when 1
#define DMA_CHAN_ARS_MSK (0x1 << 6) // auto restart when 1
#define DMA_CHAN_MODE_MSK (0x1 << 5) // normal mode when 0, HW handshake mode when 1
#define DMA_CHAN_INC_SRC_MSK (0x1 << 4) // increment src addr when 1
#define DMA_CHAN_INC_DST_MSK (0x1 << 3) // increment dst addr when 1
#define DMA_CHAN_SRC_SEL_MSK (0x1 << 2) // interface 0 or 1
#define DMA_CHAN_DST_SEL_MSK (0x1 << 1) // interface 0 or 1
#define DMA_CHAN_ENABLE_MSK (0x1 ) // enable when 0
 
#define DMA_CHAN_INT_SRC_SHT (20)
#define DMA_CHAN_INE_CHK_DONE_SHT (19)
#define DMA_CHAN_INE_DONE_SHT (18)
#define DMA_CHAN_INE_ERR_SHT (17)
#define DMA_CHAN_RST_EN_SHT (16)
#define DMA_CHAN_PRIORITY_SHT (13)
#define DMA_CHAN_ERR_SHT (12)
#define DMA_CHAN_DONE_SHT (11)
#define DMA_CHAN_BUSY_SHT (10)
#define DMA_CHAN_STOP_SHT ( 9)
#define DMA_CHAN_SZ_WB_SHT ( 8)
#define DMA_CHAN_USE_ED_SHT ( 7)
#define DMA_CHAN_ARS_SHT ( 6)
#define DMA_CHAN_MODE_SHT ( 5)
#define DMA_CHAN_INC_SRC_SHT ( 4)
#define DMA_CHAN_INC_DST_SHT ( 3)
#define DMA_CHAN_SRC_SEL_SHT ( 2)
#define DMA_CHAN_DST_SEL_SHT ( 1)
#define DMA_CHAN_ENABLE_SHT ( 0)
 
// DMA Channel size register
#define DMA_CHAN_CHK_SZ_MSK (0x1FF << 16) // Chunk Trnasfer size. number of words(4 Bytes) to
// be transferred at one given time. Maximum size is 2K bytes
#define DMA_CHAN_TOT_SZ_MSK (0x7FF ) // Total Transfre Size, number of words(4 Bytes).
// Maximum size is 16K bytes
 
#define DMA_CHAN_CHK_SZ_SHT (16)
#define DMA_CHAN_TOT_SZ_SHT ( 0)
 
 
void dma_init(void *dma_base);
unsigned int dma_irq_src_a(void);
unsigned int dma_irq_src_b(void);
unsigned int dma_irq_msk_a(void);
unsigned int dma_irq_msk_b(void);
int dma_channel_set(int channel,
unsigned int src_interface, unsigned int src_addr, unsigned int src_addr_incr,
unsigned int dst_interface, unsigned int dst_addr, unsigned int dst_addr_incr,
unsigned int chunk_word, unsigned int transfer_word,
int handshake_mode, int int_enable);
int dma_block_transfer(int channel,
unsigned int src_interface, unsigned int src_addr,
unsigned int dst_interface, unsigned int dst_addr,
unsigned int chunk_word, unsigned int transfer_word,
int int_enable);
#endif
/OpenRISC_SIM_GCC/drivers/Makefile
3,7 → 3,7
INCDIR = -I../arch
CFLAGS += $(INCDIR) -g
 
SRC_C = uart.c gpio.c
SRC_C = uart.c gpio.c dma.c
SRC_S =
 
OBJ_C = $(SRC_C:.c=.o)

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