URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/rtos/freertos-6.1.1/Source/portable
- from Rev 664 to Rev 665
- ↔ Reverse comparison
Rev 664 → Rev 665
/GCC/OpenRISC/port.c
88,11 → 88,14
inline void vPortDisableInterrupts( void ) |
{ |
mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt stop |
// mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_IEE)); // interrupt stop |
// mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_TEE)); // interrupt stop |
} |
|
inline void vPortEnableInterrupts( void ) |
{ |
mtspr(SPR_SR, mfspr(SPR_SR) | (SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt start |
//mtspr(SPR_SR, mfspr(SPR_SR) | (SPR_SR_IEE)); // interrupt start |
} |
|
|
/GCC/OpenRISC/portasm.S
74,7 → 74,7
.macro portSAVE_CONTEXT |
.global pxCurrentTCB |
# make rooms in stack |
l.addi r1, r1, -128 |
l.addi r1, r1, -132 |
# early save r3-r5, these are clobber register |
l.sw 0x08(r1), r3 |
l.sw 0x0C(r1), r4 |
166,7 → 166,7
l.lwz r3, 0x08(r1) |
l.lwz r4, 0x0C(r1) |
l.lwz r5, 0x10(r1) |
l.addi r1, r1, 128 |
l.addi r1, r1, 132 |
l.rfe |
l.nop |
.endm |
/GCC/OpenRISC/portmacro.h
98,7 → 98,6
#define portENABLE_INTERRUPTS() vPortEnableInterrupts() |
|
/*-----------------------------------------------------------*/ |
// Critical section handling. |
extern void vTaskEnterCritical( void ); |
extern void vTaskExitCritical( void ); |
#define portENTER_CRITICAL() vTaskEnterCritical() |
108,116 → 107,56
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) |
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) |
|
#ifdef __cplusplus |
} |
#endif |
|
// Macro to save all registers, stack pointer into the TCB. |
#define portSAVE_CONTEXT() \ |
asm volatile ( \ |
" .global pxCurrentTCB \n\t" \ |
" # make rooms in stack \n\t" \ |
" l.addi r1, r1, -128 \n\t" \ |
" # early save r3-r5, these are clobber register\n\t" \ |
" l.sw 0x08(r1), r3 \n\t" \ |
" l.sw 0x0C(r1), r4 \n\t" \ |
" l.sw 0x10(r1), r5 \n\t" \ |
" # save SPR_ESR_BASE(0), SPR_EPCR_BASE(0)\n\t" \ |
" l.mfspr r3, r0, (0<<11) + 64 \n\t" \ |
" l.mfspr r4, r0, (0<<11) + 32 \n\t" \ |
" l.sw 0x78(r1), r3 \n\t" \ |
" l.sw 0x7C(r1), r4 \n\t" \ |
" l.sw 0x00(r1), r9 \n\t" \ |
" # disable interrupts \n\t" \ |
" l.jal vPortDisableInterrupts \n\t" \ |
" # Save Context \n\t" \ |
" l.sw 0x04(r1), r2 \n\t" \ |
" l.sw 0x14(r1), r6 \n\t" \ |
" l.sw 0x18(r1), r7 \n\t" \ |
" l.sw 0x1C(r1), r8 \n\t" \ |
" l.sw 0x20(r1), r10 \n\t" \ |
" l.sw 0x24(r1), r11 \n\t" \ |
" l.sw 0x28(r1), r12 \n\t" \ |
" l.sw 0x2C(r1), r13 \n\t" \ |
" l.sw 0x30(r1), r14 \n\t" \ |
" l.sw 0x34(r1), r15 \n\t" \ |
" l.sw 0x38(r1), r16 \n\t" \ |
" l.sw 0x3C(r1), r17 \n\t" \ |
" l.sw 0x40(r1), r18 \n\t" \ |
" l.sw 0x44(r1), r19 \n\t" \ |
" l.sw 0x48(r1), r20 \n\t" \ |
" l.sw 0x4C(r1), r21 \n\t" \ |
" l.sw 0x50(r1), r22 \n\t" \ |
" l.sw 0x54(r1), r23 \n\t" \ |
" l.sw 0x58(r1), r24 \n\t" \ |
" l.sw 0x5C(r1), r25 \n\t" \ |
" l.sw 0x60(r1), r26 \n\t" \ |
" l.sw 0x64(r1), r27 \n\t" \ |
" l.sw 0x68(r1), r28 \n\t" \ |
" l.sw 0x6C(r1), r29 \n\t" \ |
" l.sw 0x70(r1), r30 \n\t" \ |
" l.sw 0x74(r1), r31 \n\t" \ |
" # Save the top of stack in TCB \n\t" \ |
" l.movhi r3, hi(pxCurrentTCB) \n\t" \ |
" l.ori r3, r3, lo(pxCurrentTCB)\n\t" \ |
" l.lwz r3, 0x0(r3) \n\t" \ |
" l.sw 0x0(r3), r1 \n\t" \ |
" # restore clobber register \n\t" \ |
" l.lwz r3, 0x08(r1) \n\t" \ |
" l.lwz r4, 0x0C(r1) \n\t" \ |
" l.lwz r5, 0x10(r1) \n\t" \ |
#define portRESTORE_CONTEXT() \ |
asm volatile ( \ |
" .global pxCurrentTCB \n\t" \ |
" # restore stack pointer \n\t" \ |
" l.movhi r3, hi(pxCurrentTCB) \n\t" \ |
" l.ori r3, r3, lo(pxCurrentTCB)\n\t" \ |
" l.lwz r3, 0x0(r3) \n\t" \ |
" l.lwz r1, 0x0(r3) \n\t" \ |
" # restore context \n\t" \ |
" l.lwz r9, 0x00(r1) \n\t" \ |
" l.lwz r2, 0x04(r1) \n\t" \ |
" l.lwz r6, 0x14(r1) \n\t" \ |
" l.lwz r7, 0x18(r1) \n\t" \ |
" l.lwz r8, 0x1C(r1) \n\t" \ |
" l.lwz r10, 0x20(r1) \n\t" \ |
" l.lwz r11, 0x24(r1) \n\t" \ |
" l.lwz r12, 0x28(r1) \n\t" \ |
" l.lwz r13, 0x2C(r1) \n\t" \ |
" l.lwz r14, 0x30(r1) \n\t" \ |
" l.lwz r15, 0x34(r1) \n\t" \ |
" l.lwz r16, 0x38(r1) \n\t" \ |
" l.lwz r17, 0x3C(r1) \n\t" \ |
" l.lwz r18, 0x40(r1) \n\t" \ |
" l.lwz r19, 0x44(r1) \n\t" \ |
" l.lwz r20, 0x48(r1) \n\t" \ |
" l.lwz r21, 0x4C(r1) \n\t" \ |
" l.lwz r22, 0x50(r1) \n\t" \ |
" l.lwz r23, 0x54(r1) \n\t" \ |
" l.lwz r24, 0x58(r1) \n\t" \ |
" l.lwz r25, 0x5C(r1) \n\t" \ |
" l.lwz r26, 0x60(r1) \n\t" \ |
" l.lwz r27, 0x64(r1) \n\t" \ |
" l.lwz r28, 0x68(r1) \n\t" \ |
" l.lwz r29, 0x6C(r1) \n\t" \ |
" l.lwz r30, 0x70(r1) \n\t" \ |
" l.lwz r31, 0x74(r1) \n\t" \ |
" # restore SPR_ESR_BASE(0), SPR_EPCR_BASE(0)\n\t" \ |
" l.lwz r3, 0x78(r1) \n\t" \ |
" l.lwz r4, 0x7C(r1) \n\t" \ |
" l.mtspr r0, r3, ((0<<11) + 64) \n\t" \ |
" l.mtspr r0, r4, ((0<<11) + 32) \n\t" \ |
" # restore clobber register \n\t" \ |
" l.lwz r3, 0x08(r1) \n\t" \ |
" l.lwz r4, 0x0C(r1) \n\t" \ |
" l.lwz r5, 0x10(r1) \n\t" \ |
" l.addi r1, r1, 132 \n\t" \ |
" l.rfe \n\t" \ |
" l.nop \n\t" \ |
); |
|
#define portRESTORE_CONTEXT() \ |
asm volatile ( \ |
" .global pxCurrentTCB \n\t" \ |
" # restore stack pointer \n\t" \ |
" l.movhi r3, hi(pxCurrentTCB) \n\t" \ |
" l.ori r3, r3, lo(pxCurrentTCB)\n\t" \ |
" l.lwz r3, 0x0(r3) \n\t" \ |
" l.lwz r1, 0x0(r3) \n\t" \ |
" # restore context \n\t" \ |
" l.lwz r9, 0x00(r1) \n\t" \ |
" l.lwz r2, 0x04(r1) \n\t" \ |
" l.lwz r6, 0x14(r1) \n\t" \ |
" l.lwz r7, 0x18(r1) \n\t" \ |
" l.lwz r8, 0x1C(r1) \n\t" \ |
" l.lwz r10, 0x20(r1) \n\t" \ |
" l.lwz r11, 0x24(r1) \n\t" \ |
" l.lwz r12, 0x28(r1) \n\t" \ |
" l.lwz r13, 0x2C(r1) \n\t" \ |
" l.lwz r14, 0x30(r1) \n\t" \ |
" l.lwz r15, 0x34(r1) \n\t" \ |
" l.lwz r16, 0x38(r1) \n\t" \ |
" l.lwz r17, 0x3C(r1) \n\t" \ |
" l.lwz r18, 0x40(r1) \n\t" \ |
" l.lwz r19, 0x44(r1) \n\t" \ |
" l.lwz r20, 0x48(r1) \n\t" \ |
" l.lwz r21, 0x4C(r1) \n\t" \ |
" l.lwz r22, 0x50(r1) \n\t" \ |
" l.lwz r23, 0x54(r1) \n\t" \ |
" l.lwz r24, 0x58(r1) \n\t" \ |
" l.lwz r25, 0x5C(r1) \n\t" \ |
" l.lwz r26, 0x60(r1) \n\t" \ |
" l.lwz r27, 0x64(r1) \n\t" \ |
" l.lwz r28, 0x68(r1) \n\t" \ |
" l.lwz r29, 0x6C(r1) \n\t" \ |
" l.lwz r30, 0x70(r1) \n\t" \ |
" l.lwz r31, 0x74(r1) \n\t" \ |
" # restore SPR_ESR_BASE(0), SPR_EPCR_BASE(0)\n\t" \ |
" l.lwz r3, 0x78(r1) \n\t" \ |
" l.lwz r4, 0x7C(r1) \n\t" \ |
" l.mtspr r0, r3, (0<<11) + 64 \n\t" \ |
" l.mtspr r0, r4, (0<<11) + 32 \n\t" \ |
" # restore clobber register \n\t" \ |
" l.lwz r3, 0x08(r1) \n\t" \ |
" l.lwz r4, 0x0C(r1) \n\t" \ |
" l.lwz r5, 0x10(r1) \n\t" \ |
" l.addi r1, r1, 128 \n\t" \ |
" l.rfe \n\t" \ |
" l.nop \n\t" \ |
); |
|
#ifdef __cplusplus |
} |
#endif |