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- This comparison shows the changes necessary to convert path
/openrisc/trunk/rtos/rtems/c/src/lib/libbsp/i960/rxgen960/shmsupp
- from Rev 30 to Rev 173
- ↔ Reverse comparison
Rev 30 → Rev 173
/getcfg.c
0,0 → 1,98
/* void Shm_Get_configuration( localnode, &shmcfg ) |
* |
* This routine initializes, if necessary, and returns a pointer |
* to the Shared Memory Configuration Table for the Cyclone CVME961. |
* |
* INPUT PARAMETERS: |
* localnode - local node number |
* shmcfg - address of pointer to SHM Config Table |
* |
* OUTPUT PARAMETERS: |
* *shmcfg - pointer to SHM Config Table |
* |
* NOTES: CVME961 target system has onboard dual-ported memory. This |
* file uses the USE_ONBOARD_RAM macro to determine if this |
* RAM is to be used as the SHM. If so (i.e. USE_ONBOARD_RAM |
* is set to 1), it is assumed that the master node's dual |
* ported memory will be used and that it is configured |
* correctly. The node owning the memory CANNOT access it |
* using a local address. The "if" insures that the MASTER |
* node uses a local address to access the dual-ported memory. |
* |
* The interprocessor interrupt used on the CVME961 is generated |
* by the VIC068. The ICMS capablities of the VIC068 are used |
* to generate interprocessor interrupts for up to eight nodes. |
* |
* The following table illustrates the configuration limitations: |
* |
* BUS MAX |
* MODE ENDIAN NODES |
* ========= ====== ======= |
* POLLED LITTLE 2+ |
* INTERRUPT LITTLE 2-8 |
* |
* COPYRIGHT (c) 1989-1997. |
* On-Line Applications Research Corporation (OAR). |
* Copyright assigned to U.S. Government, 1994. |
* |
* The license and distribution terms for this file may in |
* the file LICENSE in this distribution or at |
* http://www.OARcorp.com/rtems/license.html. |
* |
* $Id: getcfg.c,v 1.2 2001-09-27 11:59:59 chris Exp $ |
*/ |
|
#include <rtems.h> |
#include "shm_driver.h" |
|
#define USE_ONBOARD_RAM 0 /* use onboard (1) or VME RAM */ |
/* for SHM communications */ |
|
#define INTERRUPT 1 /* CVME961 target supports both */ |
#define POLLING 0 /* polling and interrupt modes */ |
|
|
shm_config_table BSP_shm_cfgtbl; |
|
void Shm_Get_configuration( |
rtems_unsigned32 localnode, |
shm_config_table **shmcfg |
) |
{ |
#if ( USE_ONBOARD_RAM == 1 ) |
if ( Shm_RTEMS_MP_Configuration->node == MASTER ) |
BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x00300000; |
else |
BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x10300000; |
#else |
BSP_shm_cfgtbl.base = (rtems_unsigned32 *)0x20000000; |
#endif |
|
BSP_shm_cfgtbl.length = 1 * MEGABYTE; |
BSP_shm_cfgtbl.format = SHM_LITTLE; |
|
BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt; |
|
#ifdef NEUTRAL_BIG |
BSP_shm_cfgtbl.convert = (void *)CPU_swap_u32; |
#else |
BSP_shm_cfgtbl.convert = NULL_CONVERT; |
#endif |
|
#if (POLLING==1) |
BSP_shm_cfgtbl.poll_intr = POLLED_MODE; |
BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT; |
BSP_shm_cfgtbl.Intr.value = NO_INTERRUPT; |
BSP_shm_cfgtbl.Intr.length = NO_INTERRUPT; |
#else |
BSP_shm_cfgtbl.poll_intr = INTR_MODE; |
BSP_shm_cfgtbl.Intr.address = |
(rtems_unsigned32 *) (0xffff0021|((localnode-1) << 12)); |
/* use ICMS0 */ |
BSP_shm_cfgtbl.Intr.value = 1; |
BSP_shm_cfgtbl.Intr.length = BYTE; |
#endif |
|
*shmcfg = &BSP_shm_cfgtbl; |
|
} |
/addrconv.c
0,0 → 1,37
/* Shm_Convert_address |
* |
* This routine takes into account the peculiar short VME address |
* of the CVME961 board. The CVME961 maps short address space |
* 0xffffxxxx to 0xb400xxxx. |
* |
* Input parameters: |
* address - address to convert |
* |
* Output parameters: |
* returns - converted address |
* |
* COPYRIGHT (c) 1989-1997. |
* On-Line Applications Research Corporation (OAR). |
* Copyright assigned to U.S. Government, 1994. |
* |
* The license and distribution terms for this file may in |
* the file LICENSE in this distribution or at |
* http://www.OARcorp.com/rtems/license.html. |
* |
* $Id: addrconv.c,v 1.2 2001-09-27 11:59:59 chris Exp $ |
*/ |
|
#include <rtems.h> |
#include <bsp.h> |
#include "shm_driver.h" |
|
void *Shm_Convert_address( |
void *address |
) |
{ |
rtems_unsigned32 workaddr = (rtems_unsigned32) address; |
|
if ( workaddr >= 0xffff0000 ) |
workaddr = (workaddr & 0xffff) | 0xb4000000; |
return ( (rtems_unsigned32 *)workaddr ); |
} |
/Makefile.am
0,0 → 1,33
## |
## $Id: Makefile.am,v 1.2 2001-09-27 11:59:59 chris Exp $ |
## |
|
AUTOMAKE_OPTIONS = foreign 1.4 |
|
PGM = $(ARCH)/shmsupp.rel |
|
C_FILES = addrconv.c getcfg.c lock.c mpisr.c |
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o) |
|
OBJS = $(C_O_FILES) |
|
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg |
include $(top_srcdir)/../../../../../../automake/lib.am |
|
# |
# (OPTIONAL) Add local stuff here using += |
# |
|
$(PGM): $(OBJS) |
$(make-rel) |
|
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile |
if HAS_MP |
all-local: $(ARCH) $(OBJS) $(PGM) |
endif |
|
.PRECIOUS: $(PGM) |
|
EXTRA_DIST = addrconv.c getcfg.c lock.c mpisr.c |
|
include $(top_srcdir)/../../../../../../automake/local.am |
/lock.c
0,0 → 1,76
/* Shared Memory Lock Routines |
* |
* This shared memory locked queue support routine need to be |
* able to lock the specified locked queue. Interrupts are |
* disabled while the queue is locked to prevent preemption |
* and deadlock when two tasks poll for the same lock. |
* previous level. |
* |
* COPYRIGHT (c) 1989-1997. |
* On-Line Applications Research Corporation (OAR). |
* Copyright assigned to U.S. Government, 1994. |
* |
* The license and distribution terms for this file may in |
* the file LICENSE in this distribution or at |
* http://www.OARcorp.com/rtems/license.html. |
* |
* $Id: lock.c,v 1.2 2001-09-27 11:59:59 chris Exp $ |
*/ |
|
#include <rtems.h> |
#include <bsp.h> |
#include <shm_driver.h> |
|
/* |
* Shm_Initialize_lock |
* |
* Initialize the lock for the specified locked queue. |
*/ |
|
void Shm_Initialize_lock( |
Shm_Locked_queue_Control *lq_cb |
) |
{ |
lq_cb->lock = LQ_UNLOCKED; |
} |
|
/* void _Shm_Lock( &lq_cb ) |
* |
* This shared memory locked queue support routine locks the |
* specified locked queue. It disables interrupts to prevent |
* a deadlock condition. |
*/ |
|
void Shm_Lock( |
Shm_Locked_queue_Control *lq_cb |
) |
{ |
rtems_unsigned32 isr_level, oldlock; |
|
rtems_interrupt_disable( isr_level ); |
Shm_isrstat = isr_level; |
while ( 1 ) { |
atomic_modify( SHM_LOCK_VALUE, &lq_cb->lock, oldlock ); |
if ( !(oldlock & SHM_LOCK_VALUE) ) |
return; |
delay( 28 ); /* delay 28 microseconds */ |
} |
} |
|
/* |
* Shm_Unlock |
* |
* Unlock the lock for the specified locked queue. |
*/ |
|
void Shm_Unlock( |
Shm_Locked_queue_Control *lq_cb |
) |
{ |
rtems_unsigned32 isr_level; |
|
lq_cb->lock = SHM_UNLOCK_VALUE; |
isr_level = Shm_isrstat; |
rtems_interrupt_enable( isr_level ); |
} |
|
/mpisr.c
0,0 → 1,69
/* |
* NOTE: This routine is not used when in polling mode. Either |
* this routine OR Shm_clockisr is used in a particular system. |
* |
* There must be sufficient time after the IACK (read at |
* 0xb600000x) for the VIC068 to clear the interrupt request |
* before the interrupt request is cleared from IPND (sf0). |
* |
* COPYRIGHT (c) 1989-1997. |
* On-Line Applications Research Corporation (OAR). |
* Copyright assigned to U.S. Government, 1994. |
* |
* The license and distribution terms for this file may in |
* the file LICENSE in this distribution or at |
* http://www.OARcorp.com/rtems/license.html. |
* |
* $Id: mpisr.c,v 1.2 2001-09-27 11:59:59 chris Exp $ |
*/ |
|
#include <rtems.h> |
#include <bsp.h> |
#include "shm_driver.h" |
|
rtems_isr Shm_isr_rxgen960( |
rtems_vector_number vector |
) |
{ |
rtems_unsigned32 vic_vector; |
|
/* enable_tracing(); */ |
vic_vector = (*(volatile rtems_unsigned8 *)0xb6000007); |
/* reset intr by reading */ |
/* vector at IPL=3 */ |
Shm_Interrupt_count += 1; |
rtems_multiprocessing_announce(); |
(*(volatile rtems_unsigned8 *)0xa000005f) = 0; /* clear ICMS0 */ |
i960_clear_intr( 6 ); |
|
} |
|
/* void _Shm_setvec( ) |
* |
* This driver routine sets the SHM interrupt vector to point to the |
* driver's SHM interrupt service routine. |
* |
* NOTE: See pp. 21-22, 36-39 of the CVME961 Manual for more info. |
* |
* Input parameters: NONE |
* |
* Output parameters: NONE |
*/ |
|
void Shm_setvec() |
{ |
rtems_unsigned32 isrlevel; |
|
rtems_interrupt_disable( isrlevel ); |
/* set SQSIO4 CTL REG for */ |
/* VME slave address */ |
(*(rtems_unsigned8 *)0xc00000b0) = |
(Shm_RTEMS_MP_Configuration->node - 1) | 0x10; |
set_vector( Shm_isr_rxgen960, 6, 1 ); |
/* set ICMS Bector Base Register */ |
(*(rtems_unsigned8 *)0xa0000053) = 0x60; /* XINT6 vector is 0x62 */ |
/* set ICMS Intr Control Reg */ |
(*(rtems_unsigned8 *)0xa0000047) = 0xeb; /* ICMS0 enabled, IPL=0 */ |
(*(rtems_unsigned8 *)0xa000005f) = 0; /* clear ICMS0 */ |
rtems_interrupt_enable( isrlevel ); |
} |