OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /openrisc/trunk/rtos/rtems/c/src/lib/libbsp/powerpc/eth_comm/include
    from Rev 30 to Rev 173
    ↔ Reverse comparison
  •

Rev 30 → Rev 173

/coverhd.h
0,0 → 1,114
/* coverhd.h
*
* This include file has defines to represent the overhead associated
* with calling a particular directive from C. These are used in the
* Timing Test Suite to ignore the overhead required to pass arguments
* to directives. On some CPUs and/or target boards, this overhead
* is significant and makes it difficult to distinguish internal
* RTEMS execution time from that used to call the directive.
* This file should be updated after running the C overhead timing
* test. Once this update has been performed, the RTEMS Time Test
* Suite should be rebuilt to account for these overhead times in the
* timing results.
*
* NOTE: If these are all zero, then the times reported include
* all calling overhead including passing of arguments.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id: coverhd.h,v 1.2 2001-09-27 12:00:35 chris Exp $
*/
 
#ifndef __COVERHD_h
#define __COVERHD_h
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
#define CALLING_OVERHEAD_TASK_CREATE 0
#define CALLING_OVERHEAD_TASK_IDENT 0
#define CALLING_OVERHEAD_TASK_START 0
#define CALLING_OVERHEAD_TASK_RESTART 0
#define CALLING_OVERHEAD_TASK_DELETE 0
#define CALLING_OVERHEAD_TASK_SUSPEND 0
#define CALLING_OVERHEAD_TASK_RESUME 0
#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
#define CALLING_OVERHEAD_TASK_MODE 0
#define CALLING_OVERHEAD_TASK_GET_NOTE 0
#define CALLING_OVERHEAD_TASK_SET_NOTE 0
#define CALLING_OVERHEAD_TASK_WAKE_WHEN 2
#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
#define CALLING_OVERHEAD_CLOCK_GET 2
#define CALLING_OVERHEAD_CLOCK_SET 2
#define CALLING_OVERHEAD_CLOCK_TICK 0
 
#define CALLING_OVERHEAD_TIMER_CREATE 0
#define CALLING_OVERHEAD_TIMER_IDENT 0
#define CALLING_OVERHEAD_TIMER_DELETE 0
#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0
#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 2
#define CALLING_OVERHEAD_TIMER_RESET 0
#define CALLING_OVERHEAD_TIMER_CANCEL 0
#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
 
#define CALLING_OVERHEAD_EVENT_SEND 0
#define CALLING_OVERHEAD_EVENT_RECEIVE 0
#define CALLING_OVERHEAD_SIGNAL_CATCH 0
#define CALLING_OVERHEAD_SIGNAL_SEND 0
#define CALLING_OVERHEAD_PARTITION_CREATE 0
#define CALLING_OVERHEAD_PARTITION_IDENT 0
#define CALLING_OVERHEAD_PARTITION_DELETE 0
#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
#define CALLING_OVERHEAD_REGION_CREATE 0
#define CALLING_OVERHEAD_REGION_IDENT 0
#define CALLING_OVERHEAD_REGION_DELETE 0
#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
#define CALLING_OVERHEAD_PORT_CREATE 0
#define CALLING_OVERHEAD_PORT_IDENT 0
#define CALLING_OVERHEAD_PORT_DELETE 0
#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
 
#define CALLING_OVERHEAD_IO_INITIALIZE 0
#define CALLING_OVERHEAD_IO_OPEN 0
#define CALLING_OVERHEAD_IO_CLOSE 0
#define CALLING_OVERHEAD_IO_READ 0
#define CALLING_OVERHEAD_IO_WRITE 0
#define CALLING_OVERHEAD_IO_CONTROL 0
#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
 
#ifdef __cplusplus
}
#endif
 
#endif
/* end of include file */
/canbus.h
0,0 → 1,172
/* canbus.h
*
* This include file contains all canbus IO definitions
*
* Written by Jay Monkman (jmonkman@frasca.com)
*
* COPYRIGHT (c) 1998
* Frasca International, Inc.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id:
*/
 
#ifndef __CANBUS_H_
#define __CANBUS_H_
 
#include <rtems.h>
 
typedef struct i82527_msg_t_ {
rtems_unsigned8 ctrl0 __attribute__ ((packed)); /* Control 0 register */
rtems_unsigned8 ctrl1 __attribute__ ((packed)); /* Control 1 register */
rtems_unsigned32 arb __attribute__ ((packed)); /* Arbitration reg */
rtems_unsigned8 cfg __attribute__ ((packed)); /* Message config reg */
rtems_unsigned8 data[8] __attribute__ ((packed)); /* Actual message */
} i82527_msg_t;
 
typedef struct i82527_t_ {
rtems_unsigned8 ctrl __attribute__ ((packed)); /* Control register */
rtems_unsigned8 status __attribute__ ((packed)); /* Status register */
rtems_unsigned8 cir __attribute__ ((packed)); /* CPU interface reg */
rtems_unsigned8 _res0 __attribute__ ((packed));
rtems_unsigned16 hsr __attribute__ ((packed)); /* High speed read */
rtems_unsigned16 gms __attribute__ ((packed)); /* Global Mask - std */
rtems_unsigned32 gml __attribute__ ((packed)); /* Global Mask - long */
rtems_unsigned32 mlm __attribute__ ((packed)); /* Mask last message */
i82527_msg_t msg1 __attribute__ ((packed)); /* Message 1 */
rtems_unsigned8 clkout __attribute__ ((packed)); /* CLKOUT register */
i82527_msg_t msg2 __attribute__ ((packed)); /* Message 2 */
rtems_unsigned8 bcr __attribute__ ((packed)); /* Bus config register */
i82527_msg_t msg3 __attribute__ ((packed)); /* Message 3 */
rtems_unsigned8 btr0 __attribute__ ((packed)); /* Bit timing reg 0 */
i82527_msg_t msg4 __attribute__ ((packed)); /* Message 4 */
rtems_unsigned8 btr1 __attribute__ ((packed)); /* Bit timing reg 1 */
i82527_msg_t msg5 __attribute__ ((packed)); /* Message 5 */
rtems_unsigned8 intr __attribute__ ((packed)); /* Interrupt register */
i82527_msg_t msg6 __attribute__ ((packed)); /* Message 6 */
rtems_unsigned8 _res1 __attribute__ ((packed));
i82527_msg_t msg7 __attribute__ ((packed)); /* Message 7 */
rtems_unsigned8 _res2 __attribute__ ((packed));
i82527_msg_t msg8 __attribute__ ((packed)); /* Message 8 */
rtems_unsigned8 _res3 __attribute__ ((packed));
i82527_msg_t msg9 __attribute__ ((packed)); /* Message 9 */
rtems_unsigned8 p1conf __attribute__ ((packed)); /* Port 1 config */
i82527_msg_t msg10 __attribute__ ((packed)); /* Message 10 */
rtems_unsigned8 p2conf __attribute__ ((packed)); /* Port 2 config */
i82527_msg_t msg11 __attribute__ ((packed)); /* Message 11 */
rtems_unsigned8 p1in __attribute__ ((packed)); /* Port 1 in */
i82527_msg_t msg12 __attribute__ ((packed)); /* Message 12 */
rtems_unsigned8 p2in __attribute__ ((packed)); /* Port 2 in */
i82527_msg_t msg13 __attribute__ ((packed)); /* Message 13 */
rtems_unsigned8 p1out __attribute__ ((packed)); /* Port 1 out */
i82527_msg_t msg14 __attribute__ ((packed)); /* Message 14 */
rtems_unsigned8 p2out __attribute__ ((packed)); /* Port 2 out */
i82527_msg_t msg15 __attribute__ ((packed)); /* Message 15 */
rtems_unsigned8 sra __attribute__ ((packed)); /* Serial reset address */
} i82527_t;
 
#define I82527_CTRL_CCE (1<<6)
#define I82527_CTRL_EIE (1<<3)
#define I82527_CTRL_SIE (1<<2)
#define I82527_CTRL_IE (1<<1)
#define I82527_CTRL_INIT (1)
#define I82527_STATUS_BOFF (1<<7)
#define I82527_STATUS_WARN (1<<6)
#define I82527_STATUS_WAKE (1<<5)
#define I82527_STATUS_RXOK (1<<4)
#define I82527_STATUS_TXOK (1<<3)
#define I82527_STATUS_LEC (7)
#define I82527_STATUS_LEC_NONE 0
#define I82527_STATUS_LEC_STUFF 1
#define I82527_STATUS_LEC_FORM 2
#define I82527_STATUS_LEC_ACK 3
#define I82527_STATUS_LEC_BIT1 4
#define I82527_STATUS_LEC_BIT0 5
#define I82527_STATUS_LEC_CRC 6
#define I82527_CIR_RSTSTAT (1<<7)
#define I82527_CIR_DSC (1<<6)
#define I82527_CIR_DMC (1<<5)
#define I82527_CIR_PWD (1<<4)
#define I82527_CIR_SLEEP (1<<3)
#define I82527_CIR_MUX (1<<2)
#define I82527_CIR_CEN (1)
#define I82527_CLKOUT_SL1 (1<<5)
#define I82527_CLKOUT_SLO (1<<4)
#define I82527_BCR_COBY (1<<6)
#define I82527_BCR_POL (1<<5)
#define I82527_DCT1 (1<<3)
#define I82527_DCR1 (1<<1)
#define I82527_DCR0 (1)
#define I82527_BTR1_SPL (1<<7)
#define I82527_MSG_CTRL_MSGVAL (2<<6)
#define I82527_MSG_CTRL_MSGVAL_NC (3<<6)
#define I82527_MSG_CTRL_MSGVAL_SET (2<<6)
#define I82527_MSG_CTRL_MSGVAL_CLR (1<<6)
#define I82527_MSG_CTRL_TXIE (2<<4)
#define I82527_MSG_CTRL_TXIE_NC (3<<4)
#define I82527_MSG_CTRL_TXIE_SET (2<<4)
#define I82527_MSG_CTRL_TXIE_CLR (1<<4)
#define I82527_MSG_CTRL_RXIE (2<<2)
#define I82527_MSG_CTRL_RXIE_NC (3<<2)
#define I82527_MSG_CTRL_RXIE_SET (2<<2)
#define I82527_MSG_CTRL_RXIE_CLR (1<<2)
#define I82527_MSG_CTRL_INTPND (2)
#define I82527_MSG_CTRL_INTPND_NC (3)
#define I82527_MSG_CTRL_INTPND_SET (2)
#define I82527_MSG_CTRL_INTPND_CLR (1)
#define I82527_MSG_CTRL_RMTPND (2<<6)
#define I82527_MSG_CTRL_RMTPND_NC (3<<6)
#define I82527_MSG_CTRL_RMTPND_SET (2<<6)
#define I82527_MSG_CTRL_RMTPND_CLR (1<<6)
#define I82527_MSG_CTRL_TXRQ (2<<4)
#define I82527_MSG_CTRL_TXRQ_NC (3<<4)
#define I82527_MSG_CTRL_TXRQ_SET (2<<4)
#define I82527_MSG_CTRL_TXRQ_CLR (1<<4)
#define I82527_MSG_CTRL_MSGLST (2<<2)
#define I82527_MSG_CTRL_MSGLST_NC (3<<2)
#define I82527_MSG_CTRL_MSGLST_SET (2<<2)
#define I82527_MSG_CTRL_MSGLST_CLR (1<<2)
#define I82527_MSG_CTRL_CPUUPD (2<<2)
#define I82527_MSG_CTRL_CPUUPD_NC (3<<2)
#define I82527_MSG_CTRL_CPUUPD_SET (2<<2)
#define I82527_MSG_CTRL_CPUUPD_CLR (1<<2)
#define I82527_MSG_CTRL_NEWDAT (2)
#define I82527_MSG_CTRL_NEWDAT_NC (3)
#define I82527_MSG_CTRL_NEWDAT_SET (2)
#define I82527_MSG_CTRL_NEWDAT_CLR (1)
#define I82527_MSG_CFG_DIR (1<<3)
#define I82527_MSG_CFG_XTD (1<<2)
 
extern i82527_t canbus0;
extern i82527_t canbus1;
extern i82527_t canbus2;
 
 
rtems_device_driver canbus_initialize(rtems_device_major_number,
rtems_device_minor_number,
void *);
rtems_device_driver canbus_open(rtems_device_major_number,
rtems_device_minor_number,
void *);
rtems_device_driver canbus_close(rtems_device_major_number,
rtems_device_minor_number,
void *);
rtems_device_driver canbus_read(rtems_device_major_number,
rtems_device_minor_number,
void *);
rtems_device_driver canbus_write(rtems_device_major_number,
rtems_device_minor_number,
void *);
rtems_device_driver canbus_control(rtems_device_major_number,
rtems_device_minor_number,
void *);
 
 
#define CANBUS_DRIVER_TABLE_ENTRY \
{ canbus_initialize, canbus_open, canbus_close, \
canbus_read, canbus_write, canbus_control }
 
#endif /* __CANBUS_H_ */
/info.h
0,0 → 1,92
/* info.h - Defines board info block structure and macros for
* handling elements of struct for ethernet comm board
*
* Written by Jay Monkman 7/21/98
* Copyright Frasca International, Inc 1998
*
* $Id: info.h,v 1.2 2001-09-27 12:00:35 chris Exp $
*/
 
#ifndef __info_h__
#define __info_h__
 
typedef struct BoardInfoBlock_ {
rtems_unsigned16 size; /* size of info block in bytes */
rtems_unsigned8 eth_id[6]; /* ethernet id of ethernet interface */
rtems_unsigned32 cpu_spd; /* cpu speed in Hz */
rtems_unsigned32 flash_size; /* size of flash memory in bytes */
rtems_unsigned32 ram_size; /* size of ram in bytes */
rtems_unsigned32 version; /* version of firmare (x.y format) */
rtems_unsigned32 if429; /* mask for arinc429 interface */
rtems_unsigned32 ifcsdb; /* mask for csdb interface */
rtems_unsigned16 if232; /* mask for rs232 interface */
rtems_unsigned8 ifcan; /* mask for canbus interface */
rtems_unsigned8 if568; /* mask for arinc568 interface */
rtems_unsigned8 fpn[16]; /* Frasca part number in ASCII */
rtems_unsigned16 rev; /* Board revision */
rtems_unsigned32 ip_num; /* Board IP number */
} boardinfo_t;
 
#define IFACE_ARINC429_TX0 0x00000001;
#define IFACE_ARINC429_RX0 0x00000002;
#define IFACE_ARINC429_TX1 0x00000004;
#define IFACE_ARINC429_RX1 0x00000008;
#define IFACE_ARINC429_TX2 0x00000010;
#define IFACE_ARINC429_RX2 0x00000020;
#define IFACE_ARINC429_TX3 0x00000040;
#define IFACE_ARINC429_RX3 0x00000080;
#define IFACE_ARINC429_TX4 0x00000100;
#define IFACE_ARINC429_RX4 0x00000200;
#define IFACE_ARINC429_TX5 0x00000400;
#define IFACE_ARINC429_RX5 0x00000800;
#define IFACE_ARINC429_TX6 0x00001000;
#define IFACE_ARINC429_RX6 0x00002000;
#define IFACE_ARINC429_TX7 0x00004000;
#define IFACE_ARINC429_RX7 0x00008000;
 
#define IFACE_ARINC568_TX0 0x0001;
#define IFACE_ARINC568_RX0 0x0002;
#define IFACE_ARINC568_TX1 0x0004;
#define IFACE_ARINC568_RX1 0x0008;
 
#define IFACE_CSDB_TX0 0x00000001;
#define IFACE_CSDB_RX0 0x00000002;
#define IFACE_CSDB_TX1 0x00000004;
#define IFACE_CSDB_RX1 0x00000008;
#define IFACE_CSDB_TX2 0x00000010;
#define IFACE_CSDB_RX2 0x00000020;
#define IFACE_CSDB_TX3 0x00000040;
#define IFACE_CSDB_RX3 0x00000080;
#define IFACE_CSDB_TX4 0x00000100;
#define IFACE_CSDB_RX4 0x00000200;
#define IFACE_CSDB_TX5 0x00000400;
#define IFACE_CSDB_RX5 0x00000800;
#define IFACE_CSDB_TX6 0x00001000;
#define IFACE_CSDB_RX6 0x00002000;
#define IFACE_CSDB_TX7 0x00004000;
#define IFACE_CSDB_RX7 0x00008000;
#define IFACE_CSDB_TX8 0x00010000;
#define IFACE_CSDB_RX8 0x00020000;
 
#define IFACE_CAN_TX0 0x0001;
#define IFACE_CAN_RX0 0x0002;
#define IFACE_CAN_TX1 0x0004;
#define IFACE_CAN_RX1 0x0008;
#define IFACE_CAN_TX2 0x0010;
#define IFACE_CAN_RX2 0x0020;
 
#define IFACE_RS232_TX0 0x0001;
#define IFACE_RS232_RX0 0x0002;
#define IFACE_RS232_TX1 0x0004;
#define IFACE_RS232_RX1 0x0008;
#define IFACE_RS232_TX2 0x0010;
#define IFACE_RS232_RX2 0x0020;
#define IFACE_RS232_TX3 0x0040;
#define IFACE_RS232_RX3 0x0080;
#define IFACE_RS232_TX4 0x0100;
#define IFACE_RS232_RX4 0x0200;
 
 
 
#endif /* __info_h__*/
/Makefile.am
0,0 → 1,32
##
## $Id: Makefile.am,v 1.2 2001-09-27 12:00:35 chris Exp $
##
 
AUTOMAKE_OPTIONS = foreign 1.4
 
H_FILES = bsp.h coverhd.h canbus.h info.h
 
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
 
$(PROJECT_INCLUDE)/bsp.h: bsp.h
$(INSTALL_DATA) $< $@
 
$(PROJECT_INCLUDE)/coverhd.h: coverhd.h
$(INSTALL_DATA) $< $@
 
$(PROJECT_INCLUDE)/canbus.h: canbus.h
$(INSTALL_DATA) $< $@
 
$(PROJECT_INCLUDE)/info.h: info.h
$(INSTALL_DATA) $< $@
 
TMPINSTALL_FILES += $(PROJECT_INCLUDE) $(PROJECT_INCLUDE)/bsp.h \
$(PROJECT_INCLUDE)/coverhd.h $(PROJECT_INCLUDE)/canbus.h \
$(PROJECT_INCLUDE)/info.h
 
all-local: $(TMPINSTALL_FILES)
 
EXTRA_DIST = bsp.h canbus.h coverhd.h info.h
 
include $(top_srcdir)/../../../../../../automake/local.am
/bsp.h
0,0 → 1,124
/* bsp.h
*
* This include file contains all board IO definitions.
*
* XXX : put yours in here
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id: bsp.h,v 1.2 2001-09-27 12:00:35 chris Exp $
*/
 
#ifndef __NO_BSP_h
#define __NO_BSP_h
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <rtems.h>
#include <console.h>
#include <clockdrv.h>
 
/*
* confdefs.h overrides for this BSP:
* - termios serial ports (defaults to 1)
* - Interrupt stack space is not minimum if defined.
*/
 
/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
#define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024)
/*
* Network driver configuration
*/
struct rtems_bsdnet_ifconfig;
extern int rtems_enet_driver_attach (struct rtems_bsdnet_ifconfig *config);
#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_enet_driver_attach
 
/*
* We need to decide how much memory will be non-cacheable. This
* will mainly be memory that will be used in DMA (network and serial
* buffers).
*/
#define NOCACHE_MEM_SIZE 512*1024
 
/*
* Define the time limits for RTEMS Test Suite test durations.
* Long test and short test duration limits are provided. These
* values are in seconds and need to be converted to ticks for the
* application.
*
*/
 
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
 
/*
* Stuff for Time Test 27
*/
 
#define MUST_WAIT_FOR_INTERRUPT 0
 
#define Install_tm27_vector( handler ) set_vector( (handler), PPC_IRQ_SCALL, 1 )
 
#define Cause_tm27_intr() asm volatile ("sc")
 
#define Clear_tm27_intr()
 
#define Lower_tm27_intr()
 
/* Constants */
 
#define RAM_START 0
#define RAM_END 0x100000
 
/* miscellaneous stuff assumed to exist */
 
extern rtems_configuration_table BSP_Configuration;
 
/*
* Device Driver Table Entries
*/
 
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
 
/*
* How many libio files we want
*/
 
#define BSP_LIBIO_MAX_FDS 20
 
/* functions */
 
void bsp_cleanup( void );
 
void M860ExecuteRISC( rtems_unsigned16 command );
void *M860AllocateBufferDescriptors( int count );
void *M860AllocateRiscTimers( int count );
extern char M860DefaultWatchdogFeeder;
 
rtems_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
);
 
#ifdef __cplusplus
}
#endif
 
#endif
/* end of include file */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.