URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/rtos/rtems/c/src/lib/libbsp/powerpc/shared/include
- from Rev 30 to Rev 173
- ↔ Reverse comparison
Rev 30 → Rev 173
/Makefile.am
0,0 → 1,11
## |
## $Id: Makefile.am,v 1.2 2001-09-27 12:01:06 chris Exp $ |
## |
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AUTOMAKE_OPTIONS = foreign 1.4 |
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H_FILES = nvram.h bsp.h |
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EXTRA_DIST = bsp.h nvram.h |
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include $(top_srcdir)/../../../../../automake/local.am |
/nvram.h
0,0 → 1,170
/* |
* PreP compliant NVRAM access |
* |
* This file can be found in motorla or IBP PPC site. |
* |
* $Id: nvram.h,v 1.2 2001-09-27 12:01:06 chris Exp $ |
*/ |
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#ifndef _PPC_NVRAM_H |
#define _PPC_NVRAM_H |
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#define NVRAM_AS0 0x74 |
#define NVRAM_AS1 0x75 |
#define NVRAM_DATA 0x77 |
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/* RTC Offsets */ |
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#define MOTO_RTC_SECONDS 0x1FF9 |
#define MOTO_RTC_MINUTES 0x1FFA |
#define MOTO_RTC_HOURS 0x1FFB |
#define MOTO_RTC_DAY_OF_WEEK 0x1FFC |
#define MOTO_RTC_DAY_OF_MONTH 0x1FFD |
#define MOTO_RTC_MONTH 0x1FFE |
#define MOTO_RTC_YEAR 0x1FFF |
#define MOTO_RTC_CONTROLA 0x1FF8 |
#define MOTO_RTC_CONTROLB 0x1FF9 |
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#ifndef BCD_TO_BIN |
#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) |
#endif |
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#ifndef BIN_TO_BCD |
#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10) |
#endif |
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/* Structure map for NVRAM on PowerPC Reference Platform */ |
/* All fields are either character/byte strings which are valid either |
endian or they are big-endian numbers. |
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There are a number of Date and Time fields which are in RTC format, |
big-endian. These are stored in UT (GMT). |
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For enum's: if given in hex then they are bit significant, i.e. only |
one bit is on for each enum. |
*/ |
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#define NVSIZE 4096 /* size of NVRAM */ |
#define OSAREASIZE 512 /* size of OSArea space */ |
#define CONFSIZE 1024 /* guess at size of Configuration space */ |
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#ifndef ASM |
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typedef struct _SECURITY { |
unsigned long BootErrCnt; /* Count of boot password errors */ |
unsigned long ConfigErrCnt; /* Count of config password errors */ |
unsigned long BootErrorDT[2]; /* Date&Time from RTC of last error in pw */ |
unsigned long ConfigErrorDT[2]; /* Date&Time from RTC of last error in pw */ |
unsigned long BootCorrectDT[2]; /* Date&Time from RTC of last correct pw */ |
unsigned long ConfigCorrectDT[2]; /* Date&Time from RTC of last correct pw */ |
unsigned long BootSetDT[2]; /* Date&Time from RTC of last set of pw */ |
unsigned long ConfigSetDT[2]; /* Date&Time from RTC of last set of pw */ |
unsigned char Serial[16]; /* Box serial number */ |
} SECURITY; |
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typedef enum _OS_ID { |
Unknown = 0, |
Firmware = 1, |
AIX = 2, |
NT = 3, |
MKOS2 = 4, |
MKAIX = 5, |
Taligent = 6, |
Solaris = 7, |
MK = 12 |
} OS_ID; |
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typedef struct _ERROR_LOG { |
unsigned char ErrorLogEntry[40]; /* To be architected */ |
} ERROR_LOG; |
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typedef enum _BOOT_STATUS { |
BootStarted = 0x01, |
BootFinished = 0x02, |
RestartStarted = 0x04, |
RestartFinished = 0x08, |
PowerFailStarted = 0x10, |
PowerFailFinished = 0x20, |
ProcessorReady = 0x40, |
ProcessorRunning = 0x80, |
ProcessorStart = 0x0100 |
} BOOT_STATUS; |
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typedef struct _RESTART_BLOCK { |
unsigned short Version; |
unsigned short Revision; |
unsigned long ResumeReserve1[2]; |
volatile unsigned long BootStatus; |
unsigned long CheckSum; /* Checksum of RESTART_BLOCK */ |
void* RestartAddress; |
void* SaveAreaAddr; |
unsigned long SaveAreaLength; |
} RESTART_BLOCK; |
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typedef enum _OSAREA_USAGE { |
Empty = 0, |
Used = 1 |
} OSAREA_USAGE; |
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typedef enum _PM_MODE { |
Suspend = 0x80, /* Part of state is in memory */ |
Normal = 0x00 /* No power management in effect */ |
} PMMode; |
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typedef struct _HEADER { |
unsigned short Size; /* NVRAM size in K(1024) */ |
unsigned char Version; /* Structure map different */ |
unsigned char Revision; /* Structure map the same -may |
be new values in old fields |
in other words old code still works */ |
unsigned short Crc1; /* check sum from beginning of nvram to OSArea */ |
unsigned short Crc2; /* check sum of config */ |
unsigned char LastOS; /* OS_ID */ |
unsigned char Endian; /* B if big endian, L if little endian */ |
unsigned char OSAreaUsage;/* OSAREA_USAGE */ |
unsigned char PMMode; /* Shutdown mode */ |
RESTART_BLOCK RestartBlock; |
SECURITY Security; |
ERROR_LOG ErrorLog[2]; |
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/* Global Environment information */ |
void* GEAddress; |
unsigned long GELength; |
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/* Date&Time from RTC of last change to Global Environment */ |
unsigned long GELastWriteDT[2]; |
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/* Configuration information */ |
void* ConfigAddress; |
unsigned long ConfigLength; |
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/* Date&Time from RTC of last change to Configuration */ |
unsigned long ConfigLastWriteDT[2]; |
unsigned long ConfigCount; /* Count of entries in Configuration */ |
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/* OS dependent temp area */ |
void* OSAreaAddress; |
unsigned long OSAreaLength; |
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/* Date&Time from RTC of last change to OSAreaArea */ |
unsigned long OSAreaLastWriteDT[2]; |
} HEADER; |
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/* Here is the whole map of the NVRAM */ |
typedef struct _NVRAM_MAP { |
HEADER Header; |
unsigned char GEArea[NVSIZE-CONFSIZE-OSAREASIZE-sizeof(HEADER)]; |
unsigned char OSArea[OSAREASIZE]; |
unsigned char ConfigArea[CONFSIZE]; |
} NVRAM_MAP; |
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/* Routines to manipulate the NVRAM */ |
void init_prep_nvram(void); |
char *prep_nvram_get_var(const char *name); |
char *prep_nvram_first_var(void); |
char *prep_nvram_next_var(char *name); |
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#endif /* ASM */ |
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#endif /* _PPC_NVRAM_H */ |
/bsp.h
0,0 → 1,119
/* |
* bsp.h -- contain BSP API definition. |
* |
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
* |
* The license and distribution terms for this file may be |
* found in found in the file LICENSE in this distribution or at |
* http://www.OARcorp.com/rtems/license.html. |
* |
* $Id: bsp.h,v 1.2 2001-09-27 12:01:06 chris Exp $ |
*/ |
#ifndef LIBBSP_POWERPC_MOTOROLA_SHARED_BSP_H |
#define LIBBSP_POWERPC_MOTOROLA_SHARED_BSP_H |
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#include <rtems.h> |
#include <console.h> |
#include <libcpu/io.h> |
#include <clockdrv.h> |
#include <bsp/vectors.h> |
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/* |
* confdefs.h overrides for this BSP: |
* - termios serial ports (defaults to 1) |
* - Interrupt stack space is not minimum if defined. |
*/ |
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/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ |
#define CONFIGURE_INTERRUPT_STACK_MEMORY (16 * 1024) |
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#ifndef ASM |
#define outport_byte(port,value) outb(value,port) |
#define outport_word(port,value) outw(value,port) |
#define outport_long(port,value) outl(value,port) |
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#define inport_byte(port,value) (value = inb(port)) |
#define inport_word(port,value) (value = inw(port)) |
#define inport_long(port,value) (value = inl(port)) |
/* |
* Vital Board data Start using DATA RESIDUAL |
*/ |
/* |
* Total memory using RESIDUAL DATA |
*/ |
extern unsigned int BSP_mem_size; |
/* |
* PCI Bus Frequency |
*/ |
extern unsigned int BSP_bus_frequency; |
/* |
* processor clock frequency |
*/ |
extern unsigned int BSP_processor_frequency; |
/* |
* Time base divisior (how many tick for 1 second). |
*/ |
extern unsigned int BSP_time_base_divisor; |
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#define BSP_Convert_decrementer( _value ) \ |
((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) |
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extern rtems_configuration_table BSP_Configuration; |
extern void BSP_panic(char *s); |
extern void rtemsReboot(void); |
extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); |
extern int BSP_disconnect_clock_handler (void); |
extern int BSP_connect_clock_handler (void); |
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/* |
* TM27 stuff |
*/ |
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#if defined(USE_ENHANCED_INTR_API) && defined(RTEMS_TM27) |
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#include <bsp/irq.h> |
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#define MUST_WAIT_FOR_INTERRUPT 1 |
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void nullFunc() {} |
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, |
0, |
(rtems_irq_enable)nullFunc, |
(rtems_irq_disable)nullFunc, |
(rtems_irq_is_enabled) nullFunc}; |
void Install_tm27_vector(void (*_handler)()) |
{ |
clockIrqData.hdl = _handler; |
if (!BSP_install_rtems_irq_handler (&clockIrqData)) { |
printk("Error installing clock interrupt handler!\n"); |
rtems_fatal_error_occurred(1); |
} |
} |
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#define Cause_tm27_intr() \ |
do { \ |
unsigned32 _clicks = 8; \ |
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ |
} while (0) |
|
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#define Clear_tm27_intr() \ |
do { \ |
unsigned32 _clicks = 0xffffffff; \ |
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ |
} while (0) |
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#define Lower_tm27_intr() \ |
do { \ |
unsigned32 _msr = 0; \ |
_ISR_Set_level( 0 ); \ |
asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ |
_msr |= 0x8002; \ |
asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ |
} while (0) |
#endif |
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#endif |
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#endif |