OpenCores

/ucos-ii/2.91/utils/bin2srec Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream

ucos-ii/2.91/utils/bin2srec Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: ucos-ii/2.91/utils/bin2srec.c =================================================================== --- ucos-ii/2.91/utils/bin2srec.c (nonexistent) +++ ucos-ii/2.91/utils/bin2srec.c (revision 471) @@ -0,0 +1,43 @@ +#include + +#define SMARK "S214" +#define SADDR 0x000000 +#define INIT_ADDR 0x100000 +#define SCHKSUM 0xff + +int main(int argc, char **argv) +{ + + FILE *fd; + int c, i, j; + unsigned long addr = INIT_ADDR; + unsigned char chksum; + + if(argc < 2) + error("no input file specified"); + + fd = fopen( argv[1], "r" ); + + while (!feof(fd)) { + j = 0; + chksum = SCHKSUM; + printf("%s%.6lx", SMARK, addr); + while (j < 16) { + c = fgetc(fd); + if (c == EOF) { + c = 0; + } + printf("%.2lx", c); + chksum -= c; + j++; + } + + chksum -= addr & 0xff; + chksum -= (addr >> 8) & 0xff; + chksum -= (addr >> 16) & 0xff; + chksum -= 0x14; + printf("%.2lx\r\n", chksum); + addr += 16; + } + return 0; +} Index: ucos-ii/2.91/utils/bin2flimg =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: ucos-ii/2.91/utils/bin2flimg =================================================================== --- ucos-ii/2.91/utils/bin2flimg (nonexistent) +++ ucos-ii/2.91/utils/bin2flimg (revision 471)

ucos-ii/2.91/utils/bin2flimg Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: ucos-ii/2.91/utils/bin2flimg.c =================================================================== --- ucos-ii/2.91/utils/bin2flimg.c (nonexistent) +++ ucos-ii/2.91/utils/bin2flimg.c (revision 471) @@ -0,0 +1,36 @@ +#include + +int main(int argc, char **argv) +{ + + FILE *fd; + int c, i, j, width; + unsigned long word; + + if(argc < 3) + error("no input file specified"); + + width = atoi(argv[1]); + + fd = fopen( argv[2], "r" ); + + while (!feof(fd)) { + j = 0; + word = 0; + while (j < width) { + c = fgetc(fd); + if (c == EOF) { + c = 0; + } + word = (word << 8) + c; + j++; + } + if(width == 1) + printf("%.2lx\n", word); + else if(width == 2) + printf("%.4lx\n", word); + else + printf("%.8lx\n", word); + } + return 0; +} Index: ucos-ii/2.91/utils/Makefile =================================================================== --- ucos-ii/2.91/utils/Makefile (nonexistent) +++ ucos-ii/2.91/utils/Makefile (revision 471) @@ -0,0 +1,7 @@ +all: bin2srec bin2flimg + +bin2srec: bin2srec.c + gcc -O2 -o bin2srec bin2srec.c + +bin2flimg: bin2flimg.c + gcc -O2 -o bin2flimg bin2flimg.c Index: ucos-ii/2.91/include/ucos_ii.h =================================================================== --- ucos-ii/2.91/include/ucos_ii.h (nonexistent) +++ ucos-ii/2.91/include/ucos_ii.h (revision 471) @@ -0,0 +1,1924 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* +* (c) Copyright 1992-2009, Micrium, Weston, FL +* All Rights Reserved +* +* File : uCOS_II.H +* By : Jean J. Labrosse +* Version : V2.91 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micri�m to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_uCOS_II_H +#define OS_uCOS_II_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* +********************************************************************************************************* +* uC/OS-II VERSION NUMBER +********************************************************************************************************* +*/ + +#define OS_VERSION 291u /* Version of uC/OS-II (Vx.yy mult. by 100) */ + +/* +********************************************************************************************************* +* INCLUDE HEADER FILES +********************************************************************************************************* +*/ + +#include +#include +#include + +/* +********************************************************************************************************* +* MISCELLANEOUS +********************************************************************************************************* +*/ + +#ifdef OS_GLOBALS +#define OS_EXT +#else +#define OS_EXT extern +#endif + +#ifndef OS_FALSE +#define OS_FALSE 0u +#endif + +#ifndef OS_TRUE +#define OS_TRUE 1u +#endif + +#define OS_ASCII_NUL (INT8U)0 + +#define OS_PRIO_SELF 0xFFu /* Indicate SELF priority */ + +#if OS_TASK_STAT_EN > 0u +#define OS_N_SYS_TASKS 2u /* Number of system tasks */ +#else +#define OS_N_SYS_TASKS 1u +#endif + +#define OS_TASK_STAT_PRIO (OS_LOWEST_PRIO - 1u) /* Statistic task priority */ +#define OS_TASK_IDLE_PRIO (OS_LOWEST_PRIO) /* IDLE task priority */ + +#if OS_LOWEST_PRIO <= 63u +#define OS_EVENT_TBL_SIZE ((OS_LOWEST_PRIO) / 8u + 1u) /* Size of event table */ +#define OS_RDY_TBL_SIZE ((OS_LOWEST_PRIO) / 8u + 1u) /* Size of ready table */ +#else +#define OS_EVENT_TBL_SIZE ((OS_LOWEST_PRIO) / 16u + 1u)/* Size of event table */ +#define OS_RDY_TBL_SIZE ((OS_LOWEST_PRIO) / 16u + 1u)/* Size of ready table */ +#endif + +#define OS_TASK_IDLE_ID 65535u /* ID numbers for Idle, Stat and Timer tasks */ +#define OS_TASK_STAT_ID 65534u +#define OS_TASK_TMR_ID 65533u + +#define OS_EVENT_EN (((OS_Q_EN > 0u) && (OS_MAX_QS > 0u)) || (OS_MBOX_EN > 0u) || (OS_SEM_EN > 0u) || (OS_MUTEX_EN > 0u)) + +#define OS_TCB_RESERVED ((OS_TCB *)1) + +/*$PAGE*/ +/* +********************************************************************************************************* +* TASK STATUS (Bit definition for OSTCBStat) +********************************************************************************************************* +*/ +#define OS_STAT_RDY 0x00u /* Ready to run */ +#define OS_STAT_SEM 0x01u /* Pending on semaphore */ +#define OS_STAT_MBOX 0x02u /* Pending on mailbox */ +#define OS_STAT_Q 0x04u /* Pending on queue */ +#define OS_STAT_SUSPEND 0x08u /* Task is suspended */ +#define OS_STAT_MUTEX 0x10u /* Pending on mutual exclusion semaphore */ +#define OS_STAT_FLAG 0x20u /* Pending on event flag group */ +#define OS_STAT_MULTI 0x80u /* Pending on multiple events */ + +#define OS_STAT_PEND_ANY (OS_STAT_SEM | OS_STAT_MBOX | OS_STAT_Q | OS_STAT_MUTEX | OS_STAT_FLAG) + +/* +********************************************************************************************************* +* TASK PEND STATUS (Status codes for OSTCBStatPend) +********************************************************************************************************* +*/ +#define OS_STAT_PEND_OK 0u /* Pending status OK, not pending, or pending complete */ +#define OS_STAT_PEND_TO 1u /* Pending timed out */ +#define OS_STAT_PEND_ABORT 2u /* Pending aborted */ + +/* +********************************************************************************************************* +* OS_EVENT types +********************************************************************************************************* +*/ +#define OS_EVENT_TYPE_UNUSED 0u +#define OS_EVENT_TYPE_MBOX 1u +#define OS_EVENT_TYPE_Q 2u +#define OS_EVENT_TYPE_SEM 3u +#define OS_EVENT_TYPE_MUTEX 4u +#define OS_EVENT_TYPE_FLAG 5u + +#define OS_TMR_TYPE 100u /* Used to identify Timers ... */ + /* ... (Must be different value than OS_EVENT_TYPE_xxx) */ + +/* +********************************************************************************************************* +* EVENT FLAGS +********************************************************************************************************* +*/ +#define OS_FLAG_WAIT_CLR_ALL 0u /* Wait for ALL the bits specified to be CLR (i.e. 0) */ +#define OS_FLAG_WAIT_CLR_AND 0u + +#define OS_FLAG_WAIT_CLR_ANY 1u /* Wait for ANY of the bits specified to be CLR (i.e. 0) */ +#define OS_FLAG_WAIT_CLR_OR 1u + +#define OS_FLAG_WAIT_SET_ALL 2u /* Wait for ALL the bits specified to be SET (i.e. 1) */ +#define OS_FLAG_WAIT_SET_AND 2u + +#define OS_FLAG_WAIT_SET_ANY 3u /* Wait for ANY of the bits specified to be SET (i.e. 1) */ +#define OS_FLAG_WAIT_SET_OR 3u + + +#define OS_FLAG_CONSUME 0x80u /* Consume the flags if condition(s) satisfied */ + + +#define OS_FLAG_CLR 0u +#define OS_FLAG_SET 1u + +/* +********************************************************************************************************* +* Values for OSTickStepState +* +* Note(s): This feature is used by uC/OS-View. +********************************************************************************************************* +*/ + +#if OS_TICK_STEP_EN > 0u +#define OS_TICK_STEP_DIS 0u /* Stepping is disabled, tick runs as mormal */ +#define OS_TICK_STEP_WAIT 1u /* Waiting for uC/OS-View to set OSTickStepState to _ONCE */ +#define OS_TICK_STEP_ONCE 2u /* Process tick once and wait for next cmd from uC/OS-View */ +#endif + +/* +********************************************************************************************************* +* Possible values for 'opt' argument of OSSemDel(), OSMboxDel(), OSQDel() and OSMutexDel() +********************************************************************************************************* +*/ +#define OS_DEL_NO_PEND 0u +#define OS_DEL_ALWAYS 1u + +/* +********************************************************************************************************* +* OS???Pend() OPTIONS +* +* These #defines are used to establish the options for OS???PendAbort(). +********************************************************************************************************* +*/ +#define OS_PEND_OPT_NONE 0u /* NO option selected */ +#define OS_PEND_OPT_BROADCAST 1u /* Broadcast action to ALL tasks waiting */ + +/* +********************************************************************************************************* +* OS???PostOpt() OPTIONS +* +* These #defines are used to establish the options for OSMboxPostOpt() and OSQPostOpt(). +********************************************************************************************************* +*/ +#define OS_POST_OPT_NONE 0x00u /* NO option selected */ +#define OS_POST_OPT_BROADCAST 0x01u /* Broadcast message to ALL tasks waiting */ +#define OS_POST_OPT_FRONT 0x02u /* Post to highest priority task waiting */ +#define OS_POST_OPT_NO_SCHED 0x04u /* Do not call the scheduler if this option is selected */ + +/* +********************************************************************************************************* +* TASK OPTIONS (see OSTaskCreateExt()) +********************************************************************************************************* +*/ +#define OS_TASK_OPT_NONE 0x0000u /* NO option selected */ +#define OS_TASK_OPT_STK_CHK 0x0001u /* Enable stack checking for the task */ +#define OS_TASK_OPT_STK_CLR 0x0002u /* Clear the stack when the task is create */ +#define OS_TASK_OPT_SAVE_FP 0x0004u /* Save the contents of any floating-point registers */ + +/* +********************************************************************************************************* +* TIMER OPTIONS (see OSTmrStart() and OSTmrStop()) +********************************************************************************************************* +*/ +#define OS_TMR_OPT_NONE 0u /* No option selected */ + +#define OS_TMR_OPT_ONE_SHOT 1u /* Timer will not automatically restart when it expires */ +#define OS_TMR_OPT_PERIODIC 2u /* Timer will automatically restart when it expires */ + +#define OS_TMR_OPT_CALLBACK 3u /* OSTmrStop() option to call 'callback' w/ timer arg. */ +#define OS_TMR_OPT_CALLBACK_ARG 4u /* OSTmrStop() option to call 'callback' w/ new arg. */ + +/* +********************************************************************************************************* +* TIMER STATES +********************************************************************************************************* +*/ +#define OS_TMR_STATE_UNUSED 0u +#define OS_TMR_STATE_STOPPED 1u +#define OS_TMR_STATE_COMPLETED 2u +#define OS_TMR_STATE_RUNNING 3u + +/* +********************************************************************************************************* +* ERROR CODES +********************************************************************************************************* +*/ +#define OS_ERR_NONE 0u + +#define OS_ERR_EVENT_TYPE 1u +#define OS_ERR_PEND_ISR 2u +#define OS_ERR_POST_NULL_PTR 3u +#define OS_ERR_PEVENT_NULL 4u +#define OS_ERR_POST_ISR 5u +#define OS_ERR_QUERY_ISR 6u +#define OS_ERR_INVALID_OPT 7u +#define OS_ERR_ID_INVALID 8u +#define OS_ERR_PDATA_NULL 9u + +#define OS_ERR_TIMEOUT 10u +#define OS_ERR_EVENT_NAME_TOO_LONG 11u +#define OS_ERR_PNAME_NULL 12u +#define OS_ERR_PEND_LOCKED 13u +#define OS_ERR_PEND_ABORT 14u +#define OS_ERR_DEL_ISR 15u +#define OS_ERR_CREATE_ISR 16u +#define OS_ERR_NAME_GET_ISR 17u +#define OS_ERR_NAME_SET_ISR 18u +#define OS_ERR_ILLEGAL_CREATE_RUN_TIME 19u + +#define OS_ERR_MBOX_FULL 20u + +#define OS_ERR_Q_FULL 30u +#define OS_ERR_Q_EMPTY 31u + +#define OS_ERR_PRIO_EXIST 40u +#define OS_ERR_PRIO 41u +#define OS_ERR_PRIO_INVALID 42u + +#define OS_ERR_SCHED_LOCKED 50u +#define OS_ERR_SEM_OVF 51u + +#define OS_ERR_TASK_CREATE_ISR 60u +#define OS_ERR_TASK_DEL 61u +#define OS_ERR_TASK_DEL_IDLE 62u +#define OS_ERR_TASK_DEL_REQ 63u +#define OS_ERR_TASK_DEL_ISR 64u +#define OS_ERR_TASK_NAME_TOO_LONG 65u +#define OS_ERR_TASK_NO_MORE_TCB 66u +#define OS_ERR_TASK_NOT_EXIST 67u +#define OS_ERR_TASK_NOT_SUSPENDED 68u +#define OS_ERR_TASK_OPT 69u +#define OS_ERR_TASK_RESUME_PRIO 70u +#define OS_ERR_TASK_SUSPEND_IDLE 71u +#define OS_ERR_TASK_SUSPEND_PRIO 72u +#define OS_ERR_TASK_WAITING 73u + +#define OS_ERR_TIME_NOT_DLY 80u +#define OS_ERR_TIME_INVALID_MINUTES 81u +#define OS_ERR_TIME_INVALID_SECONDS 82u +#define OS_ERR_TIME_INVALID_MS 83u +#define OS_ERR_TIME_ZERO_DLY 84u +#define OS_ERR_TIME_DLY_ISR 85u + +#define OS_ERR_MEM_INVALID_PART 90u +#define OS_ERR_MEM_INVALID_BLKS 91u +#define OS_ERR_MEM_INVALID_SIZE 92u +#define OS_ERR_MEM_NO_FREE_BLKS 93u +#define OS_ERR_MEM_FULL 94u +#define OS_ERR_MEM_INVALID_PBLK 95u +#define OS_ERR_MEM_INVALID_PMEM 96u +#define OS_ERR_MEM_INVALID_PDATA 97u +#define OS_ERR_MEM_INVALID_ADDR 98u +#define OS_ERR_MEM_NAME_TOO_LONG 99u + +#define OS_ERR_NOT_MUTEX_OWNER 100u + +#define OS_ERR_FLAG_INVALID_PGRP 110u +#define OS_ERR_FLAG_WAIT_TYPE 111u +#define OS_ERR_FLAG_NOT_RDY 112u +#define OS_ERR_FLAG_INVALID_OPT 113u +#define OS_ERR_FLAG_GRP_DEPLETED 114u +#define OS_ERR_FLAG_NAME_TOO_LONG 115u + +#define OS_ERR_PIP_LOWER 120u + +#define OS_ERR_TMR_INVALID_DLY 130u +#define OS_ERR_TMR_INVALID_PERIOD 131u +#define OS_ERR_TMR_INVALID_OPT 132u +#define OS_ERR_TMR_INVALID_NAME 133u +#define OS_ERR_TMR_NON_AVAIL 134u +#define OS_ERR_TMR_INACTIVE 135u +#define OS_ERR_TMR_INVALID_DEST 136u +#define OS_ERR_TMR_INVALID_TYPE 137u +#define OS_ERR_TMR_INVALID 138u +#define OS_ERR_TMR_ISR 139u +#define OS_ERR_TMR_NAME_TOO_LONG 140u +#define OS_ERR_TMR_INVALID_STATE 141u +#define OS_ERR_TMR_STOPPED 142u +#define OS_ERR_TMR_NO_CALLBACK 143u + +/*$PAGE*/ +/* +********************************************************************************************************* +* EVENT CONTROL BLOCK +********************************************************************************************************* +*/ + +#if OS_LOWEST_PRIO <= 63u +typedef INT8U OS_PRIO; +#else +typedef INT16U OS_PRIO; +#endif + +#if (OS_EVENT_EN) && (OS_MAX_EVENTS > 0u) +typedef struct os_event { + INT8U OSEventType; /* Type of event control block (see OS_EVENT_TYPE_xxxx) */ + void *OSEventPtr; /* Pointer to message or queue structure */ + INT16U OSEventCnt; /* Semaphore Count (not used if other EVENT type) */ + OS_PRIO OSEventGrp; /* Group corresponding to tasks waiting for event to occur */ + OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE]; /* List of tasks waiting for event to occur */ + +#if OS_EVENT_NAME_EN > 0u + INT8U *OSEventName; +#endif +} OS_EVENT; +#endif + + +/* +********************************************************************************************************* +* EVENT FLAGS CONTROL BLOCK +********************************************************************************************************* +*/ + +#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u) + +#if OS_FLAGS_NBITS == 8u /* Determine the size of OS_FLAGS (8, 16 or 32 bits) */ +typedef INT8U OS_FLAGS; +#endif + +#if OS_FLAGS_NBITS == 16u +typedef INT16U OS_FLAGS; +#endif + +#if OS_FLAGS_NBITS == 32u +typedef INT32U OS_FLAGS; +#endif + + +typedef struct os_flag_grp { /* Event Flag Group */ + INT8U OSFlagType; /* Should be set to OS_EVENT_TYPE_FLAG */ + void *OSFlagWaitList; /* Pointer to first NODE of task waiting on event flag */ + OS_FLAGS OSFlagFlags; /* 8, 16 or 32 bit flags */ +#if OS_FLAG_NAME_EN > 0u + INT8U *OSFlagName; +#endif +} OS_FLAG_GRP; + + + +typedef struct os_flag_node { /* Event Flag Wait List Node */ + void *OSFlagNodeNext; /* Pointer to next NODE in wait list */ + void *OSFlagNodePrev; /* Pointer to previous NODE in wait list */ + void *OSFlagNodeTCB; /* Pointer to TCB of waiting task */ + void *OSFlagNodeFlagGrp; /* Pointer to Event Flag Group */ + OS_FLAGS OSFlagNodeFlags; /* Event flag to wait on */ + INT8U OSFlagNodeWaitType; /* Type of wait: */ + /* OS_FLAG_WAIT_AND */ + /* OS_FLAG_WAIT_ALL */ + /* OS_FLAG_WAIT_OR */ + /* OS_FLAG_WAIT_ANY */ +} OS_FLAG_NODE; +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* MESSAGE MAILBOX DATA +********************************************************************************************************* +*/ + +#if OS_MBOX_EN > 0u +typedef struct os_mbox_data { + void *OSMsg; /* Pointer to message in mailbox */ + OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE]; /* List of tasks waiting for event to occur */ + OS_PRIO OSEventGrp; /* Group corresponding to tasks waiting for event to occur */ +} OS_MBOX_DATA; +#endif + +/* +********************************************************************************************************* +* MEMORY PARTITION DATA STRUCTURES +********************************************************************************************************* +*/ + +#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u) +typedef struct os_mem { /* MEMORY CONTROL BLOCK */ + void *OSMemAddr; /* Pointer to beginning of memory partition */ + void *OSMemFreeList; /* Pointer to list of free memory blocks */ + INT32U OSMemBlkSize; /* Size (in bytes) of each block of memory */ + INT32U OSMemNBlks; /* Total number of blocks in this partition */ + INT32U OSMemNFree; /* Number of memory blocks remaining in this partition */ +#if OS_MEM_NAME_EN > 0u + INT8U *OSMemName; /* Memory partition name */ +#endif +} OS_MEM; + + +typedef struct os_mem_data { + void *OSAddr; /* Pointer to the beginning address of the memory partition */ + void *OSFreeList; /* Pointer to the beginning of the free list of memory blocks */ + INT32U OSBlkSize; /* Size (in bytes) of each memory block */ + INT32U OSNBlks; /* Total number of blocks in the partition */ + INT32U OSNFree; /* Number of memory blocks free */ + INT32U OSNUsed; /* Number of memory blocks used */ +} OS_MEM_DATA; +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* MUTUAL EXCLUSION SEMAPHORE DATA +********************************************************************************************************* +*/ + +#if OS_MUTEX_EN > 0u +typedef struct os_mutex_data { + OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE]; /* List of tasks waiting for event to occur */ + OS_PRIO OSEventGrp; /* Group corresponding to tasks waiting for event to occur */ + BOOLEAN OSValue; /* Mutex value (OS_FALSE = used, OS_TRUE = available) */ + INT8U OSOwnerPrio; /* Mutex owner's task priority or 0xFF if no owner */ + INT8U OSMutexPIP; /* Priority Inheritance Priority or 0xFF if no owner */ +} OS_MUTEX_DATA; +#endif + +/* +********************************************************************************************************* +* MESSAGE QUEUE DATA +********************************************************************************************************* +*/ + +#if OS_Q_EN > 0u +typedef struct os_q { /* QUEUE CONTROL BLOCK */ + struct os_q *OSQPtr; /* Link to next queue control block in list of free blocks */ + void **OSQStart; /* Pointer to start of queue data */ + void **OSQEnd; /* Pointer to end of queue data */ + void **OSQIn; /* Pointer to where next message will be inserted in the Q */ + void **OSQOut; /* Pointer to where next message will be extracted from the Q */ + INT16U OSQSize; /* Size of queue (maximum number of entries) */ + INT16U OSQEntries; /* Current number of entries in the queue */ +} OS_Q; + + +typedef struct os_q_data { + void *OSMsg; /* Pointer to next message to be extracted from queue */ + INT16U OSNMsgs; /* Number of messages in message queue */ + INT16U OSQSize; /* Size of message queue */ + OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE]; /* List of tasks waiting for event to occur */ + OS_PRIO OSEventGrp; /* Group corresponding to tasks waiting for event to occur */ +} OS_Q_DATA; +#endif + +/* +********************************************************************************************************* +* SEMAPHORE DATA +********************************************************************************************************* +*/ + +#if OS_SEM_EN > 0u +typedef struct os_sem_data { + INT16U OSCnt; /* Semaphore count */ + OS_PRIO OSEventTbl[OS_EVENT_TBL_SIZE]; /* List of tasks waiting for event to occur */ + OS_PRIO OSEventGrp; /* Group corresponding to tasks waiting for event to occur */ +} OS_SEM_DATA; +#endif + +/* +********************************************************************************************************* +* TASK STACK DATA +********************************************************************************************************* +*/ + +#if OS_TASK_CREATE_EXT_EN > 0u +typedef struct os_stk_data { + INT32U OSFree; /* Number of free bytes on the stack */ + INT32U OSUsed; /* Number of bytes used on the stack */ +} OS_STK_DATA; +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* TASK CONTROL BLOCK +********************************************************************************************************* +*/ + +typedef struct os_tcb { + OS_STK *OSTCBStkPtr; /* Pointer to current top of stack */ + +#if OS_TASK_CREATE_EXT_EN > 0u + void *OSTCBExtPtr; /* Pointer to user definable data for TCB extension */ + OS_STK *OSTCBStkBottom; /* Pointer to bottom of stack */ + INT32U OSTCBStkSize; /* Size of task stack (in number of stack elements) */ + INT16U OSTCBOpt; /* Task options as passed by OSTaskCreateExt() */ + INT16U OSTCBId; /* Task ID (0..65535) */ +#endif + + struct os_tcb *OSTCBNext; /* Pointer to next TCB in the TCB list */ + struct os_tcb *OSTCBPrev; /* Pointer to previous TCB in the TCB list */ + +#if (OS_EVENT_EN) + OS_EVENT *OSTCBEventPtr; /* Pointer to event control block */ +#endif + +#if (OS_EVENT_EN) && (OS_EVENT_MULTI_EN > 0u) + OS_EVENT **OSTCBEventMultiPtr; /* Pointer to multiple event control blocks */ +#endif + +#if ((OS_Q_EN > 0u) && (OS_MAX_QS > 0u)) || (OS_MBOX_EN > 0u) + void *OSTCBMsg; /* Message received from OSMboxPost() or OSQPost() */ +#endif + +#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u) +#if OS_TASK_DEL_EN > 0u + OS_FLAG_NODE *OSTCBFlagNode; /* Pointer to event flag node */ +#endif + OS_FLAGS OSTCBFlagsRdy; /* Event flags that made task ready to run */ +#endif + + INT32U OSTCBDly; /* Nbr ticks to delay task or, timeout waiting for event */ + INT8U OSTCBStat; /* Task status */ + INT8U OSTCBStatPend; /* Task PEND status */ + INT8U OSTCBPrio; /* Task priority (0 == highest) */ + + INT8U OSTCBX; /* Bit position in group corresponding to task priority */ + INT8U OSTCBY; /* Index into ready table corresponding to task priority */ + OS_PRIO OSTCBBitX; /* Bit mask to access bit position in ready table */ + OS_PRIO OSTCBBitY; /* Bit mask to access bit position in ready group */ + +#if OS_TASK_DEL_EN > 0u + INT8U OSTCBDelReq; /* Indicates whether a task needs to delete itself */ +#endif + +#if OS_TASK_PROFILE_EN > 0u + INT32U OSTCBCtxSwCtr; /* Number of time the task was switched in */ + INT32U OSTCBCyclesTot; /* Total number of clock cycles the task has been running */ + INT32U OSTCBCyclesStart; /* Snapshot of cycle counter at start of task resumption */ + OS_STK *OSTCBStkBase; /* Pointer to the beginning of the task stack */ + INT32U OSTCBStkUsed; /* Number of bytes used from the stack */ +#endif + +#if OS_TASK_NAME_EN > 0u + INT8U *OSTCBTaskName; +#endif + +#if OS_TASK_REG_TBL_SIZE > 0u + INT32U OSTCBRegTbl[OS_TASK_REG_TBL_SIZE]; +#endif +} OS_TCB; + +/*$PAGE*/ +/* +************************************************************************************************************************ +* TIMER DATA TYPES +************************************************************************************************************************ +*/ + +#if OS_TMR_EN > 0u +typedef void (*OS_TMR_CALLBACK)(void *ptmr, void *parg); + + + +typedef struct os_tmr { + INT8U OSTmrType; /* Should be set to OS_TMR_TYPE */ + OS_TMR_CALLBACK OSTmrCallback; /* Function to call when timer expires */ + void *OSTmrCallbackArg; /* Argument to pass to function when timer expires */ + void *OSTmrNext; /* Double link list pointers */ + void *OSTmrPrev; + INT32U OSTmrMatch; /* Timer expires when OSTmrTime == OSTmrMatch */ + INT32U OSTmrDly; /* Delay time before periodic update starts */ + INT32U OSTmrPeriod; /* Period to repeat timer */ +#if OS_TMR_CFG_NAME_EN > 0u + INT8U *OSTmrName; /* Name to give the timer */ +#endif + INT8U OSTmrOpt; /* Options (see OS_TMR_OPT_xxx) */ + INT8U OSTmrState; /* Indicates the state of the timer: */ + /* OS_TMR_STATE_UNUSED */ + /* OS_TMR_STATE_RUNNING */ + /* OS_TMR_STATE_STOPPED */ +} OS_TMR; + + + +typedef struct os_tmr_wheel { + OS_TMR *OSTmrFirst; /* Pointer to first timer in linked list */ + INT16U OSTmrEntries; +} OS_TMR_WHEEL; +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* GLOBAL VARIABLES +********************************************************************************************************* +*/ + +OS_EXT INT32U OSCtxSwCtr; /* Counter of number of context switches */ + +#if (OS_EVENT_EN) && (OS_MAX_EVENTS > 0u) +OS_EXT OS_EVENT *OSEventFreeList; /* Pointer to list of free EVENT control blocks */ +OS_EXT OS_EVENT OSEventTbl[OS_MAX_EVENTS];/* Table of EVENT control blocks */ +#endif + +#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u) +OS_EXT OS_FLAG_GRP OSFlagTbl[OS_MAX_FLAGS]; /* Table containing event flag groups */ +OS_EXT OS_FLAG_GRP *OSFlagFreeList; /* Pointer to free list of event flag groups */ +#endif + +#if OS_TASK_STAT_EN > 0u +OS_EXT INT8U OSCPUUsage; /* Percentage of CPU used */ +OS_EXT INT32U OSIdleCtrMax; /* Max. value that idle ctr can take in 1 sec. */ +OS_EXT INT32U OSIdleCtrRun; /* Val. reached by idle ctr at run time in 1 sec. */ +OS_EXT BOOLEAN OSStatRdy; /* Flag indicating that the statistic task is rdy */ +OS_EXT OS_STK OSTaskStatStk[OS_TASK_STAT_STK_SIZE]; /* Statistics task stack */ +#endif + +OS_EXT INT8U OSIntNesting; /* Interrupt nesting level */ + +OS_EXT INT8U OSLockNesting; /* Multitasking lock nesting level */ + +OS_EXT INT8U OSPrioCur; /* Priority of current task */ +OS_EXT INT8U OSPrioHighRdy; /* Priority of highest priority task */ + +OS_EXT OS_PRIO OSRdyGrp; /* Ready list group */ +OS_EXT OS_PRIO OSRdyTbl[OS_RDY_TBL_SIZE]; /* Table of tasks which are ready to run */ + +OS_EXT BOOLEAN OSRunning; /* Flag indicating that kernel is running */ + +OS_EXT INT8U OSTaskCtr; /* Number of tasks created */ + +OS_EXT volatile INT32U OSIdleCtr; /* Idle counter */ + +#ifdef OS_SAFETY_CRITICAL_IEC61508 +OS_EXT BOOLEAN OSSafetyCriticalStartFlag; +#endif + +OS_EXT OS_STK OSTaskIdleStk[OS_TASK_IDLE_STK_SIZE]; /* Idle task stack */ + + +OS_EXT OS_TCB *OSTCBCur; /* Pointer to currently running TCB */ +OS_EXT OS_TCB *OSTCBFreeList; /* Pointer to list of free TCBs */ +OS_EXT OS_TCB *OSTCBHighRdy; /* Pointer to highest priority TCB R-to-R */ +OS_EXT OS_TCB *OSTCBList; /* Pointer to doubly linked list of TCBs */ +OS_EXT OS_TCB *OSTCBPrioTbl[OS_LOWEST_PRIO + 1u]; /* Table of pointers to created TCBs */ +OS_EXT OS_TCB OSTCBTbl[OS_MAX_TASKS + OS_N_SYS_TASKS]; /* Table of TCBs */ + +#if OS_TICK_STEP_EN > 0u +OS_EXT INT8U OSTickStepState; /* Indicates the state of the tick step feature */ +#endif + +#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u) +OS_EXT OS_MEM *OSMemFreeList; /* Pointer to free list of memory partitions */ +OS_EXT OS_MEM OSMemTbl[OS_MAX_MEM_PART];/* Storage for memory partition manager */ +#endif + +#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u) +OS_EXT OS_Q *OSQFreeList; /* Pointer to list of free QUEUE control blocks */ +OS_EXT OS_Q OSQTbl[OS_MAX_QS]; /* Table of QUEUE control blocks */ +#endif + +#if OS_TIME_GET_SET_EN > 0u +OS_EXT volatile INT32U OSTime; /* Current value of system time (in ticks) */ +#endif + +#if OS_TMR_EN > 0u +OS_EXT INT16U OSTmrFree; /* Number of free entries in the timer pool */ +OS_EXT INT16U OSTmrUsed; /* Number of timers used */ +OS_EXT INT32U OSTmrTime; /* Current timer time */ + +OS_EXT OS_EVENT *OSTmrSem; /* Sem. used to gain exclusive access to timers */ +OS_EXT OS_EVENT *OSTmrSemSignal; /* Sem. used to signal the update of timers */ + +OS_EXT OS_TMR OSTmrTbl[OS_TMR_CFG_MAX]; /* Table containing pool of timers */ +OS_EXT OS_TMR *OSTmrFreeList; /* Pointer to free list of timers */ +OS_EXT OS_STK OSTmrTaskStk[OS_TASK_TMR_STK_SIZE]; + +OS_EXT OS_TMR_WHEEL OSTmrWheelTbl[OS_TMR_CFG_WHEEL_SIZE]; +#endif + +extern INT8U const OSUnMapTbl[256]; /* Priority->Index lookup table */ + + #if OS_VERSION >= 204 + void OSInitHookBegin(void); + void OSInitHookEnd(void); + #endif + + void OSIntCtxSw(void); + + void OSStartHighRdy(void); + + void OSTaskCreateHook(OS_TCB *ptcb); + void OSTaskDelHook(OS_TCB *ptcb); + + #if OS_VERSION >= 251 + void OSTaskIdleHook(void); + #endif + + void OSTaskStatHook(void); + OS_STK *OSTaskStkInit(void (*task)(void *pd), void *pdata, OS_STK *ptos, INT16U opt); + void OSTaskSwHook(void); + + #if OS_VERSION >= 204 + void OSTCBInitHook(OS_TCB *ptcb); + #endif + + void OSTimeTickHook(void); + + /* + ********************************************************************************************************* + * FUNCTION PROTOTYPES + * (Compiler Specific ISR prototypes) + ********************************************************************************************************* + */ + #ifndef OS_ISR_PROTO_EXT + void OSCtxSw(void); + void OSTickISR(void); + #endif + +/* +********************************************************************************************************* +* MISCELLANEOUS +********************************************************************************************************* +*/ + +#if (OS_EVENT_EN) + +#if (OS_EVENT_NAME_EN > 0u) +INT8U OSEventNameGet (OS_EVENT *pevent, + INT8U **pname, + INT8U *perr); + +void OSEventNameSet (OS_EVENT *pevent, + INT8U *pname, + INT8U *perr); +#endif + +#if (OS_EVENT_MULTI_EN > 0u) +INT16U OSEventPendMulti (OS_EVENT **pevents_pend, + OS_EVENT **pevents_rdy, + void **pmsgs_rdy, + INT32U timeout, + INT8U *perr); +#endif + +#endif + +/* +********************************************************************************************************* +* EVENT FLAGS MANAGEMENT +********************************************************************************************************* +*/ + +#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u) + +#if OS_FLAG_ACCEPT_EN > 0u +OS_FLAGS OSFlagAccept (OS_FLAG_GRP *pgrp, + OS_FLAGS flags, + INT8U wait_type, + INT8U *perr); +#endif + +OS_FLAG_GRP *OSFlagCreate (OS_FLAGS flags, + INT8U *perr); + +#if OS_FLAG_DEL_EN > 0u +OS_FLAG_GRP *OSFlagDel (OS_FLAG_GRP *pgrp, + INT8U opt, + INT8U *perr); +#endif + +#if (OS_FLAG_EN > 0u) && (OS_FLAG_NAME_EN > 0u) +INT8U OSFlagNameGet (OS_FLAG_GRP *pgrp, + INT8U **pname, + INT8U *perr); + +void OSFlagNameSet (OS_FLAG_GRP *pgrp, + INT8U *pname, + INT8U *perr); +#endif + +OS_FLAGS OSFlagPend (OS_FLAG_GRP *pgrp, + OS_FLAGS flags, + INT8U wait_type, + INT32U timeout, + INT8U *perr); + +OS_FLAGS OSFlagPendGetFlagsRdy (void); +OS_FLAGS OSFlagPost (OS_FLAG_GRP *pgrp, + OS_FLAGS flags, + INT8U opt, + INT8U *perr); + +#if OS_FLAG_QUERY_EN > 0u +OS_FLAGS OSFlagQuery (OS_FLAG_GRP *pgrp, + INT8U *perr); +#endif +#endif + +/* +********************************************************************************************************* +* MESSAGE MAILBOX MANAGEMENT +********************************************************************************************************* +*/ + +#if OS_MBOX_EN > 0u + +#if OS_MBOX_ACCEPT_EN > 0u +void *OSMboxAccept (OS_EVENT *pevent); +#endif + +OS_EVENT *OSMboxCreate (void *pmsg); + +#if OS_MBOX_DEL_EN > 0u +OS_EVENT *OSMboxDel (OS_EVENT *pevent, + INT8U opt, + INT8U *perr); +#endif + +void *OSMboxPend (OS_EVENT *pevent, + INT32U timeout, + INT8U *perr); + +#if OS_MBOX_PEND_ABORT_EN > 0u +INT8U OSMboxPendAbort (OS_EVENT *pevent, + INT8U opt, + INT8U *perr); +#endif + +#if OS_MBOX_POST_EN > 0u +INT8U OSMboxPost (OS_EVENT *pevent, + void *pmsg); +#endif + +#if OS_MBOX_POST_OPT_EN > 0u +INT8U OSMboxPostOpt (OS_EVENT *pevent, + void *pmsg, + INT8U opt); +#endif + +#if OS_MBOX_QUERY_EN > 0u +INT8U OSMboxQuery (OS_EVENT *pevent, + OS_MBOX_DATA *p_mbox_data); +#endif +#endif + +/* +********************************************************************************************************* +* MEMORY MANAGEMENT +********************************************************************************************************* +*/ + +#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u) + +OS_MEM *OSMemCreate (void *addr, + INT32U nblks, + INT32U blksize, + INT8U *perr); + +void *OSMemGet (OS_MEM *pmem, + INT8U *perr); +#if OS_MEM_NAME_EN > 0u +INT8U OSMemNameGet (OS_MEM *pmem, + INT8U **pname, + INT8U *perr); + +void OSMemNameSet (OS_MEM *pmem, + INT8U *pname, + INT8U *perr); +#endif +INT8U OSMemPut (OS_MEM *pmem, + void *pblk); + +#if OS_MEM_QUERY_EN > 0u +INT8U OSMemQuery (OS_MEM *pmem, + OS_MEM_DATA *p_mem_data); +#endif + +#endif + +/* +********************************************************************************************************* +* MUTUAL EXCLUSION SEMAPHORE MANAGEMENT +********************************************************************************************************* +*/ + +#if OS_MUTEX_EN > 0u + +#if OS_MUTEX_ACCEPT_EN > 0u +BOOLEAN OSMutexAccept (OS_EVENT *pevent, + INT8U *perr); +#endif + +OS_EVENT *OSMutexCreate (INT8U prio, + INT8U *perr); + +#if OS_MUTEX_DEL_EN > 0u +OS_EVENT *OSMutexDel (OS_EVENT *pevent, + INT8U opt, + INT8U *perr); +#endif + +void OSMutexPend (OS_EVENT *pevent, + INT32U timeout, + INT8U *perr); + +INT8U OSMutexPost (OS_EVENT *pevent); + +#if OS_MUTEX_QUERY_EN > 0u +INT8U OSMutexQuery (OS_EVENT *pevent, + OS_MUTEX_DATA *p_mutex_data); +#endif + +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* MESSAGE QUEUE MANAGEMENT +********************************************************************************************************* +*/ + +#if (OS_Q_EN > 0u) && (OS_MAX_QS > 0u) + +#if OS_Q_ACCEPT_EN > 0u +void *OSQAccept (OS_EVENT *pevent, + INT8U *perr); +#endif + +OS_EVENT *OSQCreate (void **start, + INT16U size); + +#if OS_Q_DEL_EN > 0u +OS_EVENT *OSQDel (OS_EVENT *pevent, + INT8U opt, + INT8U *perr); +#endif + +#if OS_Q_FLUSH_EN > 0u +INT8U OSQFlush (OS_EVENT *pevent); +#endif + +void *OSQPend (OS_EVENT *pevent, + INT32U timeout, + INT8U *perr); + +#if OS_Q_PEND_ABORT_EN > 0u +INT8U OSQPendAbort (OS_EVENT *pevent, + INT8U opt, + INT8U *perr); +#endif + +#if OS_Q_POST_EN > 0u +INT8U OSQPost (OS_EVENT *pevent, + void *pmsg); +#endif + +#if OS_Q_POST_FRONT_EN > 0u +INT8U OSQPostFront (OS_EVENT *pevent, + void *pmsg); +#endif + +#if OS_Q_POST_OPT_EN > 0u +INT8U OSQPostOpt (OS_EVENT *pevent, + void *pmsg, + INT8U opt); +#endif + +#if OS_Q_QUERY_EN > 0u +INT8U OSQQuery (OS_EVENT *pevent, + OS_Q_DATA *p_q_data); +#endif + +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* SEMAPHORE MANAGEMENT +********************************************************************************************************* +*/ +#if OS_SEM_EN > 0u + +#if OS_SEM_ACCEPT_EN > 0u +INT16U OSSemAccept (OS_EVENT *pevent); +#endif + +OS_EVENT *OSSemCreate (INT16U cnt); + +#if OS_SEM_DEL_EN > 0u +OS_EVENT *OSSemDel (OS_EVENT *pevent, + INT8U opt, + INT8U *perr); +#endif + +void OSSemPend (OS_EVENT *pevent, + INT32U timeout, + INT8U *perr); + +#if OS_SEM_PEND_ABORT_EN > 0u +INT8U OSSemPendAbort (OS_EVENT *pevent, + INT8U opt, + INT8U *perr); +#endif + +INT8U OSSemPost (OS_EVENT *pevent); + +#if OS_SEM_QUERY_EN > 0u +INT8U OSSemQuery (OS_EVENT *pevent, + OS_SEM_DATA *p_sem_data); +#endif + +#if OS_SEM_SET_EN > 0u +void OSSemSet (OS_EVENT *pevent, + INT16U cnt, + INT8U *perr); +#endif + +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* TASK MANAGEMENT +********************************************************************************************************* +*/ +#if OS_TASK_CHANGE_PRIO_EN > 0u +INT8U OSTaskChangePrio (INT8U oldprio, + INT8U newprio); +#endif + +#if OS_TASK_CREATE_EN > 0u +INT8U OSTaskCreate (void (*task)(void *p_arg), + void *p_arg, + OS_STK *ptos, + INT8U prio); +#endif + +#if OS_TASK_CREATE_EXT_EN > 0u +INT8U OSTaskCreateExt (void (*task)(void *p_arg), + void *p_arg, + OS_STK *ptos, + INT8U prio, + INT16U id, + OS_STK *pbos, + INT32U stk_size, + void *pext, + INT16U opt); +#endif + +#if OS_TASK_DEL_EN > 0u +INT8U OSTaskDel (INT8U prio); +INT8U OSTaskDelReq (INT8U prio); +#endif + +#if OS_TASK_NAME_EN > 0u +INT8U OSTaskNameGet (INT8U prio, + INT8U **pname, + INT8U *perr); + +void OSTaskNameSet (INT8U prio, + INT8U *pname, + INT8U *perr); +#endif + +#if OS_TASK_SUSPEND_EN > 0u +INT8U OSTaskResume (INT8U prio); +INT8U OSTaskSuspend (INT8U prio); +#endif + +#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u) +INT8U OSTaskStkChk (INT8U prio, + OS_STK_DATA *p_stk_data); +#endif + +#if OS_TASK_QUERY_EN > 0u +INT8U OSTaskQuery (INT8U prio, + OS_TCB *p_task_data); +#endif + + + +#if OS_TASK_REG_TBL_SIZE > 0u +INT32U OSTaskRegGet (INT8U prio, + INT8U id, + INT8U *perr); + +void OSTaskRegSet (INT8U prio, + INT8U id, + INT32U value, + INT8U *perr); +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* TIME MANAGEMENT +********************************************************************************************************* +*/ + +void OSTimeDly (INT32U ticks); + +#if OS_TIME_DLY_HMSM_EN > 0u +INT8U OSTimeDlyHMSM (INT8U hours, + INT8U minutes, + INT8U seconds, + INT16U ms); +#endif + +#if OS_TIME_DLY_RESUME_EN > 0u +INT8U OSTimeDlyResume (INT8U prio); +#endif + +#if OS_TIME_GET_SET_EN > 0u +INT32U OSTimeGet (void); +void OSTimeSet (INT32U ticks); +#endif + +void OSTimeTick (void); + +/* +********************************************************************************************************* +* TIMER MANAGEMENT +********************************************************************************************************* +*/ + +#if OS_TMR_EN > 0u +OS_TMR *OSTmrCreate (INT32U dly, + INT32U period, + INT8U opt, + OS_TMR_CALLBACK callback, + void *callback_arg, + INT8U *pname, + INT8U *perr); + +BOOLEAN OSTmrDel (OS_TMR *ptmr, + INT8U *perr); + +#if OS_TMR_CFG_NAME_EN > 0u +INT8U OSTmrNameGet (OS_TMR *ptmr, + INT8U **pdest, + INT8U *perr); +#endif +INT32U OSTmrRemainGet (OS_TMR *ptmr, + INT8U *perr); + +INT8U OSTmrStateGet (OS_TMR *ptmr, + INT8U *perr); + +BOOLEAN OSTmrStart (OS_TMR *ptmr, + INT8U *perr); + +BOOLEAN OSTmrStop (OS_TMR *ptmr, + INT8U opt, + void *callback_arg, + INT8U *perr); + +INT8U OSTmrSignal (void); +#endif + +/* +********************************************************************************************************* +* MISCELLANEOUS +********************************************************************************************************* +*/ + +void OSInit (void); + +void OSIntEnter (void); +void OSIntExit (void); + +#ifdef OS_SAFETY_CRITICAL_IEC61508 +void OSSafetyCriticalStart (void); +#endif + +#if OS_SCHED_LOCK_EN > 0u +void OSSchedLock (void); +void OSSchedUnlock (void); +#endif + +void OSStart (void); + +void OSStatInit (void); + +INT16U OSVersion (void); + +/*$PAGE*/ +/* +********************************************************************************************************* +* INTERNAL FUNCTION PROTOTYPES +* (Your application MUST NOT call these functions) +********************************************************************************************************* +*/ + +#if OS_TASK_DEL_EN > 0u +void OS_Dummy (void); +#endif + +#if (OS_EVENT_EN) +INT8U OS_EventTaskRdy (OS_EVENT *pevent, + void *pmsg, + INT8U msk, + INT8U pend_stat); + +void OS_EventTaskWait (OS_EVENT *pevent); + +void OS_EventTaskRemove (OS_TCB *ptcb, + OS_EVENT *pevent); + +#if (OS_EVENT_MULTI_EN > 0u) +void OS_EventTaskWaitMulti (OS_EVENT **pevents_wait); + +void OS_EventTaskRemoveMulti (OS_TCB *ptcb, + OS_EVENT **pevents_multi); +#endif + +void OS_EventWaitListInit (OS_EVENT *pevent); +#endif + +#if (OS_FLAG_EN > 0u) && (OS_MAX_FLAGS > 0u) +void OS_FlagInit (void); +void OS_FlagUnlink (OS_FLAG_NODE *pnode); +#endif + +void OS_MemClr (INT8U *pdest, + INT16U size); + +void OS_MemCopy (INT8U *pdest, + INT8U *psrc, + INT16U size); + +#if (OS_MEM_EN > 0u) && (OS_MAX_MEM_PART > 0u) +void OS_MemInit (void); +#endif + +#if OS_Q_EN > 0u +void OS_QInit (void); +#endif + +void OS_Sched (void); + +#if (OS_EVENT_NAME_EN > 0u) || (OS_FLAG_NAME_EN > 0u) || (OS_MEM_NAME_EN > 0u) || (OS_TASK_NAME_EN > 0u) +INT8U OS_StrLen (INT8U *psrc); +#endif + +void OS_TaskIdle (void *p_arg); + +void OS_TaskReturn (void); + +#if OS_TASK_STAT_EN > 0u +void OS_TaskStat (void *p_arg); +#endif + +#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u) +void OS_TaskStkClr (OS_STK *pbos, + INT32U size, + INT16U opt); +#endif + +#if (OS_TASK_STAT_STK_CHK_EN > 0u) && (OS_TASK_CREATE_EXT_EN > 0u) +void OS_TaskStatStkChk (void); +#endif + +INT8U OS_TCBInit (INT8U prio, + OS_STK *ptos, + OS_STK *pbos, + INT16U id, + INT32U stk_size, + void *pext, + INT16U opt); + +#if OS_TMR_EN > 0u +void OSTmr_Init (void); +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* FUNCTION PROTOTYPES +* (Target Specific Functions) +********************************************************************************************************* +*/ + +#if OS_DEBUG_EN > 0u +void OSDebugInit (void); +#endif + +void OSInitHookBegin (void); +void OSInitHookEnd (void); + +void OSTaskCreateHook (OS_TCB *ptcb); +void OSTaskDelHook (OS_TCB *ptcb); + +void OSTaskIdleHook (void); + +void OSTaskReturnHook (OS_TCB *ptcb); + +void OSTaskStatHook (void); +OS_STK *OSTaskStkInit (void (*task)(void *p_arg), + void *p_arg, + OS_STK *ptos, + INT16U opt); + +#if OS_TASK_SW_HOOK_EN > 0u +void OSTaskSwHook (void); +#endif + +void OSTCBInitHook (OS_TCB *ptcb); + +#if OS_TIME_TICK_HOOK_EN > 0u +void OSTimeTickHook (void); +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* FUNCTION PROTOTYPES +* (Application Specific Functions) +********************************************************************************************************* +*/ + +#if OS_APP_HOOKS_EN > 0u +void App_TaskCreateHook (OS_TCB *ptcb); +void App_TaskDelHook (OS_TCB *ptcb); +void App_TaskIdleHook (void); + +void App_TaskReturnHook (OS_TCB *ptcb); + +void App_TaskStatHook (void); + +#if OS_TASK_SW_HOOK_EN > 0u +void App_TaskSwHook (void); +#endif + +void App_TCBInitHook (OS_TCB *ptcb); + +#if OS_TIME_TICK_HOOK_EN > 0u +void App_TimeTickHook (void); +#endif +#endif + +/* +********************************************************************************************************* +* FUNCTION PROTOTYPES +* +* IMPORTANT: These prototypes MUST be placed in OS_CPU.H +********************************************************************************************************* +*/ + +#if 0 +void OSStartHighRdy (void); +void OSIntCtxSw (void); +void OSCtxSw (void); +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* LOOK FOR MISSING #define CONSTANTS +* +* This section is used to generate ERROR messages at compile time if certain #define constants are +* MISSING in OS_CFG.H. This allows you to quickly determine the source of the error. +* +* You SHOULD NOT change this section UNLESS you would like to add more comments as to the source of the +* compile time error. +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* EVENT FLAGS +********************************************************************************************************* +*/ + +#ifndef OS_FLAG_EN +#error "OS_CFG.H, Missing OS_FLAG_EN: Enable (1) or Disable (0) code generation for Event Flags" +#else + #ifndef OS_MAX_FLAGS + #error "OS_CFG.H, Missing OS_MAX_FLAGS: Max. number of Event Flag Groups in your application" + #else + #if OS_MAX_FLAGS > 65500u + #error "OS_CFG.H, OS_MAX_FLAGS must be <= 65500" + #endif + #endif + + #ifndef OS_FLAGS_NBITS + #error "OS_CFG.H, Missing OS_FLAGS_NBITS: Determine #bits used for event flags, MUST be either 8, 16 or 32" + #endif + + #ifndef OS_FLAG_WAIT_CLR_EN + #error "OS_CFG.H, Missing OS_FLAG_WAIT_CLR_EN: Include code for Wait on Clear EVENT FLAGS" + #endif + + #ifndef OS_FLAG_ACCEPT_EN + #error "OS_CFG.H, Missing OS_FLAG_ACCEPT_EN: Include code for OSFlagAccept()" + #endif + + #ifndef OS_FLAG_DEL_EN + #error "OS_CFG.H, Missing OS_FLAG_DEL_EN: Include code for OSFlagDel()" + #endif + + #ifndef OS_FLAG_NAME_EN + #error "OS_CFG.H, Missing OS_FLAG_NAME_EN: Enable flag group names" + #endif + + #ifndef OS_FLAG_QUERY_EN + #error "OS_CFG.H, Missing OS_FLAG_QUERY_EN: Include code for OSFlagQuery()" + #endif +#endif + +/* +********************************************************************************************************* +* MESSAGE MAILBOXES +********************************************************************************************************* +*/ + +#ifndef OS_MBOX_EN +#error "OS_CFG.H, Missing OS_MBOX_EN: Enable (1) or Disable (0) code generation for MAILBOXES" +#else + #ifndef OS_MBOX_ACCEPT_EN + #error "OS_CFG.H, Missing OS_MBOX_ACCEPT_EN: Include code for OSMboxAccept()" + #endif + + #ifndef OS_MBOX_DEL_EN + #error "OS_CFG.H, Missing OS_MBOX_DEL_EN: Include code for OSMboxDel()" + #endif + + #ifndef OS_MBOX_PEND_ABORT_EN + #error "OS_CFG.H, Missing OS_MBOX_PEND_ABORT_EN: Include code for OSMboxPendAbort()" + #endif + + #ifndef OS_MBOX_POST_EN + #error "OS_CFG.H, Missing OS_MBOX_POST_EN: Include code for OSMboxPost()" + #endif + + #ifndef OS_MBOX_POST_OPT_EN + #error "OS_CFG.H, Missing OS_MBOX_POST_OPT_EN: Include code for OSMboxPostOpt()" + #endif + + #ifndef OS_MBOX_QUERY_EN + #error "OS_CFG.H, Missing OS_MBOX_QUERY_EN: Include code for OSMboxQuery()" + #endif +#endif + +/* +********************************************************************************************************* +* MEMORY MANAGEMENT +********************************************************************************************************* +*/ + +#ifndef OS_MEM_EN +#error "OS_CFG.H, Missing OS_MEM_EN: Enable (1) or Disable (0) code generation for MEMORY MANAGER" +#else + #ifndef OS_MAX_MEM_PART + #error "OS_CFG.H, Missing OS_MAX_MEM_PART: Max. number of memory partitions" + #else + #if OS_MAX_MEM_PART > 65500u + #error "OS_CFG.H, OS_MAX_MEM_PART must be <= 65500" + #endif + #endif + + #ifndef OS_MEM_NAME_EN + #error "OS_CFG.H, Missing OS_MEM_NAME_EN: Enable memory partition names" + #endif + + #ifndef OS_MEM_QUERY_EN + #error "OS_CFG.H, Missing OS_MEM_QUERY_EN: Include code for OSMemQuery()" + #endif +#endif + +/* +********************************************************************************************************* +* MUTUAL EXCLUSION SEMAPHORES +********************************************************************************************************* +*/ + +#ifndef OS_MUTEX_EN +#error "OS_CFG.H, Missing OS_MUTEX_EN: Enable (1) or Disable (0) code generation for MUTEX" +#else + #ifndef OS_MUTEX_ACCEPT_EN + #error "OS_CFG.H, Missing OS_MUTEX_ACCEPT_EN: Include code for OSMutexAccept()" + #endif + + #ifndef OS_MUTEX_DEL_EN + #error "OS_CFG.H, Missing OS_MUTEX_DEL_EN: Include code for OSMutexDel()" + #endif + + #ifndef OS_MUTEX_QUERY_EN + #error "OS_CFG.H, Missing OS_MUTEX_QUERY_EN: Include code for OSMutexQuery()" + #endif +#endif + +/* +********************************************************************************************************* +* MESSAGE QUEUES +********************************************************************************************************* +*/ + +#ifndef OS_Q_EN +#error "OS_CFG.H, Missing OS_Q_EN: Enable (1) or Disable (0) code generation for QUEUES" +#else + #ifndef OS_MAX_QS + #error "OS_CFG.H, Missing OS_MAX_QS: Max. number of queue control blocks" + #else + #if OS_MAX_QS > 65500u + #error "OS_CFG.H, OS_MAX_QS must be <= 65500" + #endif + #endif + + #ifndef OS_Q_ACCEPT_EN + #error "OS_CFG.H, Missing OS_Q_ACCEPT_EN: Include code for OSQAccept()" + #endif + + #ifndef OS_Q_DEL_EN + #error "OS_CFG.H, Missing OS_Q_DEL_EN: Include code for OSQDel()" + #endif + + #ifndef OS_Q_FLUSH_EN + #error "OS_CFG.H, Missing OS_Q_FLUSH_EN: Include code for OSQFlush()" + #endif + + #ifndef OS_Q_PEND_ABORT_EN + #error "OS_CFG.H, Missing OS_Q_PEND_ABORT_EN: Include code for OSQPendAbort()" + #endif + + #ifndef OS_Q_POST_EN + #error "OS_CFG.H, Missing OS_Q_POST_EN: Include code for OSQPost()" + #endif + + #ifndef OS_Q_POST_FRONT_EN + #error "OS_CFG.H, Missing OS_Q_POST_FRONT_EN: Include code for OSQPostFront()" + #endif + + #ifndef OS_Q_POST_OPT_EN + #error "OS_CFG.H, Missing OS_Q_POST_OPT_EN: Include code for OSQPostOpt()" + #endif + + #ifndef OS_Q_QUERY_EN + #error "OS_CFG.H, Missing OS_Q_QUERY_EN: Include code for OSQQuery()" + #endif +#endif + +/* +********************************************************************************************************* +* SEMAPHORES +********************************************************************************************************* +*/ + +#ifndef OS_SEM_EN +#error "OS_CFG.H, Missing OS_SEM_EN: Enable (1) or Disable (0) code generation for SEMAPHORES" +#else + #ifndef OS_SEM_ACCEPT_EN + #error "OS_CFG.H, Missing OS_SEM_ACCEPT_EN: Include code for OSSemAccept()" + #endif + + #ifndef OS_SEM_DEL_EN + #error "OS_CFG.H, Missing OS_SEM_DEL_EN: Include code for OSSemDel()" + #endif + + #ifndef OS_SEM_PEND_ABORT_EN + #error "OS_CFG.H, Missing OS_SEM_PEND_ABORT_EN: Include code for OSSemPendAbort()" + #endif + + #ifndef OS_SEM_QUERY_EN + #error "OS_CFG.H, Missing OS_SEM_QUERY_EN: Include code for OSSemQuery()" + #endif + + #ifndef OS_SEM_SET_EN + #error "OS_CFG.H, Missing OS_SEM_SET_EN: Include code for OSSemSet()" + #endif +#endif + +/* +********************************************************************************************************* +* TASK MANAGEMENT +********************************************************************************************************* +*/ + +#ifndef OS_MAX_TASKS +#error "OS_CFG.H, Missing OS_MAX_TASKS: Max. number of tasks in your application" +#else + #if OS_MAX_TASKS < 2u + #error "OS_CFG.H, OS_MAX_TASKS must be >= 2" + #endif + + #if OS_MAX_TASKS > ((OS_LOWEST_PRIO - OS_N_SYS_TASKS) + 1u) + #error "OS_CFG.H, OS_MAX_TASKS must be <= OS_LOWEST_PRIO - OS_N_SYS_TASKS + 1" + #endif + +#endif + +#if OS_LOWEST_PRIO > 254u +#error "OS_CFG.H, OS_LOWEST_PRIO must be <= 254 in V2.8x and higher" +#endif + +#ifndef OS_TASK_IDLE_STK_SIZE +#error "OS_CFG.H, Missing OS_TASK_IDLE_STK_SIZE: Idle task stack size" +#endif + +#ifndef OS_TASK_STAT_EN +#error "OS_CFG.H, Missing OS_TASK_STAT_EN: Enable (1) or Disable(0) the statistics task" +#endif + +#ifndef OS_TASK_STAT_STK_SIZE +#error "OS_CFG.H, Missing OS_TASK_STAT_STK_SIZE: Statistics task stack size" +#endif + +#ifndef OS_TASK_STAT_STK_CHK_EN +#error "OS_CFG.H, Missing OS_TASK_STAT_STK_CHK_EN: Check task stacks from statistics task" +#endif + +#ifndef OS_TASK_CHANGE_PRIO_EN +#error "OS_CFG.H, Missing OS_TASK_CHANGE_PRIO_EN: Include code for OSTaskChangePrio()" +#endif + +#ifndef OS_TASK_CREATE_EN +#error "OS_CFG.H, Missing OS_TASK_CREATE_EN: Include code for OSTaskCreate()" +#endif + +#ifndef OS_TASK_CREATE_EXT_EN +#error "OS_CFG.H, Missing OS_TASK_CREATE_EXT_EN: Include code for OSTaskCreateExt()" +#endif + +#ifndef OS_TASK_DEL_EN +#error "OS_CFG.H, Missing OS_TASK_DEL_EN: Include code for OSTaskDel()" +#endif + +#ifndef OS_TASK_NAME_EN +#error "OS_CFG.H, Missing OS_TASK_NAME_EN: Enable task names" +#endif + +#ifndef OS_TASK_SUSPEND_EN +#error "OS_CFG.H, Missing OS_TASK_SUSPEND_EN: Include code for OSTaskSuspend() and OSTaskResume()" +#endif + +#ifndef OS_TASK_QUERY_EN +#error "OS_CFG.H, Missing OS_TASK_QUERY_EN: Include code for OSTaskQuery()" +#endif + +#ifndef OS_TASK_REG_TBL_SIZE +#error "OS_CFG.H, Missing OS_TASK_REG_TBL_SIZE: Include code for task specific registers" +#else + #if OS_TASK_REG_TBL_SIZE > 255u + #error "OS_CFG.H, OS_TASK_REG_TBL_SIZE must be <= 255" + #endif +#endif + +/* +********************************************************************************************************* +* TIME MANAGEMENT +********************************************************************************************************* +*/ + +#ifndef OS_TICKS_PER_SEC +#error "OS_CFG.H, Missing OS_TICKS_PER_SEC: Sets the number of ticks in one second" +#endif + +#ifndef OS_TIME_DLY_HMSM_EN +#error "OS_CFG.H, Missing OS_TIME_DLY_HMSM_EN: Include code for OSTimeDlyHMSM()" +#endif + +#ifndef OS_TIME_DLY_RESUME_EN +#error "OS_CFG.H, Missing OS_TIME_DLY_RESUME_EN: Include code for OSTimeDlyResume()" +#endif + +#ifndef OS_TIME_GET_SET_EN +#error "OS_CFG.H, Missing OS_TIME_GET_SET_EN: Include code for OSTimeGet() and OSTimeSet()" +#endif + +/* +********************************************************************************************************* +* TIMER MANAGEMENT +********************************************************************************************************* +*/ + +#ifndef OS_TMR_EN +#error "OS_CFG.H, Missing OS_TMR_EN: When (1) enables code generation for Timer Management" +#elif OS_TMR_EN > 0u + #if OS_SEM_EN == 0u + #error "OS_CFG.H, Semaphore management is required (set OS_SEM_EN to 1) when enabling Timer Management." + #error " Timer management require TWO semaphores." + #endif + + #ifndef OS_TMR_CFG_MAX + #error "OS_CFG.H, Missing OS_TMR_CFG_MAX: Determines the total number of timers in an application (2 .. 65500)" + #else + #if OS_TMR_CFG_MAX < 2u + #error "OS_CFG.H, OS_TMR_CFG_MAX should be between 2 and 65500" + #endif + + #if OS_TMR_CFG_MAX > 65500u + #error "OS_CFG.H, OS_TMR_CFG_MAX should be between 2 and 65500" + #endif + #endif + + #ifndef OS_TMR_CFG_WHEEL_SIZE + #error "OS_CFG.H, Missing OS_TMR_CFG_WHEEL_SIZE: Sets the size of the timer wheel (1 .. 1023)" + #else + #if OS_TMR_CFG_WHEEL_SIZE < 2u + #error "OS_CFG.H, OS_TMR_CFG_WHEEL_SIZE should be between 2 and 1024" + #endif + + #if OS_TMR_CFG_WHEEL_SIZE > 1024u + #error "OS_CFG.H, OS_TMR_CFG_WHEEL_SIZE should be between 2 and 1024" + #endif + #endif + + #ifndef OS_TMR_CFG_NAME_EN + #error "OS_CFG.H, Missing OS_TMR_CFG_NAME_EN: Enable Timer names" + #endif + + #ifndef OS_TMR_CFG_TICKS_PER_SEC + #error "OS_CFG.H, Missing OS_TMR_CFG_TICKS_PER_SEC: Determines the rate at which tiem timer management task will run (Hz)" + #endif + + #ifndef OS_TASK_TMR_STK_SIZE + #error "OS_CFG.H, Missing OS_TASK_TMR_STK_SIZE: Determines the size of the Timer Task's stack" + #endif +#endif + + +/* +********************************************************************************************************* +* MISCELLANEOUS +********************************************************************************************************* +*/ + +#ifndef OS_ARG_CHK_EN +#error "OS_CFG.H, Missing OS_ARG_CHK_EN: Enable (1) or Disable (0) argument checking" +#endif + + +#ifndef OS_CPU_HOOKS_EN +#error "OS_CFG.H, Missing OS_CPU_HOOKS_EN: uC/OS-II hooks are found in the processor port files when 1" +#endif + + +#ifndef OS_APP_HOOKS_EN +#error "OS_CFG.H, Missing OS_APP_HOOKS_EN: Application-defined hooks are called from the uC/OS-II hooks" +#endif + + +#ifndef OS_DEBUG_EN +#error "OS_CFG.H, Missing OS_DEBUG_EN: Allows you to include variables for debugging or not" +#endif + + +#ifndef OS_LOWEST_PRIO +#error "OS_CFG.H, Missing OS_LOWEST_PRIO: Defines the lowest priority that can be assigned" +#endif + + +#ifndef OS_MAX_EVENTS +#error "OS_CFG.H, Missing OS_MAX_EVENTS: Max. number of event control blocks in your application" +#else + #if OS_MAX_EVENTS > 65500u + #error "OS_CFG.H, OS_MAX_EVENTS must be <= 65500" + #endif +#endif + + +#ifndef OS_SCHED_LOCK_EN +#error "OS_CFG.H, Missing OS_SCHED_LOCK_EN: Include code for OSSchedLock() and OSSchedUnlock()" +#endif + + +#ifndef OS_EVENT_MULTI_EN +#error "OS_CFG.H, Missing OS_EVENT_MULTI_EN: Include code for OSEventPendMulti()" +#endif + + +#ifndef OS_TASK_PROFILE_EN +#error "OS_CFG.H, Missing OS_TASK_PROFILE_EN: Include data structure for run-time task profiling" +#endif + + +#ifndef OS_TASK_SW_HOOK_EN +#error "OS_CFG.H, Missing OS_TASK_SW_HOOK_EN: Allows you to include the code for OSTaskSwHook() or not" +#endif + + +#ifndef OS_TICK_STEP_EN +#error "OS_CFG.H, Missing OS_TICK_STEP_EN: Allows to 'step' one tick at a time with uC/OS-View" +#endif + + +#ifndef OS_TIME_TICK_HOOK_EN +#error "OS_CFG.H, Missing OS_TIME_TICK_HOOK_EN: Allows you to include the code for OSTimeTickHook() or not" +#endif + +/* +********************************************************************************************************* +* SAFETY CRITICAL USE +********************************************************************************************************* +*/ + +#ifdef SAFETY_CRITICAL_RELEASE + +#if OS_ARG_CHK_EN < 1u +#error "OS_CFG.H, OS_ARG_CHK_EN must be enabled for safety-critical release code" +#endif + +#if OS_APP_HOOKS_EN > 0u +#error "OS_CFG.H, OS_APP_HOOKS_EN must be disabled for safety-critical release code" +#endif + +#if OS_DEBUG_EN > 0u +#error "OS_CFG.H, OS_DEBUG_EN must be disabled for safety-critical release code" +#endif + +#ifdef CANTATA +#error "OS_CFG.H, CANTATA must be disabled for safety-critical release code" +#endif + +#ifdef OS_SCHED_LOCK_EN +#error "OS_CFG.H, OS_SCHED_LOCK_EN must be disabled for safety-critical release code" +#endif + +#ifdef VSC_VALIDATION_MODE +#error "OS_CFG.H, VSC_VALIDATION_MODE must be disabled for safety-critical release code" +#endif + +#if OS_TASK_STAT_EN > 0u +#error "OS_CFG.H, OS_TASK_STAT_EN must be disabled for safety-critical release code" +#endif + +#if OS_TICK_STEP_EN > 0u +#error "OS_CFG.H, OS_TICK_STEP_EN must be disabled for safety-critical release code" +#endif + +#if OS_FLAG_EN > 0u + #if OS_FLAG_DEL_EN > 0 + #error "OS_CFG.H, OS_FLAG_DEL_EN must be disabled for safety-critical release code" + #endif +#endif + +#if OS_MBOX_EN > 0u + #if OS_MBOX_DEL_EN > 0u + #error "OS_CFG.H, OS_MBOX_DEL_EN must be disabled for safety-critical release code" + #endif +#endif + +#if OS_MUTEX_EN > 0u + #if OS_MUTEX_DEL_EN > 0u + #error "OS_CFG.H, OS_MUTEX_DEL_EN must be disabled for safety-critical release code" + #endif +#endif + +#if OS_Q_EN > 0u + #if OS_Q_DEL_EN > 0u + #error "OS_CFG.H, OS_Q_DEL_EN must be disabled for safety-critical release code" + #endif +#endif + +#if OS_SEM_EN > 0u + #if OS_SEM_DEL_EN > 0u + #error "OS_CFG.H, OS_SEM_DEL_EN must be disabled for safety-critical release code" + #endif +#endif + +#if OS_TASK_EN > 0u + #if OS_TASK_DEL_EN > 0u + #error "OS_CFG.H, OS_TASK_DEL_EN must be disabled for safety-critical release code" + #endif +#endif + +#if OS_CRITICAL_METHOD != 3u +#error "OS_CPU.H, OS_CRITICAL_METHOD must be type 3 for safety-critical release code" +#endif + +#endif /* ------------------------ SAFETY_CRITICAL_RELEASE ------------------------ */ + +#ifdef __cplusplus +} +#endif + +#endif + Index: ucos-ii/2.91/include/uart.h =================================================================== --- ucos-ii/2.91/include/uart.h (nonexistent) +++ ucos-ii/2.91/include/uart.h (revision 471) @@ -0,0 +1,143 @@ +#ifndef _UART_H_ +#define _UART_H_ +extern void uart_init(void); +extern void uart_putc(char); +extern char uart_getc(void); +extern char uart_testc(void); +extern int uart_check_for_char(void); +#if 1 +#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ +#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ +#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ +#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ +#define UART_IER 1 /* Out: Interrupt Enable Register */ +#define UART_IIR 2 /* In: Interrupt ID Register */ +#define UART_FCR 2 /* Out: FIFO Control Register */ +#define UART_EFR 2 /* I/O: Extended Features Register */ + /* (DLAB=1, 16C660 only) */ +#define UART_LCR 3 /* Out: Line Control Register */ +#define UART_MCR 4 /* Out: Modem Control Register */ +#define UART_LSR 5 /* In: Line Status Register */ +#define UART_MSR 6 /* In: Modem Status Register */ +#define UART_SCR 7 /* I/O: Scratch Register */ +#else + +#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ +#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ +#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ +#define UART_DLM 4 /* Out: Divisor Latch High (DLAB=1) */ +#define UART_IER 4 /* Out: Interrupt Enable Register */ +#define UART_IIR 8 /* In: Interrupt ID Register */ +#define UART_FCR 8 /* Out: FIFO Control Register */ +#define UART_EFR 8 /* I/O: Extended Features Register */ + /* (DLAB=1, 16C660 only) */ +#define UART_LCR 12 /* Out: Line Control Register */ +#define UART_MCR 12 /* Out: Modem Control Register */ +#define UART_LSR 20 /* In: Line Status Register */ +#define UART_MSR 24 /* In: Modem Status Register */ +#define UART_SCR 28 /* I/O: Scratch Register */ +#endif + +/* + * These are the definitions for the FIFO Control Register + * (16650 only) + */ +#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ +/* 16650 redefinitions */ +#define UART_FCR6_R_TRIGGER_8 0x00 /* Mask for receive trigger set at 1 */ +#define UART_FCR6_R_TRIGGER_16 0x40 /* Mask for receive trigger set at 4 */ +#define UART_FCR6_R_TRIGGER_24 0x80 /* Mask for receive trigger set at 8 */ +#define UART_FCR6_R_TRIGGER_28 0xC0 /* Mask for receive trigger set at 14 */ +#define UART_FCR6_T_TRIGGER_16 0x00 /* Mask for transmit trigger set at 16 */ +#define UART_FCR6_T_TRIGGER_8 0x10 /* Mask for transmit trigger set at 8 */ +#define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */ +#define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */ + +/* + * These are the definitions for the Line Control Register + * + * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting + * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. + */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ +#define UART_LCR_SBC 0x40 /* Set break control */ +#define UART_LCR_SPAR 0x20 /* Stick parity (?) */ +#define UART_LCR_EPAR 0x10 /* Even parity select */ +#define UART_LCR_PARITY 0x08 /* Parity Enable */ +#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */ +#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ +#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ +#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ +#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ + +/* + * These are the definitions for the Line Status Register + */ +#define UART_LSR_TEMT 0x40 /* Transmitter empty */ +#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ +#define UART_LSR_BI 0x10 /* Break interrupt indicator */ +#define UART_LSR_FE 0x08 /* Frame error indicator */ +#define UART_LSR_PE 0x04 /* Parity error indicator */ +#define UART_LSR_OE 0x02 /* Overrun error indicator */ +#define UART_LSR_DR 0x01 /* Receiver data ready */ + +/* + * These are the definitions for the Interrupt Identification Register + */ +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_TOI 0x0c /* Receive time out interrupt */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +/* + * These are the definitions for the Interrupt Enable Register + */ +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ + +/* + * These are the definitions for the Modem Control Register + */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ +#define UART_MCR_OUT2 0x08 /* Out2 complement */ +#define UART_MCR_OUT1 0x04 /* Out1 complement */ +#define UART_MCR_RTS 0x02 /* RTS complement */ +#define UART_MCR_DTR 0x01 /* DTR complement */ + +/* + * These are the definitions for the Modem Status Register + */ +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ +#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ + +/* + * These are the definitions for the Extended Features Register + * (StarTech 16C660 only, when DLAB=1) + */ +#define UART_EFR_CTS 0x80 /* CTS flow control */ +#define UART_EFR_RTS 0x40 /* RTS flow control */ +#define UART_EFR_SCD 0x20 /* Special character detect */ +#define UART_EFR_ENI 0x10 /* Enhanced Interrupt */ + +#endif Index: ucos-ii/2.91/include/os_cfg.h =================================================================== --- ucos-ii/2.91/include/os_cfg.h (nonexistent) +++ ucos-ii/2.91/include/os_cfg.h (revision 471) @@ -0,0 +1,144 @@ +/* +********************************************************************************************************* +* uC/OS-II +* The Real-Time Kernel +* uC/OS-II Configuration File for V2.8x +* +* (c) Copyright 2005-2009, Micrium, Weston, FL +* All Rights Reserved +* +* +* File : OS_CFG.H +* By : Jean J. Labrosse +* Version : V2.91 +* +* LICENSING TERMS: +* --------------- +* uC/OS-II is provided in source form for FREE evaluation, for educational use or for peaceful research. +* If you plan on using uC/OS-II in a commercial product you need to contact Micri�m to properly license +* its use in your product. We provide ALL the source code for your convenience and to help you experience +* uC/OS-II. The fact that the source is provided does NOT mean that you can use it without paying a +* licensing fee. +********************************************************************************************************* +*/ + +#ifndef OS_CFG_H +#define OS_CFG_H + + + /* ---------------------- MISCELLANEOUS ----------------------- */ +#define OS_APP_HOOKS_EN 1u /* Application-defined hooks are called from the uC/OS-II hooks */ +#define OS_ARG_CHK_EN 0u /* Enable (1) or Disable (0) argument checking */ +#define OS_CPU_HOOKS_EN 1u /* uC/OS-II hooks are found in the processor port files */ + +#define OS_DEBUG_EN 1u /* Enable(1) debug variables */ + +#define OS_EVENT_MULTI_EN 1u /* Include code for OSEventPendMulti() */ +#define OS_EVENT_NAME_EN 1u /* Enable names for Sem, Mutex, Mbox and Q */ + +#define OS_LOWEST_PRIO 63u /* Defines the lowest priority that can be assigned ... */ + /* ... MUST NEVER be higher than 254! */ + +#define OS_MAX_EVENTS 10u /* Max. number of event control blocks in your application */ +#define OS_MAX_FLAGS 5u /* Max. number of Event Flag Groups in your application */ +#define OS_MAX_MEM_PART 5u /* Max. number of memory partitions */ +#define OS_MAX_QS 4u /* Max. number of queue control blocks in your application */ +#define OS_MAX_TASKS 20u /* Max. number of tasks in your application, MUST be >= 2 */ + +#define OS_SCHED_LOCK_EN 1u /* Include code for OSSchedLock() and OSSchedUnlock() */ + +#define OS_TICK_STEP_EN 1u /* Enable tick stepping feature for uC/OS-View */ +#define OS_TICKS_PER_SEC 100u /* Set the number of ticks in one second */ + + + /* --------------------- TASK STACK SIZE ---------------------- */ +#define OS_TASK_TMR_STK_SIZE 128u /* Timer task stack size (# of OS_STK wide entries) */ +#define OS_TASK_STAT_STK_SIZE 128u /* Statistics task stack size (# of OS_STK wide entries) */ +#define OS_TASK_IDLE_STK_SIZE 128u /* Idle task stack size (# of OS_STK wide entries) */ + + + /* --------------------- TASK MANAGEMENT ---------------------- */ +#define OS_TASK_CHANGE_PRIO_EN 1u /* Include code for OSTaskChangePrio() */ +#define OS_TASK_CREATE_EN 1u /* Include code for OSTaskCreate() */ +#define OS_TASK_CREATE_EXT_EN 1u /* Include code for OSTaskCreateExt() */ +#define OS_TASK_DEL_EN 1u /* Include code for OSTaskDel() */ +#define OS_TASK_NAME_EN 1u /* Enable task names */ +#define OS_TASK_PROFILE_EN 1u /* Include variables in OS_TCB for profiling */ +#define OS_TASK_QUERY_EN 1u /* Include code for OSTaskQuery() */ +#define OS_TASK_REG_TBL_SIZE 1u /* Size of task variables array (#of INT32U entries) */ +#define OS_TASK_STAT_EN 1u /* Enable (1) or Disable(0) the statistics task */ +#define OS_TASK_STAT_STK_CHK_EN 1u /* Check task stacks from statistic task */ +#define OS_TASK_SUSPEND_EN 1u /* Include code for OSTaskSuspend() and OSTaskResume() */ +#define OS_TASK_SW_HOOK_EN 1u /* Include code for OSTaskSwHook() */ + + + /* ----------------------- EVENT FLAGS ------------------------ */ +#define OS_FLAG_EN 1u /* Enable (1) or Disable (0) code generation for EVENT FLAGS */ +#define OS_FLAG_ACCEPT_EN 1u /* Include code for OSFlagAccept() */ +#define OS_FLAG_DEL_EN 1u /* Include code for OSFlagDel() */ +#define OS_FLAG_NAME_EN 1u /* Enable names for event flag group */ +#define OS_FLAG_QUERY_EN 1u /* Include code for OSFlagQuery() */ +#define OS_FLAG_WAIT_CLR_EN 1u /* Include code for Wait on Clear EVENT FLAGS */ +#define OS_FLAGS_NBITS 16u /* Size in #bits of OS_FLAGS data type (8, 16 or 32) */ + + + /* -------------------- MESSAGE MAILBOXES --------------------- */ +#define OS_MBOX_EN 1u /* Enable (1) or Disable (0) code generation for MAILBOXES */ +#define OS_MBOX_ACCEPT_EN 1u /* Include code for OSMboxAccept() */ +#define OS_MBOX_DEL_EN 1u /* Include code for OSMboxDel() */ +#define OS_MBOX_PEND_ABORT_EN 1u /* Include code for OSMboxPendAbort() */ +#define OS_MBOX_POST_EN 1u /* Include code for OSMboxPost() */ +#define OS_MBOX_POST_OPT_EN 1u /* Include code for OSMboxPostOpt() */ +#define OS_MBOX_QUERY_EN 1u /* Include code for OSMboxQuery() */ + + + /* --------------------- MEMORY MANAGEMENT -------------------- */ +#define OS_MEM_EN 1u /* Enable (1) or Disable (0) code generation for MEMORY MANAGER */ +#define OS_MEM_NAME_EN 1u /* Enable memory partition names */ +#define OS_MEM_QUERY_EN 1u /* Include code for OSMemQuery() */ + + + /* ---------------- MUTUAL EXCLUSION SEMAPHORES --------------- */ +#define OS_MUTEX_EN 1u /* Enable (1) or Disable (0) code generation for MUTEX */ +#define OS_MUTEX_ACCEPT_EN 1u /* Include code for OSMutexAccept() */ +#define OS_MUTEX_DEL_EN 1u /* Include code for OSMutexDel() */ +#define OS_MUTEX_QUERY_EN 1u /* Include code for OSMutexQuery() */ + + + /* ---------------------- MESSAGE QUEUES ---------------------- */ +#define OS_Q_EN 1u /* Enable (1) or Disable (0) code generation for QUEUES */ +#define OS_Q_ACCEPT_EN 1u /* Include code for OSQAccept() */ +#define OS_Q_DEL_EN 1u /* Include code for OSQDel() */ +#define OS_Q_FLUSH_EN 1u /* Include code for OSQFlush() */ +#define OS_Q_PEND_ABORT_EN 1u /* Include code for OSQPendAbort() */ +#define OS_Q_POST_EN 1u /* Include code for OSQPost() */ +#define OS_Q_POST_FRONT_EN 1u /* Include code for OSQPostFront() */ +#define OS_Q_POST_OPT_EN 1u /* Include code for OSQPostOpt() */ +#define OS_Q_QUERY_EN 1u /* Include code for OSQQuery() */ + + + /* ------------------------ SEMAPHORES ------------------------ */ +#define OS_SEM_EN 1u /* Enable (1) or Disable (0) code generation for SEMAPHORES */ +#define OS_SEM_ACCEPT_EN 1u /* Include code for OSSemAccept() */ +#define OS_SEM_DEL_EN 1u /* Include code for OSSemDel() */ +#define OS_SEM_PEND_ABORT_EN 1u /* Include code for OSSemPendAbort() */ +#define OS_SEM_QUERY_EN 1u /* Include code for OSSemQuery() */ +#define OS_SEM_SET_EN 1u /* Include code for OSSemSet() */ + + + /* --------------------- TIME MANAGEMENT ---------------------- */ +#define OS_TIME_DLY_HMSM_EN 1u /* Include code for OSTimeDlyHMSM() */ +#define OS_TIME_DLY_RESUME_EN 1u /* Include code for OSTimeDlyResume() */ +#define OS_TIME_GET_SET_EN 1u /* Include code for OSTimeGet() and OSTimeSet() */ +#define OS_TIME_TICK_HOOK_EN 1u /* Include code for OSTimeTickHook() */ + + + /* --------------------- TIMER MANAGEMENT --------------------- */ +#define OS_TMR_EN 1u /* Enable (1) or Disable (0) code generation for TIMERS */ +#define OS_TMR_CFG_MAX 16u /* Maximum number of timers */ +#define OS_TMR_CFG_NAME_EN 1u /* Determine timer names */ +#define OS_TMR_CFG_WHEEL_SIZE 8u /* Size of timer wheel (#Spokes) */ +#define OS_TMR_CFG_TICKS_PER_SEC 10u /* Rate at which timer management task runs (Hz) */ + +#endif + Index: ucos-ii/2.91/include/console.h =================================================================== --- ucos-ii/2.91/include/console.h (nonexistent) +++ ucos-ii/2.91/include/console.h (revision 471) @@ -0,0 +1,34 @@ +/* + Functions to control a console + + Very basic right now. + + Author: Julius Baxter, julius@opencores.org + +*/ + +/* + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#ifndef _CONSOLE_H_ +#define _CONSOLE_H_ +void console_init(int width, int height); +void console_finish(void); +void console_puts(int x, int y, char* str); +void console_putc(int x, int y, char c); +void console_clear(void); +#endif + Index: ucos-ii/2.91/include/spr-defs.h =================================================================== --- ucos-ii/2.91/include/spr-defs.h (nonexistent) +++ ucos-ii/2.91/include/spr-defs.h (revision 471) @@ -0,0 +1,631 @@ +/* ipc.h. Microkernel IPC header for Or1ksim + + Copyright (C) 2000 Damjan Lampret + Copyright (C) 2008, 2010 Embecosm Limited + + Contributor Damjan Lampret + Contributor Jeremy Bennett + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +/* ---------------------------------------------------------------------------- + This code is commented throughout for use with Doxygen. + --------------------------------------------------------------------------*/ + +/* This file is part of test microkernel for OpenRISC 1000. */ +/* spr-defs.h -- Defines OR1K architecture specific special-purpose registers + + Copyright (C) 1999 Damjan Lampret, lampret@opencores.org + Copyright (C) 2008 Embecosm Limited + + Contributor Jeremy Bennett + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +/* This program is commented throughout in a fashion suitable for processing + with Doxygen. */ + + +#ifndef SPR_DEFS__H +#define SPR_DEFS__H + +/* Definition of special-purpose registers (SPRs). */ + +#define MAX_GRPS (32) +#define MAX_SPRS_PER_GRP_BITS (11) +#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS) +#define MAX_SPRS (0x10000) + +/* Base addresses for the groups */ +#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_FP (11<< MAX_SPRS_PER_GRP_BITS) + +/* System control and status group */ +#define SPR_VR (SPRGROUP_SYS + 0) +#define SPR_UPR (SPRGROUP_SYS + 1) +#define SPR_CPUCFGR (SPRGROUP_SYS + 2) +#define SPR_DMMUCFGR (SPRGROUP_SYS + 3) +#define SPR_IMMUCFGR (SPRGROUP_SYS + 4) +#define SPR_DCCFGR (SPRGROUP_SYS + 5) +#define SPR_ICCFGR (SPRGROUP_SYS + 6) +#define SPR_DCFGR (SPRGROUP_SYS + 7) +#define SPR_PCCFGR (SPRGROUP_SYS + 8) +#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */ +#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */ +#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */ +#define SPR_FPCSR (SPRGROUP_SYS + 20) /* CZ 21/06/01 */ +#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */ +#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */ +#define SPR_EEAR_BASE (SPRGROUP_SYS + 48) +#define SPR_EEAR_LAST (SPRGROUP_SYS + 63) +#define SPR_ESR_BASE (SPRGROUP_SYS + 64) +#define SPR_ESR_LAST (SPRGROUP_SYS + 79) +#define SPR_GPR_BASE (SPRGROUP_SYS + 1024) + +/* Data MMU group */ +#define SPR_DMMUCR (SPRGROUP_DMMU + 0) +#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) +#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) +#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) +#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) + +/* Instruction MMU group */ +#define SPR_IMMUCR (SPRGROUP_IMMU + 0) +#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) +#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) +#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) +#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) + +/* Data cache group */ +#define SPR_DCCR (SPRGROUP_DC + 0) +#define SPR_DCBPR (SPRGROUP_DC + 1) +#define SPR_DCBFR (SPRGROUP_DC + 2) +#define SPR_DCBIR (SPRGROUP_DC + 3) +#define SPR_DCBWR (SPRGROUP_DC + 4) +#define SPR_DCBLR (SPRGROUP_DC + 5) +#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) +#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) + +/* Instruction cache group */ +#define SPR_ICCR (SPRGROUP_IC + 0) +#define SPR_ICBPR (SPRGROUP_IC + 1) +#define SPR_ICBIR (SPRGROUP_IC + 2) +#define SPR_ICBLR (SPRGROUP_IC + 3) +#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200) +#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200) + +/* MAC group */ +#define SPR_MACLO (SPRGROUP_MAC + 1) +#define SPR_MACHI (SPRGROUP_MAC + 2) + +/* Debug group */ +#define SPR_DVR(N) (SPRGROUP_D + (N)) +#define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) +#define SPR_DMR1 (SPRGROUP_D + 16) +#define SPR_DMR2 (SPRGROUP_D + 17) +#define SPR_DWCR0 (SPRGROUP_D + 18) +#define SPR_DWCR1 (SPRGROUP_D + 19) +#define SPR_DSR (SPRGROUP_D + 20) +#define SPR_DRR (SPRGROUP_D + 21) + +/* Performance counters group */ +#define SPR_PCCR(N) (SPRGROUP_PC + (N)) +#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) + +/* Power management group */ +#define SPR_PMR (SPRGROUP_PM + 0) + +/* PIC group */ +#define SPR_PICMR (SPRGROUP_PIC + 0) +#define SPR_PICSR (SPRGROUP_PIC + 2) + +/* Tick Timer group */ +#define SPR_TTMR (SPRGROUP_TT + 0) +#define SPR_TTCR (SPRGROUP_TT + 1) + +/* + * Bit definitions for the Version Register + * + */ +#define SPR_VR_VER 0xff000000 /* Processor version */ +#define SPR_VR_CFG 0x00ff0000 /* Processor configuration */ +#define SPR_VR_RES 0x0000ffc0 /* Reserved */ +#define SPR_VR_REV 0x0000003f /* Processor revision */ + +#define SPR_VR_VER_OFF 24 +#define SPR_VR_CFG_OFF 16 +#define SPR_VR_REV_OFF 0 + +/* + * Bit definitions for the Unit Present Register + * + */ +#define SPR_UPR_UP 0x00000001 /* UPR present */ +#define SPR_UPR_DCP 0x00000002 /* Data cache present */ +#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */ +#define SPR_UPR_DMP 0x00000008 /* Data MMU present */ +#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */ +#define SPR_UPR_MP 0x00000020 /* MAC present */ +#define SPR_UPR_DUP 0x00000040 /* Debug unit present */ +#define SPR_UPR_PCUP 0x00000080 /* Performance counters unit present */ +#define SPR_UPR_PMP 0x00000100 /* Power management present */ +#define SPR_UPR_PICP 0x00000200 /* PIC present */ +#define SPR_UPR_TTP 0x00000400 /* Tick timer present */ +#define SPR_UPR_RES 0x00fe0000 /* Reserved */ +#define SPR_UPR_CUP 0xff000000 /* Context units present */ + +/* + * JPB: Bit definitions for the CPU configuration register + * + */ +#define SPR_CPUCFGR_NSGF 0x0000000f /* Number of shadow GPR files */ +#define SPR_CPUCFGR_CGF 0x00000010 /* Custom GPR file */ +#define SPR_CPUCFGR_OB32S 0x00000020 /* ORBIS32 supported */ +#define SPR_CPUCFGR_OB64S 0x00000040 /* ORBIS64 supported */ +#define SPR_CPUCFGR_OF32S 0x00000080 /* ORFPX32 supported */ +#define SPR_CPUCFGR_OF64S 0x00000100 /* ORFPX64 supported */ +#define SPR_CPUCFGR_OV64S 0x00000200 /* ORVDX64 supported */ +#define SPR_CPUCFGR_RES 0xfffffc00 /* Reserved */ + +/* + * JPB: Bit definitions for the Debug configuration register and other + * constants. + * + */ + +#define SPR_DCFGR_NDP 0x00000007 /* Number of matchpoints mask */ +#define SPR_DCFGR_NDP1 0x00000000 /* One matchpoint supported */ +#define SPR_DCFGR_NDP2 0x00000001 /* Two matchpoints supported */ +#define SPR_DCFGR_NDP3 0x00000002 /* Three matchpoints supported */ +#define SPR_DCFGR_NDP4 0x00000003 /* Four matchpoints supported */ +#define SPR_DCFGR_NDP5 0x00000004 /* Five matchpoints supported */ +#define SPR_DCFGR_NDP6 0x00000005 /* Six matchpoints supported */ +#define SPR_DCFGR_NDP7 0x00000006 /* Seven matchpoints supported */ +#define SPR_DCFGR_NDP8 0x00000007 /* Eight matchpoints supported */ +#define SPR_DCFGR_WPCI 0x00000008 /* Watchpoint counters implemented */ + +#define MATCHPOINTS_TO_NDP(n) (1 == n ? SPR_DCFGR_NDP1 : \ + 2 == n ? SPR_DCFGR_NDP2 : \ + 3 == n ? SPR_DCFGR_NDP3 : \ + 4 == n ? SPR_DCFGR_NDP4 : \ + 5 == n ? SPR_DCFGR_NDP5 : \ + 6 == n ? SPR_DCFGR_NDP6 : \ + 7 == n ? SPR_DCFGR_NDP7 : SPR_DCFGR_NDP8) +#define MAX_MATCHPOINTS 8 +#define MAX_WATCHPOINTS (MAX_MATCHPOINTS + 2) + +/* + * Bit definitions for the Supervision Register + * + */ +#define SPR_SR_SM 0x00000001 /* Supervisor Mode */ +#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */ +#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */ +#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */ +#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */ +#define SPR_SR_DME 0x00000020 /* Data MMU Enable */ +#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */ +#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */ +#define SPR_SR_CE 0x00000100 /* CID Enable */ +#define SPR_SR_F 0x00000200 /* Condition Flag */ +#define SPR_SR_CY 0x00000400 /* Carry flag */ +#define SPR_SR_OV 0x00000800 /* Overflow flag */ +#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */ +#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */ +#define SPR_SR_EPH 0x00004000 /* Exception Prefix High */ +#define SPR_SR_FO 0x00008000 /* Fixed one */ +#define SPR_SR_SUMRA 0x00010000 /* Supervisor SPR read access */ +#define SPR_SR_RES 0x0ffe0000 /* Reserved */ +#define SPR_SR_CID 0xf0000000 /* Context ID */ + +/* + * Bit definitions for the Data MMU Control Register + * + */ +#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Instruction MMU Control Register + * + */ +#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Data TLB Match Register + * + */ +#define SPR_DTLBMR_V 0x00000001 /* Valid */ +#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_DTLBMR_CID 0x0000003c /* Context ID */ +#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Data TLB Translate Register + * + */ +#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_DTLBTR_A 0x00000010 /* Accessed */ +#define SPR_DTLBTR_D 0x00000020 /* Dirty */ +#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */ +#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ +#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ +#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ +#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for the Instruction TLB Match Register + * + */ +#define SPR_ITLBMR_V 0x00000001 /* Valid */ +#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_ITLBMR_CID 0x0000003c /* Context ID */ +#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Instruction TLB Translate Register + * + */ +#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_ITLBTR_A 0x00000010 /* Accessed */ +#define SPR_ITLBTR_D 0x00000020 /* Dirty */ +#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ +#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ +#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for Data Cache Control register + * + */ +#define SPR_DCCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Insn Cache Control register + * + */ +#define SPR_ICCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Data Cache Configuration Register + * + */ + +#define SPR_DCCFGR_NCW 0x00000007 +#define SPR_DCCFGR_NCS 0x00000078 +#define SPR_DCCFGR_CBS 0x00000080 +#define SPR_DCCFGR_CWS 0x00000100 +#define SPR_DCCFGR_CCRI 0x00000200 +#define SPR_DCCFGR_CBIRI 0x00000400 +#define SPR_DCCFGR_CBPRI 0x00000800 +#define SPR_DCCFGR_CBLRI 0x00001000 +#define SPR_DCCFGR_CBFRI 0x00002000 +#define SPR_DCCFGR_CBWBRI 0x00004000 + +#define SPR_DCCFGR_NCW_OFF 0 +#define SPR_DCCFGR_NCS_OFF 3 +#define SPR_DCCFGR_CBS_OFF 7 + +/* + * Bit definitions for Instruction Cache Configuration Register + * + */ +#define SPR_ICCFGR_NCW 0x00000007 +#define SPR_ICCFGR_NCS 0x00000078 +#define SPR_ICCFGR_CBS 0x00000080 +#define SPR_ICCFGR_CCRI 0x00000200 +#define SPR_ICCFGR_CBIRI 0x00000400 +#define SPR_ICCFGR_CBPRI 0x00000800 +#define SPR_ICCFGR_CBLRI 0x00001000 + +#define SPR_ICCFGR_NCW_OFF 0 +#define SPR_ICCFGR_NCS_OFF 3 +#define SPR_ICCFGR_CBS_OFF 7 + +/* + * Bit definitions for Data MMU Configuration Register + * + */ + +#define SPR_DMMUCFGR_NTW 0x00000003 +#define SPR_DMMUCFGR_NTS 0x0000001C +#define SPR_DMMUCFGR_NAE 0x000000E0 +#define SPR_DMMUCFGR_CRI 0x00000100 +#define SPR_DMMUCFGR_PRI 0x00000200 +#define SPR_DMMUCFGR_TEIRI 0x00000400 +#define SPR_DMMUCFGR_HTR 0x00000800 + +#define SPR_DMMUCFGR_NTW_OFF 0 +#define SPR_DMMUCFGR_NTS_OFF 2 + +/* + * Bit definitions for Instruction MMU Configuration Register + * + */ + +#define SPR_IMMUCFGR_NTW 0x00000003 +#define SPR_IMMUCFGR_NTS 0x0000001C +#define SPR_IMMUCFGR_NAE 0x000000E0 +#define SPR_IMMUCFGR_CRI 0x00000100 +#define SPR_IMMUCFGR_PRI 0x00000200 +#define SPR_IMMUCFGR_TEIRI 0x00000400 +#define SPR_IMMUCFGR_HTR 0x00000800 + +#define SPR_IMMUCFGR_NTW_OFF 0 +#define SPR_IMMUCFGR_NTS_OFF 2 + +/* + * Bit definitions for Debug Control registers + * + */ +#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */ +#define SPR_DCR_CC 0x0000000e /* Compare condition */ +#define SPR_DCR_SC 0x00000010 /* Signed compare */ +#define SPR_DCR_CT 0x000000e0 /* Compare to */ + +/* Bit results with SPR_DCR_CC mask */ +#define SPR_DCR_CC_MASKED 0x00000000 +#define SPR_DCR_CC_EQUAL 0x00000002 +#define SPR_DCR_CC_LESS 0x00000004 +#define SPR_DCR_CC_LESSE 0x00000006 +#define SPR_DCR_CC_GREAT 0x00000008 +#define SPR_DCR_CC_GREATE 0x0000000a +#define SPR_DCR_CC_NEQUAL 0x0000000c + +/* Bit results with SPR_DCR_CT mask */ +#define SPR_DCR_CT_DISABLED 0x00000000 +#define SPR_DCR_CT_IFEA 0x00000020 +#define SPR_DCR_CT_LEA 0x00000040 +#define SPR_DCR_CT_SEA 0x00000060 +#define SPR_DCR_CT_LD 0x00000080 +#define SPR_DCR_CT_SD 0x000000a0 +#define SPR_DCR_CT_LSEA 0x000000c0 +#define SPR_DCR_CT_LSD 0x000000e0 +/* SPR_DCR_CT_LSD doesn't seem to be implemented anywhere in or1ksim. 2004-1-30 HP */ + +/* + * Bit definitions for Debug Mode 1 register + * + */ +#define SPR_DMR1_CW 0x000fffff /* Chain register pair data */ +#define SPR_DMR1_CW0_AND 0x00000001 +#define SPR_DMR1_CW0_OR 0x00000002 +#define SPR_DMR1_CW0 (SPR_DMR1_CW0_AND | SPR_DMR1_CW0_OR) +#define SPR_DMR1_CW1_AND 0x00000004 +#define SPR_DMR1_CW1_OR 0x00000008 +#define SPR_DMR1_CW1 (SPR_DMR1_CW1_AND | SPR_DMR1_CW1_OR) +#define SPR_DMR1_CW2_AND 0x00000010 +#define SPR_DMR1_CW2_OR 0x00000020 +#define SPR_DMR1_CW2 (SPR_DMR1_CW2_AND | SPR_DMR1_CW2_OR) +#define SPR_DMR1_CW3_AND 0x00000040 +#define SPR_DMR1_CW3_OR 0x00000080 +#define SPR_DMR1_CW3 (SPR_DMR1_CW3_AND | SPR_DMR1_CW3_OR) +#define SPR_DMR1_CW4_AND 0x00000100 +#define SPR_DMR1_CW4_OR 0x00000200 +#define SPR_DMR1_CW4 (SPR_DMR1_CW4_AND | SPR_DMR1_CW4_OR) +#define SPR_DMR1_CW5_AND 0x00000400 +#define SPR_DMR1_CW5_OR 0x00000800 +#define SPR_DMR1_CW5 (SPR_DMR1_CW5_AND | SPR_DMR1_CW5_OR) +#define SPR_DMR1_CW6_AND 0x00001000 +#define SPR_DMR1_CW6_OR 0x00002000 +#define SPR_DMR1_CW6 (SPR_DMR1_CW6_AND | SPR_DMR1_CW6_OR) +#define SPR_DMR1_CW7_AND 0x00004000 +#define SPR_DMR1_CW7_OR 0x00008000 +#define SPR_DMR1_CW7 (SPR_DMR1_CW7_AND | SPR_DMR1_CW7_OR) +#define SPR_DMR1_CW8_AND 0x00010000 +#define SPR_DMR1_CW8_OR 0x00020000 +#define SPR_DMR1_CW8 (SPR_DMR1_CW8_AND | SPR_DMR1_CW8_OR) +#define SPR_DMR1_CW9_AND 0x00040000 +#define SPR_DMR1_CW9_OR 0x00080000 +#define SPR_DMR1_CW9 (SPR_DMR1_CW9_AND | SPR_DMR1_CW9_OR) +#define SPR_DMR1_RES1 0x00300000 /* Reserved */ +#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/ +#define SPR_DMR1_BT 0x00800000 /* Branch trace */ +#define SPR_DMR1_RES2 0xff000000 /* Reserved */ + +/* + * Bit definitions for Debug Mode 2 register. AWTC and WGB corrected by JPB + * + */ +#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_AWTC 0x00000ffc /* Assign watchpoints to counters */ +#define SPR_DMR2_AWTC_OFF 2 /* Bit offset to AWTC field */ +#define SPR_DMR2_WGB 0x003ff000 /* Watchpoints generating breakpoint */ +#define SPR_DMR2_WGB_OFF 12 /* Bit offset to WGB field */ +#define SPR_DMR2_WBS 0xffc00000 /* JPB: Watchpoint status */ +#define SPR_DMR2_WBS_OFF 22 /* Bit offset to WBS field */ + +/* + * Bit definitions for Debug watchpoint counter registers + * + */ +#define SPR_DWCR_COUNT 0x0000ffff /* Count */ +#define SPR_DWCR_MATCH 0xffff0000 /* Match */ +#define SPR_DWCR_MATCH_OFF 16 /* Match bit offset */ + +/* + * Bit definitions for Debug stop register + * + */ +#define SPR_DSR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DSR_TTE 0x00000010 /* Tick Timer exception */ +#define SPR_DSR_AE 0x00000020 /* Alignment exception */ +#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DSR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DSR_RE 0x00000400 /* Range exception */ +#define SPR_DSR_SCE 0x00000800 /* System call exception */ +#define SPR_DSR_FPE 0x00001000 /* Floating Point Exception */ +#define SPR_DSR_TE 0x00002000 /* Trap exception */ + +/* + * Bit definitions for Debug reason register + * + */ +#define SPR_DRR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */ +#define SPR_DRR_AE 0x00000020 /* Alignment exception */ +#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DRR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DRR_RE 0x00000400 /* Range exception */ +#define SPR_DRR_SCE 0x00000800 /* System call exception */ +#define SPR_DRR_FPE 0x00001000 /* Floating Point Exception */ +#define SPR_DRR_TE 0x00002000 /* Trap exception */ + +/* + * Bit definitions for Performance counters mode registers + * + */ +#define SPR_PCMR_CP 0x00000001 /* Counter present */ +#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */ +#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */ +#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */ +#define SPR_PCMR_LA 0x00000010 /* Load access event */ +#define SPR_PCMR_SA 0x00000020 /* Store access event */ +#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/ +#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */ +#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */ +#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */ +#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */ +#define SPR_PCMR_BS 0x00000800 /* Branch stall event */ +#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */ +#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */ +#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */ +#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */ + +/* + * Bit definitions for the Power management register + * + */ +#define SPR_PMR_SDF 0x0000000f /* Slow down factor */ +#define SPR_PMR_DME 0x00000010 /* Doze mode enable */ +#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */ +#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */ +#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */ + +/* + * Bit definitions for PICMR + * + */ +#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */ + +/* + * Bit definitions for PICSR + * + */ +#define SPR_PICSR_IS 0xffffffff /* Interrupt status */ + +/* + * Bit definitions for Tick Timer Control Register + * + */ +#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */ +#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD +#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */ +#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */ +#define SPR_TTMR_DI 0x00000000 /* Disabled */ +#define SPR_TTMR_RT 0x40000000 /* Restart tick */ +#define SPR_TTMR_SR 0x80000000 /* Single run */ +#define SPR_TTMR_CR 0xc0000000 /* Continuous run */ +#define SPR_TTMR_M 0xc0000000 /* Tick mode */ + +/* + * Bit definitions for the FP Control Status Register + * + */ +#define SPR_FPCSR_FPEE 0x00000001 /* Floating Point Exception Enable */ +#define SPR_FPCSR_RM 0x00000006 /* Rounding Mode */ +#define SPR_FPCSR_OVF 0x00000008 /* Overflow Flag */ +#define SPR_FPCSR_UNF 0x00000010 /* Underflow Flag */ +#define SPR_FPCSR_SNF 0x00000020 /* SNAN Flag */ +#define SPR_FPCSR_QNF 0x00000040 /* QNAN Flag */ +#define SPR_FPCSR_ZF 0x00000080 /* Zero Flag */ +#define SPR_FPCSR_IXF 0x00000100 /* Inexact Flag */ +#define SPR_FPCSR_IVF 0x00000200 /* Invalid Flag */ +#define SPR_FPCSR_INF 0x00000400 /* Infinity Flag */ +#define SPR_FPCSR_DZF 0x00000800 /* Divide By Zero Flag */ +#define SPR_FPCSR_ALLF (SPR_FPCSR_OVF | SPR_FPCSR_UNF | SPR_FPCSR_SNF | \ + SPR_FPCSR_QNF | SPR_FPCSR_ZF | SPR_FPCSR_IXF | \ + SPR_FPCSR_IVF | SPR_FPCSR_INF | SPR_FPCSR_DZF) + +#define FPCSR_RM_RN (0<<1) +#define FPCSR_RM_RZ (1<<1) +#define FPCSR_RM_RIP (2<<1) +#define FPCSR_RM_RIN (3<<1) + +/* + * l.nop constants + * + */ +#define NOP_NOP 0x0000 /* Normal nop instruction */ +#define NOP_EXIT 0x0001 /* End of simulation */ +#define NOP_REPORT 0x0002 /* Simple report */ +/*#define NOP_PRINTF 0x0003 Simprintf instruction (obsolete)*/ +#define NOP_PUTC 0x0004 /* JPB: Simputc instruction */ +#define NOP_CNT_RESET 0x0005 /* Reset statistics counters */ +#define NOP_GET_TICKS 0x0006 /* JPB: Get # ticks running */ +#define NOP_GET_PS 0x0007 /* JPB: Get picosecs/cycle */ +#define NOP_TRACE_ON 0x0008 /* Turn on tracing */ +#define NOP_TRACE_OFF 0x0009 /* Turn off tracing */ +#define NOP_REPORT_FIRST 0x0400 /* Report with number */ +#define NOP_REPORT_LAST 0x03ff /* Report with number */ + +#endif /* SPR_DEFS__H */ Index: ucos-ii/2.91/include/ctype.h =================================================================== --- ucos-ii/2.91/include/ctype.h (nonexistent) +++ ucos-ii/2.91/include/ctype.h (revision 471) @@ -0,0 +1,72 @@ +/* + ctype.h -- character types + Implements the usual ctype stuff (only valid for ASCII systems) + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + +#ifndef __CTYPE_H +#define __CTYPE_H + +/* basic types */ +#define __CT_d 0x01 /* numeric digit */ +#define __CT_u 0x02 /* upper case */ +#define __CT_l 0x04 /* lower case */ +#define __CT_c 0x08 /* control character */ +#define __CT_s 0x10 /* whitespace */ +#define __CT_p 0x20 /* punctuation */ +#define __CT_x 0x40 /* hexadecimal */ +#define __CT_b 0x80 /* blank (is also space) */ + +/* combination types */ +#define __CT_lx (__CT_l | __CT_x) /* lower case hexadecimal */ +#define __CT_ux (__CT_u | __CT_x) /* upper case hexadecimal */ + +#define __CT_space (__CT_s | __CT_b) +#define __CT_alphanum (__CT_l | __CT_u | __CT_d) +#define __CT_graph (__CT_l | __CT_u | __CT_d | __CT_p) +#define __CT_print (__CT_l | __CT_u | __CT_d | __CT_p | __CT_b) + +extern const unsigned char __ctype_table[256]; + +#define _toupper(c) ( (c) ^ 0x20 ) +#define _tolower(c) ( (c) ^ 0x20 ) +#define toupper(c) ( islower(c) ? _tolower(c) : (c) ) +#define tolower(c) ( isupper(c) ? _toupper(c) : (c) ) +#define toascii(c) ( (c) & 0x7F ) + + +/* standard defenitions are taken from man-pages */ +/*#define isalnum(c) ( isalpha(c) || isdigit(c) ) */ +#define isalnum(c) ( __ctype_table[(int) c] & __CT_alphanum ) +/*#define isalpha(c) ( isupper(c) || islower(c) ) */ +#define isalpha(c) ( __ctype_table[(int) c] & __CT_ul ) +#define isascii(c) ( (c) & ~0x7F ) +#define isblank(c) ( __ctype_table[(int) c] & __CT_b ) +#define iscntrl(c) ( __ctype_table[(int) c] & __CT_c ) +#define isdigit(c) ( __ctype_table[(int) c] & __CT_d ) +#define isgraph(c) ( __ctype_table[(int) c] & __CT_graph ) +#define islower(c) ( __ctype_table[(int) c] & __CT_l ) +#define isprint(c) ( __ctype_table[(int) c] & __CT_print) +#define ispunct(c) ( __ctype_table[(int) c] & __CT_p ) +#define isspace(c) ( __ctype_table[(int) c] & __CT_space ) +#define isupper(c) ( __ctype_table[(int) c] & __CT_u ) +#define isxdigit(c) ( __ctype_table[(int) c] & __CT_x ) + +#endif /* __CTYPE_H */ Index: ucos-ii/2.91/include/spr_defs.h =================================================================== --- ucos-ii/2.91/include/spr_defs.h (nonexistent) +++ ucos-ii/2.91/include/spr_defs.h (revision 471) @@ -0,0 +1,429 @@ +/* spr_defs.h -- Defines OR1K architecture specific special-purpose registers + Copyright (C) 1999 Damjan Lampret, lampret@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* This file is also used by microkernel test bench. Among +others it is also used in assembly file(s). */ + +/* Definition of special-purpose registers (SPRs) */ + +#define MAX_GRPS (32) +#define MAX_SPRS_PER_GRP_BITS (11) +#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS) +#define MAX_SPRS (0x10000) + +/* Base addresses for the groups */ +#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS) + +/* System control and status group */ +#define SPR_VR (SPRGROUP_SYS + 0) +#define SPR_UPR (SPRGROUP_SYS + 1) +#define SPR_CPUCFGR (SPRGROUP_SYS + 2) +#define SPR_DMMUCFGR (SPRGROUP_SYS + 3) +#define SPR_IMMUCFGR (SPRGROUP_SYS + 4) +#define SPR_DCCFGR (SPRGROUP_SYS + 5) +#define SPR_ICCFGR (SPRGROUP_SYS + 6) +#define SPR_DCFGR (SPRGROUP_SYS + 7) +#define SPR_PCCFGR (SPRGROUP_SYS + 8) +#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */ +#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */ +#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */ +#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */ +#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */ +#define SPR_EEAR_BASE (SPRGROUP_SYS + 48) +#define SPR_EEAR_LAST (SPRGROUP_SYS + 63) +#define SPR_ESR_BASE (SPRGROUP_SYS + 64) +#define SPR_ESR_LAST (SPRGROUP_SYS + 79) + +/* Data MMU group */ +#define SPR_DMMUCR (SPRGROUP_DMMU + 0) +#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) +#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) +#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) +#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) + +/* Instruction MMU group */ +#define SPR_IMMUCR (SPRGROUP_IMMU + 0) +#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) +#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) +#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) +#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) + +/* Data cache group */ +#define SPR_DCCR (SPRGROUP_DC + 0) +#define SPR_DCBPR (SPRGROUP_DC + 1) +#define SPR_DCBFR (SPRGROUP_DC + 2) +#define SPR_DCBIR (SPRGROUP_DC + 3) +#define SPR_DCBWR (SPRGROUP_DC + 4) +#define SPR_DCBLR (SPRGROUP_DC + 5) +#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) +#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) + +/* Instruction cache group */ +#define SPR_ICCR (SPRGROUP_IC + 0) +#define SPR_ICBPR (SPRGROUP_IC + 1) +#define SPR_ICBIR (SPRGROUP_IC + 2) +#define SPR_ICBLR (SPRGROUP_IC + 3) +#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200) +#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200) + +/* MAC group */ +#define SPR_MACLO (SPRGROUP_MAC + 1) +#define SPR_MACHI (SPRGROUP_MAC + 2) + +/* Debug group */ +#define SPR_DVR(N) (SPRGROUP_D + (N)) +#define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) +#define SPR_DMR1 (SPRGROUP_D + 16) +#define SPR_DMR2 (SPRGROUP_D + 17) +#define SPR_DWCR0 (SPRGROUP_D + 18) +#define SPR_DWCR1 (SPRGROUP_D + 19) +#define SPR_DSR (SPRGROUP_D + 20) +#define SPR_DRR (SPRGROUP_D + 21) + +/* Performance counters group */ +#define SPR_PCCR(N) (SPRGROUP_PC + (N)) +#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) + +/* Power management group */ +#define SPR_PMR (SPRGROUP_PM + 0) + +/* PIC group */ +#define SPR_PICMR (SPRGROUP_PIC + 0) +#define SPR_PICPR (SPRGROUP_PIC + 1) +#define SPR_PICSR (SPRGROUP_PIC + 2) + +/* Tick Timer group */ +#define SPR_TTMR (SPRGROUP_TT + 0) +#define SPR_TTCR (SPRGROUP_TT + 1) + +/* + * Bit definitions for the Version Register + * + */ +#define SPR_VR_VER 0xffff0000 /* Processor version */ +#define SPR_VR_REV 0x0000003f /* Processor revision */ + +/* + * Bit definitions for the Unit Present Register + * + */ +#define SPR_UPR_UP 0x00000001 /* UPR present */ +#define SPR_UPR_DCP 0x00000002 /* Data cache present */ +#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */ +#define SPR_UPR_DMP 0x00000008 /* Data MMU present */ +#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */ +#define SPR_UPR_OB32P 0x00000020 /* ORBIS32 present */ +#define SPR_UPR_OB64P 0x00000040 /* ORBIS64 present */ +#define SPR_UPR_OF32P 0x00000080 /* ORFPX32 present */ +#define SPR_UPR_OF64P 0x00000100 /* ORFPX64 present */ +#define SPR_UPR_OV32P 0x00000200 /* ORVDX32 present */ +#define SPR_UPR_OV64P 0x00000400 /* ORVDX64 present */ +#define SPR_UPR_DUP 0x00000800 /* Debug unit present */ +#define SPR_UPR_PCUP 0x00001000 /* Performance counters unit present */ +#define SPR_UPR_PMP 0x00002000 /* Power management present */ +#define SPR_UPR_PICP 0x00004000 /* PIC present */ +#define SPR_UPR_TTP 0x00008000 /* Tick timer present */ +#define SPR_UPR_SRP 0x00010000 /* Shadow registers present */ +#define SPR_UPR_RES 0x00fe0000 /* ORVDX32 present */ +#define SPR_UPR_CUST 0xff000000 /* Custom units */ + +/* + * Bit definitions for the Supervision Register + * + */ +#define SPR_SR_CID 0xf0000000 /* Context ID */ +#define SPR_SR_SUMRA 0x00010000 /* Supervisor SPR read access */ +#define SPR_SR_FO 0x00008000 /* Fixed one */ +#define SPR_SR_EPH 0x00004000 /* Exception Prefix High */ +#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */ +#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */ +#define SPR_SR_OV 0x00000800 /* Overflow flag */ +#define SPR_SR_CY 0x00000400 /* Carry flag */ +#define SPR_SR_F 0x00000200 /* Condition Flag */ +#define SPR_SR_CE 0x00000100 /* CID Enable */ +#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */ +#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */ +#define SPR_SR_DME 0x00000020 /* Data MMU Enable */ +#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */ +#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */ +#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */ +#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */ +#define SPR_SR_SM 0x00000001 /* Supervisor Mode */ + +/* + * Bit definitions for the Data MMU Control Register + * + */ +#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Instruction MMU Control Register + * + */ +#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Data TLB Match Register + * + */ +#define SPR_DTLBMR_V 0x00000001 /* Valid */ +#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_DTLBMR_CID 0x0000003c /* Context ID */ +#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Data TLB Translate Register + * + */ +#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_DTLBTR_A 0x00000010 /* Accessed */ +#define SPR_DTLBTR_D 0x00000020 /* Dirty */ +#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */ +#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ +#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ +#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ +#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for the Instruction TLB Match Register + * + */ +#define SPR_ITLBMR_V 0x00000001 /* Valid */ +#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_ITLBMR_CID 0x0000003c /* Context ID */ +#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Instruction TLB Translate Register + * + */ +#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_ITLBTR_A 0x00000010 /* Accessed */ +#define SPR_ITLBTR_D 0x00000020 /* Dirty */ +#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ +#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ +#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for Data Cache Control register + * + */ +#define SPR_DCCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Insn Cache Control register + * + */ +#define SPR_ICCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Debug Control registers + * + */ +#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */ +#define SPR_DCR_CC 0x0000000e /* Compare condition */ +#define SPR_DCR_SC 0x00000010 /* Signed compare */ +#define SPR_DCR_CT 0x000000e0 /* Compare to */ + +/* Bit results with SPR_DCR_CC mask */ +#define SPR_DCR_CC_MASKED 0x00000000 +#define SPR_DCR_CC_EQUAL 0x00000001 +#define SPR_DCR_CC_LESS 0x00000002 +#define SPR_DCR_CC_LESSE 0x00000003 +#define SPR_DCR_CC_GREAT 0x00000004 +#define SPR_DCR_CC_GREATE 0x00000005 +#define SPR_DCR_CC_NEQUAL 0x00000006 + +/* Bit results with SPR_DCR_CT mask */ +#define SPR_DCR_CT_DISABLED 0x00000000 +#define SPR_DCR_CT_IFEA 0x00000020 +#define SPR_DCR_CT_LEA 0x00000040 +#define SPR_DCR_CT_SEA 0x00000060 +#define SPR_DCR_CT_LD 0x00000080 +#define SPR_DCR_CT_SD 0x000000a0 +#define SPR_DCR_CT_LSEA 0x000000c0 + +/* + * Bit definitions for Debug Mode 1 register + * + */ +#define SPR_DMR1_CW0 0x00000003 /* Chain watchpoint 0 */ +#define SPR_DMR1_CW1 0x0000000c /* Chain watchpoint 1 */ +#define SPR_DMR1_CW2 0x00000030 /* Chain watchpoint 2 */ +#define SPR_DMR1_CW3 0x000000c0 /* Chain watchpoint 3 */ +#define SPR_DMR1_CW4 0x00000300 /* Chain watchpoint 4 */ +#define SPR_DMR1_CW5 0x00000c00 /* Chain watchpoint 5 */ +#define SPR_DMR1_CW6 0x00003000 /* Chain watchpoint 6 */ +#define SPR_DMR1_CW7 0x0000c000 /* Chain watchpoint 7 */ +#define SPR_DMR1_CW8 0x00030000 /* Chain watchpoint 8 */ +#define SPR_DMR1_CW9 0x000c0000 /* Chain watchpoint 9 */ +#define SPR_DMR1_CW10 0x00300000 /* Chain watchpoint 10 */ +#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/ +#define SPR_DMR1_BT 0x00800000 /* Branch trace */ +#define SPR_DMR1_DXFW 0x01000000 /* Disable external force watchpoint */ + +/* + * Bit definitions for Debug Mode 2 register + * + */ +#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_AWTC 0x00001ffc /* Assign watchpoints to counters */ +#define SPR_DMR2_WGB 0x00ffe000 /* Watchpoints generating breakpoint */ + +/* + * Bit definitions for Debug watchpoint counter registers + * + */ +#define SPR_DWCR_COUNT 0x0000ffff /* Count */ +#define SPR_DWCR_MATCH 0xffff0000 /* Match */ + +/* + * Bit definitions for Debug stop register + * + */ +#define SPR_DSR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DSR_TTE 0x00000010 /* iTick Timer exception */ +#define SPR_DSR_AE 0x00000020 /* Alignment exception */ +#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DSR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DSR_RE 0x00000400 /* Range exception */ +#define SPR_DSR_SCE 0x00000800 /* System call exception */ +#define SPR_DSR_SSE 0x00001000 /* Single Step Exception */ +#define SPR_DSR_TE 0x00002000 /* Trap exception */ + +/* + * Bit definitions for Debug reason register + * + */ +#define SPR_DRR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */ +#define SPR_DRR_AE 0x00000020 /* Alignment exception */ +#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DRR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DRR_RE 0x00000400 /* Range exception */ +#define SPR_DRR_SCE 0x00000800 /* System call exception */ +#define SPR_DRR_TE 0x00001000 /* Trap exception */ + +/* + * Bit definitions for Performance counters mode registers + * + */ +#define SPR_PCMR_CP 0x00000001 /* Counter present */ +#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */ +#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */ +#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */ +#define SPR_PCMR_LA 0x00000010 /* Load access event */ +#define SPR_PCMR_SA 0x00000020 /* Store access event */ +#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/ +#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */ +#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */ +#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */ +#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */ +#define SPR_PCMR_BS 0x00000800 /* Branch stall event */ +#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */ +#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */ +#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */ +#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */ + +/* + * Bit definitions for the Power management register + * + */ +#define SPR_PMR_SDF 0x0000000f /* Slow down factor */ +#define SPR_PMR_DME 0x00000010 /* Doze mode enable */ +#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */ +#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */ +#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */ + +/* + * Bit definitions for PICMR + * + */ +#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */ + +/* + * Bit definitions for PICPR + * + */ +#define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */ + +/* + * Bit definitions for PICSR + * + */ +#define SPR_PICSR_IS 0xffffffff /* Interrupt status */ + +/* + * Bit definitions for Tick Timer Control Register + * + */ +#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */ +#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD +#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */ +#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */ +#define SPR_TTMR_RT 0x40000000 /* Restart tick */ +#define SPR_TTMR_SR 0x80000000 /* Single run */ +#define SPR_TTMR_CR 0xc0000000 /* Continuous run */ +#define SPR_TTMR_M 0xc0000000 /* Tick mode */ + +/* + * l.nop constants + * + */ +#define NOP_NOP 0x0000 /* Normal nop instruction */ +#define NOP_EXIT 0x0001 /* End of simulation */ +#define NOP_REPORT 0x0002 /* Simple report */ +#define NOP_PRINTF 0x0003 /* Simprintf instruction */ +#define NOP_REPORT_FIRST 0x0400 /* Report with number */ +#define NOP_REPORT_LAST 0x03ff /* Report with number */ Index: ucos-ii/2.91/include/cprintf_r.h =================================================================== --- ucos-ii/2.91/include/cprintf_r.h (nonexistent) +++ ucos-ii/2.91/include/cprintf_r.h (revision 471) @@ -0,0 +1,108 @@ +/* +File: cprintf_r.h + +Copyright (C) 2004 Kustaa Nyholm + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +See the GNU Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, write to the Free Software +Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +This library is realy just two files: 'printf.h' and 'printf.c'. + +They provide a simple and small (+200 loc) printf functionality to +be used in embedded systems. + +I've found them so usefull in debugging that I do not bother with a +debugger at all. + +They are distributed in source form, so to use them, just compile them +into your project. + +Two printf variants are provided: printf and sprintf. + +The formats supported by this implementation are: 'd' 'u' 'c' 's' 'x' 'X'. + +Zero padding and field width are also supported. + +If the library is compiled with 'PRINTF_SUPPORT_LONG' defined then the +long specifier is also +supported. Note that this will pull in some long math routines (pun intended!) +and thus make your executable noticably longer. + +The memory foot print of course depends on the target cpu, compiler and +compiler options, but a rough guestimate (based on a H8S target) is about +1.4 kB for code and some twenty 'int's and 'char's, say 60 bytes of stack space. +Not too bad. Your milage may vary. By hacking the source code you can +get rid of some hunred bytes, I'm sure, but personally I feel the balance of +functionality and flexibility versus code size is close to optimal for +many embedded systems. + +To use the printf you need to supply your own character output function, +something like : + + void putc (char c, void* p) + { + while (!SERIAL_PORT_EMPTY) ; + SERIAL_PORT_TX_REGISTER = c; + } + +Before you can call printf you need to initialize it to use your +character output function with something like: + + init_printf(NULL, putc); + +Notice the 'NULL' in 'init_printf' and the parameter 'void* p' in 'putc', +the NULL (or any pointer) you pass into the 'init_printf' will eventually be +passed to your 'putc' routine. This allows you to pass some storage space (or +anything realy) to the character output function, if necessary. +This is not often needed but it was implemented like that because it made +implementing the sprintf function so neat (look at the source code). + +The code is re-entrant, except for the 'init_printf' function, so it +is safe to call it from interupts too, although this may result in mixed output. +If you rely on re-entrancy, take care that your 'putc' function is re-entrant! + +The printf and sprintf functions are actually macros that translate to +'tfp_printf' and 'tfp_sprintf'. This makes it possible +to use them along with 'stdio.h' printf's in a single source file. +You just need to undef the names before you include the 'stdio.h'. +Note that these are not function like macros, so if you have variables +or struct members with these names, things will explode in your face. +Without variadic macros this is the best we can do to wrap these +fucnction. If it is a problem just give up the macros and use the +functions directly or rename them. + +For further details see source code. + +regs Kusti, 23.10.2004 +*/ + + +#ifndef __TFP_PRINTF__ +#define __TFP_PRINTF__ + +#include + +#define PRINTF_LONG_SUPPORT + +void init_printf(void* putp,void (*putf) (char,void*)); + +void tfp_printf(char *fmt, ...); +void tfp_sprintf(char* s,char *fmt, ...); + +void tfp_format(void* putp,void (*putf) (char,void*),char *fmt, va_list va); + +#define printf tfp_printf +#define sprintf tfp_sprintf + +#endif Index: ucos-ii/2.91/include/includes.h =================================================================== --- ucos-ii/2.91/include/includes.h (nonexistent) +++ ucos-ii/2.91/include/includes.h (revision 471) @@ -0,0 +1,53 @@ +/* +---------------------------------------------------------------------- + CHiPES Embedded RTR Systems Copyright (c) Tim Oliver 2002-2004 +---------------------------------------------------------------------- + File : includes.h + Author : Tim Oliver + Email : timtimoliver@yahoo.co.uk +---------------------------[Description]------------------------------ + + Top level include file for MicroC/OS-II + on the OpenRISC Reference Platfrom +*/ + +/* +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include "spr-defs.h" +#include "board.h" +#include "uart.h" + +#include "console.h" + +#include "cprintf_r.h" + +#include +#include +#include + +#ifdef FLOATING_POINT +#include +#include +#include "floatio.h" +#endif /* FLOATING_POINT */ + +#include "ctype.h" +#include "string.h" + +#include "os_cpu.h" +#include "os_cfg.h" +#include "ucos_ii.h" Index: ucos-ii/2.91/include/string.h =================================================================== --- ucos-ii/2.91/include/string.h (nonexistent) +++ ucos-ii/2.91/include/string.h (revision 471) @@ -0,0 +1,45 @@ +/* + string.h -- String manipulation + Implements (some) of the standard string routines + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#ifndef __STRING_H +#define __STRING_H +#include + +/* Basic string functions */ +extern size_t strlen(const char *s); +extern char *strcpy(char *dest, const char *src); +extern char *strncpy(char *dest, const char *src, size_t n); +extern char *strcat(char *dest, const char *src); +extern char *strncat(char *dest, const char *src, size_t n); +extern int strcmp(const char *s1, const char *s2); +extern int strncmp(const char *s1, const char *s2, size_t n); +extern char *strchr(const char *s, int c); +extern char *strrchr(const char *s, int c); + +/* Basic mem functions */ +extern void *memcpy(void *dest, const void *src, size_t n); +extern void *memmove(void *dest, void *src, size_t n); +extern int memcmp(const void *s1, const void *s2, size_t n); +extern void *memchr(const void *s, int c, size_t n); +extern void *memset(void *d, int c, size_t n); + +#endif Index: ucos-ii/2.91/include/board.h =================================================================== --- ucos-ii/2.91/include/board.h (nonexistent) +++ ucos-ii/2.91/include/board.h (revision 471) @@ -0,0 +1,58 @@ +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#define SDRAM_BASE_ADDR 0x00000000 + +#ifndef IN_CLK +# define IN_CLK 20000000 +#endif + +#define UART_BAUD_RATE 115200 + +#define TICKS_PER_SEC 100 + +#define STACK_SIZE 0x10000 + +#define UART_BASE 0x90000000 +#define UART_IRQ 2 +#define ETH_BASE 0x92000000 +#define ETH_IRQ 4 + +#define SPI_BASE 0xb9000000 +#define CRT_BASE_ADDR 0x97000000 +#define ATA_BASE_ADDR 0x9e000000 +#define KBD_BASE_ADD 0x94000000 +#define KBD_IRQ 5 + +#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */ + +#define BOARD_DEF_IP 0x0a010185 +#define BOARD_DEF_MASK 0xff000000 +#define BOARD_DEF_GW 0x0a010101 + +#define ETH_MACADDR0 0x00 +#define ETH_MACADDR1 0x12 +#define ETH_MACADDR2 0x34 +#define ETH_MACADDR3 0x56 +#define ETH_MACADDR4 0x78 +#define ETH_MACADDR5 0x9a + +#define CRT_ENABLED 1 +#define FB_BASE_ADDR 0xa8000000 + +/* Whether online help is available -- saves space */ +#define HELP_ENABLED 1 + +/* Whether self check is enabled */ +#define SELF_CHECK 0 + +/* Whether we have keyboard suppport */ +#define KBD_ENABLED 0 + +/* Keyboard buffer size */ +#define KBDBUF_SIZE 256 + +/* Which console is used (CT_NONE, CT_SIM, CT_UART, CT_CRT) */ +#define CONSOLE_TYPE CT_UART + +#endif Index: ucos-ii/2.91/include/os_cpu.h =================================================================== --- ucos-ii/2.91/include/os_cpu.h (nonexistent) +++ ucos-ii/2.91/include/os_cpu.h (revision 471) @@ -0,0 +1,144 @@ +/* +---------------------------------------------------------------------- + CHiPES Embedded RTR Systems Copyright (c) Tim Oliver 2002-2004 +---------------------------------------------------------------------- + File : os_cpu.h + Author : Tim Oliver + Email : timtimoliver@yahoo.co.uk +---------------------------[Description]------------------------------ + + Part of the OpenRISC Reference Platform Port of MicroC/OS-II + +-------------------------[CVS Information]---------------------------- + $Id: os_cpu.h,v 1.1 2004/07/22 06:36:58 p014082819 Exp $ + $Revision: 1.1 $ +---------------------------------------------------------------------- +*/ + +/* +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#ifndef OS_CPU_H +#define OS_CPU_H + +#ifdef OS_CPU_GLOBALS +#define OS_CPU_EXT +#else +#define OS_CPU_EXT extern +#endif + +/* Register access macros */ +#define REG8(add) *((volatile unsigned char *)(add)) +#define REG16(add) *((volatile unsigned short *)(add)) +#define REG32(add) *((volatile unsigned long *)(add)) + +/*$PAGE*/ +/* +********************************************************************************************************* +* DATA TYPES +* (Compiler Specific) +********************************************************************************************************* +*/ + +typedef unsigned char BOOLEAN; +typedef unsigned char INT8U; /* Unsigned 8 bit quantity */ +typedef signed char INT8S; /* Signed 8 bit quantity */ +typedef unsigned int INT16U; /* Unsigned 16 bit quantity */ +typedef signed int INT16S; /* Signed 16 bit quantity */ +typedef unsigned long INT32U; /* Unsigned 32 bit quantity */ +typedef signed long INT32S; /* Signed 32 bit quantity */ + +typedef unsigned long OS_STK; /* Each stack entry is 32-bits wide */ +typedef unsigned long volatile OS_CPU_SR; /* The CPU Status Word is 32-bits wide */ + /* This variable MUST be volatile for proper */ + /* operation. Refer to os_cpu_a.s for more */ + /* details. */ + +/* +********************************************************************************************************* +* OpenCores OpenRISC +* +* Method #1: Disable/Enable interrupts using simple instructions. After critical section, interrupts +* will be enabled even if they were disabled before entering the critical section. +* +* Method #2: Disable/Enable interrupts by preserving the state of interrupts. In other words, if +* interrupts were disabled before entering the critical section, they will be disabled when +* leaving the critical section. +* +* Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you +* would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then +* disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to +* disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr' +* into the CPU's status register. +********************************************************************************************************* +*/ + +#define OS_CRITICAL_METHOD 3 + +#if OS_CRITICAL_METHOD == 3 +#define OS_ENTER_CRITICAL() cpu_sr = OSDisableInterrupts(); +#define OS_EXIT_CRITICAL() OSEnableInterrupts(cpu_sr); +#endif + +/* +********************************************************************************************************* +* OpenCores OpenRISC +********************************************************************************************************* +*/ + +#define OS_STK_GROWTH 1 /* Stack grows from HIGH to LOW memory on OpenRISC */ + +#define OS_TASK_SW() __asm__ ("l.sys 0");\ + __asm__ ("l.nop"); +/* +********************************************************************************************************* +* GLOBAL VARIABLES +********************************************************************************************************* +*/ + +/* +********************************************************************************************************* +* FUNCTION PROTOTYPES +********************************************************************************************************* +*/ +#if OS_CRITICAL_METHOD == 3 +OS_CPU_SR OSDisableInterrupts(void); +void OSEnableInterrupts(OS_CPU_SR cpu_sr); +#endif +/* +#ifdef DEBUG +#define debug(fmt,args...) printf (fmt ,##args) +#else +#define debug(fmt,args...) __printf (fmt ,##args) +#endif +*/ +extern void mtspr(unsigned long spr, unsigned long value); /* For writing into SPR. */ +extern unsigned long mfspr(unsigned long spr); /* For reading SPR. */ +extern void report(unsigned long value); /* Prints out a value */ +extern void exit (int i) __attribute__ ((__noreturn__)); /* return value by making a syscall */ +//extern void __printf (const char *fmt, ...); /* simulator stdout */ +extern void OSInitTick (void); /* init ticker */ + +void main (void); /* Function to be called at entry point - not defined here. */ + +/* stdio */ +extern int getc (void); +extern int testc (void); +extern int ctrlc (void); +extern void putc (const char c); + +#endif + Index: ucos-ii/2.91/tasks/tasks1.c =================================================================== --- ucos-ii/2.91/tasks/tasks1.c (nonexistent) +++ ucos-ii/2.91/tasks/tasks1.c (revision 471) @@ -0,0 +1,213 @@ +/* + Example uC/OS-II tasks. + + Time-related tasks. +*/ + +#include "includes.h" + + +#define TASK_STK_SIZE 512 /* Size of each task's stacks (# of WORDs) */ + +#define TASK_START_ID 0 /* Application tasks IDs */ +#define TASK_CLK_ID 1 +#define TASK_1_ID 2 +#define TASK_2_ID 3 +#define TASK_3_ID 4 + +#define TASK_START_PRIO 10 /* Application tasks priorities */ +#define TASK_CLK_PRIO 11 +#define TASK_1_PRIO 12 +#define TASK_2_PRIO 13 +#define TASK_3_PRIO 14 + +OS_STK TaskClkStk[TASK_STK_SIZE]; /* Clock task stack */ +OS_STK Task1Stk[TASK_STK_SIZE]; /* Task #1 task stack */ +OS_STK Task2Stk[TASK_STK_SIZE]; /* Task #2 task stack */ +OS_STK Task3Stk[TASK_STK_SIZE]; /* Task #3 task stack */ + +void TaskStartCreateTasks (void); +void TaskClk(void *data); +void Task1(void *data); +void Task2(void *data); +void Task3(void *data); + + +/* This function is called from TaskStart() in the same file as main() */ +void TaskStartCreateTasks (void) +{ + + OSTaskCreateExt(TaskClk, + (void *)0, + &TaskClkStk[TASK_STK_SIZE - 1], + TASK_CLK_PRIO, + TASK_CLK_ID, + &TaskClkStk[0], + TASK_STK_SIZE, + (void *)0, + OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); + + OSTaskCreateExt(Task1, + (void *)0, + &Task1Stk[TASK_STK_SIZE - 1], + TASK_1_PRIO, + TASK_1_ID, + &Task1Stk[0], + TASK_STK_SIZE, + (void *)0, + OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); + + OSTaskCreateExt(Task2, + (void *)0, + &Task2Stk[TASK_STK_SIZE - 1], + TASK_2_PRIO, + TASK_2_ID, + &Task2Stk[0], + TASK_STK_SIZE, + (void *)0, + OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); + + OSTaskCreateExt(Task3, + (void *)0, + &Task3Stk[TASK_STK_SIZE - 1], + TASK_3_PRIO, + TASK_3_ID, + &Task3Stk[0], + TASK_STK_SIZE, + (void *)0, + + OS_TASK_OPT_STK_CHK | OS_TASK_OPT_STK_CLR); + + console_clear(); + console_puts(28,2,"************************"); + console_puts(28,3,"* uC/OS-II on OpenRISC *"); + console_puts(28,4,"************************"); + console_puts(28,6,"Tasks 1: four timer tasks"); + console_puts(18,20,"Press 'q' to exit simulator, or reset board."); + + +} + +/********************************************************************************************************* + * TASK #1 + * + * Description: This task executes every 100 mS and measures the time it task to perform stack checking + * for each of the 5 application tasks. Also, this task displays the statistics related to + * each task's stack usage. + ********************************************************************************************************* + */ + +void Task1 (void *pdata) +{ + INT8U err; + OS_STK_DATA data; /* Storage for task stack data */ + INT16U time; /* Execution time (in uS) */ + INT8U i; + char s[80]; + + + pdata = pdata; + + console_puts(28, 10, "Memory stats per task"); + + console_puts(19, 11, "Total Free Used Time Taken"); + + for (;;) { + for (i = 0; i < 5; i++) { + //TODO: Some sort of timer PC_ElapsedStart(); + err = OSTaskStkChk(TASK_START_PRIO + i, &data); + //TODO: time = PC_ElapsedStop(); + if (err == OS_ERR_NONE) { + sprintf(s, "%4d %4d %4d %6d", + data.OSFree + data.OSUsed, + data.OSFree, + data.OSUsed, + time); + console_puts(19, 12 + i, s/*, DISP_FGND_BLACK + DISP_BGND_LIGHT_GRAY*/); + } + } + OSTimeDlyHMSM(0, 0, 0, 100); /* Delay for 100 mS */ + } +} +/*$PAGE*/ +/* +********************************************************************************************************* +* TASK #2 +* +* Description: This task displays a clockwise rotating wheel on the screen. +********************************************************************************************************* +*/ +#define SPIN1X 30 +#define SPIN1Y 18 +#define SPIN1DLY 20 +void Task2 (void *data) +{ + data = data; + for (;;) { + console_putc(SPIN1X, SPIN1Y, '|'); + OSTimeDly(SPIN1DLY); + console_putc(SPIN1X, SPIN1Y, '/'); + OSTimeDly(SPIN1DLY); + console_putc(SPIN1X, SPIN1Y, '-'); + OSTimeDly(SPIN1DLY); + console_putc(SPIN1X, SPIN1Y, '\\'); + OSTimeDly(SPIN1DLY); + } +} +/*$PAGE*/ +/* +********************************************************************************************************* +* TASK #3 +* +* Description: This task displays a counter-clockwise rotating wheel on the screen. +* +* Note(s) : I allocated 500 bytes of storage on the stack to artificially 'eat' up stack space. +********************************************************************************************************* +*/ +#define SPIN2X 50 +#define SPIN2Y 18 +#define SPIN2DLY 10 +void Task3 (void *data) +{ + char dummy[200]; + INT16U i; + + + data = data; + for (i = 0; i < 199; i++) { + dummy[i] = '?'; + } + for (;;) { + console_putc(SPIN2X, SPIN2Y, '|'); + OSTimeDly(SPIN2DLY); + console_putc(SPIN2X, SPIN2Y, '\\'); + OSTimeDly(SPIN2DLY); + console_putc(SPIN2X, SPIN2Y, '-'); + OSTimeDly(SPIN2DLY); + console_putc(SPIN2X, SPIN2Y, '/'); + OSTimeDly(SPIN2DLY); + } +} +/*$PAGE*/ +/* +********************************************************************************************************* +* CLOCK TASK +********************************************************************************************************* +*/ + +void TaskClk (void *data) +{ + char s[64]; + int secs = 0; + + data = data; + for (;;) { + //PC_GetDateTime(s); + //PC_DispStr(60, 23, s, DISP_FGND_YELLOW + DISP_BGND_BLUE); + sprintf(s, "Seconds: %d\n",secs); + console_puts(33, 8, s); + OSTimeDly(OS_TICKS_PER_SEC); + secs++; + } +} + Index: ucos-ii/2.91/tasks/Makefile =================================================================== --- ucos-ii/2.91/tasks/Makefile (nonexistent) +++ ucos-ii/2.91/tasks/Makefile (revision 471) @@ -0,0 +1,26 @@ + +# User should set TASKS to determine which set to run + +ifeq ($(TASKS),) +$(error Must specify TASKS, eg. TASKS=1 when building to choose user task program) +endif + + +LIB = tasks.o +OBJS = tasks$(TASKS).o + +all: $(LIB) + +$(LIB): $(OBJS) + $(LD) -r -o $@ $(OBJS) + +# Depends too difficult to deal with here + +.depend: Makefile + $(CC) -M $(CFLAGS) *.c > $@ +sinclude .depend + + +#.depend: Makefile $(OBJS:.o=.c) +# $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ +#sinclude .depend Index: ucos-ii/2.91/sim.cfg =================================================================== --- ucos-ii/2.91/sim.cfg (nonexistent) +++ ucos-ii/2.91/sim.cfg (revision 471) @@ -0,0 +1,868 @@ +/* sim.cfg -- Simulator configuration script file + Copyright (C) 2001-2002, Marko Mlinar, markom@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. +It contains the default configuration and help about configuring +the simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + +/* INTRODUCTION + + The ork1sim has various parameters, that are set in configuration files + like this one. The user can switch between configurations at startup by + specifying the required configuration file with the -f option. + If no configuration file is specified or1ksim searches for the default + configuration file sim.cfg. First it searches for './sim.cfg'. If this + file is not found, it searches for '~/or1k/sim.cfg'. If this file is + not found too, it reverts to the built-in default configuration. + + NOTE: Users should not rely on the built-in configuration, since the + default configuration may differ between version. + Rather create a configuration file that sets all critical values. + + This file may contain (standard C) comments only - no // support. + + Configure files may be be included, using: + include "file_name_to_include" + + Like normal configuration files, the included file is divided into + sections. Each section is described in detail also. + + Some section have subsections. One example of such a subsection is: + + device + instance specific parameters... + enddevice + + which creates a device instance. +*/ + + +/* MEMORY SECTION + + This section specifies how the memory is generated and the blocks + it consists of. + + type = random/unknown/pattern + Specifies the initial memory values. + 'random' generates random memory using seed 'random_seed'. + 'pattern' fills memory with 'pattern'. + 'unknown' does not specify how memory should be generated, + leaving the memory in a undefined state. This is the fastest + option. + + random_seed = + random seed for randomizer, used if type = 'random'. + + pattern = + pattern to fill memory, used if type = 'pattern'. + + nmemories = + number of memory instances connected + + instance specific: + baseaddr = + memory start address + + size = + memory size + + name = "" + memory block name + + ce = + chip enable index of the memory instance + + delayr = + cycles, required for read access, -1 if instance does not support reading + + delayw = + cycles, required for write access, -1 if instance does not support writing + + log = "" + filename, where to log memory accesses to, no log, if log command is not specified +*/ + +section memory + pattern = 0x00 + type = unknown /* Fastest */ + name = "RAM" + ce = 1 + mc = 0 + baseaddr = 0x00000000 + size = 0x00200000 + delayr = 1 + delayw = 1 +end + +/* IMMU SECTION + + This section configures the Instruction Memory Manangement Unit + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of ITLB sets; must be power of two + + nways = + number of ITLB ways + + pagesize = + instruction page size; must be power of two + + entrysize = + instruction entry size in bytes + + ustates = + number of ITLB usage states (2, 3, 4 etc., max is 4) + + hitdelay = + number of cycles immu hit costs + + missdelay = + number of cycles immu miss costs +*/ + +section immu + enabled = 0 + nsets = 64 + nways = 1 + pagesize = 8192 + hitdelay = 0 + missdelay = 0 +end + + +/* DMMU SECTION + + This section configures the Data Memory Manangement Unit + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of DTLB sets; must be power of two + + nways = + number of DTLB ways + + pagesize = + data page size; must be power of two + + entrysize = + data entry size in bytes + + ustates = + number of DTLB usage states (2, 3, 4 etc., max is 4) + + hitdelay = + number of cycles dmmu hit costs + + missdelay = + number of cycles dmmu miss costs +*/ + +section dmmu + enabled = 0 + nsets = 64 + nways = 1 + pagesize = 8192 + hitdelay = 0 + missdelay = 0 +end + + +/* IC SECTION + + This section configures the Instruction Cache + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of IC sets; must be power of two + + nways = + number of IC ways + + blocksize = + IC block size in bytes; must be power of two + + ustates = + number of IC usage states (2, 3, 4 etc., max is 4) + + hitdelay = + number of cycles ic hit costs + + missdelay = + number of cycles ic miss costs +*/ + +section ic + enabled = 0 + nsets = 256 + nways = 1 + blocksize = 16 + hitdelay = 0 + missdelay = 0 +end + + +/* DC SECTION + + This section configures the Data Cache + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of DC sets; must be power of two + + nways = + number of DC ways + + blocksize = + DC block size in bytes; must be power of two + + ustates = + number of DC usage states (2, 3, 4 etc., max is 4) + + load_hitdelay = + number of cycles dc load hit costs + + load_missdelay = + number of cycles dc load miss costs + + store_hitdelay = + number of cycles dc load hit costs + + store_missdelay = + number of cycles dc load miss costs +*/ + +section dc + enabled = 0 + nsets = 256 + nways = 1 + blocksize = 16 + load_hitdelay = 0 + load_missdelay = 0 + store_hitdelay = 0 + store_missdelay = 0 +end + + +/* SIM SECTION + + This section specifies how or1ksim should behave. + + verbose = 0/1 + '0': don't print extra messages + '1': print extra messages + + debug = 0-9 + 0 : no debug messages + 1-9: debug message level. + higher numbers produce more messages + + profile = 0/1 + '0': don't generate profiling file 'sim.profile' + '1': don't generate profiling file 'sim.profile' + + prof_fn = "" + optional filename for the profiling file. + valid only if 'profile' is set + + mprofile = 0/1 + '0': don't generate memory profiling file 'sim.mprofile' + '1': generate memory profiling file 'sim.mprofile' + + mprof_fn = "" + optional filename for the memory profiling file. + valid only if 'mprofile' is set + + history = 0/1 + '0': don't track execution flow + '1': track execution flow + Execution flow can be tracked for the simulator's + 'hist' command. Useful for back-trace debugging. + + iprompt = 0/1 + '0': start in (so what do we start in ???) + '1': start in interactive prompt. + + exe_log = 0/1 + '0': don't generate execution log. + '1': generate execution log. + + exe_log_type = default/hardware/simple/software + type of execution log, default is used when not specified + + exe_log_start = + index of first instruction to start logging, default = 0 + + exe_log_end = + index of last instruction to end logging; not limited, if omitted + + exe_log_marker = + specifies number of instructions before horizontal marker is + printed; if zero, markers are disabled (default) + + exe_log_fn = "" + filename for the exection log file. + valid only if 'exe_log' is set + + spr_log = 0/1 + '0': log reads/writes to/from sprs + '1': don't log reads/write to/from sprs + + spr_log_fn = "" + filename for the sprs log file. + valid only if 'spr_log' is set + + clkcycle = [ps|ns|us|ms] + specifies time measurement for one cycle +*/ + +section sim + verbose = 0 + debug = 0 + profile = 1 + prof_fn = "sim.profile" + + mprofile = 1 + mprof_fn = "sim.mprofile" + + history = 1 + /* iprompt = 1 */ + exe_log = 0 + exe_log_type = software + exe_log_start = 0 +/* exe_log_end = 20000000*/ + exe_log_marker = 10000 + exe_log_fn = "executed.log" + +/* spr_log = 0 + spr_log_fn = "spr.log"*/ + clkcycle = 40ns +end + + +/* SECTION VAPI + + This section configures the Verification API, used for Advanced + Core Verification. + + enabled = 0/1 + '0': disbable VAPI server + '1': enable/start VAPI server + + server_port = + TCP/IP port to start VAPI server on + + log_enabled = 0/1 + '0': disable VAPI requests logging + '1': enable VAPI requests logging + + hide_device_id = 0/1 + '0': don't log device id (for compatability with old version) + '1': log device id + + + vapi_fn = + filename for the log file. + valid only if log_enabled is set +*/ + +section VAPI + enabled = 0 + server_port = 9998 + log_enabled = 0 + vapi_log_fn = "vapi.log" +end + + +/* CPU SECTION + + This section specifies various CPU parameters. + + ver = + rev = + specifies version and revision of the CPU used + + upr = + changes the upr register + + sr = + sets the initial Supervision Register value + + superscalar = 0/1 + '0': CPU is scalar + '1': CPU is superscalar + (modify cpu/or32/execute.c to tune superscalar model) + + hazards = 0/1 + '0': don't track data hazards in superscalar CPU + '1': track data hazards in superscalar CPU + If tracked, data hazards can be displayed using the + simulator's 'r' command. + + dependstats = 0/1 + '0': don't calculate inter-instruction dependencies. + '1': calculate inter-instruction dependencies. + If calculated, inter-instruction dependencies can be + displayed using the simulator's 'stat' command. + + sbuf_len = + length of store buffer (<= 256), 0 = disabled +*/ + +section cpu + ver = 0x12 + rev = 0x01 + /* upr = */ + superscalar = 0 + hazards = 0 + dependstats = 0 + sbuf_len = 0 +end + + +/* PM SECTION + + This section specifies Power Management parameters + + enabled = 0/1 + '0': disable power management + '1': enable power management +*/ + +section pm + enabled = 0 +end + + +/* BPB SECTION + + This section specifies how branch prediction should behave. + + enabled = 0/1 + '0': disable branch prediction + '1': enable branch prediction + + btic = 0/1 + '0': disable branch target instruction cache model + '1': enable branch target instruction cache model + + sbp_bf_fwd = 0/1 + Static branch prediction for 'l.bf' + '0': don't use forward prediction + '1': use forward prediction + + sbp_bnf_fwd = 0/1 + Static branch prediction for 'l.bnf' + '0': don't use forward prediction + '1': use forward prediction + + hitdelay = + number of cycles bpb hit costs + + missdelay = + number of cycles bpb miss costs +*/ + +section bpb + enabled = 0 + btic = 0 + sbp_bf_fwd = 0 + sbp_bnf_fwd = 0 + hitdelay = 0 + missdelay = 0 +end + + +/* DEBUG SECTION + + This sections specifies how the debug unit should behave. + + enabled = 0/1 + '0': disable debug unit + '1': enable debug unit + + gdb_enabled = 0/1 + '0': don't start gdb server + '1': start gdb server at port 'server_port' + + server_port = + TCP/IP port to start gdb server on + valid only if gdb_enabled is set + + vapi_id = + Used to create "fake" vapi log file containing the JTAG proxy messages. +*/ + +section debug + enabled = 0 +end + + +/* MC SECTION + + This section configures the memory controller + + enabled = 0/1 + '0': disable memory controller + '1': enable memory controller + + baseaddr = + address of first MC register + + POC = + Power On Configuration register +*/ + +section mc + enabled = 0 + baseaddr = 0x60000000 + POC = 0x00000008 /* Power on configuration register */ +end + + +/* UART SECTION + + This section configures the UARTs + + nuarts = + make specified number of instances, configure each + instance within device - enddevice construct. + + instance specific: + baseaddr = + address of first UART register for this device + + rxfile = "" + filename, where to read data from + + txfile = "" + filename, where to write data to + + irq = + irq number for this device + + 16550 = 0/1 + '0': this device is a UART16450 + '1': this device is a UART16550 + + jitter = + in msecs... time to block, -1 to disable it + + vapi_id = + VAPI id of this instance +*/ + +section uart + baseaddr = 0x90000000 + irq = 2 + /* channel = "file:uart0.rx,uart0.tx" */ + /*channel = "file:/dev/tty10"*/ + channel = "xterm" + jitter = -1 /* async behaviour */ + 16550 = 1 +end + + +/* DMA SECTION + + This section configures the DMAs + + ndmas = + make specified number of instances, configure each + instance within device - enddevice construct. + + instance specific: + baseaddr = + address of first DMA register for this device + + irq = + irq number for this device + + vapi_id = + VAPI id of this instance +*/ + +section dma + enabled = 0 + /*ndmas = 0 + + device 0 + baseaddr = 0x9a000000 + irq = 11 + enddevice + */ +end + + +/* ETHERNET SECTION + + This section configures the ETHERNETs + + nethernets = + make specified number of instances, configure each + instance within device - enddevice construct. + + instance specific: + baseaddr = + address of first ethernet register for this device + + dma = + which controller is this ethernet "connected" to + + irq = + ethernet mac IRQ level + + rtx_type = + use 0 - file interface, 1 - socket interface + + rx_channel = + DMA channel used for RX + + tx_channel = + DMA channel used for TX + + rxfile = "" + filename, where to read data from + + txfile = "" + filename, where to write data to + + sockif = "" + interface name of ethernet socket + + vapi_id = + VAPI id of this instance +*/ + +section ethernet + enabled = 0 +end + + +/* GPIO SECTION + + This section configures the GPIOs + + ngpios = + make specified number of instances, configure each + instance within device - enddevice construct. + + instance specific: + baseaddr = + address of first GPIO register for this device + + irq = + irq number for this device + + base_vapi_id = + first VAPI id of this instance + GPIO uses 8 consecutive VAPI IDs +*/ + +section gpio + /*ngpios = 1 + + device 0*/ + enabled = 0 + baseaddr = 0x91000000 + irq = 3 + base_vapi_id = 0x0200 +/* enddevice */ +end + +/* VGA SECTION + + This section configures the VGA/LCD controller + + nvgas = + number of VGA devices connected + + instance specific: + baseaddr = + address of first VGA register + + irq = + irq number for this device + + refresh_rate = + number of cycles between screen dumps + + filename = "" + template name for generated names (e.g. "primary" produces "primary0023.bmp") +*/ + +section vga +/* nvgas = 1 + + device 0 */ + enabled = 1 + baseaddr = 0x97100000 + irq = 8 + refresh_rate = 100000 + filename = "primary" +/* enddevice */ +end + + +/* TICK TIMER SECTION + + This section configures tick timer + + enabled = 0/1 + whether tick timer is enabled + + irq = + irq number +*/ +/* +section tick + enabled = 1 + irq = 0 +end +*/ + +/* FB SECTION + + This section configures the frame buffer + + enabled = 0/1 + whether frame buffer is enabled + + baseaddr = + base address of frame buffer + + paladdr = + base address of first palette entry + + refresh_rate = + number of cycles between screen dumps + + filename = "" + template name for generated names (e.g. "primary" produces "primary0023.bmp") +*/ + +section fb + enabled = 1 + baseaddr = 0x97000000 + refresh_rate = 1000000 + filename = "primary" +end + + +/* KBD SECTION + + This section configures the PS/2 compatible keyboard + + enabled = 0/1 + whether keyboard is enabled + + baseaddr = + base address of the keyboard device + + rxfile = "" + filename, where to read data from +*/ + +section kbd + enabled = 0 + irq = 5 + baseaddr = 0x94000000 + rxfile = "kbd.rx" +end + + +/* ATA SECTION + + This section configures the ATA/ATAPI host controller + + natas = + number of ATA hosts connected + + instance specific: + baseaddr = + address of first ATA register + + irq = + irq number for this device + + debug = + debug level for ata models. + 0: no debug messages + 1: verbose messages + 3: normal messages (more messages than verbose) + 5: debug messages (normal debug messages) + 7: flow control messages (debug statemachine flows) + 9: low priority message (display everything the code does) + + dev_type0/1 = + ata device 0 type + 0: NO_CONNeCT: none (not connected) + 1: FILE : simulated harddisk + 2: LOCAL : local system harddisk + + dev_file0/1 = "" + filename for simulated ATA device + valid only if dev_type0 == 1 + + dev_size0/1 = + size of simulated hard-disk (in MBytes) + valid only if dev_type0 == 1 + + dev_packet0/1 = + 0: simulated ATA device does NOT implement PACKET command feature set + 1: simulated ATA device does implement PACKET command feature set + + FIXME: irq number +*/ + +section ata +/* natas = 1 + + device 0 */ + enabled = 0 + baseaddr = 0x9e000000 + irq = 15 + +/* dev_type0 = 1 + dev_file0 = "/tmp/sim_atadev0" + dev_size0 = 1 + dev_packet0 = 0 + + dev_type1 = 0 + dev_file1 = "" + dev_size1 = 0 + dev_packet1 = 0 + enddevice */ +end + Index: ucos-ii/2.91/COPYING =================================================================== --- ucos-ii/2.91/COPYING (nonexistent) +++ ucos-ii/2.91/COPYING (revision 471) @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. Index: ucos-ii/2.91/common/app_cfg.h =================================================================== --- ucos-ii/2.91/common/app_cfg.h (nonexistent) +++ ucos-ii/2.91/common/app_cfg.h (revision 471) @@ -0,0 +1,19 @@ +/********************************************************************************************************** +* uC/OS-II +** The Real-Time Kernel +** OpenRisc Application Configuration File +** +** +** File : APP_CFG.H +** By : M. van den Heuvel +** : 2009-10-30 +********************************************************************************************************** +**/ + +#ifndef _APP_CFG_H_ +#define _APP_CFG_H_ + +#define OS_TASK_TMR_PRIO (OS_LOWEST_PRIO - 2) + +#endif + Index: ucos-ii/2.91/common/ctype.c =================================================================== --- ucos-ii/2.91/common/ctype.c (nonexistent) +++ ucos-ii/2.91/common/ctype.c (revision 471) @@ -0,0 +1,55 @@ +/* + ctype.c -- character types + Implements the usual ctype stuff (only valid for ASCII systems) + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include + +const unsigned char __ctype_table[256] = +{ + /* only the first 128 characters are really defined 0 1 2 3 4 5 6 7 */ + 0, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, /*0 NUL SOH STX ETX EOT ENQ ACK BEL */ + __CT_c, __CT_b, __CT_s, __CT_b, __CT_s, __CT_s, __CT_c, __CT_c, /*1 BS HT LF VT FF CR SO SI */ + __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, /*2 DLE DC1 DC2 DC3 DC4 NAK SYN ETB */ + __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, /*3 CAN EM SUB ESC FS GS RS US */ + __CT_b, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*4 SP ! " # $ % & ' */ + __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*5 ( ) * + , - . / */ + __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, /*6 0 1 2 3 4 5 6 7 */ + __CT_d, __CT_d, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*7 8 9 : ; < = > ? */ + __CT_p, __CT_ux, __CT_ux, __CT_ux, __CT_ux, __CT_ux, __CT_ux, __CT_u, /*8 @ A B C D E F G */ + __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, /*9 H I J K L M N O */ + __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, /*a P Q R S T U V W */ + __CT_u, __CT_u, __CT_u, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*b X Y Z [ \ ] ^ _ */ + __CT_p, __CT_lx, __CT_lx, __CT_lx, __CT_lx, __CT_lx, __CT_lx, __CT_l, /*c ` a b c d e f g */ + __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, /*d h i j k l m n o */ + __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, /*e p q r s t u v w */ + __CT_l, __CT_l, __CT_l, __CT_p, __CT_p, __CT_p, __CT_p, __CT_c, /*f x y z { | } ~ DEL */ + + /* The other 128 characters are system dependant */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; Index: ucos-ii/2.91/common/main.c =================================================================== --- ucos-ii/2.91/common/main.c (nonexistent) +++ ucos-ii/2.91/common/main.c (revision 471) @@ -0,0 +1,122 @@ +/* + ---------------------------------------------------------------------- + CHiPES Embedded RTR Systems Copyright (c) Tim Oliver 2002-2004 + ---------------------------------------------------------------------- + File : main.c + Author(s) : Tim Oliver, timtimoliver@yahoo.co.uk + Julius Baxter, julius@opencores.org + + ---------------------------[Description]------------------------------ + Very simple MicroC/OS-II test application for the ORP + Uses the UART as standard io + Initialises RTOS + Calls task init hook that should be provided by another file. + Starts multitasking +*/ + + /* + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include "includes.h" + +/* Prototype for function we'll call to install real tasks */ +void TaskStart(void *data); +extern void TaskStartCreateTasks(void); /* Hook to function provided elsewhere */ +/* main() prototype */ +void main (void); + +#define TASK_STK_SIZE 256 + +OS_STK TaskStartStk[TASK_STK_SIZE]; + +/* Main loop */ +void main(void) +{ + char c; + /* OS Init function */ + OSInit(); + + /* Clear console */ + console_init(80,24); + + console_puts(28,7,"************************"); + console_puts(28,8,"* uC/OS-II on OpenRISC *"); + console_puts(28,9,"************************"); + + console_puts(1, 14,"OS Initialising..."); + + /* Init first task, which will spawn all others */ + OSTaskCreate(TaskStart, + (void *)0, + &TaskStartStk[TASK_STK_SIZE - 1], + 0); + console_puts(1,12,"Press a key to start OS"); + c = getc(); + console_puts(1,14,"OS Starting..."); + + /* Init OR1K tick timer */ + OSInitTick(); + + /* Kick off multi-tasking */ + OSStart(); +} + + + +/* This task is set to run from main() */ +void TaskStart (void *pdata) +{ + char c; + OS_CPU_SR cpu_sr; + + pdata = pdata; /* Prevent compiler warning */ + + /* Do other user task init things here ... */ + + OSStatInit(); /* Initialize uC/OS-II's statistics */ + + TaskStartCreateTasks(); /* Create all other tasks */ + + for (;;) { + /* Maybe do something like update a display here */ + + /* Check if UART has received anything, potentialy abort due to it. */ + c = testc(); + if (c) + { + if (c=='q') + { + /* Clear up console */ + console_finish(); + + /* Disable interrupts */ + OS_ENTER_CRITICAL() + + /* Exit if simulator, reboot if board */ + asm("l.ori r3, r0, 0; \ + l.nop 0x1; \ + l.movhi r3, 0xf000; \ + l.ori r3,r3,0x100; \ + l.jr r3; \ + l.nop 0x1"); + } + } + + OSCtxSwCtr = 0; /* Clear context switch counter */ + OSTimeDly(OS_TICKS_PER_SEC); /* Wait one second */ + } + +} Index: ucos-ii/2.91/common/cprintf.c =================================================================== --- ucos-ii/2.91/common/cprintf.c (nonexistent) +++ ucos-ii/2.91/common/cprintf.c (revision 471) @@ -0,0 +1,887 @@ +/* +FUNCTION +<>, <>, <>---format argument list + +INDEX + vprintf +INDEX + vfprintf +INDEX + vsprintf +INDEX + vsnprintf + +ANSI_SYNOPSIS + #include + #include + int vprintf(const char *<[fmt]>, va_list <[list]>); + int vfprintf(FILE *<[fp]>, const char *<[fmt]>, va_list <[list]>); + int vsprintf(char *<[str]>, const char *<[fmt]>, va_list <[list]>); + int vsnprintf(char *<[str]>, size_t <[size]>, const char *<[fmt]>, va_list <[list]>); + + int _vprintf_r(void *<[reent]>, const char *<[fmt]>, + va_list <[list]>); + int _vfprintf_r(void *<[reent]>, FILE *<[fp]>, const char *<[fmt]>, + va_list <[list]>); + int _vsprintf_r(void *<[reent]>, char *<[str]>, const char *<[fmt]>, + va_list <[list]>); + int _vsnprintf_r(void *<[reent]>, char *<[str]>, size_t <[size]>, const char *<[fmt]>, + va_list <[list]>); + +TRAD_SYNOPSIS + #include + #include + int vprintf( <[fmt]>, <[list]>) + char *<[fmt]>; + va_list <[list]>; + + int vfprintf(<[fp]>, <[fmt]>, <[list]>) + FILE *<[fp]>; + char *<[fmt]>; + va_list <[list]>; + + int vsprintf(<[str]>, <[fmt]>, <[list]>) + char *<[str]>; + char *<[fmt]>; + va_list <[list]>; + + int vsnprintf(<[str]>, <[size]>, <[fmt]>, <[list]>) + char *<[str]>; + size_t <[size]>; + char *<[fmt]>; + va_list <[list]>; + + int _vprintf_r(<[reent]>, <[fmt]>, <[list]>) + char *<[reent]>; + char *<[fmt]>; + va_list <[list]>; + + int _vfprintf_r(<[reent]>, <[fp]>, <[fmt]>, <[list]>) + char *<[reent]>; + FILE *<[fp]>; + char *<[fmt]>; + va_list <[list]>; + + int _vsprintf_r(<[reent]>, <[str]>, <[fmt]>, <[list]>) + char *<[reent]>; + char *<[str]>; + char *<[fmt]>; + va_list <[list]>; + + int _vsnprintf_r(<[reent]>, <[str]>, <[size]>, <[fmt]>, <[list]>) + char *<[reent]>; + char *<[str]>; + size_t <[size]>; + char *<[fmt]>; + va_list <[list]>; + +DESCRIPTION +<>, <>, <> and <> are (respectively) +variants of <>, <>, <> and <>. They differ +only in allowing their caller to pass the variable argument list as a +<> object (initialized by <>) rather than directly +accepting a variable number of arguments. + +RETURNS +The return values are consistent with the corresponding functions: +<> returns the number of bytes in the output string, +save that the concluding <> is not counted. +<> and <> return the number of characters transmitted. +If an error occurs, <> and <> return <>. No +error returns occur for <>. + +PORTABILITY +ANSI C requires all three functions. + +Supporting OS subroutines required: <>, <>, <>, +<>, <>, <>, <>. +*/ + +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Chris Torek. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#define INTEGER_ONLY +#define _HAVE_STDC_ +#define _NOLONGLONG +#define u_long unsigned long +#define u_short unsigned short +#define u_int unsigned int +#define _uquad_t u_long +#define _POINTER_INT int +#define _CONST const +#define NULL 0 + +#include "includes.h" + +#if defined(LIBC_SCCS) && !defined(lint) +/*static char *sccsid = "from: @(#)vfprintf.c 5.50 (Berkeley) 12/16/92";*/ +static char *rcsid = "$Id: cprintf.c,v 1.1 2004/07/22 06:36:26 p014082819 Exp $"; +#endif /* LIBC_SCCS and not lint */ + +/* + * Actual printf innards. + * + * This code is large and complicated... + */ + +#ifdef INTEGER_ONLY +#define VFPRINTF vfiprintf +#define _VFPRINTF_R _vfiprintf_r +#else +#define VFPRINTF vfprintf +#define _VFPRINTF_R _vfprintf_r +#define FLOATING_POINT +#endif + +#define _NO_LONGLONG +#if defined WANT_PRINTF_LONG_LONG && defined __GNUC__ +# undef _NO_LONGLONG +#endif + +#ifdef FLOATING_POINT + +#define BUF (MAXEXP+MAXFRACT+1) /* + decimal point */ +#define DEFPREC 6 + +static char *cvt _PARAMS((struct _reent *, double, int, int, char *, int *, int, int *)); +static int exponent _PARAMS((char *, int, int)); + +#else /* no FLOATING_POINT */ + +#define BUF 40 + +#endif /* FLOATING_POINT */ + +/* + * Macros for converting digits to letters and vice versa + */ +#define to_digit(c) ((c) - '0') +#define is_digit(c) ((unsigned)to_digit(c) <= 9) +#define to_char(n) ((n) + '0') + +/* + * Flags used during conversion. + */ +#define ALT 0x001 /* alternate form */ +#define HEXPREFIX 0x002 /* add 0x or 0X prefix */ +#define LADJUST 0x004 /* left adjustment */ +#define LONGDBL 0x008 /* long double; unimplemented */ +#define LONGINT 0x010 /* long integer */ +#define QUADINT 0x020 /* quad integer */ +#define SHORTINT 0x040 /* short integer */ +#define ZEROPAD 0x080 /* zero (as opposed to blank) pad */ +#define FPT 0x100 /* Floating point number */ + + /* + * Choose PADSIZE to trade efficiency vs. size. If larger printf + * fields occur frequently, increase PADSIZE and make the initialisers + * below longer. + */ +#define PADSIZE 16 /* pad chunk size */ + static _CONST char blanks[PADSIZE] = + {' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' '}; + static _CONST char zeroes[PADSIZE] = + {'0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0'}; + + +static int print_formatted(int *tobuf, char * outbuf, const char *fmt0, va_list ap); + +/* + * BEWARE, these `goto error' on error, and PAD uses `n'. + */ +/* PRINT goes to either OS-defined putc, or to a buffer */ + +inline void +print_out(int *tobuf, char* outbuf, _CONST char *ptr, int len) +{ + int i; + if (tobuf) + for (i = 0; i < len; i++) + outbuf[*(tobuf)++] = *(ptr++); + else + for (i = 0; i < len; i++) + putc(*(ptr++)); +} + +inline void +PAD(int *tobuf, char* outbuf, int howmany, _CONST char *with) +{ + int n; + if ((n = howmany) > 0) { + while (n > PADSIZE) { + print_out(tobuf, outbuf, with, PADSIZE); + n -= PADSIZE; + } + print_out(tobuf, outbuf, with, n); + } +} + + + +/* Print formatted to a buffer */ +int +sprintf(char *buffer, const char *fmt0, ...) +{ + OS_CPU_SR cpu_sr; + + int tobuf = 0; + va_list args; + va_start(args, fmt0); + int n = print_formatted(&tobuf, buffer, fmt0, args); + + return n; + +} + +int +printf(const char *fmt0, ...) +{ + va_list args; + va_start(args, fmt0); + + return print_formatted(NULL, 0, fmt0, args); +} + + +/* Make *tobuf non-NULL to print to outbuf[] instead of UART */ +static int print_formatted(int *tobuf, char *outbuf, const char *fmt0, va_list ap) +{ + register char *fmt; /* format string */ + register int ch; /* character from fmt */ + int n; /* handy integers (short term usage) */ + register char *cp; /* handy char pointer (short term usage) */ + register int flags; /* flags as above */ + int ret; /* return value accumulator */ + int width; /* width from format (%8d), or 0 */ + int prec; /* precision from format (%.3d), or -1 */ + char sign; /* sign prefix (' ', '+', '-', or \0) */ + // va_list ap; + +#ifdef FLOATING_POINT + char *decimal_point = localeconv()->decimal_point; + char softsign; /* temporary negative sign for floats */ + /* + * Although it is natural to declare this double here, the + * declaration causes gcc to save FP registers even when not + * printing an FP number. This results in surprising use + * of FP registers to print integers or strings on at least the + * PowerPC. A more proper solution would be to move FP printing + * to another file, but this does seem to work. + */ +#if 0 + double _double; /* double precision arguments %[eEfgG] */ +#else + /* double precision arguments %[eEfgG] */ + union { int i; double d; } _double_ = {0}; +#define _double (_double_.d) +#endif + int expt; /* integer value of exponent */ + int expsize; /* character count for expstr */ + int ndig; /* actual number of digits returned by cvt */ + char expstr[7]; /* buffer for exponent string */ +#endif + +#ifndef _NO_LONGLONG +#define quad_t long long +#define u_quad_t unsigned long long +#endif + +#ifndef _NO_LONGLONG + u_quad_t _uquad; /* integer arguments %[diouxX] */ +#else + u_long _uquad; +#endif + enum { OCT, DEC, HEX } base;/* base for [diouxX] conversion */ + int dprec; /* a copy of prec if [diouxX], 0 otherwise */ + int realsz; /* field size expanded by dprec */ + int size; /* size of converted field or string */ + char *xdigs = (char *)0; /* digits for [xX] conversion */ +#define NIOV 8 + +char buf[BUF]; /* space for %c, %[diouxX], %[eEfgG] */ +char ox[2]; /* space for 0x hex-prefix */ + +#define FLUSH() + + /* + * To extend shorts properly, we need both signed and unsigned + * argument extraction methods. + */ +#ifndef _NO_LONGLONG +#define SARG() \ + (flags&QUADINT ? va_arg(ap, quad_t) : \ + flags&LONGINT ? va_arg(ap, long) : \ + flags&SHORTINT ? (long)(short)va_arg(ap, int) : \ + (long)va_arg(ap, int)) +#define UARG() \ + (flags&QUADINT ? va_arg(ap, u_quad_t) : \ + flags&LONGINT ? va_arg(ap, u_long) : \ + flags&SHORTINT ? (u_long)(u_short)va_arg(ap, int) : \ + (u_long)va_arg(ap, u_int)) +#else +#define SARG() \ + (flags&LONGINT ? va_arg(ap, long) : \ + flags&SHORTINT ? (long)(short)va_arg(ap, int) : \ + (long)va_arg(ap, int)) +#define UARG() \ + (flags&LONGINT ? va_arg(ap, u_long) : \ + flags&SHORTINT ? (u_long)(u_short)va_arg(ap, int) : \ + (u_long)va_arg(ap, u_int)) +#endif + + //va_start (ap, fmt0); + fmt = (char *)fmt0; + ret = 0; + + /* + * Scan the format for conversions (`%' character). + */ + for (;;) { + + while (*fmt != 0 && *fmt != '%') { + //pc (*fmt); + print_out(tobuf, outbuf, fmt, 1); + fmt++; + ret++; + } + if (!*fmt) + goto done; + + fmt++; /* Skip % */ + flags = 0; + dprec = 0; + width = 0; + prec = -1; + sign = '\0'; + +rflag: ch = *fmt++; +reswitch: switch (ch) { + case ' ': + /* + * ``If the space and + flags both appear, the space + * flag will be ignored.'' + * -- ANSI X3J11 + */ + if (!sign) + sign = ' '; + goto rflag; + case '#': + flags |= ALT; + goto rflag; + case '*': + /* + * ``A negative field width argument is taken as a + * - flag followed by a positive field width.'' + * -- ANSI X3J11 + * They don't exclude field widths read from args. + */ + if ((width = va_arg(ap, int)) >= 0) + goto rflag; + width = -width; + /* FALLTHROUGH */ + case '-': + flags |= LADJUST; + goto rflag; + case '+': + sign = '+'; + goto rflag; + case '.': + if ((ch = *fmt++) == '*') { + n = va_arg(ap, int); + prec = n < 0 ? -1 : n; + goto rflag; + } + n = 0; + while (is_digit(ch)) { + n = 10 * n + to_digit(ch); + ch = *fmt++; + } + prec = n < 0 ? -1 : n; + goto reswitch; + case '0': + /* + * ``Note that 0 is taken as a flag, not as the + * beginning of a field width.'' + * -- ANSI X3J11 + */ + flags |= ZEROPAD; + goto rflag; + case '1': case '2': case '3': case '4': + case '5': case '6': case '7': case '8': case '9': + n = 0; + do { + n = 10 * n + to_digit(ch); + ch = *fmt++; + } while (is_digit(ch)); + width = n; + goto reswitch; +#ifdef FLOATING_POINT + case 'L': + flags |= LONGDBL; + goto rflag; +#endif + case 'h': + flags |= SHORTINT; + goto rflag; + case 'l': + if (*fmt == 'l') { + fmt++; + flags |= QUADINT; + } else { + flags |= LONGINT; + } + goto rflag; + case 'q': + flags |= QUADINT; + goto rflag; + case 'c': + *(cp = buf) = va_arg(ap, int); + size = 1; + sign = '\0'; + break; + case 'D': + flags |= LONGINT; + /*FALLTHROUGH*/ + case 'd': + case 'i': + _uquad = SARG(); +#ifndef _NO_LONGLONG + if ((quad_t)_uquad < 0) +#else + if ((long) _uquad < 0) +#endif + { + + _uquad = -_uquad; + sign = '-'; + } + base = DEC; + goto number; +#ifdef FLOATING_POINT + case 'e': + case 'E': + case 'f': + case 'g': + case 'G': + if (prec == -1) { + prec = DEFPREC; + } else if ((ch == 'g' || ch == 'G') && prec == 0) { + prec = 1; + } + + if (flags & LONGDBL) { + _double = (double) va_arg(ap, long double); + } else { + _double = va_arg(ap, double); + } + + /* do this before tricky precision changes */ + if (isinf(_double)) { + if (_double < 0) + sign = '-'; + cp = "Inf"; + size = 3; + break; + } + if (isnan(_double)) { + cp = "NaN"; + size = 3; + break; + } + + flags |= FPT; + cp = cvt(data, _double, prec, flags, &softsign, + &expt, ch, &ndig); + if (ch == 'g' || ch == 'G') { + if (expt <= -4 || expt > prec) + ch = (ch == 'g') ? 'e' : 'E'; + else + ch = 'g'; + } + if (ch <= 'e') { /* 'e' or 'E' fmt */ + --expt; + expsize = exponent(expstr, expt, ch); + size = expsize + ndig; + if (ndig > 1 || flags & ALT) + ++size; + } else if (ch == 'f') { /* f fmt */ + if (expt > 0) { + size = expt; + if (prec || flags & ALT) + size += prec + 1; + } else /* "0.X" */ + size = prec + 2; + } else if (expt >= ndig) { /* fixed g fmt */ + size = expt; + if (flags & ALT) + ++size; + } else + size = ndig + (expt > 0 ? + 1 : 2 - expt); + + if (softsign) + sign = '-'; + break; +#endif /* FLOATING_POINT */ + case 'n': +#ifndef _NO_LONGLONG + if (flags & QUADINT) + *va_arg(ap, quad_t *) = ret; + else +#endif + if (flags & LONGINT) + *va_arg(ap, long *) = ret; + else if (flags & SHORTINT) + *va_arg(ap, short *) = ret; + else + *va_arg(ap, int *) = ret; + continue; /* no output */ + case 'O': + flags |= LONGINT; + /*FALLTHROUGH*/ + case 'o': + _uquad = UARG(); + base = OCT; + goto nosign; + case 'p': + /* + * ``The argument shall be a pointer to void. The + * value of the pointer is converted to a sequence + * of printable characters, in an implementation- + * defined manner.'' + * -- ANSI X3J11 + */ + /* NOSTRICT */ + _uquad = (u_long)(unsigned _POINTER_INT)va_arg(ap, void *); + base = HEX; + xdigs = "0123456789abcdef"; + flags |= HEXPREFIX; + ch = 'x'; + goto nosign; + case 's': + if ((cp = va_arg(ap, char *)) == NULL) + cp = "(null)"; + if (prec >= 0) { + /* + * can't use strlen; can only look for the + * NUL in the first `prec' characters, and + * strlen() will go further. + */ + char *p = (char *)memchr(cp, 0, prec); + + if (p != NULL) { + size = p - cp; + if (size > prec) + size = prec; + } else + size = prec; + } else + size = strlen(cp); + sign = '\0'; + break; + case 'U': + flags |= LONGINT; + /*FALLTHROUGH*/ + case 'u': + _uquad = UARG(); + base = DEC; + goto nosign; + case 'X': + xdigs = "0123456789ABCDEF"; + goto hex; + case 'x': + xdigs = "0123456789abcdef"; +hex: _uquad = UARG(); + base = HEX; + /* leading 0x/X only if non-zero */ + if (flags & ALT && _uquad != 0) + flags |= HEXPREFIX; + + /* unsigned conversions */ +nosign: sign = '\0'; + /* + * ``... diouXx conversions ... if a precision is + * specified, the 0 flag will be ignored.'' + * -- ANSI X3J11 + */ +number: if ((dprec = prec) >= 0) + flags &= ~ZEROPAD; + + /* + * ``The result of converting a zero value with an + * explicit precision of zero is no characters.'' + * -- ANSI X3J11 + */ + cp = buf + BUF; + if (_uquad != 0 || prec != 0) { + /* + * Unsigned mod is hard, and unsigned mod + * by a constant is easier than that by + * a variable; hence this switch. + */ + switch (base) { + case OCT: + do { + *--cp = to_char(_uquad & 7); + _uquad >>= 3; + } while (_uquad); + /* handle octal leading 0 */ + if (flags & ALT && *cp != '0') + *--cp = '0'; + break; + + case DEC: + /* many numbers are 1 digit */ + while (_uquad >= 10) { + *--cp = to_char(_uquad % 10); + _uquad /= 10; + } + *--cp = to_char(_uquad); + break; + + case HEX: + do { + *--cp = xdigs[_uquad & 15]; + _uquad >>= 4; + } while (_uquad); + break; + + default: + cp = "bug in vfprintf: bad base"; + size = strlen(cp); + goto skipsize; + } + } + size = buf + BUF - cp; + skipsize: + break; + default: /* "%?" prints ?, unless ? is NUL */ + if (ch == '\0') + goto done; + /* pretend it was %c with argument ch */ + cp = buf; + *cp = ch; + size = 1; + sign = '\0'; + break; + } + + /* + * All reasonable formats wind up here. At this point, `cp' + * points to a string which (if not flags&LADJUST) should be + * padded out to `width' places. If flags&ZEROPAD, it should + * first be prefixed by any sign or other prefix; otherwise, + * it should be blank padded before the prefix is emitted. + * After any left-hand padding and prefixing, emit zeroes + * required by a decimal [diouxX] precision, then print the + * string proper, then emit zeroes required by any leftover + * floating precision; finally, if LADJUST, pad with blanks. + * + * Compute actual size, so we know how much to pad. + * size excludes decimal prec; realsz includes it. + */ + realsz = dprec > size ? dprec : size; + if (sign) + realsz++; + else if (flags & HEXPREFIX) + realsz+= 2; + + /* right-adjusting blank padding */ + if ((flags & (LADJUST|ZEROPAD)) == 0) + PAD(tobuf, outbuf, width - realsz, blanks); + + /* prefix */ + if (sign) { + print_out(tobuf, outbuf, &sign, 1); + } else if (flags & HEXPREFIX) { + ox[0] = '0'; + ox[1] = ch; + print_out(tobuf, outbuf, ox, 2); + } + + /* right-adjusting zero padding */ + if ((flags & (LADJUST|ZEROPAD)) == ZEROPAD) + PAD(tobuf, outbuf, width - realsz, zeroes); + + /* leading zeroes from decimal precision */ + PAD(tobuf, outbuf, dprec - size, zeroes); + + /* the string or number proper */ +#ifdef FLOATING_POINT + if ((flags & FPT) == 0) { + print_out(tobuf, outbuf, cp, size); + } else { /* glue together f_p fragments */ + if (ch >= 'f') { /* 'f' or 'g' */ + if (_double == 0) { + /* kludge for __dtoa irregularity */ + print_out(tobuf, outbuf, "0", 1); + if (expt < ndig || (flags & ALT) != 0) { + print_out(tobuf, outbuf, decimal_point, 1); + PAD(tobuf, outbuf, ndig - 1, zeroes); + } + } else if (expt <= 0) { + print_out(tobuf, outbuf, "0", 1); + print_out(tobuf, outbuf, decimal_point, 1); + PAD(tobuf, outbuf, -expt, zeroes); + print_out(tobuf, outbuf, cp, ndig); + } else if (expt >= ndig) { + print_out(tobuf, outbuf, cp, ndig); + PAD(tobuf, outbuf, expt - ndig, zeroes); + if (flags & ALT) + print_out(tobuf, outbuf, ".", 1); + } else { + print_out(tobuf, outbuf, cp, expt); + cp += expt; + print_out(tobuf, outbuf, ".", 1); + print_out(tobuf, outbuf, cp, ndig-expt); + } + } else { /* 'e' or 'E' */ + if (ndig > 1 || flags & ALT) { + ox[0] = *cp++; + ox[1] = '.'; + print_out(tobuf, outbuf, ox, 2); + if (_double || flags & ALT == 0) { + print_out(tobuf, outbuf, cp, ndig-1); + } else /* 0.[0..] */ + /* __dtoa irregularity */ + PAD(tobuf, outbuf, ndig - 1, zeroes); + } else /* XeYYY */ + print_out(tobuf, outbuf, cp, 1); + print_out(tobuf, outbuf, expstr, expsize); + } + } +#else + print_out(tobuf, outbuf, cp, size); +#endif + /* left-adjusting padding (always blank) */ + if (flags & LADJUST) + PAD(tobuf, outbuf, width - realsz, blanks); + + /* finally, adjust ret */ + ret += width > realsz ? width : realsz; + + FLUSH(); /* copy out the I/O vectors */ + } +done: + va_end (ap); + FLUSH(); + return (ret); + /* NOTREACHED */ +} + +#ifdef FLOATING_POINT + +extern char *_dtoa_r _PARAMS((struct _reent *, double, int, + int, int *, int *, char **)); + +static char * +cvt(data, value, ndigits, flags, sign, decpt, ch, length) + struct _reent *data; + double value; + int ndigits, flags, *decpt, ch, *length; + char *sign; +{ + int mode, dsgn; + char *digits, *bp, *rve; + union double_union tmp; + + if (ch == 'f') { + mode = 3; /* ndigits after the decimal point */ + } else { + /* To obtain ndigits after the decimal point for the 'e' + * and 'E' formats, round to ndigits + 1 significant + * figures. + */ + if (ch == 'e' || ch == 'E') { + ndigits++; + } + mode = 2; /* ndigits significant digits */ + } + + tmp.d = value; + if (word0(tmp) & Sign_bit) { /* this will check for < 0 and -0.0 */ + value = -value; + *sign = '-'; + } else + *sign = '\000'; + digits = _dtoa_r(data, value, mode, ndigits, decpt, &dsgn, &rve); + if ((ch != 'g' && ch != 'G') || flags & ALT) { /* Print trailing zeros */ + bp = digits + ndigits; + if (ch == 'f') { + if (*digits == '0' && value) + *decpt = -ndigits + 1; + bp += *decpt; + } + if (value == 0) /* kludge for __dtoa irregularity */ + rve = bp; + while (rve < bp) + *rve++ = '0'; + } + *length = rve - digits; + return (digits); +} + +static int +exponent(p0, exp, fmtch) + char *p0; + int exp, fmtch; +{ + register char *p, *t; + char expbuf[MAXEXP]; + + p = p0; + *p++ = fmtch; + if (exp < 0) { + exp = -exp; + *p++ = '-'; + } + else + *p++ = '+'; + t = expbuf + MAXEXP; + if (exp > 9) { + do { + *--t = to_char(exp % 10); + } while ((exp /= 10) > 9); + *--t = to_char(exp); + for (; t < expbuf + MAXEXP; *p++ = *t++); + } + else { + *p++ = '0'; + *p++ = to_char(exp); + } + return (p - p0); +} +#endif /* FLOATING_POINT */ Index: ucos-ii/2.91/common/cprintf_r.c =================================================================== --- ucos-ii/2.91/common/cprintf_r.c (nonexistent) +++ ucos-ii/2.91/common/cprintf_r.c (revision 471) @@ -0,0 +1,229 @@ +/* + File: cprintf_r.c + + Copyright (C) 2004 Kustaa Nyholm + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +*/ + +#include "cprintf_r.h" + +typedef void (*putcf) (char,void*); +static putcf stdout_putf; +static void* stdout_putp; + +#ifdef PRINTF_LONG_SUPPORT + +static void uli2a(unsigned long int num, unsigned int base, int uc,char * bf) +{ + int n=0; + unsigned int d=1; + while (num/d >= base) + d*=base; + while (d!=0) { + int dgt = num / d; + num%=d; + d/=base; + if (n || dgt>0|| d==0) { + *bf++ = dgt+(dgt<10 ? '0' : (uc ? 'A' : 'a')-10); + ++n; + } + } + *bf=0; +} + +static void li2a (long num, char * bf) +{ + if (num<0) { + num=-num; + *bf++ = '-'; + } + uli2a(num,10,0,bf); +} + +#endif + +static void ui2a(unsigned int num, unsigned int base, int uc,char * bf) +{ + int n=0; + unsigned int d=1; + while (num/d >= base) + d*=base; + while (d!=0) { + int dgt = num / d; + num%= d; + d/=base; + if (n || dgt>0 || d==0) { + *bf++ = dgt+(dgt<10 ? '0' : (uc ? 'A' : 'a')-10); + ++n; + } + } + *bf=0; +} + +static void i2a (int num, char * bf) +{ + if (num<0) { + num=-num; + *bf++ = '-'; + } + ui2a(num,10,0,bf); +} + +static int a2d(char ch) +{ + if (ch>='0' && ch<='9') + return ch-'0'; + else if (ch>='a' && ch<='f') + return ch-'a'+10; + else if (ch>='A' && ch<='F') + return ch-'A'+10; + else return -1; +} + +static char a2i(char ch, char** src,int base,int* nump) +{ + char* p= *src; + int num=0; + int digit; + while ((digit=a2d(ch))>=0) { + if (digit>base) break; + num=num*base+digit; + ch=*p++; + } + *src=p; + *nump=num; + return ch; +} + +static void putchw(void* putp,putcf putf,int n, char z, char* bf) +{ + char fc=z? '0' : ' '; + char ch; + char* p=bf; + while (*p++ && n > 0) + n--; + while (n-- > 0) + putf(fc,putp); + while ((ch= *bf++)) + putf(ch,putp); +} + +void tfp_format(void* putp,putcf putf,char *fmt, va_list va) +{ + char bf[12]; + + char ch; + + + while ((ch=*(fmt++))) { + if (ch!='%') + putf(ch,putp); + else { + char lz=0; +#ifdef PRINTF_LONG_SUPPORT + char lng=0; +#endif + int w=0; + ch=*(fmt++); + if (ch=='0') { + ch=*(fmt++); + lz=1; + } + if (ch>='0' && ch<='9') { + ch=a2i(ch,&fmt,10,&w); + } +#ifdef PRINTF_LONG_SUPPORT + if (ch=='l') { + ch=*(fmt++); + lng=1; + } +#endif + switch (ch) { + case 0: + goto abort; + case 'u' : { +#ifdef PRINTF_LONG_SUPPORT + if (lng) + uli2a(va_arg(va, unsigned long int),10,0,bf); + else +#endif + ui2a(va_arg(va, unsigned int),10,0,bf); + putchw(putp,putf,w,lz,bf); + break; + } + case 'd' : { +#ifdef PRINTF_LONG_SUPPORT + if (lng) + li2a(va_arg(va, unsigned long int),bf); + else +#endif + i2a(va_arg(va, int),bf); + putchw(putp,putf,w,lz,bf); + break; + } + case 'x': case 'X' : +#ifdef PRINTF_LONG_SUPPORT + if (lng) + uli2a(va_arg(va, unsigned long int),16,(ch=='X'),bf); + else +#endif + ui2a(va_arg(va, unsigned int),16,(ch=='X'),bf); + putchw(putp,putf,w,lz,bf); + break; + case 'c' : + putf((char)(va_arg(va, int)),putp); + break; + case 's' : + putchw(putp,putf,w,0,va_arg(va, char*)); + break; + case '%' : + putf(ch,putp); + default: + break; + } + } + } + abort:; +} + +void init_printf(void* putp,void (*putf) (char,void*)) +{ + stdout_putf=putf; + stdout_putp=putp; +} + +void tfp_printf(char *fmt, ...) +{ + va_list va; + va_start(va,fmt); + tfp_format(stdout_putp,stdout_putf,fmt,va); + va_end(va); +} + +static void putcp(char c, void* p) +{ + *(*((char**)p))++ = c; +} + +void tfp_sprintf(char* s,char *fmt, ...) +{ + va_list va; + va_start(va,fmt); + tfp_format(&s, putcp, fmt, va); + putcp(0,&s); + va_end(va); +} Index: ucos-ii/2.91/common/string.c =================================================================== --- ucos-ii/2.91/common/string.c (nonexistent) +++ ucos-ii/2.91/common/string.c (revision 471) @@ -0,0 +1,247 @@ +/* + string.h -- String manipulation + Implements (some) of the standard string routines + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include +#include "string.h" + +/* Basic string functions */ + +/* + s t r l e n + + returns number of characters in s (not including terminating null character) +*/ +size_t strlen(const char *s) +{ + size_t cnt = 0; + + /* count the length of string s, not including the \0 character */ + while (*s++) + cnt++; + + return cnt; +} + +/* + s t r c p y + + Copy 'src' to 'dest'. Strings may not overlap. +*/ +char *strcpy(char *dest, const char *src) +{ + char *d = dest; + + /* copy src to dest */ + while ( (*dest++ = *src++) ) + ; + + return d; +} + + +char *strncpy(char *dest, const char *src, size_t n) +{ + char *d = dest; + + /* copy src to dest */ + while ( *src && n ) { + *dest++ = *src++; + n--; + } + + /* fill the remainder of d with nulls */ + while (n--) + *dest++ = '\0'; + + return d; +} + + +char *strcat(char *dest, const char *src) +{ + char *d = dest; + + /* find the end of the destination string */ + while (*dest++) + ; + + /* append the source string to the destination string */ + while ( (*dest++ = *src++) ) + ; + + return d; +} + + +char *strncat(char *dest, const char *src, size_t n) +{ + char *d = dest; + + /* find the end of the destination string */ + while (*dest++) + ; + + /* copy src to dest */ + while ( (*dest = *src) && n-- ) { + dest++; + src++; + } + + + /* add terminating '\0' character */ + *dest = '\0'; + + return d; +} + + +int strcmp(const char *s1, const char *s2) +{ + while ( *s1 && (*s1 == *s2) ) { + s1++; + s2++; + } + + return *s1 - *s2; +} + + +int strncmp(const char *s1, const char *s2, size_t n) +{ + while ( *s1 && (*s1 == *s2) && n-- ) { + s1++; + s2++; + } + + return *s1 - *s2; +} + + +char *strchr(const char *s, int c) +{ + /* search for the character c */ + while (*s && (*s != c) ) + s++; + + return (char *)s; +} + + +char *strrchr(const char *s, int c) +{ + char *fnd = NULL; + + /* search for the character c */ + while (*s) { + if (*s == c) + fnd = (char *)s; + s++; + } + + return fnd; +} + + +/* Basic mem functions */ +void *memcpy(void *dest, const void *src, size_t n) +{ + /* check if 'src' and 'dest' are on LONG boundaries */ + if ( (sizeof(unsigned long) -1) & ((unsigned long)dest | (unsigned long)src) ) + { + /* no, do a byte-wide copy */ + char *cs = (char *) src; + char *cd = (char *) dest; + + while (n--) + *cd++ = *cs++; + } + else + { + /* yes, speed up copy process */ + /* copy as many LONGs as possible */ + long *ls = (long *)src; + long *ld = (long *)dest; + + size_t cnt = n >> 2; + while (cnt--) + *ld++ = *ls++; + + /* finally copy the remaining bytes */ + char *cs = (char *) (src + (n & ~0x03)); + char *cd = (char *) (dest + (n & ~0x03)); + + cnt = n & 0x3; + while (cnt--) + *cd++ = *cs++; + } + + return dest; +} + + +void *memmove(void *dest, void *src, size_t n) +{ + char *d = dest; + char *s = src; + + while (n--) + *d++ = *s++; + + return dest; +} + + +int memcmp(const void *s1, const void *s2, size_t n) +{ + char *p1 = (void *)s1; + char *p2 = (void *)s2; + + while ( (*p1 == *p2) && n-- ) { + p1++; + p2++; + } + + return *p1 - *p2; +} + + +void *memchr(const void *s, int c, size_t n) +{ + char *p = (void *)s; + + /* search for the character c */ + while ( (*p != c) && n-- ) + p++; + + return (*p == c) ? p : NULL; +} + + +void *memset(void *s, int c, size_t n) +{ + char *p = s; + + while (n--) + *p++ = c; + + return s; +} Index: ucos-ii/2.91/common/Makefile =================================================================== --- ucos-ii/2.91/common/Makefile (nonexistent) +++ ucos-ii/2.91/common/Makefile (revision 471) @@ -0,0 +1,20 @@ + +# CFLAGS += -DET_DEBUG -DDEBUG + +LIB = common.o + +OBJS = cprintf_r.o ctype.o string.o main.o + +all: $(LIB) + +$(LIB): $(OBJS) $(SOBJS) + $(LD) -r -o $@ $(OBJS) $(SOBJS) + +######################################################################### + +.depend: Makefile $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ + +sinclude .depend + +######################################################################### Index: ucos-ii/2.91/ucos/Makefile =================================================================== --- ucos-ii/2.91/ucos/Makefile (nonexistent) +++ ucos-ii/2.91/ucos/Makefile (revision 471) @@ -0,0 +1,19 @@ + +# CFLAGS += -DET_DEBUG -DDEBUG + +LIB = ucos.o + +OBJS = os_flag.o os_mbox.o os_mem.o os_mutex.o os_q.o os_sem.o os_task.o os_time.o os_tmr.o os_dbg_r.o os_core.o +all: $(LIB) + +$(LIB): $(OBJS) $(SOBJS) + $(LD) -r -o $@ $(OBJS) $(SOBJS) + +######################################################################### + +.depend: Makefile $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ + +sinclude .depend + +######################################################################### Index: ucos-ii/2.91/ChangeLog-OR32 =================================================================== --- ucos-ii/2.91/ChangeLog-OR32 (nonexistent) +++ ucos-ii/2.91/ChangeLog-OR32 (revision 471) @@ -0,0 +1,30 @@ +2011-01-11 Julius Baxter + * ucos-port/: Created. + * tasks/: Likewise. + * ucos/os_cpu_c.c: Moved to ucos-port/ + * os_cpu_a.S: Moved to ucos-port/ + * common/cprintf_r.c: Added. + * ucos-port/Makefile: Likewise. + * tasks/Makefile: Likewise. + * include/cprintf_r.h: Likewise. + * drivers/console.c: Likewise. + * include/console.h: Likewise. + * tasks/tasks1.c: Likewise + * common/main.c: + (TaskStart): Added - calls hook for tasks code TaskStartCreateTasks. + (main): Changed printf to console_puts calls with loc. info. + * include/spr_defs: Removed. + * include/spr-defs: Added from latest or1ksim version. + + +2011-01-07 Julius Baxter + * ChangeLog-OR32: Created + * sim.cfg: MC disabled, flash memory removed, MMUs disabled, debug + disabled, CUC removed. + * os_cpu_a.S: Updated + * ram.ld: Added + * flash.ld: removed + * Makefile: Final link stage replaced with $(CC) instead of $(LD), it + finds libraries with greater ease. + * include/board.h: Removed all MC defines, flash boot options. + * include/os_cfg.h: Updated to version 2.91 (is default) Index: ucos-ii/2.91/config.mk =================================================================== --- ucos-ii/2.91/config.mk (nonexistent) +++ ucos-ii/2.91/config.mk (revision 471) @@ -0,0 +1,56 @@ +######################################################################### + +CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ + else if [ -x /bin/bash ]; then echo /bin/bash; \ + else echo sh; fi ; fi) + +HOSTCC = cc +HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer + +######################################################################### + +# +# Include the make variables (CC, etc...) +# +AS = $(CROSS_COMPILE)as +LD = $(CROSS_COMPILE)ld +CC = $(CROSS_COMPILE)gcc +AR = $(CROSS_COMPILE)ar +NM = $(CROSS_COMPILE)nm +STRIP = $(CROSS_COMPILE)strip +OBJCOPY = $(CROSS_COMPILE)objcopy +OBJDUMP = $(CROSS_COMPILE)objdump +RANLIB = $(CROSS_COMPILE)ranlib + +CFLAGS += -I$(TOPDIR)/include -I$(TOPDIR)/ucos -I$(TOPDIR)/common -Wall -Wstrict-prototypes -Werror-implicit-function-declaration -fomit-frame-pointer -fno-strength-reduce -O2 -g -pipe -fno-builtin -nostdlib + +ASFLAGS += $(CFLAGS) + +LDFLAGS += -lgcc + +######################################################################### + +export CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE \ + AS LD CC AR NM STRIP OBJCOPY OBJDUMP \ + MAKE CFLAGS ASFLAGS + +######################################################################### + +%.o: %.S + $(CC) $(CFLAGS) -c -o $@ $< +%.o: %.c + $(CC) $(CFLAGS) -c -o $@ $< + +%.bin: %.or32 + or32-elf-objcopy -O binary $< $@ + +%.img: %.bin + utils/bin2flimg 1 $< > $@ + +%.srec: %.bin + utils/bin2srec $< > $@ + +%.hex: %.bin + utils/bin2hex $< > $@ + +######################################################################### Index: ucos-ii/2.91/ucos-port/os_cpu_a.S =================================================================== --- ucos-ii/2.91/ucos-port/os_cpu_a.S (nonexistent) +++ ucos-ii/2.91/ucos-port/os_cpu_a.S (revision 471) @@ -0,0 +1,640 @@ +/* +---------------------------------------------------------------------- + CHiPES Embedded RTR Systems Copyright (c) Tim Oliver 2002-2004 +---------------------------------------------------------------------- + File : os_cpu_a.S + Author(s) : Tim Oliver, timtimoliver@yahoo.co.uk + Julius Baxter, julius@opencores.org +---------------------------[Description]------------------------------ + Start up file for OpenRISC Reference Platform + Assembly code required for ORP port of MicroC/OS-II + + Macros : + exception_vector name org + load32i reg const + store_context + restore_context + + Internal Routines : + _reset Boot code installed at interrupt vector 0x100 + _start Start up sequence + + _OSTickISR Operating system timer tick interrupt service routine + _OSStartHighRdy Starts the highest priority task that is available to run + _OSCtxSwBP + _OSCtxSw Task switch + _OSIntCtxSw Task switch after interrupt + _UserISR Interrupt service routine template - requires code + _align Attempts to recover from memory alignment errors + nest_not_one + + External Routines : + _OSIntExit + _OSTimeTick + _OSTaskSwHook + + External variables : + _OSIntNesting + _OSRunning + _OSPrioHighRdy + _OSPrioCur + _OSTCBCur + _OSTCBHighRdy + + Interrupt Vectors Installed: + 0x100 _reset + 0x500 _OSTickISR + 0x600 _align + + 0x800 _UserISR + + 0xc00 _OSCtxSw +*/ + +/* +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include "spr-defs.h" +#include "board.h" + +#define RED_ZONE_SIZE 128 +#define STK_FRAME_SIZE (128+RED_ZONE_SIZE) +#define SPR_TTMR_LOAD (SPR_TTMR_IE | SPR_TTMR_RT | ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD)) + +/* function prototypes */ + + .global OSTickISR /* internal functions */ + .global OSStartHighRdy + .global OSCtxSwBP + .global OSCtxSw + .global OSIntCtxSw + .global UserISR + .global _align + .global nest_not_one + + .extern OSIntExit /* external functions */ + .extern OSTimeTick + .extern OSTaskSwHook + + .extern OSIntNesting /* values */ + .extern OSRunning + .extern OSPrioHighRdy + .extern OSPrioCur + .extern OSTCBCur + .extern OSTCBHighRdy + +/* Macro Definitions */ +/* Utility macro: Load a 32-bit constant into a register */ + .macro load32i reg const + l.movhi \reg,hi(\const) + l.ori \reg,\reg,lo(\const) + .endm + +/* Utility macro: Start code for an exception handler */ + .macro exception_vector name + l.addi r1,r1,-STK_FRAME_SIZE + l.sw 0xc(r1),r3 + l.movhi r3,hi(\name) + l.ori r3,r3,lo(\name) + l.jr r3 + l.nop + + .endm + + .macro unhandled_exception + l.ori r3, r0, 1 + l.j 0 + l.nop NOP_EXIT + + .endm + +/* Utility macro: store the cpu context on the stack */ + .macro store_context + l.sw 0x8(r1),r2 + l.sw 0x10(r1),r4 + l.sw 0x14(r1),r5 + l.sw 0x18(r1),r6 + l.sw 0x1c(r1),r7 + l.sw 0x20(r1),r8 + l.sw 0x24(r1),r9 + l.sw 0x28(r1),r10 + l.sw 0x2c(r1),r11 + l.sw 0x30(r1),r12 + l.sw 0x34(r1),r13 + l.sw 0x38(r1),r14 + l.sw 0x3c(r1),r15 + l.sw 0x40(r1),r16 + l.sw 0x44(r1),r17 + l.sw 0x48(r1),r18 + l.sw 0x4c(r1),r19 + l.sw 0x50(r1),r20 + l.sw 0x54(r1),r21 + l.sw 0x58(r1),r22 + l.sw 0x5c(r1),r23 + l.sw 0x60(r1),r24 + l.sw 0x64(r1),r25 + l.sw 0x68(r1),r26 + l.sw 0x6c(r1),r27 + l.sw 0x70(r1),r28 + l.sw 0x74(r1),r29 + l.sw 0x78(r1),r30 + l.sw 0x7c(r1),r31 + .endm + +/* Utility macro: restore the cpu context from the stack */ + .macro restore_context + l.lwz r2,0x8(r1) + l.lwz r3,0xc(r1) + l.lwz r4,0x10(r1) + l.lwz r5,0x14(r1) + l.lwz r6,0x18(r1) + l.lwz r7,0x1c(r1) + l.lwz r8,0x20(r1) + l.lwz r9,0x24(r1) + l.lwz r10,0x28(r1) + l.lwz r11,0x2c(r1) + l.lwz r12,0x30(r1) + l.lwz r13,0x34(r1) + l.lwz r14,0x38(r1) + l.lwz r15,0x3c(r1) + l.lwz r16,0x40(r1) + l.lwz r17,0x44(r1) + l.lwz r18,0x48(r1) + l.lwz r19,0x4c(r1) + l.lwz r20,0x50(r1) + l.lwz r21,0x54(r1) + l.lwz r22,0x58(r1) + l.lwz r23,0x5c(r1) + l.lwz r24,0x60(r1) + l.lwz r25,0x64(r1) + l.lwz r26,0x68(r1) + l.lwz r27,0x6c(r1) + l.lwz r28,0x70(r1) + l.lwz r29,0x74(r1) + l.lwz r30,0x78(r1) + l.lwz r31,0x7c(r1) + .endm + +/* actual code */ + + .section .stack, "aw", @nobits + +.space STACK_SIZE +_stack: + +/* Exception vectors */ + + .section .vectors, "ax" + + .org 0x100 +_reset: + l.movhi r0,0 + l.addi r3,r0,SPR_SR_SM + l.mtspr r0,r3,SPR_SR + load32i r3,_start + l.jr r3 + l.nop + + .org 0x200 + unhandled_exception + + .org 0x300 + unhandled_exception + + .org 0x400 + unhandled_exception + + .org 0x500 + exception_vector OSTickISR + + .org 0x600 + exception_vector _align + + .org 0x700 + unhandled_exception + + .org 0x800 + exception_vector UserISR + + .org 0x900 + unhandled_exception + + .org 0xa00 + unhandled_exception + + .org 0xb00 + unhandled_exception + + .org 0xc00 + exception_vector OSCtxSw + + + /* Start of text section */ + + .section .text + + /* _start function - called immediately after reset */ +_start: + + /* Instruction cache enable */ + /* Check if IC present and skip enabling otherwise */ + l.mfspr r24,r0,SPR_UPR + l.andi r26,r24,SPR_UPR_ICP + l.sfeq r26,r0 + l.bf .L8 + l.nop + + /* Disable IC */ + l.mfspr r6,r0,SPR_SR + l.addi r5,r0,-1 + l.xori r5,r5,SPR_SR_ICE + l.and r5,r6,r5 + l.mtspr r0,r5,SPR_SR + + /* Establish cache block size + If BS=0, 16; + If BS=1, 32; + r14 contain block size + */ + l.mfspr r24,r0,SPR_ICCFGR + l.andi r26,r24,SPR_ICCFGR_CBS + l.srli r28,r26,7 + l.ori r30,r0,16 + l.sll r14,r30,r28 + + /* Establish number of cache sets + r16 contains number of cache sets + r28 contains log(# of cache sets) + */ + l.andi r26,r24,SPR_ICCFGR_NCS + l.srli r28,r26,3 + l.ori r30,r0,1 + l.sll r16,r30,r28 + + /* Invalidate IC */ + l.addi r6,r0,0 + l.sll r5,r14,r28 + +.L7: + l.mtspr r0,r6,SPR_ICBIR + l.sfne r6,r5 + l.bf .L7 + l.add r6,r6,r14 + + /* Enable IC */ + l.mfspr r6,r0,SPR_SR + l.ori r6,r6,SPR_SR_ICE + l.mtspr r0,r6,SPR_SR + l.nop + l.nop + l.nop + l.nop + l.nop + l.nop + l.nop + l.nop + +.L8: + /* Data cache enable */ + /* Check if DC present and skip enabling otherwise */ + l.mfspr r24,r0,SPR_UPR + l.andi r26,r24,SPR_UPR_DCP + l.sfeq r26,r0 + l.bf .L10 + l.nop + /* Disable DC */ + l.mfspr r6,r0,SPR_SR + l.addi r5,r0,-1 + l.xori r5,r5,SPR_SR_DCE + l.and r5,r6,r5 + l.mtspr r0,r5,SPR_SR + /* Establish cache block size + If BS=0, 16; + If BS=1, 32; + r14 contain block size + */ + l.mfspr r24,r0,SPR_DCCFGR + l.andi r26,r24,SPR_DCCFGR_CBS + l.srli r28,r26,7 + l.ori r30,r0,16 + l.sll r14,r30,r28 + /* Establish number of cache sets + r16 contains number of cache sets + r28 contains log(# of cache sets) + */ + l.andi r26,r24,SPR_DCCFGR_NCS + l.srli r28,r26,3 + l.ori r30,r0,1 + l.sll r16,r30,r28 + /* Invalidate DC */ + l.addi r6,r0,0 + l.sll r5,r14,r28 +.L9: + l.mtspr r0,r6,SPR_DCBIR + l.sfne r6,r5 + l.bf .L9 + l.add r6,r6,r14 + /* Enable DC */ + l.mfspr r6,r0,SPR_SR + l.ori r6,r6,SPR_SR_DCE + l.mtspr r0,r6,SPR_SR + +.L10: + + /* Clear BSS */ + load32i r28, ___bss_start + load32i r30, __end +1: + l.sw (0)(r28), r0 + l.sfltu r28, r30 + l.bf 1b + l.addi r28, r28, 4 + + /* Initialise stack pointer */ + load32i r1,_stack-4 + + l.addi r2,r0,-3 + l.and r1,r1,r2 + l.ori r2,r1,0 + + load32i r3,main + + l.jr r3 + l.addi r3,r0,0 + + + +_align: + l.ori r3,r0,0x600 + l.nop NOP_REPORT + l.mfspr r3,r0,SPR_EPCR_BASE + l.nop NOP_REPORT + l.lwz r3,0(r3) + l.nop NOP_REPORT + l.mfspr r3,r0,SPR_EEAR_BASE + l.nop NOP_REPORT + /* Loop in place, cause simulator to exit */ + l.ori r3,r0,1 + l.j 0 + l.nop NOP_EXIT + +/* +------------------------------ + OSCtxSw +------------------------------ + Description : + This routine switches between two different tasks. + The task state of one is saved on its kernel stack. + Then the state of the other is restored from its kernel stack. + + There maybe memory management hardware issues + + Finally, we can return to the second task, via the 'return'. + + Includes OSIntCtxSw +------------------------------ + Uses: +------------------------------ +*/ + +OSCtxSw: + /* l.sys exception for now so we are in supervisor mode */ + /* exception - recover pc from epcr */ + + l.mfspr r3,r0,SPR_EPCR_BASE /* save program counter that was put in exception register */ + l.sw 0(r1),r3 + l.mfspr r3,r0,SPR_ESR_BASE /* save status register that was put in exception register */ + l.sw 4(r1),r3 + + store_context + /* Store current stack pointer */ + load32i r3,OSTCBCur /* r3= &OSTCBCur */ + + l.lwz r3,0(r3) /* r3 = &CurrentTask.OSTCBStkPtr */ + l.sw 0(r3),r1 /* CurrentTask.OSTCBStkPtr = SP */ + +OSIntCtxSw: + l.jal OSTaskSwHook /* call OSTaskSwHook */ + l.nop + + load32i r2,OSTCBHighRdy /* r2= &OSTCBHighRdy */ + l.lwz r2,0(r2) + load32i r3,OSTCBCur /* r3= &OSTCBCur */ + l.sw 0(r3),r2 /* OSTCBCur = OSTCBHighRdy */ + + load32i r3,OSPrioHighRdy /* r3= &OSPrioHighRdy */ + l.lbz r3, 0(r3) + load32i r4,OSPrioCur /* r4= &OSPrioCur */ + l.sb 0(r4), r3 /* OSPrioCur = OSPrioHighRdy */ + + l.lwz r1, 0(r2) /* sp = OSTCBHighRdy */ + + + l.lwz r2,0(r1) /* load context for task to be resumed */ + l.mtspr r0,r2,SPR_EPCR_BASE + l.lwz r2,4(r1) + l.mtspr r0,r2,SPR_ESR_BASE + + restore_context + +OSCtxSwBP: + l.addi r1,r1,STK_FRAME_SIZE + l.rfe + l.nop + +/* +------------------------------ + OSStartHighRdy +------------------------------ + Description : + Starts the highest priority task that is available to run + + OSStartHighRdy() MUST: + a) Call OSTaskSwHook() then, + b) Set OSRunning to TRUE, + c) Switch to the HPT + +------------------------------ + Uses : +------------------------------ +*/ +OSStartHighRdy: + + l.jal OSTaskSwHook /* call OSTaskSwHook */ + l.nop + + load32i r3,OSRunning /* r3= &OSRunning */ + + l.ori r4,r0, 0x01 /* set OSRunning == TRUE */ + l.sb 0(r3), r4 + /* load stack pointer from next task's TCB area */ + load32i r3,OSTCBHighRdy /* r3 = &OSTCBHighRdy */ + l.lwz r3,0(r3) /* r3 = &OS_TCB */ + l.lwz r1, 0(r3) /* stack is the first element */ + + l.lwz r2,0(r1) + l.mtspr r0,r2,SPR_EPCR_BASE + l.lwz r2,4(r1) + l.mtspr r0,r2,SPR_ESR_BASE + + restore_context + + l.addi r1,r1,STK_FRAME_SIZE + l.rfe + l.nop + +/* +------------------------------ + OSTickISR +------------------------------ + Description : + +------------------------------ + Uses : +------------------------------ +*/ +OSTickISR: + l.mfspr r3,r0,SPR_EPCR_BASE /* save program counter that was put in exception register */ + l.sw 0(r1),r3 + l.mfspr r3,r0,SPR_ESR_BASE /* save status register that was put in exception register */ + l.sw 4(r1),r3 + + store_context +/* either call OSIntEnter or Increment OSIntNesting */ + +/* + l.jal OSIntEnter + l.nop + load32i r2,OSIntNesting + l.lbz r3,0(r2) +*/ + load32i r2,OSIntNesting /* r2 &OSIntNesting */ + l.lbz r3,0(r2) /* r3 OSIntNesting */ + l.addi r3,r3,1 + l.sb 0(r2),r3 + + /* if (OSIntNesting == 1) OSTCBCur->OSTCBStkPtr = sp */ + l.sfeqi r3,1 + l.bnf nest_not_one + l.nop + + load32i r4,OSTCBCur /* set pointer to Current TCB pointer */ + /* r4= &OSTCBCur */ + + /* Store current stack pointer */ + l.lwz r5,0(r4) /* r5 = &CurrentTask.OSTCBStkPtr */ + l.sw 0(r5),r1 /* CurrentTask.OSTCBStkPtr = SP */ + +nest_not_one: + /* clear interrupt */ + load32i r3,SPR_TTMR_LOAD + l.mtspr r0,r3,SPR_TTMR + + /* optionally re enable interrupt */ + + /*Call OSTimeTick()*/ + l.jal OSTimeTick + l.nop + /*Call OSIntExit()*/ + l.jal OSIntExit + l.nop + /* load stack pointer from next task's TCB area */ + load32i r3,OSTCBHighRdy /* r3 = &OSTCBHighRdy */ + l.lwz r3,0(r3) /* r3 = &OS_TCB */ + l.lwz r1, 0(r3) /* stack is the first element */ + + l.lwz r2,0(r1) + l.mtspr r0,r2,SPR_EPCR_BASE + l.lwz r2,4(r1) + l.mtspr r0,r2,SPR_ESR_BASE + + restore_context + + l.addi r1,r1,STK_FRAME_SIZE + l.rfe + l.nop + + + /* +------------------------------ + UserISR +------------------------------ + Description : + +------------------------------ + Uses : +------------------------------ +*/ +UserISR: + l.mfspr r2,r0,SPR_EPCR_BASE /* save program counter that was put in exception register */ + l.sw 0(r1),r2 + l.mfspr r2,r0,SPR_ESR_BASE /* save status register that was put in exception register */ + l.sw 4(r1),r2 + + store_context +/* either call OSIntEnter or Increment OSIntNesting */ + +/* + l.jal _OSIntEnter + l.nop + load32i r2,_OSIntNesting + l.lbz r3,0(r2) +*/ + load32i r2,OSIntNesting /* r2 &OSIntNesting */ + + l.lbz r3,0(r2) /* r3 OSIntNesting */ + l.addi r3,r3,1 + l.sb 0(r2),r3 + + /* if (OSIntNesting == 1) OSTCBCur->OSTCBStkPtr = sp */ + l.sfeqi r3,1 + l.bnf Unest_not_one + l.nop + + load32i r4,OSTCBCur /* set pointer to Current TCB pointer */ + /* r4= &OSTCBCur */ + + /* Store current stack pointer */ + l.lwz r5,0(r4) /* r5 = &CurrentTask.OSTCBStkPtr */ + l.sw 0(r5),r1 /* CurrentTask.OSTCBStkPtr = SP */ + +Unest_not_one: + /* clear interrupt */ + l.mtspr r0,r0,SPR_PICSR + + /* optionally re enable interrupt */ + + /*Call interrupt service routine */ + + /*Call OSIntExit()*/ + l.jal OSIntExit + l.nop + + /* load stack pointer from next task's TCB area */ + load32i r3,OSTCBHighRdy /* r3 = &OSTCBHighRdy */ + l.lwz r3,0(r3) /* r3 = &OS_TCB */ + l.lwz r1, 0(r3) /* stack is the first element */ + + l.lwz r2,0(r1) + l.mtspr r0,r2,SPR_EPCR_BASE + l.lwz r2,4(r1) + l.mtspr r0,r2,SPR_ESR_BASE + + restore_context + + l.addi r1,r1,STK_FRAME_SIZE + l.rfe + l.nop Index: ucos-ii/2.91/ucos-port/os_cpu_c.c =================================================================== --- ucos-ii/2.91/ucos-port/os_cpu_c.c (nonexistent) +++ ucos-ii/2.91/ucos-port/os_cpu_c.c (revision 471) @@ -0,0 +1,409 @@ +/* + ---------------------------------------------------------------------- + CHiPES Embedded RTR Systems Copyright (c) Tim Oliver 2002-2004 + ---------------------------------------------------------------------- + File : os_cpu_c.c + Author : Tim Oliver + Email : timtimoliver@yahoo.co.uk + ---------------------------[Description]------------------------------ + + uC/OS-II + The Real-Time Kernel + + (c) Copyright 1992-2002, Jean J. Labrosse, Weston, FL + All Rights Reserved + + OpenCores OpenRISC + + Inline NOP ORP simulator functions : + void exit (int i) - simulator exit point + void report(unsigned long value) - simulator report messaging + + Internal Routines : + void mtspr(unsigned long spr, unsigned long vakye) - Move To SPR + unsigned long mfspr(unsigned long spr) - Move From SPR + OS_CPU_SR OSDisableInterrupts (void) + void OSEnableInterrupts(OS_CPU_SR cpu_sr) + void OSInitTick(void) + void putc (char c) - standard output patch to UART + int getc () - standard input patch to UART + int testc () - check for character received by UART + int ctrlc () - check for control-C received by UART + For OS Routines see descriptions below + +*/ + +/* + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#define OS_CPU_GLOBALS +#include "includes.h" + +/* return value by making a syscall */ +void exit (int i) +{ + asm("l.add r3,r0,%0": : "r" (i)); + asm("l.nop %0": :"K" (NOP_EXIT)); + while (1); +} + +/* print long */ +void report(unsigned long value) +{ + asm("l.addi\tr3,%0,0": :"r" (value)); + asm("l.nop %0": :"K" (NOP_REPORT)); +} + +/* For writing into SPR. */ +void mtspr(unsigned long spr, unsigned long value) +{ + asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value)); +} + +/* For reading SPR. */ +unsigned long mfspr(unsigned long spr) +{ + unsigned long value; + asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr)); + return value; +} + +#if OS_CRITICAL_METHOD == 3 +OS_CPU_SR OSDisableInterrupts (void) +{ + OS_CPU_SR cpu_sr; + + cpu_sr = mfspr(SPR_SR); + mtspr(SPR_SR, cpu_sr & ~(SPR_SR_IEE | SPR_SR_TEE)); + return cpu_sr; +} + +void OSEnableInterrupts(OS_CPU_SR cpu_sr) +{ + mtspr(SPR_SR, cpu_sr); /* | (SPR_SR_IEE | SPR_SR_TEE)*/ +} + +#endif + +void OSInitTick(void) +{ + /* Enable tick interrupts in supervisor register */ + mtspr(SPR_SR, SPR_SR_TEE | mfspr(SPR_SR)); + /* Set tick timer to restart on match, and set interrupt enable, and set period depending on clock + frequency and desired tick rate */ + mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD)); +} + +/* stdio patches */ +void putc (char c) { + OS_CPU_SR cpu_sr; + + OS_ENTER_CRITICAL() + uart_putc (c); + OS_EXIT_CRITICAL() +} + +int getc () { + + return uart_getc (); +} + + +int testc () { + + return uart_testc (); +} + +int ctrlc () +{ + if (testc ()) { + switch (getc ()) { + case 0x03: /* ^C - Control C */ + return 1; + default: + break; + } + } + return 0; +} + +/* +********************************************************************************************************* +* OS INITIALIZATION HOOK +* (BEGINNING) +* +* Description: This function is called by OSInit() at the beginning of OSInit(). +* +* Arguments : none +* +* Note(s) : 1) Interrupts should be disabled during this call. +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 && OS_VERSION > 203 +void OSInitHookBegin (void) +{ + + uart_init(); + +#ifdef __TFP_PRINTF__ + init_printf(NULL,putc); +#endif + + return; + +} +#endif + +/* +********************************************************************************************************* +* OS INITIALIZATION HOOK +* (END) +* +* Description: This function is called by OSInit() at the end of OSInit(). +* +* Arguments : none +* +* Note(s) : 1) Interrupts should be disabled during this call. +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 && OS_VERSION > 203 +void OSInitHookEnd (void) +{ +} +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* TASK CREATION HOOK +* +* Description: This function is called when a task is created. +* +* Arguments : ptcb is a pointer to the task control block of the task being created. +* +* Note(s) : 1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 +void OSTaskCreateHook (OS_TCB *ptcb) +{ + ptcb = ptcb; /* Prevent compiler warning */ +} +#endif + + +/* +********************************************************************************************************* +* TASK DELETION HOOK +* +* Description: This function is called when a task is deleted. +* +* Arguments : ptcb is a pointer to the task control block of the task being deleted. +* +* Note(s) : 1) Interrupts are disabled during this call. +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 +void OSTaskDelHook (OS_TCB *ptcb) +{ + ptcb = ptcb; /* Prevent compiler warning */ +} +#endif + +/* +********************************************************************************************************* +* IDLE TASK HOOK +* +* Description: This function is called by the idle task. This hook has been added to allow you to do +* such things as STOP the CPU to conserve power. +* +* Arguments : none +* +* Note(s) : 1) Interrupts are enabled during this call. +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 && OS_VERSION >= 251 +void OSTaskIdleHook (void) +{ + /* printf("\nEntering idle task"); */ +} +#endif + +/* +********************************************************************************************************* +* STATISTIC TASK HOOK +* +* Description: This function is called every second by uC/OS-II's statistics task. This allows your +* application to add functionality to the statistics task. +* +* Arguments : none +********************************************************************************************************* +*/ + +#if OS_CPU_HOOKS_EN > 0 +void OSTaskStatHook (void) +{ +} +#endif + +/*$PAGE*/ +/* +********************************************************************************************************* +* INITIALIZE A TASK'S STACK +* +* Description: This function is called by either OSTaskCreate() or OSTaskCreateExt() to initialize the +* stack frame of the task being created. This function is highly processor specific. +* +* Arguments : task is a pointer to the task code +* +* pdata is a pointer to a user supplied data area that will be passed to the task +* when the task first executes. +* +* ptos is a pointer to the top of stack. It is assumed that 'ptos' points to +* a 'free' entry on the task stack. If OS_STK_GROWTH is set to 1 then +* 'ptos' will contain the HIGHEST valid address of the stack. Similarly, if +* OS_STK_GROWTH is set to 0, the 'ptos' will contains the LOWEST valid address +* of the stack. +* +* opt specifies options that can be used to alter the behavior of OSTaskStkInit(). +* (see uCOS_II.H for OS_TASK_OPT_???). +* +* Returns : Always returns the location of the new top-of-stack' once the processor registers have +* been placed on the stack in the proper order. +* +********************************************************************************************************* +*/ + +OS_STK *OSTaskStkInit (void (*task)(void *pd), void *pdata, OS_STK *ptos, INT16U opt) +{ + OS_STK *stk; + OS_STK *fp; + +#ifdef DEBUG + printf("\nCreating Stack at %x for task %x", ptos, task); +#endif + + opt = opt; /* 'opt' is not used, prevent warning */ + stk = ptos; /* Load stack pointer */ + stk--; + + *stk-- = (OS_STK)(pdata); /* fp+0 -> parameter 0 */ + fp = stk; + *stk-- = (OS_STK)fp; /* sp+4 -> previous fp */ + *stk-- = (INT32U)0; /* sp+0 -> return address */ + + *stk-- = (INT32U)31; /* r31 = 0 */ + *stk-- = (INT32U)30; /* r30 = 0 */ + *stk-- = (INT32U)29; /* r29 = 0 */ + *stk-- = (INT32U)28; /* r28 = 0 */ + *stk-- = (INT32U)27; /* r27 = 0 */ + *stk-- = (INT32U)26; /* r26 = 0 */ + *stk-- = (INT32U)25; /* r25 = 0 */ + *stk-- = (INT32U)24; /* r24 = 0 */ + *stk-- = (INT32U)23; /* r23 = 0 */ + *stk-- = (INT32U)22; /* r22 = 0 */ + *stk-- = (INT32U)21; /* r21 = 0 */ + *stk-- = (INT32U)20; /* r20 = 0 */ + *stk-- = (INT32U)19; /* r19 = 0 */ + *stk-- = (INT32U)18; /* r18 = 0 */ + *stk-- = (INT32U)17; /* r17 = 0 */ + *stk-- = (INT32U)16; /* r16 = 0 */ + *stk-- = (INT32U)15; /* r15 = 0 */ + *stk-- = (INT32U)14; /* r14 = 0 */ + *stk-- = (INT32U)13; /* r13 = 0 */ + *stk-- = (INT32U)12; /* r12 = 0 */ + *stk-- = (INT32U)11; /* r11 = 0 return value */ + *stk-- = (INT32U)10; /* r10 = 0 */ + *stk-- = (INT32U)9; /* r09 = 0 link register */ + *stk-- = (INT32U)8; /* r08 = 0 function paramters*/ + *stk-- = (INT32U)7; /* r07 = 0 */ + *stk-- = (INT32U)6; /* r06 = 0 */ + *stk-- = (INT32U)5; /* r05 = 0 */ + *stk-- = (INT32U)4; /* r04 = 0 */ + *stk-- = (OS_STK)(pdata); /* r03 = arg0 */ + *stk-- = (OS_STK)fp; /* r02 = frame pointer */ + *stk-- = (INT32U)(SPR_SR_IEE | SPR_SR_TEE | SPR_SR_SM); /* status word */ + *stk = (OS_STK)(task); /* program counter */ + + return ((OS_STK *)stk); /* sp gets saved in TCB */ +} + + +/*$PAGE*/ +/* +********************************************************************************************************* +* TASK SWITCH HOOK +* +* Description: This function is called when a task switch is performed. This allows you to perform other +* operations during a context switch. +* +* Arguments : none +* +* Note(s) : 1) Interrupts are disabled during this call. +* 2) It is assumed that the global pointer 'OSTCBHighRdy' points to the TCB of the task that +* will be 'switched in' (i.e. the highest priority task) and, 'OSTCBCur' points to the +* task being switched out (i.e. the preempted task). +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 +void OSTaskSwHook (void) +{ + /* printf("\nTask Switching\n"); */ +} +#endif + +/* +********************************************************************************************************* +* OSTCBInit() HOOK +* +* Description: This function is called by OS_TCBInit() after setting up most of the TCB. +* +* Arguments : ptcb is a pointer to the TCB of the task being created. +* +* Note(s) : 1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 && OS_VERSION > 203 +void OSTCBInitHook (OS_TCB *ptcb) +{ + ptcb = ptcb; /* Prevent Compiler warning */ +} +#endif + + +/* +********************************************************************************************************* +* TICK HOOK +* +* Description: This function is called every tick. +* +* Arguments : none +* +* Note(s) : 1) Interrupts may or may not be ENABLED during this call. +********************************************************************************************************* +*/ +#if OS_CPU_HOOKS_EN > 0 +void OSTimeTickHook (void) +{ +} +#endif + + +void OSTaskReturnHook (OS_TCB *ptcb) +{ + /* do nothing for now */ + return; +} Index: ucos-ii/2.91/ucos-port/Makefile =================================================================== --- ucos-ii/2.91/ucos-port/Makefile (nonexistent) +++ ucos-ii/2.91/ucos-port/Makefile (revision 471) @@ -0,0 +1,17 @@ +LIB = ucos-port.o +OBJS = os_cpu_c.o +SOBJS = os_cpu_a.o + +all: $(LIB) + +$(LIB): $(OBJS) $(SOBJS) + $(LD) -r -o $@ $(OBJS) $(SOBJS) + +######################################################################### + +.depend: Makefile $(OBJS:.o=.c) $(SOBJS:.o=.S) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) $(SOBJS:.o=.S) > $@ + +sinclude .depend + +######################################################################### Index: ucos-ii/2.91/Makefile =================================================================== --- ucos-ii/2.91/Makefile (nonexistent) +++ ucos-ii/2.91/Makefile (revision 471) @@ -0,0 +1,60 @@ +ifndef CROSS_COMPILE +CROSS_COMPILE = or32-elf- +endif + +export CROSS_COMPILE + +######################################################################### + +TOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi) +export TOPDIR + +include $(TOPDIR)/config.mk + +# order is important here: +SUBDIRS = drivers common ucos ucos-port tasks + +LIBS = common/common.o drivers/drivers.o ucos/ucos.o ucos-port/ucos-port.o \ + tasks/tasks.o + +######################################################################### + +UCOSAPP = ucos-tasks$(TASKS) + +all: $(UCOSAPP).or32 $(UCOSAPP).bin $(UCOSAPP).srec $(UCOSAPP).img + +$(UCOSAPP).or32: depend subdirs $(LIBS) Makefile + $(CC) -Tram.ld -o $@ $(LIBS) -nostdlib $(LDFLAGS) + +%.map: %.or32 + @$(NM) $< | \ + grep -v '$compiled$\|$\.o$$$\|$ [aUw] $\|$\.\.ng$$$\|$LASH[RL]DI$' | \ + sort > $@ + +######################################################################### + +depend dep: + @for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir .depend ; done + +subdirs: + @for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir || exit 1 ; done + +clean: + find . -type f \ + $ -name 'core' -o -name '*.bak' -o -name '*~' \ + -o -name '*.o' -o -name '*.tmp' -o -name '*.hex' \ + -o -name '*.or32' -o -name '*.bin' -o -name '*.srec' \ + -o -name '*.mem' -o -name '*.img' -o -name '*.out' \ + -o -name '*.aux' -o -name '*.log' $ -print \ + | xargs rm -f + rm -f System.map + +distclean: clean + find . -type f \ + $ -name .depend -o -name '*.srec' -o -name '*.bin' \ + -o -name '*.pdf' $ \ + -print | xargs rm -f + rm -f $(OBJS) *.bak tags TAGS + rm -fr *.*~ + +######################################################################### Index: ucos-ii/2.91/README =================================================================== --- ucos-ii/2.91/README (nonexistent) +++ ucos-ii/2.91/README (revision 471) @@ -0,0 +1,78 @@ + OpenRISC 1000 uc/OS-II port + =========================== + +Port of Micrium's uC/OS-II "real-time" kernel, version 2.91. + +Current status of the port is that it can run several tasks and make use of +timer and UART output. + +Project is configured so that adding own set of tasks to run is simple. + +Setting up the project +====================== + +First, to set up the project to build, the uC/OS-II kernel source must be +downloaded from the Micrium site (registration required): + +http://micrium.com/page/downloads/os-ii_evaluation_download + +Once downloaded, extract the contents and copy all C source from the +Micrium/Software/uCOS-II/Source/ path to the ucos/ path in this project. Eg: + + cp ~/Downloads/Micrium/Software/uCOS-II/Source/*.c ~/path/to/this/ucos + +Tasks +===== + +uC/OS-II is a task-oriented kernel, and this project has been set up to allow +easy creation of a simple set of tasks to run on the kernel port. + +Each file in tasks/ contains a set of tasks to be run on the kernel. Each time +the entire project code is compiled into a new executable to run on the +simulator or the board, one of these files is chosen (via the TASKS environment +variable at compile time) as the set of tasks to run. + +Building and running an example +=============================== + +1. Build the port (with example set of tasks) with: + + make distclean all TASKS=1 + +2. Run the example application with: + + or32-elf-sim -f sim.cfg ucos-tasks1.or32 + +The simulator should then open a new terminal window. Press enter and a simple +application showing multi-tasking and console output. Press 'q' and then enter +and wait for the simulation to exit gracefully. + +Adding own tasks +================ + +1. Add new file to tasks/ directory, named tasksX.c, where X is an alphanumeric + string or just a number. + Note: When compiling X will be passed via the TASKS environment variable to + indicate that this tasks file, tasksX.c, is the source to be compiled and + included in the application. At least one example, tasks1.c is included + in this project, and is compiled with "make all TASKS=1". + +2. Make sure the file contains at least the function TaskStartCreateTasks(void) + which will be called from the main task launcher, TaskStart() in + common/main.c and is the main entry point for all custom tasks. + See the file tasks/tasks1.c for an example of the contents of this function. + +3. Once the tasksX.c is finished, compile with the following in the main + folder: + + make all TASKS=X + +4. Run the resulting executable in or1ksim: + + or32-elf-sim -f sim.cfg ucos-tasksX.or32 + +Authors: + Tim Oliver, timtimoliver@yahoo.co.uk + http://www3.ntu.edu.sg/home5/p014082819/index.html + + Julius Baxter, julius@opencores.org Index: ucos-ii/2.91/ram.ld =================================================================== --- ucos-ii/2.91/ram.ld (nonexistent) +++ ucos-ii/2.91/ram.ld (revision 471) @@ -0,0 +1,75 @@ +MEMORY + { + vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000 + ram : ORIGIN = 0x00002000, LENGTH = 0x00200000 - 0x00002000 + } + +SECTIONS +{ + .vectors : + { + *(.vectors) + } > vectors + + .text : { + _stext = .; + *(.text) + _etext = .; + __CTOR_LIST__ = .; + LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) + *(.ctors) + LONG(0) + __CTOR_END__ = .; + __DTOR_LIST__ = .; + LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) + *(.dtors) + LONG(0) + __DTOR_END__ = .; + *(.lit) + *(.shdata) + _endtext = .; + } > ram + + .rodata : { + *(.rodata); + *(.rodata.*) + } > ram + + .shbss : + { + *(.shbss) + } > ram + + .talias : + { + } > ram + + .data : { + sdata = .; + _sdata = .; + *(.data) + edata = .; + _edata = .; + } > ram + + .bss SIZEOF(.data) + ADDR(.data) : + { + sbss = . ; + _sbss = . ; + __bss_start = ALIGN(0x8); + ___bss_start = ALIGN(0x8); + *(.bss) + *(COMMON) + end = ALIGN(0x8); + _end = ALIGN(0x8); + __end = ALIGN(0x8); + ebss = .; + _ebss = .; + } > ram + + .stack : + { + *(.stack) + _stack_addr = .; + } > ram +} Index: ucos-ii/2.91/drivers/console.c =================================================================== --- ucos-ii/2.91/drivers/console.c (nonexistent) +++ ucos-ii/2.91/drivers/console.c (revision 471) @@ -0,0 +1,178 @@ +/* + Functions to control a console + + Very basic right now. + + Author: Julius Baxter, julius@opencores.org + +*/ + +/* + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include "includes.h" + +/* ANSI escape code values */ +/* String these two together to create the control sequence indicator "ESC[" */ +/* ASCII escape value, ESC*/ +#define ESC 0x1b +/* Left square bracket '[' */ +#define CSI 0x5b + +#define PUT_CSI1(X) putc(ESC);putc(CSI);putc(X) +#define PUT_CSI2(X, Y) putc(ESC);putc(CSI);putc(X);putc(Y) + +#define ASCII_DEC_OFFSET 0x30 + +static int cWidth, cHeight; + +static void console_place_cursor(int x, int y); + +void +console_init (int width, int height) +{ + /* Save width and height */ + cWidth = width; + cHeight = height; + + console_clear(); + + /* Hide cursor - stops cursor block flickering about as the + console is updated. */ + putc(ESC);putc(CSI);putc('?');putc('2');putc('5');putc('l'); + +} + +void +console_finish (void) +{ + console_clear(); + + /* Finishing up - reset console to show cursor. */ + putc(ESC);putc(CSI);putc('?');putc('2');putc('5');putc('h'); + +} + +void +console_clear (void) +{ + /* Erase whole display */ + PUT_CSI2('2','J'); + console_place_cursor(1,1); +} + +static void +console_place_cursor (int x, int y) +{ + /* First convert Y to a decimal string */ + /* This is a hacky way of doing it. */ + int yHunds = 0; + int yTens = 0; + int yOnes = 0; + + while (y >= 100){ + y -= 100; yHunds ++; + } + while (y >= 10){ + y -= 10; yTens ++; + } + while (y > 0){ + y --; yOnes++; + } + + /* This is a hacky way of doing it. */ + int xHunds = 0; + int xTens = 0; + int xOnes = 0; + + while (x >= 100){ + x -= 100; xHunds ++; + } + while (x >= 10){ + x -= 10; xTens ++; + } + while (x > 0){ + x --; xOnes++; + } + + /* Output control sequence */ + putc(ESC); + putc(CSI); + if (yHunds) putc(yHunds + ASCII_DEC_OFFSET); + if (yTens) putc(yTens + ASCII_DEC_OFFSET); + putc(yOnes + ASCII_DEC_OFFSET); + putc(';'); + if (xHunds) putc(xHunds + ASCII_DEC_OFFSET); + if (xTens) putc(xTens + ASCII_DEC_OFFSET); + putc(xOnes + ASCII_DEC_OFFSET); + putc('f'); +} + +void +console_puts (int x, int y, char* str) +{ + int i; + OS_CPU_SR cpu_sr; + + if ((y >= cHeight) || (x >= cWidth)) + return; /* Nothing to do, out of our range */ + + /* Ensure this output doesn't get interrupted, as stuff will be spewed + out to random places if the console control sequences are interrupted + */ + + OS_ENTER_CRITICAL() + + console_place_cursor(x, y); + + /* Print string contents, don't overflow line, + and don't handle wrapping.*/ + while((str[i]!=0) && (i+y < cWidth)) + putc(str[i++]); + + /* Return cursor to 1,1 */ + console_place_cursor(1,1); + + OS_EXIT_CRITICAL() + +} + + +void +console_putc (int x, int y, char c) +{ + OS_CPU_SR cpu_sr; + + if ((y >= cHeight) || (x >= cWidth)) + return; /* Nothing to do, out of our range */ + + /* Ensure this output doesn't get interrupted, as stuff will be spewed + out to random places if the console control sequences are interrupted + */ + + OS_ENTER_CRITICAL() + + console_place_cursor(x, y); + + putc(c); + + /* Return cursor to 1,1 */ + console_place_cursor(1,1); + + OS_EXIT_CRITICAL() + +} + Index: ucos-ii/2.91/drivers/uart.c =================================================================== --- ucos-ii/2.91/drivers/uart.c (nonexistent) +++ ucos-ii/2.91/drivers/uart.c (revision 471) @@ -0,0 +1,88 @@ +#include "includes.h" + +#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) + +#define WAIT_FOR_XMITR \ + do { \ + lsr = REG8(UART_BASE + UART_LSR); \ + } while ((lsr & BOTH_EMPTY) != BOTH_EMPTY) + +#define WAIT_FOR_THRE \ + do { \ + lsr = REG8(UART_BASE + UART_LSR); \ + } while ((lsr & UART_LSR_THRE) != UART_LSR_THRE) + +#define CHECK_FOR_CHAR (REG8(UART_BASE + UART_LSR) & UART_LSR_DR) + +#define WAIT_FOR_CHAR \ + do { \ + lsr = REG8(UART_BASE + UART_LSR); \ + } while ((lsr & UART_LSR_DR) != UART_LSR_DR) + +#define UART_TX_BUFF_LEN 32 +#define UART_TX_BUFF_MASK (UART_TX_BUFF_LEN -1) + +char tx_buff[UART_TX_BUFF_LEN]; +volatile int tx_level, rx_level; + +void uart_init(void) +{ + int divisor; + float float_divisor; + + /* Reset receiver and transmiter */ + REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14; + + /* Disable all interrupts */ + REG8(UART_BASE + UART_IER) = 0x00; + + /* Set 8 bit char, 1 stop bit, no parity */ + REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY); + + /* Set baud rate */ + float_divisor = (float) IN_CLK/(16 * UART_BAUD_RATE); + float_divisor += 0.50f; // Ensure round up + divisor = (int) float_divisor; + + REG8(UART_BASE + UART_LCR) |= UART_LCR_DLAB; + REG8(UART_BASE + UART_DLL) = divisor & 0x000000ff; + REG8(UART_BASE + UART_DLM) = (divisor >> 8) & 0x000000ff; + REG8(UART_BASE + UART_LCR) &= ~(UART_LCR_DLAB); + return; +} + +void uart_putc(char c) +{ + unsigned char lsr; + + WAIT_FOR_THRE; + REG8(UART_BASE + UART_TX) = c; + if(c == '\n') { + WAIT_FOR_THRE; + REG8(UART_BASE + UART_TX) = '\r'; + } + WAIT_FOR_XMITR; +} + +char uart_getc(void) +{ + unsigned char lsr; + char c; + + WAIT_FOR_CHAR; + c = REG8(UART_BASE + UART_RX); + return c; +} + +char uart_testc(void) +{ + if((REG8(UART_BASE + UART_LSR) & UART_LSR_DR) == UART_LSR_DR) + return REG8(UART_BASE + UART_RX); + else + return 0; +} + +int uart_check_for_char(void) +{ + return CHECK_FOR_CHAR; +} Index: ucos-ii/2.91/drivers/Makefile =================================================================== --- ucos-ii/2.91/drivers/Makefile (nonexistent) +++ ucos-ii/2.91/drivers/Makefile (revision 471) @@ -0,0 +1,12 @@ + +LIB = drivers.o +OBJS = uart.o console.o + +all: $(LIB) + +$(LIB): $(OBJS) + $(LD) -r -o $@ $(OBJS) + +.depend: Makefile $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ +sinclude .depend

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