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URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

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    /openrisc/trunk
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Rev 111 → Rev 112

/or1ksim/cpu/or32/insnset.c
35,18 → 35,43
temp3 = (orreg_t)PARAM1;
temp1 = temp2 + temp3;
SET_PARAM0(temp1);
SET_OV_FLAG_FN (temp1);
if (ARITH_SET_FLAG) {
if(!temp1)
cpu_state.sprs[SPR_SR] |= SPR_SR_F;
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_F;
}
 
/* Set overflow if two negative values gave a positive sum, or if two
positive values gave a negative sum. Otherwise clear it */
if ((((long int) temp2 < 0) &&
((long int) temp3 < 0) &&
((long int) temp1 >= 0)) ||
(((long int) temp2 >= 0) &&
((long int) temp3 >= 0) &&
((long int) temp1 < 0)))
{
cpu_state.sprs[SPR_SR] |= SPR_SR_OV;
}
else
{
cpu_state.sprs[SPR_SR] &= ~SPR_SR_OV;
}
 
/* Set the carry flag if (as unsigned values) the result is smaller than
either operand (if it smaller than one, it will be smaller than both, so
we need only test one). */
if ((uorreg_t) temp1 < (uorreg_t) temp2)
cpu_state.sprs[SPR_SR] |= SPR_SR_CY;
{
cpu_state.sprs[SPR_SR] |= SPR_SR_CY;
}
else
cpu_state.sprs[SPR_SR] &= ~SPR_SR_CY;
{
cpu_state.sprs[SPR_SR] &= ~SPR_SR_CY;
}
 
/* Trigger a range exception if the overflow flag is set and the SR[OVE] bit
is set. */
if (((cpu_state.sprs[SPR_SR] & SPR_SR_OVE) == SPR_SR_OVE) &&
((cpu_state.sprs[SPR_SR] & SPR_SR_OV) == SPR_SR_OV))
{
except_handle (EXCEPT_RANGE, cpu_state.pc);
}
 
temp4 = temp1;
if (temp4 == temp1)
or1k_mstats.byteadd++;
213,7 → 238,7
if (temp3)
temp1 = temp2 / temp3;
else {
mtspr (SPR_SR, SPR_SR_CY | mfspr (SPR_SR)); /* Div by zero sets carry */
cpu_state.sprs[SPR_SR] |= SPR_SR_CY; /* Div by zero sets carry */
except_handle (EXCEPT_RANGE, cpu_state.pc);
return;
}
228,7 → 253,7
if (temp3)
temp1 = temp2 / temp3;
else {
mtspr (SPR_SR, SPR_SR_CY | mfspr (SPR_SR)); /* Div by zero sets carry */
cpu_state.sprs[SPR_SR] |= SPR_SR_CY; /* Div by zero sets carry */
except_handle(EXCEPT_RANGE, cpu_state.pc);
return;
}
/or1ksim/cpu/common/execute.h
39,16 → 39,12
 
#define CURINSN(INSN) (strcmp(cur->insn, (INSN)) == 0)
 
/*! Sets a new SPR_SR_OV value, based on next register value */
#if SET_OV_FLAG
#define SET_OV_FLAG_FN(value) \
/*! Sets a new SPR_SR_OV value, based on a three register operation. */
#define SET_OV_FLAG_FN(value) \
if((value) & 0x80000000) \
cpu_state.sprs[SPR_SR] |= SPR_SR_OV; \
else \
cpu_state.sprs[SPR_SR] &= ~SPR_SR_OV
#else
#define SET_OV_FLAG_FN(value)
#endif
 
/*!The main structure holding the current execution state of the CPU
 
/or1ksim/configure.ac
28,7 → 28,7
 
# Use a full version number (x.y.z, possibly with "rcn" as a suffix) when
# preparing a release, otherwise use a the date version (yyyy-mm-dd).
AC_INIT([or1ksim], [2010-06-06], [openrisc@opencores.org])
AC_INIT([or1ksim], [2010-06-09], [openrisc@opencores.org])
AC_CONFIG_MACRO_DIR([m4])
 
# Generically use extensions such as _GNU_SOURCE if available.
264,17 → 264,6
])
AC_MSG_RESULT(${enable_range_stats-no})
 
set_ov_flag="0"
AC_MSG_CHECKING(whether instructions set overflow flag)
AC_ARG_ENABLE(ov_flag,
[ --enable-ov-flag Whether instructions set overflow flag.], [
case "$enableval" in
no) set_ov_flag="0" ;;
yes) set_ov_flag="1" ;;
esac
])
AC_MSG_RESULT(${enable_ov_flag-no})
 
set_arith_flag="0"
AC_MSG_CHECKING(whether arithmethic instructions set flag)
AC_ARG_ENABLE(arith_flag,
302,7 → 291,6
AC_SUBST(DEBUGFLAGS)
 
AC_DEFINE_UNQUOTED(RAW_RANGE_STATS, $raw_range_stats, [ Specifies, whether we should do register accesses over time analysis. Simple execution must be enabled!])
AC_DEFINE_UNQUOTED(SET_OV_FLAG, $set_ov_flag, [ Whether instructions set overflow flag])
AC_DEFINE_UNQUOTED(ARITH_SET_FLAG, $set_arith_flag, [Whether arithmethic instructions set flag on zero])
AC_DEFINE_UNQUOTED(HAVE_ETH_PHY, $eth_phy, [Whether we have ethernet PHY support])
AC_DEFINE_UNQUOTED(SIMPLE_EXECUTION, $execution == 0, [Whether we are building with simple execution module])
/or1ksim/doc/or1ksim.info
1,5 → 1,5
This is ../../or1ksim/doc/or1ksim.info, produced by makeinfo version
4.13 from ../../or1ksim/doc/or1ksim.texi.
This is ../../doc/or1ksim.info, produced by makeinfo version 4.13 from
../../doc/or1ksim.texi.
 
INFO-DIR-SECTION Embedded development
START-INFO-DIR-ENTRY
64,7 → 64,7
Unpack the software and create a _separate_ directory in which to build
it:
 
tar jxf or1ksim-2010-06-06.tar.bz2
tar jxf or1ksim-2010-06-09.tar.bz2
mkdir builddir_or1ksim
cd builddir_or1ksim
 
81,7 → 81,7
OpenRISC 1000 32-bit architecture. If this argument is omitted, it will
default to OpenRISC 1000 32-bit with a warning
 
../or1ksim-2010-06-06/configure --target=or32-uclinux ...
../or1ksim-2010-06-09/configure --target=or32-uclinux ...
 
There are several other options available, many of which are standard
to GNU `configure' scripts. Use `configure --help' to see all the
141,29 → 141,6
analyse register access over time. The default is for this to be
disabled.
 
`--enable-ov-flag'
`--disable-ov-flag'
If enabled, this option causes instructions to set the overflow
flag. The instructions affected by this are `l.add', `l.addc',
`l.addi', `l.and', `l.andi', `l.div', `l.divu', `l.mul', `l.muli',
`l.or', `l.ori', `l.sll', `l.slli', `l.srl', `l.srli', `l.sra',
`l.srai', `l.sub', `l.xor' and `l.xori'.
 
The default is for this to be disabled.
 
Caution: This appears a very dangerous option, to the extent
of arguably being a bug. Whether or not flags are set is
part of the OpenRISC 1000 architectural specification.
Within the above list, the arithmetic instructions (`l.add',
`l.addc', `l.addi', `l.div', `l.divu', `l.mul', `l.muli' and
`l.sub'), together with `l.addic' which is missed out, set
the overflow flag. All the others (`l.and', `l.andi',
`l.or', `l.ori', `l.sll', `l.slli', `l.srl', `l.srli',
`l.sra', `l.srai', `l.xor' and `l.xori') do not.
 
Thus it is impossible to get correct behavior whichever way
this option is set.
 
`--enable-arith-flag'
`--disable-arith-flag'
If enabled, this option causes instructions to set the flag (`F'
209,6 → 186,29
wish to get the missing test(s) working.
 
 
A number of configuration flags have been removed since version 0.3.0,
because they led to invalid behavior of Or1ksim. Those removed include
 
`--enable-ov-flag'
`--disable-ov-flag'
This flag used to cause certain instructions to set the overflow
flag. If not, those instructions would not set the overflow flat.
The instructions affected by this were `l.add', `l.addc',
`l.addi', `l.and', `l.andi', `l.div', `l.divu', `l.mul', `l.muli',
`l.or', `l.ori', `l.sll', `l.slli', `l.srl', `l.srli', `l.sra',
`l.srai', `l.sub', `l.xor' and `l.xori'.
 
This guaranteed incorrect behavior. The OpenRISC 1000 architecture
specification defines which flags are set by which instructions.
 
Within the above list, the arithmetic instructions (`l.add',
`l.addc', `l.addi', `l.div', `l.divu', `l.mul', `l.muli' and
`l.sub'), together with `l.addic' which is missed out, set the
overflow flag. All the others (`l.and', `l.andi', `l.or',
`l.ori', `l.sll', `l.slli', `l.srl', `l.srli', `l.sra', `l.srai',
`l.xor' and `l.xori') do not.
 
 

File: or1ksim.info, Node: Build and Install, Next: Known Issues, Prev: Configuring the Build, Up: Installation
 
248,7 → 248,7
=============================
 
The following problems and issues are known about with Or1ksim
2010-06-06. The OpenRISC tracker may be used to see the current state
2010-06-09. The OpenRISC tracker may be used to see the current state
of these issues and to raise new problems and feature requests. It may
be found at `http://www.opencores.org/ptracker.cgi/view/or1k/398'.
 
3426,25 → 3426,25
* --debug-config: Standalone Simulator.
(line 48)
* --disable-all-tests: Configuring the Build.
(line 133)
(line 110)
* --disable-arith-flag: Configuring the Build.
(line 98)
(line 75)
* --disable-debug: Configuring the Build.
(line 126)
(line 103)
* --disable-ethphy: Configuring the Build.
(line 59)
* --disable-ov-flag: Configuring the Build.
(line 75)
(line 123)
* --disable-profiling: Configuring the Build.
(line 30)
* --disable-range-stats: Configuring the Build.
(line 69)
* --enable-all-tests: Configuring the Build.
(line 132)
(line 109)
* --enable-arith-flag: Configuring the Build.
(line 97)
(line 74)
* --enable-debug: Configuring the Build.
(line 125)
(line 102)
* --enable-ethphy: Configuring the Build.
(line 58)
* --enable-execution: Configuring the Build.
3452,7 → 3452,7
* --enable-mprofile: Standalone Simulator.
(line 77)
* --enable-ov-flag: Configuring the Build.
(line 74)
(line 122)
* --enable-profile: Standalone Simulator.
(line 74)
* --enable-profiling: Configuring the Build.
3524,9 → 3524,9
(line 66)
* 16550 (UART configuration): UART Configuration. (line 73)
* all tests enabled: Configuring the Build.
(line 133)
(line 110)
* Argtable2 debugging: Configuring the Build.
(line 126)
(line 103)
* ATA/ATAPI configuration: Disc Interface Configuration.
(line 6)
* ATA/ATAPI device configuration: Disc Interface Configuration.
3679,7 → 3679,7
(line 6)
* Debug Unit verification (VAPI): Verification API. (line 34)
* debugging enabled (Argtable2): Configuring the Build.
(line 126)
(line 103)
* DejaGnu board configurations: Regression Testing. (line 35)
* DejaGnu configuration: Regression Testing. (line 21)
* DejaGNU tests directories: Regression Testing. (line 50)
3806,7 → 3806,7
* firmware (ATA/ATAPI device configuration): Disc Interface Configuration.
(line 117)
* flag setting by instructions: Configuring the Build.
(line 98)
(line 75)
* floating point multiply and add: Known Issues. (line 56)
* floating point support: Known Issues. (line 42)
* frame buffer configuration: Frame Buffer Configuration.
3962,7 → 3962,7
* or1ksim_set_time_point: Simulator Library. (line 73)
* output rediretion: Concepts. (line 7)
* overflow flag setting by instructions: Configuring the Build.
(line 75)
(line 123)
* packet (ATA/ATAPI device configuration): Disc Interface Configuration.
(line 113)
* pagesize (MMU configuration): Memory Management Configuration.
4216,7 → 4216,7
* test README: Regression Testing. (line 32)
* testing: Regression Testing. (line 6)
* tests, all enabled.: Configuring the Build.
(line 133)
(line 110)
* timings_file (CUC configuration): CUC Configuration. (line 46)
* timings_fn (CUC configuration - deprecated): CUC Configuration.
(line 46)
4294,55 → 4294,55
 

Tag Table:
Node: Top830
Node: Installation1240
Node: Preparation1487
Node: Configuring the Build1782
Node: Build and Install7506
Node: Known Issues8352
Node: Usage11414
Node: Standalone Simulator11628
Node: Profiling Utility14531
Node: Memory Profiling Utility15441
Node: Simulator Library16806
Node: Configuration24584
Node: Configuration File Format25193
Node: Configuration File Preprocessing25485
Node: Configuration File Syntax25856
Node: Simulator Configuration28641
Node: Simulator Behavior28932
Node: Verification API Configuration32976
Node: CUC Configuration34916
Node: Core OpenRISC Configuration36833
Node: CPU Configuration37335
Node: Memory Configuration41453
Node: Memory Management Configuration47911
Node: Cache Configuration50288
Node: Interrupt Configuration52674
Node: Power Management Configuration53410
Node: Branch Prediction Configuration54687
Node: Debug Interface Configuration56047
Node: Peripheral Configuration60267
Node: Memory Controller Configuration60893
Node: UART Configuration64307
Node: DMA Configuration67826
Node: Ethernet Configuration69693
Node: GPIO Configuration73669
Node: Display Interface Configuration75302
Node: Frame Buffer Configuration77611
Node: Keyboard Configuration79475
Node: Disc Interface Configuration81713
Node: Generic Peripheral Configuration86656
Node: Interactive Command Line88951
Node: Verification API95925
Node: Code Internals100355
Node: Coding Conventions100938
Node: Global Data Structures105365
Node: Concepts108022
Ref: Output Redirection108167
Node: Internal Debugging108706
Node: Regression Testing109230
Node: GNU Free Documentation License113025
Node: Index135432
Node: Top814
Node: Installation1224
Node: Preparation1471
Node: Configuring the Build1766
Node: Build and Install7464
Node: Known Issues8310
Node: Usage11372
Node: Standalone Simulator11586
Node: Profiling Utility14489
Node: Memory Profiling Utility15399
Node: Simulator Library16764
Node: Configuration24542
Node: Configuration File Format25151
Node: Configuration File Preprocessing25443
Node: Configuration File Syntax25814
Node: Simulator Configuration28599
Node: Simulator Behavior28890
Node: Verification API Configuration32934
Node: CUC Configuration34874
Node: Core OpenRISC Configuration36791
Node: CPU Configuration37293
Node: Memory Configuration41411
Node: Memory Management Configuration47869
Node: Cache Configuration50246
Node: Interrupt Configuration52632
Node: Power Management Configuration53368
Node: Branch Prediction Configuration54645
Node: Debug Interface Configuration56005
Node: Peripheral Configuration60225
Node: Memory Controller Configuration60851
Node: UART Configuration64265
Node: DMA Configuration67784
Node: Ethernet Configuration69651
Node: GPIO Configuration73627
Node: Display Interface Configuration75260
Node: Frame Buffer Configuration77569
Node: Keyboard Configuration79433
Node: Disc Interface Configuration81671
Node: Generic Peripheral Configuration86614
Node: Interactive Command Line88909
Node: Verification API95883
Node: Code Internals100313
Node: Coding Conventions100896
Node: Global Data Structures105323
Node: Concepts107980
Ref: Output Redirection108125
Node: Internal Debugging108664
Node: Regression Testing109188
Node: GNU Free Documentation License112983
Node: Index135390

End Tag Table
/or1ksim/doc/or1ksim.texi
178,37 → 178,6
If enabled, this option allows statistics to be collected to analyse
register access over time. The default is for this to be disabled.
 
@item --enable-ov-flag
@cindex @code{--enable-ov-flag}
@itemx --disable-ov-flag
@cindex @code{--disable-ov-flag}
@cindex overflow flag setting by instructions
If enabled, this option causes instructions to set the overflow
flag. The instructions affected by this are @code{l.add},
@code{l.addc}, @code{l.addi}, @code{l.and}, @code{l.andi},
@code{l.div}, @code{l.divu}, @code{l.mul}, @code{l.muli}, @code{l.or},
@code{l.ori}, @code{l.sll}, @code{l.slli}, @code{l.srl},
@code{l.srli}, @code{l.sra}, @code{l.srai}, @code{l.sub}, @code{l.xor}
and @code{l.xori}.
 
The default is for this to be disabled.
 
@quotation Caution
This appears a very dangerous option, to the extent of arguably being
a bug. Whether or not flags are set is part of the OpenRISC 1000
architectural specification. Within the above list, the arithmetic
instructions (@code{l.add}, @code{l.addc}, @code{l.addi},
@code{l.div}, @code{l.divu}, @code{l.mul}, @code{l.muli} and
@code{l.sub}), together with @code{l.addic} which is missed out, set
the overflow flag. All the others (@code{l.and}, @code{l.andi},
@code{l.or}, @code{l.ori}, @code{l.sll}, @code{l.slli}, @code{l.srl},
@code{l.srli}, @code{l.sra}, @code{l.srai}, @code{l.xor} and
@code{l.xori}) do not.
 
Thus it is impossible to get correct behavior whichever way this option is
set.
@end quotation
 
@item --enable-arith-flag
@cindex @code{--enable-arith-flag}
@itemx --disable-arith-flag
266,6 → 235,37
 
@end table
 
A number of configuration flags have been removed since version 0.3.0,
because they led to invalid behavior of Or1ksim. Those removed include
 
@table @code
 
@item --enable-ov-flag
@cindex @code{--enable-ov-flag}
@itemx --disable-ov-flag
@cindex @code{--disable-ov-flag}
@cindex overflow flag setting by instructions
This flag used to cause certain instructions to set the overflow flag.
If not, those instructions would not set the overflow flat. The
instructions affected by this were @code{l.add}, @code{l.addc},
@code{l.addi}, @code{l.and}, @code{l.andi}, @code{l.div}, @code{l.divu},
@code{l.mul}, @code{l.muli}, @code{l.or}, @code{l.ori}, @code{l.sll},
@code{l.slli}, @code{l.srl}, @code{l.srli}, @code{l.sra}, @code{l.srai},
@code{l.sub}, @code{l.xor} and @code{l.xori}.
 
This guaranteed incorrect behavior. The OpenRISC 1000 architecture
specification defines which flags are set by which instructions.
 
Within the above list, the arithmetic instructions (@code{l.add},
@code{l.addc}, @code{l.addi}, @code{l.div}, @code{l.divu}, @code{l.mul},
@code{l.muli} and @code{l.sub}), together with @code{l.addic} which is
missed out, set the overflow flag. All the others (@code{l.and},
@code{l.andi}, @code{l.or}, @code{l.ori}, @code{l.sll}, @code{l.slli},
@code{l.srl}, @code{l.srli}, @code{l.sra}, @code{l.srai}, @code{l.xor}
and @code{l.xori}) do not.
 
@end table
 
@node Build and Install
@section Building and Installing
Build the tool with:
/or1ksim/doc/version.texi
1,4 → 1,4
@set UPDATED 8 June 2010
@set UPDATED 9 June 2010
@set UPDATED-MONTH June 2010
@set EDITION 2010-06-06
@set VERSION 2010-06-06
@set EDITION 2010-06-09
@set VERSION 2010-06-09
/or1ksim/ChangeLog
1,6 → 1,19
2010-06-09 Jeremy Bennett <jeremy.bennett@embecosm.com>
* configure: Regenerated.
* configure.ac: Version changed to current date. Removed
enable_ov_flag as option for configuration.
* peripheral/Makefile.am: mc-defines.h added to sources.
 
2010-06-08 Jeremy Bennett <jeremy.bennett@embecosm.com>
* configure: Regenerated.
* configure.ac: Version changed to current date.
* peripheral/mc.h: mc_defines.h -> mc-defines.h.
* peripherals/mc-defines.h: Renamed from mc_defines.h
 
2010-06-08 Julius Baxter <julius.baxter@orsoc.se>
* peripherals/mc.h: Moved defines to peripherals/mc_defines.h
* peripherals/mc_defines.h: Created.
 
2010-06-06 Jeremy Bennett <jeremy.bennett@embecosm.com>
* configure: Regenerated.
* configure.ac: Version changed to current date.
/or1ksim/testsuite/test-code-or1k/eth/Makefile.in
72,7 → 72,7
CONFIG_HEADER = $(top_builddir)/config.h
CONFIG_CLEAN_FILES =
CONFIG_CLEAN_VPATH_FILES =
am_eth_OBJECTS = eth-eth.$(OBJEXT)
am_eth_OBJECTS = eth.$(OBJEXT)
eth_OBJECTS = $(am_eth_OBJECTS)
eth_DEPENDENCIES = ../except/except.lo ../support/libsupport.la
eth_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
210,8 → 210,10
top_build_prefix = @top_build_prefix@
top_builddir = @top_builddir@
top_srcdir = @top_srcdir@
eth_SOURCES = eth.c
eth_CPPFLAGS = -I$(srcdir)/../../../peripheral
eth_SOURCES = eth.c \
eth.h \
fields.h
 
eth_LDFLAGS = -T$(srcdir)/../default.ld
eth_LDADD = ../except/except.lo \
../support/libsupport.la
269,7 → 271,7
distclean-compile:
-rm -f *.tab.c
 
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eth-eth.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eth.Po@am__quote@
 
.c.o:
@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
292,20 → 294,6
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(LTCOMPILE) -c -o $@ $<
 
eth-eth.o: eth.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(eth_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT eth-eth.o -MD -MP -MF $(DEPDIR)/eth-eth.Tpo -c -o eth-eth.o `test -f 'eth.c' || echo '$(srcdir)/'`eth.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/eth-eth.Tpo $(DEPDIR)/eth-eth.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='eth.c' object='eth-eth.o' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(eth_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o eth-eth.o `test -f 'eth.c' || echo '$(srcdir)/'`eth.c
 
eth-eth.obj: eth.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(eth_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT eth-eth.obj -MD -MP -MF $(DEPDIR)/eth-eth.Tpo -c -o eth-eth.obj `if test -f 'eth.c'; then $(CYGPATH_W) 'eth.c'; else $(CYGPATH_W) '$(srcdir)/eth.c'; fi`
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/eth-eth.Tpo $(DEPDIR)/eth-eth.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='eth.c' object='eth-eth.obj' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(eth_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o eth-eth.obj `if test -f 'eth.c'; then $(CYGPATH_W) 'eth.c'; else $(CYGPATH_W) '$(srcdir)/eth.c'; fi`
 
mostlyclean-libtool:
-rm -f *.lo
 
/or1ksim/testsuite/test-code-or1k/eth/Makefile.am
27,7 → 27,9
# A test program of the OR1K Ethernet
check_PROGRAMS = eth
 
eth_SOURCES = eth.c
eth_SOURCES = eth.c \
eth.h \
fields.h
 
eth_LDFLAGS = -T$(srcdir)/../default.ld
 
/or1ksim/testsuite/test-code-or1k/eth/fields.h
0,0 → 1,64
/* fields.h -- Some macros to help with bit field definitions
 
Copyright (C) 2001 by Erez Volk, erez@opencores.org
Copyright (C) 2008 Embecosm Limited
 
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
 
This program is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
 
You should have received a copy of the GNU General Public License along
with this program. If not, see <http://www.gnu.org/licenses/>. */
 
/* This program is commented throughout in a fashion suitable for processing
with Doxygen. */
 
 
#ifndef FIELDS__H
#define FIELDS__H
 
 
/* Macros to get/set a field in a register
* Example:
* unsigned long done, priority, channel_csr;
*
* priority = GET_FIELD( channel_csr, DMA_CH_CSR, PRIORITY );
* SET_FIELD( channel_csr, DMA_CH_CSR, PRIORITY, priority );
*
* done = TEST_FLAG( channel_csr, DMA_CH_CSR, DONE );
* SET_FLAG( channel_csr, DMA_CH_CSR, DONE );
* CLEAR_FLAG( channel_csr, DMA_CH_CSR, DONE );
* ASSIGN_FLAG( channel_csr, DMA_CH_CSR, done );
*
* For each field, we then define e.g.
* #define DMA_CH_CSR_PRIORITY_OFFSET 13
* #define DMA_CH_CSR_PRIORITY_WIDTH 3 // not needed for flags, which always have width = 1
*/
 
#define FLAG_SHIFT(reg_name,flag_name) (reg_name##_##flag_name##_OFFSET)
#define FLAG_MASK(reg_name,flag_name) (1LU << reg_name##_##flag_name##_OFFSET)
 
#define TEST_FLAG(reg_value,reg_name,flag_name) (((reg_value ) >> reg_name##_##flag_name##_OFFSET) & 1LU)
#define SET_FLAG(reg_value,reg_name,flag_name) { (reg_value) |= 1LU << reg_name##_##flag_name##_OFFSET; }
#define CLEAR_FLAG(reg_value,reg_name,flag_name) { (reg_value) &= ~(1LU << reg_name##_##flag_name##_OFFSET); }
#define ASSIGN_FLAG(reg_value,reg_name,flag_name,flag_value) { \
(reg_value) = flag_value ? ((reg_value) | (1LU << reg_name##_##flag_name##_OFFSET)) : ((reg_value) & ~(1LU << reg_name##_##flag_name##_OFFSET)); }
 
#define FIELD_SHIFT(reg_name,field_name) (reg_name##_##field_name##_OFFSET)
#define FIELD_MASK(reg_name,field_name) ((~(~0LU << reg_name##_##field_name##_WIDTH)) << reg_name##_##field_name##_OFFSET)
 
#define GET_FIELD(reg_value,reg_name,field_name) (((reg_value) >> reg_name##_##field_name##_OFFSET) & (~(~0LU << reg_name##_##field_name##_WIDTH)))
#define SET_FIELD(reg_value,reg_name,field_name,field_value) { \
(reg_value) = ((reg_value) & ~((~(~0LU << reg_name##_##field_name##_WIDTH)) << reg_name##_##field_name##_OFFSET)) | ((field_value) << reg_name##_##field_name##_OFFSET); }
 
#endif /* FIELDS__H */
or1ksim/testsuite/test-code-or1k/eth/fields.h Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: or1ksim/testsuite/test-code-or1k/mc-dram/mc-dram.c =================================================================== --- or1ksim/testsuite/test-code-or1k/mc-dram/mc-dram.c (revision 111) +++ or1ksim/testsuite/test-code-or1k/mc-dram/mc-dram.c (revision 112) @@ -31,7 +31,7 @@ #include "mc-dram.h" #include "config.h" -#include "mc_defines.h" +#include "mc-defines.h" #include "gpio.h" #include "fields.h"
/or1ksim/testsuite/test-code-or1k/mc-ssram/mc-ssram.c
31,7 → 31,7
#include "mc-ssram.h"
 
#include "config.h"
#include "mc_defines.h"
#include "mc-defines.h"
#include "gpio.h"
#include "fields.h"
 
/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S
0,0 → 1,352
/* is-add-test.S. l.add, l.addc, l.addi and l.addic instruction test of Or1ksim
*
* Copyright (C) 1999-2006 OpenCores
* Copyright (C) 2010 Embecosm Limited
*
* Contributors various OpenCores participants
* Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
*
* This file is part of OpenRISC 1000 Architectural Simulator.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 3 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along
* with this program. If not, see <http: www.gnu.org/licenses/>.
*/
 
/* ----------------------------------------------------------------------------
* Coding conventions
*
* A simple rising stack is provided starting at _stack and pointed to by
* r1. r1 points to the next free word. Only 32-bit registers may be pushed
* onto the stack.
*
* Local labels up to 49 are reserved for macros. Each is used only once in
* all macros. You can get in a serious mess if you get local label clashing
* in macros.
*
* Arguments to functions are passed in r3 through r8.
* r9 is the link (return address)
* r11 is for returning results
*
* Only r1 and r2 are preserved across function calls. It is up to the callee
* to save any other registers required.
* ------------------------------------------------------------------------- */
 
/* ----------------------------------------------------------------------------
* Test coverage
*
* The l.add, l.addc, l.addi and l.addic instructions should set the carry and
* overflow flags.
*
* In addition the l.addc and l.addic instructions should add in the carry
* bit.
*
* Problems in this area were reported in Bug 1771. Having fixed the problem,
* this is (in good software engineering style), a regression test to go with
* the fix.
*
* This is not a comprehensive test of any instruction (yet).
*
* Of course what is really needed is a comprehensive instruction test...
* ------------------------------------------------------------------------- */
 
 
#include "inst-set-test.h"
 
.section .text
.global _start
_start:
 
/* ----------------------------------------------------------------------------
* Test of add signed, l.add
* ------------------------------------------------------------------------- */
_add:
LOAD_STR (r3, "l.add\n")
l.jal _puts
l.nop
 
/* Add two small positive numbers */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,1) /* Add two small positive numbers */
LOAD_CONST (r6,2)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0x00000001 + 0x00000002 = 0x00000003: ", r4, 0x00000003)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", FALSE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", FALSE)
 
/* Add two small negative numbers */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0xffffffff) /* Add two small negative numbers */
LOAD_CONST (r6,0xfffffffe)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0xffffffff + 0xfffffffe = 0xfffffffd: ", r4, 0xfffffffd)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", TRUE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", FALSE)
 
/* Add two quite large positive numbers. Should set neither the
overflow nor the carry flag. */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0x40000000) /* Add two large positive numbers */
LOAD_CONST (r6,0x3fffffff)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0x40000000 + 0x3fffffff = 0x7fffffff: ", r4, 0x7fffffff)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", FALSE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", FALSE)
 
/* Add two large positive numbers. Should set the overflow, but not
the carry flag. */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0x40000000) /* Add two large positive numbers */
LOAD_CONST (r6,0x40000000)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0x40000000 + 0x40000000 = 0x80000000: ", r4, 0x80000000)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", FALSE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", TRUE)
 
/* Add two quite large negative numbers. Should set the carry, but not
the overflow flag. flag. */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0xc0000000) /* Add two large positive numbers */
LOAD_CONST (r6,0xc0000000)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0xc0000000 + 0xc0000000 = 0x80000000: ", r4, 0x80000000)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", TRUE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", FALSE)
 
/* Add two large negative numbers. Should set both the overflow and
carry flags. */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0xbfffffff) /* Add two large negative numbers */
LOAD_CONST (r6,0xbfffffff)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0xbfffffff + 0xbfffffff = 0x7ffffffe: ", r4, 0x7ffffffe)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", TRUE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", TRUE)
 
/* Check that range exceptions are triggered */
LOAD_CONST (r2, SPR_SR_OVE) /* Set OVE */
l.mfspr r3,r0,SPR_SR
l.or r3,r3,r2
l.mtspr r0,r3,SPR_SR
LOAD_STR (r3, " OVE flag set\n")
l.jal _puts
l.nop
 
/* Check that an overflow alone causes a RANGE Exception. */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0x40000000) /* Add two large positive numbers */
LOAD_CONST (r6,0x40000000)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0x40000000 + 0x40000000 = 0x80000000: ", r4, 0x80000000)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", FALSE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", TRUE)
 
/* Check that a carry alone does not cause a RANGE Exception. */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0xffffffff) /* Add two small negative numbers */
LOAD_CONST (r6,0xfffffffe)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0xffffffff + 0xfffffffe = 0xfffffffd: ", r4, 0xfffffffd)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", TRUE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", FALSE)
 
/* Check that carry and overflow together cause an exception. */
LOAD_CONST (r2, ~(SPR_SR_CY | SPR_SR_OV)) /* Clear flags */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
 
LOAD_CONST (r5,0xbfffffff) /* Add two large negative numbers */
LOAD_CONST (r6,0xbfffffff)
l.add r4,r5,r6
l.mfspr r2,r0,SPR_SR /* So we can examine the carry flag */
PUSH (r2)
CHECK_RES ("0xbfffffff + 0xbfffffff = 0x7ffffffe: ", r4, 0x7ffffffe)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_CY) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- carry flag set: ", TRUE)
 
POP(r2) /* Retrieve SR */
PUSH(r2)
LOAD_CONST (r4, SPR_SR_OV) /* The carry bit */
l.and r2,r2,r4
l.sfeq r2,r4
CHECK_FLAG ("- overflow flag set: ", TRUE)
 
/* Finished checking range exceptions */
LOAD_CONST (r2, ~SPR_SR_OVE) /* Clear OVE */
l.mfspr r3,r0,SPR_SR
l.and r3,r3,r2
l.mtspr r0,r3,SPR_SR
LOAD_STR (r3, " OVE flag cleared\n")
l.jal _puts
l.nop
 
/* ----------------------------------------------------------------------------
* All done
* ------------------------------------------------------------------------- */
_exit:
LOAD_STR (r3, "Test completed\n")
l.jal _puts
l.nop
 
TEST_EXIT
or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property Index: or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in =================================================================== --- or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in (revision 111) +++ or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.in (revision 112) @@ -58,8 +58,8 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ -check_PROGRAMS = is-div-test$(EXEEXT) is-lws-test$(EXEEXT) \ - $(am__EXEEXT_1) +check_PROGRAMS = is-add-test$(EXEEXT) is-div-test$(EXEEXT) \ + is-lws-test$(EXEEXT) $(am__EXEEXT_1) subdir = inst-set-test DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -84,6 +84,12 @@ inst_set_test_old_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(inst_set_test_old_LDFLAGS) $(LDFLAGS) -o $@ +am_is_add_test_OBJECTS = is-add-test.$(OBJEXT) +is_add_test_OBJECTS = $(am_is_add_test_OBJECTS) +is_add_test_DEPENDENCIES = inst-set-test.lo +is_add_test_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ + $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ + $(is_add_test_LDFLAGS) $(LDFLAGS) -o $@ am_is_div_test_OBJECTS = is-div-test.$(OBJEXT) is_div_test_OBJECTS = $(am_is_div_test_OBJECTS) is_div_test_DEPENDENCIES = inst-set-test.lo @@ -115,10 +121,11 @@ --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ $(LDFLAGS) -o $@ SOURCES = $(libinst_set_test_la_SOURCES) $(inst_set_test_old_SOURCES) \ + $(is_add_test_SOURCES) $(is_div_test_SOURCES) \ + $(is_lws_test_SOURCES) +DIST_SOURCES = $(libinst_set_test_la_SOURCES) \ + $(inst_set_test_old_SOURCES) $(is_add_test_SOURCES) \ $(is_div_test_SOURCES) $(is_lws_test_SOURCES) -DIST_SOURCES = $(libinst_set_test_la_SOURCES) \ - $(inst_set_test_old_SOURCES) $(is_div_test_SOURCES) \ - $(is_lws_test_SOURCES) ETAGS = etags CTAGS = ctags DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) @@ -240,7 +247,7 @@ # Tests of the instruction set. Broken out into separate tests, to avoid them # getting too large. The original instruction set test is still here, but not # built by default. -EXTRA_DIST = inst-set.ld +EXTRA_DIST = inst-set-test.ld @BUILD_ALL_TESTS_FALSE@INST_SET_TEST_OLD = @BUILD_ALL_TESTS_TRUE@INST_SET_TEST_OLD = inst-set-test-old @@ -249,10 +256,19 @@ libinst_set_test_la_SOURCES = inst-set-test.S # The new instruction set tests. -is_div_test_SOURCES = is-div-test.S +is_add_test_SOURCES = inst-set-test.h \ + is-add-test.S + +is_add_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld +is_add_test_LDADD = inst-set-test.lo +is_div_test_SOURCES = inst-set-test.h \ + is-div-test.S + is_div_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld is_div_test_LDADD = inst-set-test.lo -is_lws_test_SOURCES = is-lws-test.S +is_lws_test_SOURCES = inst-set-test.h \ + is-lws-test.S + is_lws_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld is_lws_test_LDADD = inst-set-test.lo @@ -319,6 +335,9 @@ inst-set-test-old$(EXEEXT): $(inst_set_test_old_OBJECTS) $(inst_set_test_old_DEPENDENCIES) @rm -f inst-set-test-old$(EXEEXT) $(inst_set_test_old_LINK) $(inst_set_test_old_OBJECTS) $(inst_set_test_old_LDADD) $(LIBS) +is-add-test$(EXEEXT): $(is_add_test_OBJECTS) $(is_add_test_DEPENDENCIES) + @rm -f is-add-test$(EXEEXT) + $(is_add_test_LINK) $(is_add_test_OBJECTS) $(is_add_test_LDADD) $(LIBS) is-div-test$(EXEEXT): $(is_div_test_OBJECTS) $(is_div_test_DEPENDENCIES) @rm -f is-div-test$(EXEEXT) $(is_div_test_LINK) $(is_div_test_OBJECTS) $(is_div_test_LDADD) $(LIBS) @@ -334,6 +353,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/inst-set-test-old.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/inst-set-test.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/is-add-test.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/is-div-test.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/is-lws-test.Po@am__quote@
/or1ksim/testsuite/test-code-or1k/inst-set-test/Makefile.am
27,7 → 27,7
# Tests of the instruction set. Broken out into separate tests, to avoid them
# getting too large. The original instruction set test is still here, but not
# built by default.
EXTRA_DIST = inst-set.ld
EXTRA_DIST = inst-set-test.ld
 
if BUILD_ALL_TESTS
INST_SET_TEST_OLD = inst-set-test-old
41,16 → 41,24
libinst_set_test_la_SOURCES = inst-set-test.S
 
# The test programs
check_PROGRAMS = is-div-test \
check_PROGRAMS = is-add-test \
is-div-test \
is-lws-test \
$(INST_SET_TEST_OLD)
 
# The new instruction set tests.
is_div_test_SOURCES = is-div-test.S
is_add_test_SOURCES = inst-set-test.h \
is-add-test.S
is_add_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld
is_add_test_LDADD = inst-set-test.lo
 
is_div_test_SOURCES = inst-set-test.h \
is-div-test.S
is_div_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld
is_div_test_LDADD = inst-set-test.lo
 
is_lws_test_SOURCES = is-lws-test.S
is_lws_test_SOURCES = inst-set-test.h \
is-lws-test.S
is_lws_test_LDFLAGS = -T$(srcdir)/inst-set-test.ld
is_lws_test_LDADD = inst-set-test.lo
 
/or1ksim/testsuite/test-code-or1k/ChangeLog
1,3 → 1,14
2010-06-09 Jeremy Bennett <jeremy.bennett@embecosm.com>
* inst-set-test/is-add-test.S: Created.
* inst-set-test/Makefile.am: Updated for new tests
* inst-set-test/Makefile.in: Regenerated.
 
2010-06-08 Jeremy Bennett <jeremy.bennett@embecosm.com>
* mc-sync/mc-sync.c: mc_defines.h -> mc-defines.h.
* mc-ssram/mc-ssram.c: mc_defines.h -> mc-defines.h.
* mc-dram/mc-dram.c: mc_defines.h -> mc-defines.h.
* mc-async/mc-async.c: mc_defines.h -> mc-defines.h.
 
2010-06-08 Julius Baxter <julius.baxter@orsoc.se>
* eth/eth.h: Created from ethernet peripheral's header.
* eth/Makefile.am: Removed eth_CPPFLAGS.
5,6 → 16,7
* mc-ssram/mc-ssram.c: Changed include of mc.h to mc_defines.h
* mc-dram/mc-dram.c: Changed include of mc.h to mc_defines.h
* mc-async/mc-async.c: Changed include of mc.h to mc_defines.h
 
2010-06-06 Jeremy Bennett <jeremy.bennett@embecosm.com>
* configure: Regenerated.
* configure.ac: Removed creation of lws-test makefile.
16,6 → 28,7
* inst-set-test/inst-set-test.h: Created using macros from
lws-test/lws-test.S.
* inst-set-test/Makefile.am: Updated for new tests
* inst-set-test/Makefile.in: Regenerated.
* inst-set-test/is-lws-test.S: Created from lws-test/lws-test.S
* lws-test: Directory deleted.
* lws-test/lws-test.S: Deleted.
/or1ksim/testsuite/test-code-or1k/mc-sync/mc-sync.c
31,7 → 31,7
#include "mc-sync.h"
 
#include "config.h"
#include "mc_defines.h"
#include "mc-defines.h"
#include "gpio.h"
#include "fields.h"
 
/or1ksim/testsuite/test-code-or1k/mc-async/mc-async.c
31,7 → 31,7
#include "mc-async.h"
 
#include "config.h"
#include "mc_defines.h"
#include "mc-defines.h"
#include "gpio.h"
#include "fields.h"
 
/or1ksim/testsuite/or1ksim.tests/inst-set-test.exp
44,3 → 44,63
"!report(0xdeaddead);" \
"!exit(0)"] \
"inst-set-test.cfg" "inst-set-test/is-lws-test"
 
# Run the l.div and l.divu test
run_or1ksim "lws-test" \
[list "!l.div" \
"! RANGE exception" \
" - caused by: report(0xe0853309);" \
"! - SR value: report(0x00008601);" \
" 1 / 0 (with error) carry flag set: TRUE" \
"!l.divu" \
"! RANGE exception" \
" - caused by: report(0xe085330a);" \
"! - SR value: report(0x00008601);" \
" 1 / 0 (with error) carry flag set: TRUE" \
"!Test completed" \
"!report(0xdeaddead);" \
"!exit(0)"] \
"inst-set-test.cfg" "inst-set-test/is-div-test"
 
# Run the l.add, l.addc, l.addi and l.addic tests
run_or1ksim "lws-test" \
[list "!l.add" \
" 0x00000001 + 0x00000002 = 0x00000003: OK" \
" - carry flag set: FALSE" \
" - overflow flag set: FALSE" \
" 0xffffffff + 0xfffffffe = 0xfffffffd: OK" \
" - carry flag set: TRUE" \
" - overflow flag set: FALSE" \
" 0x40000000 + 0x3fffffff = 0x7fffffff: OK" \
" - carry flag set: FALSE" \
" - overflow flag set: FALSE" \
" 0x40000000 + 0x40000000 = 0x80000000: OK" \
" - carry flag set: FALSE" \
" - overflow flag set: TRUE" \
" 0xc0000000 + 0xc0000000 = 0x80000000: OK" \
" - carry flag set: TRUE" \
" - overflow flag set: FALSE" \
" 0xbfffffff + 0xbfffffff = 0x7ffffffe: OK" \
" - carry flag set: TRUE" \
" - overflow flag set: TRUE" \
"! OVE flag set" \
" RANGE exception" \
" - caused by: report(0xe0853000);" \
" - SR value: report(0x00009a01);" \
" 0x40000000 + 0x40000000 = 0x80000000: OK" \
" - carry flag set: FALSE" \
" - overflow flag set: TRUE" \
" 0xffffffff + 0xfffffffe = 0xfffffffd: OK" \
" - carry flag set: TRUE" \
" - overflow flag set: FALSE" \
" RANGE exception" \
" - caused by: report(0xe0853000);" \
" - SR value: report(0x00009e01);" \
" 0xbfffffff + 0xbfffffff = 0x7ffffffe: OK" \
" - carry flag set: TRUE" \
" - overflow flag set: TRUE" \
"! OVE flag cleared" \
"!Test completed" \
"!report(0xdeaddead);" \
"!exit(0)"] \
"inst-set-test.cfg" "inst-set-test/is-add-test"
/or1ksim/testsuite/ChangeLog
1,3 → 1,6
2010-06-09 Jeremy Bennett <jeremy.bennett@embecosm.com>
* or1ksim.tests/inst-set-test.exp: Added division and addition tests.
 
2010-06-06 Jeremy Bennett <jeremy.bennett@embecosm.com>
* or1ksim.tests/inst-set-test.cfg: Created.
* or1ksim.tests/inst-set-test.exp: Created.
/or1ksim/testsuite/README
12,8 → 12,8
Tests are provided for the standalone simulator (or1ksim) and for the library
(libsim.a).
 
At the time of writing a total of 1,063 tests compile, run and pass. That
figure is broken down into 799 tests of the standalone simulator and 264 tests
At the time of writing a total of 1,100 tests compile, run and pass. That
figure is broken down into 836 tests of the standalone simulator and 264 tests
of the library
 
Configuration and make files are provided for further test programs. These
46,7 → 46,7
Working tests
=============
 
A total of 799 tests of standalone Or1ksim:
A total of 836 tests of standalone Or1ksim:
 
basic: 8 tests of a wide range of instructions and registers.
cache: 5 tests of the Or1ksim cache modeling
66,7 → 66,8
kbdtest: 26 tests of the PS2 keyboard interface.
local-global: 1 test of C local and global variables.
inst-set-test: A collection of tests of individual instructions
is-div-test: 2 tests of tje l.div and l.divu instruction (Bug 1770).
is-add-test 33 tests of the l.add* instructions (Bugs)
is-div-test: 4 tests of the l.div and l.divu instruction (Bug 1770).
is-lws-test: 13 tests of the l.lws instruction (Bug 1767).
mem-test: 16 tests of simple memory access.
mmu: 110 tests of the MMU.
/or1ksim/peripheral/mc_defines.h File deleted
/or1ksim/peripheral/Makefile.in
269,6 → 269,7
16450.c \
dma.c \
mc.c \
mc-defines.h \
eth.c \
crc32.c \
gpio.c \
/or1ksim/peripheral/mc.h
32,7 → 32,7
 
 
/* Constants. Also used by the test harness */
#include "mc_defines.h"
#include "mc-defines.h"
 
/* Prototypes for external use */
extern void mc_done ();
/or1ksim/peripheral/mc-defines.h
0,0 → 1,114
/* mc_defines.h -- Defines for memory controller model
 
Copyright (C) 2001 by Marko Mlinar, markom@opencores.org
Copyright (C) 2008 Embecosm Limited
 
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
 
This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
 
This program is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
 
You should have received a copy of the GNU General Public License along
with this program. If not, see <http://www.gnu.org/licenses/>. */
 
/* This program is commented throughout in a fashion suitable for processing
with Doxygen. */
#ifndef MC_DEFINES__H
#define MC_DEFINES__H
 
#define N_CE 8
 
#define MC_CSR 0x00
#define MC_POC 0x04
#define MC_BA_MASK 0x08
#define MC_CSC(i) (0x10 + (i) * 8)
#define MC_TMS(i) (0x14 + (i) * 8)
 
#define MC_ADDR_SPACE (MC_CSC(N_CE))
 
/* POC register field definition */
#define MC_POC_EN_BW_OFFSET 0
#define MC_POC_EN_BW_WIDTH 2
#define MC_POC_EN_MEMTYPE_OFFSET 2
#define MC_POC_EN_MEMTYPE_WIDTH 2
 
/* CSC register field definition */
#define MC_CSC_EN_OFFSET 0
#define MC_CSC_MEMTYPE_OFFSET 1
#define MC_CSC_MEMTYPE_WIDTH 2
#define MC_CSC_BW_OFFSET 4
#define MC_CSC_BW_WIDTH 2
#define MC_CSC_MS_OFFSET 6
#define MC_CSC_MS_WIDTH 2
#define MC_CSC_WP_OFFSET 8
#define MC_CSC_BAS_OFFSET 9
#define MC_CSC_KRO_OFFSET 10
#define MC_CSC_PEN_OFFSET 11
#define MC_CSC_SEL_OFFSET 16
#define MC_CSC_SEL_WIDTH 8
 
#define MC_CSC_MEMTYPE_SDRAM 0
#define MC_CSC_MEMTYPE_SSRAM 1
#define MC_CSC_MEMTYPE_ASYNC 2
#define MC_CSC_MEMTYPE_SYNC 3
 
#define MC_CSR_VALID 0xFF000703LU
#define MC_POC_VALID 0x0000000FLU
#define MC_BA_MASK_VALID 0x000003FFLU
#define MC_CSC_VALID 0x00FF0FFFLU
#define MC_TMS_SDRAM_VALID 0x0FFF83FFLU
#define MC_TMS_SSRAM_VALID 0x00000000LU
#define MC_TMS_ASYNC_VALID 0x03FFFFFFLU
#define MC_TMS_SYNC_VALID 0x01FFFFFFLU
#define MC_TMS_VALID 0xFFFFFFFFLU /* reg test compat. */
 
/* TMS register field definition SDRAM */
#define MC_TMS_SDRAM_TRFC_OFFSET 24
#define MC_TMS_SDRAM_TRFC_WIDTH 4
#define MC_TMS_SDRAM_TRP_OFFSET 20
#define MC_TMS_SDRAM_TRP_WIDTH 4
#define MC_TMS_SDRAM_TRCD_OFFSET 17
#define MC_TMS_SDRAM_TRCD_WIDTH 4
#define MC_TMS_SDRAM_TWR_OFFSET 15
#define MC_TMS_SDRAM_TWR_WIDTH 2
#define MC_TMS_SDRAM_WBL_OFFSET 9
#define MC_TMS_SDRAM_OM_OFFSET 7
#define MC_TMS_SDRAM_OM_WIDTH 2
#define MC_TMS_SDRAM_CL_OFFSET 4
#define MC_TMS_SDRAM_CL_WIDTH 3
#define MC_TMS_SDRAM_BT_OFFSET 3
#define MC_TMS_SDRAM_BL_OFFSET 0
#define MC_TMS_SDRAM_BL_WIDTH 3
 
/* TMS register field definition ASYNC */
#define MC_TMS_ASYNC_TWWD_OFFSET 20
#define MC_TMS_ASYNC_TWWD_WIDTH 6
#define MC_TMS_ASYNC_TWD_OFFSET 16
#define MC_TMS_ASYNC_TWD_WIDTH 4
#define MC_TMS_ASYNC_TWPW_OFFSET 12
#define MC_TMS_ASYNC_TWPW_WIDTH 4
#define MC_TMS_ASYNC_TRDZ_OFFSET 8
#define MC_TMS_ASYNC_TRDZ_WIDTH 4
#define MC_TMS_ASYNC_TRDV_OFFSET 0
#define MC_TMS_ASYNC_TRDV_WIDTH 8
/* TMS register field definition SYNC */
#define MC_TMS_SYNC_TTO_OFFSET 16
#define MC_TMS_SYNC_TTO_WIDTH 9
#define MC_TMS_SYNC_TWR_OFFSET 12
#define MC_TMS_SYNC_TWR_WIDTH 4
#define MC_TMS_SYNC_TRDZ_OFFSET 8
#define MC_TMS_SYNC_TRDZ_WIDTH 4
#define MC_TMS_SYNC_TRDV_OFFSET 0
#define MC_TMS_SYNC_TRDV_WIDTH 8
 
#endif
/or1ksim/peripheral/Makefile.am
28,6 → 28,7
16450.c \
dma.c \
mc.c \
mc-defines.h \
eth.c \
crc32.c \
gpio.c \
/or1ksim/config.h.in
244,9 → 244,6
/* Define as the return type of signal handlers (`int' or `void'). */
#undef RETSIGTYPE
 
/* Whether instructions set overflow flag */
#undef SET_OV_FLAG
 
/* Whether we are building with simple execution module */
#undef SIMPLE_EXECUTION
 
/or1ksim/configure
1,7 → 1,7
#! /bin/sh
# From configure.ac Id: configure.ac 1015 2010-06-03 10:09:54Z jeremy using automake version AC_ACVERSION.
# From configure.ac Id: configure.ac 1030 2010-06-06 17:29:07Z jeremy using automake version AC_ACVERSION.
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.63 for or1ksim 2010-06-06.
# Generated by GNU Autoconf 2.63 for or1ksim 2010-06-09.
#
# Report bugs to <openrisc@opencores.org>.
#
766,8 → 766,8
# Identity of this package.
PACKAGE_NAME='or1ksim'
PACKAGE_TARNAME='or1ksim'
PACKAGE_VERSION='2010-06-06'
PACKAGE_STRING='or1ksim 2010-06-06'
PACKAGE_VERSION='2010-06-09'
PACKAGE_STRING='or1ksim 2010-06-09'
PACKAGE_BUGREPORT='openrisc@opencores.org'
 
# Factoring default headers for most tests.
963,7 → 963,6
enable_execution
enable_ethphy
enable_range_stats
enable_ov_flag
enable_arith_flag
enable_debug
'
1530,7 → 1529,7
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures or1ksim 2010-06-06 to adapt to many kinds of systems.
\`configure' configures or1ksim 2010-06-09 to adapt to many kinds of systems.
 
Usage: $0 [OPTION]... [VAR=VALUE]...
 
1601,7 → 1600,7
 
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of or1ksim 2010-06-06:";;
short | recursive ) echo "Configuration of or1ksim 2010-06-09:";;
esac
cat <<\_ACEOF
 
1620,7 → 1619,6
--enable-execution Execution style to use (simple/complex/dynamic)
--enable-ethphy compiles sim with ethernet phy support
--enable-range-stats Specifies, whether we should do register accesses over time analysis.
--enable-ov-flag Whether instructions set overflow flag.
--enable-arith-flag Whether arithmethic instructions setflag.
--enable-debug enable library debugging symbols
 
1709,7 → 1707,7
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
or1ksim configure 2010-06-06
or1ksim configure 2010-06-09
generated by GNU Autoconf 2.63
 
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
1743,7 → 1741,7
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
 
It was created by or1ksim $as_me 2010-06-06, which was
It was created by or1ksim $as_me 2010-06-09, which was
generated by GNU Autoconf 2.63. Invocation command line was
 
$ $0 $@
4556,13 → 4554,13
else
lt_cv_nm_interface="BSD nm"
echo "int some_variable = 0;" > conftest.$ac_ext
(eval echo "\"\$as_me:4559: $ac_compile\"" >&5)
(eval echo "\"\$as_me:4557: $ac_compile\"" >&5)
(eval "$ac_compile" 2>conftest.err)
cat conftest.err >&5
(eval echo "\"\$as_me:4562: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
(eval echo "\"\$as_me:4560: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
(eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
cat conftest.err >&5
(eval echo "\"\$as_me:4565: output\"" >&5)
(eval echo "\"\$as_me:4563: output\"" >&5)
cat conftest.out >&5
if $GREP 'External.*some_variable' conftest.out > /dev/null; then
lt_cv_nm_interface="MS dumpbin"
5767,7 → 5765,7
;;
*-*-irix6*)
# Find out which ABI we are using.
echo '#line 5770 "configure"' > conftest.$ac_ext
echo '#line 5768 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
7136,11 → 7134,11
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
(eval echo "\"\$as_me:7139: $lt_compile\"" >&5)
(eval echo "\"\$as_me:7137: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
echo "$as_me:7143: \$? = $ac_status" >&5
echo "$as_me:7141: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recognized
# So say no if there are warnings other than the usual output.
7475,11 → 7473,11
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
(eval echo "\"\$as_me:7478: $lt_compile\"" >&5)
(eval echo "\"\$as_me:7476: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
echo "$as_me:7482: \$? = $ac_status" >&5
echo "$as_me:7480: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recognized
# So say no if there are warnings other than the usual output.
7580,11 → 7578,11
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
(eval echo "\"\$as_me:7583: $lt_compile\"" >&5)
(eval echo "\"\$as_me:7581: $lt_compile\"" >&5)
(eval "$lt_compile" 2>out/conftest.err)
ac_status=$?
cat out/conftest.err >&5
echo "$as_me:7587: \$? = $ac_status" >&5
echo "$as_me:7585: \$? = $ac_status" >&5
if (exit $ac_status) && test -s out/conftest2.$ac_objext
then
# The compiler can only warn and ignore the option if not recognized
7635,11 → 7633,11
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
(eval echo "\"\$as_me:7638: $lt_compile\"" >&5)
(eval echo "\"\$as_me:7636: $lt_compile\"" >&5)
(eval "$lt_compile" 2>out/conftest.err)
ac_status=$?
cat out/conftest.err >&5
echo "$as_me:7642: \$? = $ac_status" >&5
echo "$as_me:7640: \$? = $ac_status" >&5
if (exit $ac_status) && test -s out/conftest2.$ac_objext
then
# The compiler can only warn and ignore the option if not recognized
10451,7 → 10449,7
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 10454 "configure"
#line 10452 "configure"
#include "confdefs.h"
 
#if HAVE_DLFCN_H
10547,7 → 10545,7
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 10550 "configure"
#line 10548 "configure"
#include "confdefs.h"
 
#if HAVE_DLFCN_H
11286,7 → 11284,7
 
# Define the identity of the package.
PACKAGE='or1ksim'
VERSION='2010-06-06'
VERSION='2010-06-09'
 
 
cat >>confdefs.h <<_ACEOF
17633,22 → 17631,6
{ $as_echo "$as_me:$LINENO: result: ${enable_range_stats-no}" >&5
$as_echo "${enable_range_stats-no}" >&6; }
 
set_ov_flag="0"
{ $as_echo "$as_me:$LINENO: checking whether instructions set overflow flag" >&5
$as_echo_n "checking whether instructions set overflow flag... " >&6; }
# Check whether --enable-ov_flag was given.
if test "${enable_ov_flag+set}" = set; then
enableval=$enable_ov_flag;
case "$enableval" in
no) set_ov_flag="0" ;;
yes) set_ov_flag="1" ;;
esac
 
fi
 
{ $as_echo "$as_me:$LINENO: result: ${enable_ov_flag-no}" >&5
$as_echo "${enable_ov_flag-no}" >&6; }
 
set_arith_flag="0"
{ $as_echo "$as_me:$LINENO: checking whether arithmethic instructions set flag" >&5
$as_echo_n "checking whether arithmethic instructions set flag... " >&6; }
17689,11 → 17671,6
 
 
cat >>confdefs.h <<_ACEOF
#define SET_OV_FLAG $set_ov_flag
_ACEOF
 
 
cat >>confdefs.h <<_ACEOF
#define ARITH_SET_FLAG $set_arith_flag
_ACEOF
 
18282,7 → 18259,7
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by or1ksim $as_me 2010-06-06, which was
This file was extended by or1ksim $as_me 2010-06-09, which was
generated by GNU Autoconf 2.63. Invocation command line was
 
CONFIG_FILES = $CONFIG_FILES
18345,7 → 18322,7
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
or1ksim config.status 2010-06-06
or1ksim config.status 2010-06-09
configured by $0, generated by GNU Autoconf 2.63,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
 

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