URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk
- from Rev 142 to Rev 143
- ↔ Reverse comparison
Rev 142 → Rev 143
/or1ksim/sim-config.h
68,6 → 68,7
|
struct |
{ |
int is_library; /* Library operation */ |
int debug; /* Simulator debugging */ |
int verbose; /* Force verbose output */ |
|
209,6 → 210,7
long long reset_instructions; |
|
int stalled; |
int halted; /* When library hits exit. */ |
int hazardwait; /* how many cycles were wasted because of hazards */ |
int supercycles; /* Superscalar cycles */ |
} cpu; |
/or1ksim/debug/rsp-server.c
50,6 → 50,8
#include "debug-unit.h" |
#include "sprs.h" |
#include "toplevel-support.h" |
#include "dcache-model.h" |
#include "icache-model.h" |
|
|
/* Define to log each packet */ |
1616,8 → 1618,13
unsigned char nyb1 = hex (symdat[off * 2]); |
unsigned char nyb2 = hex (symdat[off * 2 + 1]); |
|
// circumvent the read-only check usually done for mem accesses |
// data is in host order, because that's what set_direct32 needs |
/* circumvent the read-only check usually done for mem accesses |
data is in host order, because that's what set_direct32 needs |
|
We make sure both data and instruction cache are invalidated |
first, so that the write goes through the cache. */ |
dc_inv (addr + off); |
ic_inv (addr + off); |
set_program8 (addr + off, (nyb1 << 4) | nyb2); |
} |
} |
2200,7 → 2207,12
} |
else |
{ |
// Circumvent the read-only check usually done for mem accesses |
/* Circumvent the read-only check usually done for mem accesses |
|
We make sure both data and instruction cache are invalidated |
first, so that the write goes through the cache. */ |
dc_inv (addr + off); |
ic_inv (addr + off); |
set_program8 (addr + off, bindat[off]); |
} |
} |
2225,12 → 2237,15
rsp_remove_matchpoint (struct rsp_buf *buf) |
{ |
enum mp_type type; /* What sort of matchpoint */ |
int type_for_scanf; /* To avoid old GCC limitations */ |
unsigned long int addr; /* Address specified */ |
int len; /* Matchpoint length (not used) */ |
struct mp_entry *mpe; /* Info about the replaced instr */ |
|
/* Break out the instruction */ |
if (3 != sscanf (buf->data, "z%1d,%lx,%1d", (int *)&type, &addr, &len)) |
/* Break out the instruction. We have to use an intermediary for the type, |
since older GCCs do not like taking the address of an enum |
(dereferencing type-punned pointer). */ |
if (3 != sscanf (buf->data, "z%1d,%lx,%1d", &type_for_scanf, &addr, &len)) |
{ |
fprintf (stderr, "Warning: RSP matchpoint deletion request not " |
"recognized: ignored\n"); |
2238,6 → 2253,8
return; |
} |
|
type = type_for_scanf; |
|
/* Sanity check that the length is 4 */ |
if (4 != len) |
{ |
2254,9 → 2271,13
mpe = mp_hash_delete (type, addr); |
|
/* If the BP hasn't yet been deleted, put the original instruction |
back. Don't forget to free the hash table entry afterwards. */ |
back. Don't forget to free the hash table entry afterwards. |
|
We make sure both the instruction cache is invalidated first, so that |
the write goes through the cache. */ |
if (NULL != mpe) |
{ |
ic_inv (addr); |
set_program32 (addr, mpe->instr); |
free (mpe); |
} |
2306,11 → 2327,14
rsp_insert_matchpoint (struct rsp_buf *buf) |
{ |
enum mp_type type; /* What sort of matchpoint */ |
int type_for_scanf; /* To avoid old GCC limitations */ |
unsigned long int addr; /* Address specified */ |
int len; /* Matchpoint length (not used) */ |
|
/* Break out the instruction */ |
if (3 != sscanf (buf->data, "Z%1d,%lx,%1d", (int *)&type, &addr, &len)) |
/* Break out the instruction. We have to use an intermediary for the type, |
since older GCCs do not like taking the address of an enum |
(dereferencing type-punned pointer). */ |
if (3 != sscanf (buf->data, "Z%1d,%lx,%1d", &type_for_scanf, &addr, &len)) |
{ |
fprintf (stderr, "Warning: RSP matchpoint insertion request not " |
"recognized: ignored\n"); |
2318,6 → 2342,8
return; |
} |
|
type = type_for_scanf; |
|
/* Sanity check that the length is 4 */ |
if (4 != len) |
{ |
2330,8 → 2356,12
switch (type) |
{ |
case BP_MEMORY: |
/* Memory breakpoint - substitute a TRAP instruction */ |
/* Memory breakpoint - substitute a TRAP instruction |
|
We make sure th instruction cache is invalidated first, so that the |
read and write always work correctly. */ |
mp_hash_add (type, addr, eval_direct32 (addr, 0, 0)); |
ic_inv (addr); |
set_program32 (addr, OR1K_TRAP_INSTR); |
put_str_packet ("OK"); |
|
/or1ksim/cpu/or32/insnset.c
558,10 → 558,19
fprintf(stderr, " diff : cycles %lld, insn #%lld\n", |
runtime.sim.cycles - runtime.sim.reset_cycles, |
runtime.cpu.instructions - runtime.cpu.reset_instructions); |
if (config.debug.gdb_enabled) |
set_stall_state (1); |
if (config.sim.is_library) |
{ |
runtime.cpu.halted = 1; |
set_stall_state (1); |
} |
else if (config.debug.gdb_enabled) |
{ |
set_stall_state (1); |
} |
else |
sim_done(); |
{ |
sim_done(); |
} |
break; |
case NOP_CNT_RESET: |
PRINTF("****************** counters reset ******************\n"); |
/or1ksim/configure.ac
28,7 → 28,7
|
# Use a full version number (x.y.z, possibly with "rcn" as a suffix) when |
# preparing a release, otherwise use a the date version (yyyy-mm-dd). |
AC_INIT([or1ksim], [0.4.0], [openrisc@opencores.org]) |
AC_INIT([or1ksim], [2010-06-31], [openrisc@opencores.org]) |
AC_CONFIG_MACRO_DIR([m4]) |
|
# Generically use extensions such as _GNU_SOURCE if available. |
/or1ksim/doc/or1ksim.info
64,7 → 64,7
Unpack the software and create a _separate_ directory in which to build |
it: |
|
tar jxf or1ksim-0.4.0.tar.bz2 |
tar jxf or1ksim-2010-06-31.tar.bz2 |
mkdir builddir_or1ksim |
cd builddir_or1ksim |
|
81,7 → 81,7
OpenRISC 1000 32-bit architecture. If this argument is omitted, it will |
default to OpenRISC 1000 32-bit with a warning |
|
../or1ksim-0.4.0/configure --target=or32-uclinux ... |
../or1ksim-2010-06-31/configure --target=or32-uclinux ... |
|
There are several other options available, many of which are standard |
to GNU `configure' scripts. Use `configure --help' to see all the |
257,10 → 257,10
1.4 Known Problems and Issues |
============================= |
|
The following problems and issues are known about with Or1ksim 0.4.0. |
The OpenRISC tracker may be used to see the current state of these |
issues and to raise new problems and feature requests. It may be found |
at `http://www.opencores.org/ptracker.cgi/view/or1k/398'. |
The following problems and issues are known about with Or1ksim |
2010-06-31. The OpenRISC tracker may be used to see the current state |
of these issues and to raise new problems and feature requests. It may |
be found at `http://www.opencores.org/ptracker.cgi/view/or1k/398'. |
|
* The Supervision Register Little Endian Enable (LEE) bit is |
ignored. Or1ksim can be built for either little endian or big |
4313,52 → 4313,52
Node: Top814 |
Node: Installation1224 |
Node: Preparation1471 |
Node: Configuring the Build1761 |
Node: Build and Install7870 |
Node: Known Issues8716 |
Node: Usage11772 |
Node: Standalone Simulator11986 |
Node: Profiling Utility14889 |
Node: Memory Profiling Utility15799 |
Node: Simulator Library17164 |
Node: Configuration24942 |
Node: Configuration File Format25551 |
Node: Configuration File Preprocessing25843 |
Node: Configuration File Syntax26214 |
Node: Simulator Configuration28999 |
Node: Simulator Behavior29290 |
Node: Verification API Configuration33334 |
Node: CUC Configuration35274 |
Node: Core OpenRISC Configuration37191 |
Node: CPU Configuration37693 |
Node: Memory Configuration41811 |
Node: Memory Management Configuration48269 |
Node: Cache Configuration50646 |
Node: Interrupt Configuration53032 |
Node: Power Management Configuration53768 |
Node: Branch Prediction Configuration55045 |
Node: Debug Interface Configuration56405 |
Node: Peripheral Configuration60625 |
Node: Memory Controller Configuration61251 |
Node: UART Configuration64665 |
Node: DMA Configuration68184 |
Node: Ethernet Configuration70051 |
Node: GPIO Configuration74027 |
Node: Display Interface Configuration75660 |
Node: Frame Buffer Configuration77969 |
Node: Keyboard Configuration79833 |
Node: Disc Interface Configuration82071 |
Node: Generic Peripheral Configuration87014 |
Node: Interactive Command Line89309 |
Node: Verification API96283 |
Node: Code Internals100713 |
Node: Coding Conventions101296 |
Node: Global Data Structures105723 |
Node: Concepts108380 |
Ref: Output Redirection108525 |
Node: Internal Debugging109064 |
Node: Regression Testing109588 |
Node: GNU Free Documentation License113383 |
Node: Index135790 |
Node: Configuring the Build1766 |
Node: Build and Install7880 |
Node: Known Issues8726 |
Node: Usage11788 |
Node: Standalone Simulator12002 |
Node: Profiling Utility14905 |
Node: Memory Profiling Utility15815 |
Node: Simulator Library17180 |
Node: Configuration24958 |
Node: Configuration File Format25567 |
Node: Configuration File Preprocessing25859 |
Node: Configuration File Syntax26230 |
Node: Simulator Configuration29015 |
Node: Simulator Behavior29306 |
Node: Verification API Configuration33350 |
Node: CUC Configuration35290 |
Node: Core OpenRISC Configuration37207 |
Node: CPU Configuration37709 |
Node: Memory Configuration41827 |
Node: Memory Management Configuration48285 |
Node: Cache Configuration50662 |
Node: Interrupt Configuration53048 |
Node: Power Management Configuration53784 |
Node: Branch Prediction Configuration55061 |
Node: Debug Interface Configuration56421 |
Node: Peripheral Configuration60641 |
Node: Memory Controller Configuration61267 |
Node: UART Configuration64681 |
Node: DMA Configuration68200 |
Node: Ethernet Configuration70067 |
Node: GPIO Configuration74043 |
Node: Display Interface Configuration75676 |
Node: Frame Buffer Configuration77985 |
Node: Keyboard Configuration79849 |
Node: Disc Interface Configuration82087 |
Node: Generic Peripheral Configuration87030 |
Node: Interactive Command Line89325 |
Node: Verification API96299 |
Node: Code Internals100729 |
Node: Coding Conventions101312 |
Node: Global Data Structures105739 |
Node: Concepts108396 |
Ref: Output Redirection108541 |
Node: Internal Debugging109080 |
Node: Regression Testing109604 |
Node: GNU Free Documentation License113399 |
Node: Index135806 |
|
End Tag Table |
/or1ksim/doc/version.texi
1,4 → 1,4
@set UPDATED 16 June 2010 |
@set UPDATED-MONTH June 2010 |
@set EDITION 0.4.0 |
@set VERSION 0.4.0 |
@set EDITION 2010-06-31 |
@set VERSION 2010-06-31 |
/or1ksim/or1ksim.h
37,7 → 37,8
OR1KSIM_RC_OK, /* No error */ |
|
OR1KSIM_RC_BADINIT, /* Couldn't initialize */ |
OR1KSIM_RC_BRKPT /* Hit a breakpoint */ |
OR1KSIM_RC_BRKPT, /* Hit a breakpoint */ |
OR1KSIM_RC_HALTED /* Hit NOP_EXIT */ |
}; |
|
/* The interface methods */ |
62,6 → 63,8
|
int or1ksim_run (double duration); |
|
int or1ksim_step (); |
|
void or1ksim_reset_duration (double duration); |
|
void or1ksim_set_time_point (); |
88,7 → 91,24
double or1ksim_jtag_shift_dr (unsigned char *jreg, |
int num_bits); |
|
/* Access to simulator state */ |
int or1ksim_read_mem (unsigned char *buf, |
unsigned int addr, |
int len); |
|
int or1ksim_write_mem (unsigned char *buf, |
unsigned int addr, |
int len); |
|
int or1ksim_read_reg (unsigned char *buf, |
int regnum, |
int len); |
|
int or1ksim_write_reg (unsigned char *buf, |
int regnum, |
int len); |
|
|
#ifdef __cplusplus |
} |
#endif |
/or1ksim/NEWS
2,6 → 2,16
================================================== |
|
|
New in top of tree |
================== |
|
The library interface is extended to allow registers and memory to be written |
directly. This is to allow direct integration as a simulator in GDB. |
|
The following bugs are fixed. |
* Bug 1797: Or1ksim does not compile with GCC 3.4.4 under Cygwin |
* Bug 1795: GDB breakpoints do not work with Icache enabled. |
|
New in release 0.4.0 |
==================== |
|
/or1ksim/ChangeLog
1,3 → 1,30
2010-06-31 Jeremy Bennett <jeremy.bennett@embecosm.co> |
* argtable2/argtable2.c (arg_print_formatted): Cast argument to |
* configure: Regenerated. |
* configure.ac: Version changed to current date. |
isspace to int (x2). |
* debug/rsp-server.c (rsp_remove_matchpoint) |
(rsp_insert_matchpoint): Don't cast pointer to enum. Invalidate |
instruction cache before writing. |
(rsp_write_mem, rsp_write_mem_bin): Invalidate caches before writing. |
* NEWS: Updated for new version |
|
2010-06-29 Jeremy Bennett <jeremy.bennett@embecosm.com> |
* configure: Regenerated. |
* configure.ac: Version changed to current date. |
* cpu/or32/insnset.c <l_nop>: On exit, mark cpu as halted if this |
is library. |
* libtoplevel.c: Add definitions of GDB register numbers. |
(or1ksim_init): Initailize config.sim.is_library. |
(or1ksim_run): Distinguish between halting and hitting breakpoint, |
return if stalled/halted after cpu_cock (). |
(or1ksim_step, or1ksim_read_mem, or1ksim_write_mem) |
(or1ksim_read_reg, or1ksim_write_reg): New functions. |
* NEWS: Updated for new version |
* sim-config.c (init_defconfig): Initialize config.sim.is_library. |
* sim-config.h <struct config>: Added field sim.is_library. |
<struct runtime>: Added field cpu.halted. |
|
2010-06-22 Jeremy Bennett <jeremy.bennett@embecosm.com> |
* configure: Regenerated. |
* configure.ac: Version changed to 0.4.0. |
/or1ksim/testsuite/test-code-or1k/configure
1,6 → 1,6
#! /bin/sh |
# Guess values for system-dependent variables and create Makefiles. |
# Generated by GNU Autoconf 2.63 for or1ksim-testsuite 0.4.0. |
# Generated by GNU Autoconf 2.63 for or1ksim-testsuite 2010-06-31. |
# |
# Report bugs to <openrisc@opencores.org>. |
# |
745,8 → 745,8
# Identity of this package. |
PACKAGE_NAME='or1ksim-testsuite' |
PACKAGE_TARNAME='or1ksim-testsuite' |
PACKAGE_VERSION='0.4.0' |
PACKAGE_STRING='or1ksim-testsuite 0.4.0' |
PACKAGE_VERSION='2010-06-31' |
PACKAGE_STRING='or1ksim-testsuite 2010-06-31' |
PACKAGE_BUGREPORT='openrisc@opencores.org' |
|
# Factoring default headers for most tests. |
1477,7 → 1477,7
# Omit some internal or obsolete options to make the list less imposing. |
# This message is too long to be a string in the A/UX 3.1 sh. |
cat <<_ACEOF |
\`configure' configures or1ksim-testsuite 0.4.0 to adapt to many kinds of systems. |
\`configure' configures or1ksim-testsuite 2010-06-31 to adapt to many kinds of systems. |
|
Usage: $0 [OPTION]... [VAR=VALUE]... |
|
1548,7 → 1548,7
|
if test -n "$ac_init_help"; then |
case $ac_init_help in |
short | recursive ) echo "Configuration of or1ksim-testsuite 0.4.0:";; |
short | recursive ) echo "Configuration of or1ksim-testsuite 2010-06-31:";; |
esac |
cat <<\_ACEOF |
|
1653,7 → 1653,7
test -n "$ac_init_help" && exit $ac_status |
if $ac_init_version; then |
cat <<\_ACEOF |
or1ksim-testsuite configure 0.4.0 |
or1ksim-testsuite configure 2010-06-31 |
generated by GNU Autoconf 2.63 |
|
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, |
1667,7 → 1667,7
This file contains any messages produced by compilers while |
running configure, to aid debugging if configure makes a mistake. |
|
It was created by or1ksim-testsuite $as_me 0.4.0, which was |
It was created by or1ksim-testsuite $as_me 2010-06-31, which was |
generated by GNU Autoconf 2.63. Invocation command line was |
|
$ $0 $@ |
10922,7 → 10922,7
|
# Define the identity of the package. |
PACKAGE='or1ksim-testsuite' |
VERSION='0.4.0' |
VERSION='2010-06-31' |
|
|
cat >>confdefs.h <<_ACEOF |
13142,7 → 13142,7
# report actual input values of CONFIG_FILES etc. instead of their |
# values after options handling. |
ac_log=" |
This file was extended by or1ksim-testsuite $as_me 0.4.0, which was |
This file was extended by or1ksim-testsuite $as_me 2010-06-31, which was |
generated by GNU Autoconf 2.63. Invocation command line was |
|
CONFIG_FILES = $CONFIG_FILES |
13205,7 → 13205,7
_ACEOF |
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 |
ac_cs_version="\\ |
or1ksim-testsuite config.status 0.4.0 |
or1ksim-testsuite config.status 2010-06-31 |
configured by $0, generated by GNU Autoconf 2.63, |
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" |
|
/or1ksim/testsuite/test-code-or1k/configure.ac
24,7 → 24,7
# directory. This uses a different tool chain, so has its own configuration |
# script. Process this file with autoconf to produce a configure script. |
|
AC_INIT([or1ksim-testsuite],[0.4.0], [openrisc@opencores.org]) |
AC_INIT([or1ksim-testsuite],[2010-06-31], [openrisc@opencores.org]) |
AC_CONFIG_MACRO_DIR([m4]) |
|
AC_PROG_LIBTOOL |
/or1ksim/testsuite/test-code-or1k/ChangeLog
1,3 → 1,11
2010-06-31 Jeremy Bennett <jeremy.bennett@embecosm.com> |
* configure: Regenerated. |
* configure.ac: Version changed to current date |
|
2010-06-29 Jeremy Bennett <jeremy.bennett@embecosm.com> |
* configure: Regenerated. |
* configure.ac: Version changed to current date |
|
2010-06-22 Jeremy Bennett <jeremy.bennett@embecosm.com> |
* configure: Regenerated. |
* configure.ac: Version changed to 0.4.0. |
/or1ksim/configure
1,7 → 1,7
#! /bin/sh |
# From configure.ac Id: configure.ac 1042 2010-06-16 14:20:42Z jeremy using automake version AC_ACVERSION. |
# From configure.ac Id: configure.ac 1067 2010-06-28 18:27:28Z jeremy using automake version AC_ACVERSION. |
# Guess values for system-dependent variables and create Makefiles. |
# Generated by GNU Autoconf 2.63 for or1ksim 0.4.0. |
# Generated by GNU Autoconf 2.63 for or1ksim 2010-06-31. |
# |
# Report bugs to <openrisc@opencores.org>. |
# |
766,8 → 766,8
# Identity of this package. |
PACKAGE_NAME='or1ksim' |
PACKAGE_TARNAME='or1ksim' |
PACKAGE_VERSION='0.4.0' |
PACKAGE_STRING='or1ksim 0.4.0' |
PACKAGE_VERSION='2010-06-31' |
PACKAGE_STRING='or1ksim 2010-06-31' |
PACKAGE_BUGREPORT='openrisc@opencores.org' |
|
# Factoring default headers for most tests. |
1529,7 → 1529,7
# Omit some internal or obsolete options to make the list less imposing. |
# This message is too long to be a string in the A/UX 3.1 sh. |
cat <<_ACEOF |
\`configure' configures or1ksim 0.4.0 to adapt to many kinds of systems. |
\`configure' configures or1ksim 2010-06-31 to adapt to many kinds of systems. |
|
Usage: $0 [OPTION]... [VAR=VALUE]... |
|
1600,7 → 1600,7
|
if test -n "$ac_init_help"; then |
case $ac_init_help in |
short | recursive ) echo "Configuration of or1ksim 0.4.0:";; |
short | recursive ) echo "Configuration of or1ksim 2010-06-31:";; |
esac |
cat <<\_ACEOF |
|
1707,7 → 1707,7
test -n "$ac_init_help" && exit $ac_status |
if $ac_init_version; then |
cat <<\_ACEOF |
or1ksim configure 0.4.0 |
or1ksim configure 2010-06-31 |
generated by GNU Autoconf 2.63 |
|
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, |
1741,7 → 1741,7
This file contains any messages produced by compilers while |
running configure, to aid debugging if configure makes a mistake. |
|
It was created by or1ksim $as_me 0.4.0, which was |
It was created by or1ksim $as_me 2010-06-31, which was |
generated by GNU Autoconf 2.63. Invocation command line was |
|
$ $0 $@ |
11284,7 → 11284,7
|
# Define the identity of the package. |
PACKAGE='or1ksim' |
VERSION='0.4.0' |
VERSION='2010-06-31' |
|
|
cat >>confdefs.h <<_ACEOF |
18260,7 → 18260,7
# report actual input values of CONFIG_FILES etc. instead of their |
# values after options handling. |
ac_log=" |
This file was extended by or1ksim $as_me 0.4.0, which was |
This file was extended by or1ksim $as_me 2010-06-31, which was |
generated by GNU Autoconf 2.63. Invocation command line was |
|
CONFIG_FILES = $CONFIG_FILES |
18323,7 → 18323,7
_ACEOF |
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 |
ac_cs_version="\\ |
or1ksim config.status 0.4.0 |
or1ksim config.status 2010-06-31 |
configured by $0, generated by GNU Autoconf 2.63, |
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" |
|
/or1ksim/libtoplevel.c
41,7 → 41,13
#include "pic.h" |
#include "jtag.h" |
|
/* Indices of GDB registers that are not GPRs. Must match GDB settings! */ |
#define MAX_GPRS 32 /*!< Maximum GPRs */ |
#define PPC_REGNUM (MAX_GPRS + 0) /*!< Previous PC */ |
#define NPC_REGNUM (MAX_GPRS + 1) /*!< Next PC */ |
#define SR_REGNUM (MAX_GPRS + 2) /*!< Supervision Register */ |
|
|
/*---------------------------------------------------------------------------*/ |
/*!Initialize the simulator. |
|
94,12 → 100,13
return OR1KSIM_RC_BADINIT; |
} |
|
config.sim.profile = 0; /* No profiling */ |
config.sim.mprofile = 0; |
config.sim.is_library = 1; /* Library operation */ |
config.sim.profile = 0; /* No profiling */ |
config.sim.mprofile = 0; |
|
config.ext.class_ptr = class_ptr; /* SystemC linkage */ |
config.ext.read_up = upr; |
config.ext.write_up = upw; |
config.ext.class_ptr = class_ptr; /* SystemC linkage */ |
config.ext.read_up = upr; |
config.ext.write_up = upw; |
|
print_config (); /* Will go eventually */ |
signal (SIGINT, ctrl_c); /* Not sure we want this really */ |
117,7 → 124,7
|
return OR1KSIM_RC_OK; |
|
} /* or1ksim_init() */ |
} /* or1ksim_init () */ |
|
|
/*---------------------------------------------------------------------------*/ |
158,10 → 165,10
const int num_ints = sizeof (runtime.sim.ext_int_set) * 8; |
|
/* If we are stalled we can't do anything. We treat this as hitting a |
breakpoint. */ |
breakpoint or halting. */ |
if(runtime.cpu.stalled) |
{ |
return OR1KSIM_RC_BRKPT; |
return runtime.cpu.halted ? OR1KSIM_RC_HALTED : OR1KSIM_RC_BRKPT; |
} |
|
/* Reset the duration */ |
181,9 → 188,18
|
if (cpu_clock ()) |
{ |
return OR1KSIM_RC_BRKPT; /* Hit a breakpoint */ |
/* This is probably wrong. This is an Or1ksim breakpoint, not a GNU |
one. */ |
return runtime.cpu.halted ? OR1KSIM_RC_HALTED : OR1KSIM_RC_BRKPT; |
} |
|
/* If we are stalled we can't do anything. We treat this as hitting a |
breakpoint or halting. */ |
if(runtime.cpu.stalled) |
{ |
return runtime.cpu.halted ? OR1KSIM_RC_HALTED : OR1KSIM_RC_BRKPT; |
} |
|
runtime.sim.cycles += runtime.sim.mem_cycles; |
|
/* Take any external interrupts. Outer test is for the common case for |
227,10 → 243,31
|
return OR1KSIM_RC_OK; |
|
} /* or1ksim_run() */ |
} /* or1ksim_run () */ |
|
|
/*---------------------------------------------------------------------------*/ |
/*!Step the simulator |
|
This is just a wrapper for the run function, specifying a time |
corresponding to a single cycle. This will in fact mean that a single |
instruction is executed, even if takes more than one cycle to execute. |
|
@todo What happens if an event is triggered - that may mean multiple |
instructions. |
|
@return OR1KSIM_RC_OK if we step to completion, OR1KSIM_RC_BRKPT if we hit |
a breakpoint (not clear how this can be set without CLI access) */ |
/*---------------------------------------------------------------------------*/ |
int |
or1ksim_step () |
{ |
return or1ksim_run ((double) config.sim.clkcycle_ps / 1e12); |
|
} /* or1ksim_step () */ |
|
|
/*---------------------------------------------------------------------------*/ |
/*!Reset the run-time simulation end point |
|
Reset the time for which the simulation should run to the specified duration |
245,7 → 282,7
runtime.sim.cycles + |
(long long int) (duration * 1.0e12 / (double) config.sim.clkcycle_ps); |
|
} /* or1ksim_reset_duration() */ |
} /* or1ksim_reset_duration () */ |
|
|
/*---------------------------------------------------------------------------*/ |
275,7 → 312,7
{ |
runtime.sim.time_point = internal_or1ksim_time (); |
|
} /* or1ksim_set_time_point() */ |
} /* or1ksim_set_time_point () */ |
|
|
/*---------------------------------------------------------------------------*/ |
288,7 → 325,7
{ |
return internal_or1ksim_time () - runtime.sim.time_point; |
|
} /* or1ksim_get_time_period() */ |
} /* or1ksim_get_time_period () */ |
|
|
/*---------------------------------------------------------------------------*/ |
307,7 → 344,7
return 1; |
#endif |
|
} /* or1ksim_is_le() */ |
} /* or1ksim_is_le () */ |
|
|
/*---------------------------------------------------------------------------*/ |
323,7 → 360,7
return (unsigned long int) (1000000000000ULL / |
(unsigned long long int) (config.sim. |
clkcycle_ps)); |
} /* or1ksim_clock_rate() */ |
} /* or1ksim_clock_rate () */ |
|
|
/*---------------------------------------------------------------------------*/ |
350,7 → 387,7
runtime.sim.ext_int_set |= 1 << i; // Better not be > 31! |
runtime.sim.ext_int_clr |= 1 << i; // Better not be > 31! |
} |
} /* or1ksim_interrupt() */ |
} /* or1ksim_interrupt () */ |
|
|
/*---------------------------------------------------------------------------*/ |
376,7 → 413,7
{ |
runtime.sim.ext_int_set |= 1 << i; // Better not be > 31! |
} |
} /* or1ksim_interrupt() */ |
} /* or1ksim_interrupt () */ |
|
|
/*---------------------------------------------------------------------------*/ |
402,7 → 439,7
{ |
runtime.sim.ext_int_clr |= 1 << i; // Better not be > 31! |
} |
} /* or1ksim_interrupt() */ |
} /* or1ksim_interrupt () */ |
|
|
/*---------------------------------------------------------------------------*/ |
505,3 → 542,192
return (double) num_bits * (double) config.debug.jtagcycle_ps / 1.0e12; |
|
} /* or1ksim_jtag_shift_dr () */ |
|
|
/*---------------------------------------------------------------------------*/ |
/*!Read a block of memory. |
|
@param[out] buf Where to put the data. |
@param[in] addr The address to read from. |
@param[in] len The number of bytes to read. |
|
@return Number of bytes read, or zero if error. */ |
/*---------------------------------------------------------------------------*/ |
int |
or1ksim_read_mem (unsigned char *buf, |
unsigned int addr, |
int len) |
{ |
int off; /* Offset into the memory */ |
|
/* Fill the buffer with data */ |
for (off = 0; off < len; off++) |
{ |
/* Check memory area is valid */ |
if (NULL == verify_memoryarea (addr + off)) |
{ |
/* Fail silently - others can raise any error message. */ |
return 0; |
} |
else |
{ |
/* Get the memory direct - no translation. */ |
buf[off] = eval_direct8 (addr + off, 0, 0); |
} |
} |
|
return len; |
|
} /* or1ksim_read_mem () */ |
|
|
/*---------------------------------------------------------------------------*/ |
/*!Write a block of memory. |
|
@param[in] buf Where to get the data from. |
@param[in] addr The address to write to. |
@param[in] len The number of bytes to write. |
|
@return Number of bytes written, or zero if error. */ |
/*---------------------------------------------------------------------------*/ |
int |
or1ksim_write_mem (unsigned char *buf, |
unsigned int addr, |
int len) |
{ |
int off; /* Offset into the memory */ |
|
/* Write the bytes to memory */ |
for (off = 0; off < len; off++) |
{ |
if (NULL == verify_memoryarea (addr + off)) |
{ |
/* Fail silently - others can raise any error message. */ |
return 0; |
} |
else |
{ |
/* circumvent the read-only check usually done for mem accesses data |
is in host order, because that's what set_direct32 needs */ |
set_program8 (addr + off, buf[off]); |
} |
} |
|
return len; |
|
} /* or1ksim_write_mem () */ |
|
|
/*---------------------------------------------------------------------------*/ |
/*!Read a single register |
|
The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PC |
(i.e. SPR NPC) and SR (i.e. SPR SR). |
|
@param[out] buf Where to put the data. |
@param[in] regnum The register to read. |
@param[in] len Size of the register in bytes |
|
@return Size of the register, or zero if error. */ |
/*---------------------------------------------------------------------------*/ |
int |
or1ksim_read_reg (unsigned char *buf, |
int regnum, |
int len) |
{ |
unsigned long int *regbuf = (unsigned long *) buf; |
|
if (4 != len) |
{ |
return 0; /* Not 32-bit reg */ |
} |
|
/* Get the relevant register */ |
if (regnum < MAX_GPRS) |
{ |
*regbuf = cpu_state.reg[regnum]; |
} |
else if (PPC_REGNUM == regnum) |
{ |
*regbuf = cpu_state.sprs[SPR_PPC]; |
} |
else if (NPC_REGNUM == regnum) |
{ |
*regbuf = cpu_state.pc; |
} |
else if (SR_REGNUM == regnum) |
{ |
*regbuf = cpu_state.sprs[SPR_SR]; |
} |
else |
{ |
/* Silent error response if we don't know the register */ |
return 0; |
} |
|
return len; |
|
} /* or1ksim_read_reg () */ |
|
|
/*---------------------------------------------------------------------------*/ |
/*!Write a single register |
|
The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PC |
(i.e. SPR NPC) and SR (i.e. SPR SR). The register is specified as a |
sequence of bytes in target endian order. |
|
Each byte is packed as a pair of hex digits. |
|
@param[in] buf Where to get the data from. |
@param[in] regnum The register to write. |
@param[in] len Size of the register in bytes |
|
@return Size of the register, or zero if error. */ |
/*---------------------------------------------------------------------------*/ |
int |
or1ksim_write_reg (unsigned char *buf, |
int regnum, |
int len) |
{ |
unsigned long int *regbuf = (unsigned long *) buf; |
unsigned long int regval = *regbuf; |
|
if (4 != len) |
{ |
return 0; /* Not 32-bit reg */ |
} |
|
/* Set the relevant register */ |
if (regnum < MAX_GPRS) |
{ |
cpu_state.reg[regnum] =regval; |
} |
else if (PPC_REGNUM == regnum) |
{ |
cpu_state.sprs[SPR_PPC] = regval; |
} |
else if (NPC_REGNUM == regnum) |
{ |
if (cpu_state.pc != regval) |
{ |
cpu_state.pc = regval; |
cpu_state.delay_insn = 0; |
pcnext = regval + 4; |
} |
} |
else if (SR_REGNUM == regnum) |
{ |
cpu_state.sprs[SPR_SR] = regval; |
} |
else |
{ |
/* Silent error response if we don't know the register */ |
return 0; |
} |
|
return len; |
|
} /* or1ksim_write_reg () */ |
|
|
/or1ksim/argtable2/argtable2.c
969,7 → 969,8
/* Eat leading whitespaces. This is essential because while |
wrapping lines, there will often be a whitespace at beginning |
of line */ |
while ( isspace(*(text+line_start)) ) |
/* JPB patch to cast argument */ |
while (isspace ((int) (*(text+line_start))) ) |
{ line_start++; } |
|
if ((line_end - line_start) > colwidth ) |
978,7 → 979,7
/* Find last whitespace, that fits into line */ |
while ( ( line_end > line_start ) |
&& ( line_end - line_start > colwidth ) |
&& !isspace(*(text+line_end))) |
&& !isspace ((int) (*(text+line_end)))) |
{ line_end--; } |
|
/* Do not print trailing whitespace. If this text |
/or1ksim/sim-config.c
101,6 → 101,7
config.ext.write_up = NULL; |
|
/* Sim */ |
config.sim.is_library = 0; /* Not library operation */ |
config.sim.verbose = 0; |
config.sim.debug = 0; |
config.sim.profile = 0; |