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    from Rev 336 to Rev 339
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Rev 336 → Rev 339

/gnu-src/gdb-7.2/gdb/doc/or32.texinfo File deleted
/gnu-src/gdb-7.2/gdb/doc/or32.info File deleted
/gnu-src/gdb-7.2/gdb/doc/Makefile.in
71,12 → 71,12
TEXINPUTS=${TEXIDIR}:.:$(srcdir):$(READLINE_DIR):$(GDBMI_DIR):$$TEXINPUTS
 
# Files which should be generated via 'info' and installed by 'install-info'
INFO_DEPS = gdb.info gdbint.info stabs.info annotate.info or32.info
INFO_DEPS = gdb.info gdbint.info stabs.info annotate.info
 
# Files which should be generated via 'pdf' and installed by 'install-pdf'
PDFFILES = gdb.pdf gdbint.pdf stabs.pdf refcard.pdf annotate.pdf or32.pdf
PDFFILES = gdb.pdf gdbint.pdf stabs.pdf refcard.pdf annotate.pdf
# Files which should be generated via 'html' and installed by 'install-html'
HTMLFILES = gdb/index.html gdbint/index.html stabs/index.html annotate/index.html or32/index.html
HTMLFILES = gdb/index.html gdbint/index.html stabs/index.html annotate/index.html
HTMLFILES_INSTALL = gdb gdbint stabs annotate
 
# There may be alternate predefined collections of switches to configure
154,18 → 154,6
$(ANNOTATE_DOC_SOURCE_INCLUDES) \
$(ANNOTATE_DOC_BUILD_INCLUDES)
 
# GDB for OpenRISC 1000 User Guide
OR32_DOC_SOURCE_INCLUDES = \
$(srcdir)/fdl.texi \
$(srcdir)/gpl.texi
OR32_DOC_BUILD_INCLUDES = \
gdb-cfg.texi \
GDBvn.texi
OR32_DOC_FILES = \
$(srcdir)/or32.texinfo \
$(OR32_DOC_SOURCE_INCLUDES) \
$(OR32_DOC_BUILD_INCLUDES)
 
#### Host, target, and site specific Makefile fragments come in here.
###
 
172,8 → 160,8
all:
 
info: $(INFO_DEPS)
dvi: gdb.dvi gdbint.dvi stabs.dvi refcard.dvi annotate.dvi or32.dvi
ps: gdb.ps gdbint.ps stabs.ps refcard.ps annotate.ps or32.ps
dvi: gdb.dvi gdbint.dvi stabs.dvi refcard.dvi annotate.dvi
ps: gdb.ps gdbint.ps stabs.ps refcard.ps annotate.ps
html: $(HTMLFILES)
pdf: $(PDFFILES)
all-doc: info dvi ps # pdf
531,36 → 519,6
$(SHELL) ./config.status
 
 
# Clean these up before each run. Avoids a catch 22 with not being
# able to re-generate these files (to fix a corruption) because these
# files contain a corruption.
OR32_TEX_TMPS = or32.aux or32.cp* or32.fn* or32.ky* \
or32.log or32.pg* or32.toc or32.tp* or32.vr*
 
# GDB for OpenRISC 1000 DOCUMENTATION: TeX dvi file
or32.dvi : $(OR32_DOC_FILES)
rm -f $(OR32_TEX_TMPS)
$(SET_TEXINPUTS) $(TEXI2DVI) $(srcdir)/or32.texinfo
 
or32.ps: or32.dvi
$(DVIPS) -o $@ $?
 
or32.pdf: $(OR32_DOC_FILES)
rm -f $(OR32_TEX_TMPS)
$(SET_TEXINPUTS) $(TEXI2DVI) --pdf $(srcdir)/or32.texinfo
 
or32.info: $(OR32_DOC_FILES)
$(MAKEINFO) -I $(srcdir) -o or32.info $(srcdir)/or32.texinfo
 
or32_toc.html: $(OR32_DOC_FILES)
$(MAKEHTML) $(MAKEHTMLFLAGS) $(srcdir)/or32.texinfo
 
force:
 
Makefile: Makefile.in $(host_makefile_frag) config.status
$(SHELL) ./config.status
 
 
# The "least clean" level of cleaning. Get rid of files which are
# automatically generated files that are just intermediate files,
 
570,7 → 528,6
rm -f $(GDBINT_TEX_TMPS)
rm -f $(STABS_TEX_TMPS)
rm -f $(ANNOTATE_TEX_TMPS)
rm -f $(OR32_TEX_TMPS)
rm -f sedref.dvi sedref.tex tmp.sed
 
clean: mostlyclean
/gnu-src/gdb-7.2/gdb/doc/gdb.texinfo
524,6 → 524,10
Michael Eager and staff of Xilinx, Inc., contributed support for the
Xilinx MicroBlaze architecture.
 
The original port to the OpenRISC 1000 is believed to be due to
Alessandro Forin and Per Bothner. More recent ports have been the work
of Jeremy Bennett.
 
@node Sample Session
@chapter A Sample @value{GDBN} Session
 
18308,40 → 18312,56
@subsection OpenRISC 1000
@cindex OpenRISC 1000
 
@cindex or1k boards
See OR1k Architecture document (@uref{www.opencores.org}) for more information
about platform and commands.
Previous versions of @value{GDBN} supported remote connection via a
proprietary JTAG protocol using the @samp{target jtag} command. Support
for this has now been dropped.
 
 
@table @code
 
@kindex target jtag
@item target jtag jtag://@var{host}:@var{port}
@kindex target remote
@item target remote
 
This is now the only way to connect to a remote OpenRISC 1000
target. This is supported by @dfn{Or1ksim}, the OpenRISC 1000
architectural simulator, and Verilator and Icarus Verilog
simulations. @dfn{Remote serial protocol} servers are also available to
drive various hardware implementations via JTAG.
Connects to remote JTAG server.
JTAG remote server can be either an or1ksim or JTAG server,
connected via parallel port to the board.
 
Example: @code{target jtag jtag://localhost:9999}
Example: @code{target remote :51000}
 
@kindex or1ksim
@item or1ksim @var{command}
If connected to @code{or1ksim} OpenRISC 1000 Architectural
Simulator, proprietary commands can be executed.
@kindex target sim
@item target sim
 
@kindex info or1k spr
@dfn{Or1ksim}, the OpenRISC 1000 architectural simulator is now
incorporated within @value{GDBN} as a simulator target. It is started
in quiet mode with 8M of memory starting at address 0. It is possible
to pass arguments to extend this configuration using the @samp{-f}
option to @samp{target sim}. However for more complex use, the user is
advised to run @dfn{Or1ksim} separately, with its own configuration
file, and connect using @samp{target remote}
 
Example: @code{target sim}
 
@kindex info spr
@item info or1k spr
Displays spr groups.
Displays groups.
 
@item info or1k spr @var{group}
@itemx info or1k spr @var{groupno}
@item info spr @var{group}
@itemx info spr @var{groupno}
Displays register names in selected group.
 
@item info or1k spr @var{group} @var{register}
@itemx info or1k spr @var{register}
@itemx info or1k spr @var{groupno} @var{registerno}
@itemx info or1k spr @var{registerno}
@item info spr @var{group} @var{register}
@itemx info spr @var{register}
@itemx info spr @var{groupno} @var{registerno}
@itemx info spr @var{registerno}
Shows information about specified spr register.
 
Example: @code{info spr DRR}
 
@code{DEBUG.DRR = SPR6_21 = 0 (0x0)}
 
@kindex spr
@item spr @var{group} @var{register} @var{value}
@itemx spr @var{register @var{value}}
18348,76 → 18368,44
@itemx spr @var{groupno} @var{registerno @var{value}}
@itemx spr @var{registerno @var{value}}
Writes @var{value} to specified spr register.
@end table
 
Some implementations of OpenRISC 1000 Architecture also have hardware trace.
It is very similar to @value{GDBN} trace, except it does not interfere with normal
program execution and is thus much faster. Hardware breakpoints/watchpoint
triggers can be set using:
@table @code
@item $LEA/$LDATA
Load effective address/data
@item $SEA/$SDATA
Store effective address/data
@item $AEA/$ADATA
Access effective address ($SEA or $LEA) or data ($SDATA/$LDATA)
@item $FETCH
Fetch data
Example: spr PICMR 0x24
@end table
 
When triggered, it can capture low level data, like: @code{PC}, @code{LSEA},
@code{LDATA}, @code{SDATA}, @code{READSPR}, @code{WRITESPR}, @code{INSTR}.
The use of @samp{info} and @samp{spr} commands is anachronistic. At
some time in the future they will be replaced by @samp{show spr} and
@samp{set spr}.
 
@code{htrace} commands:
@cindex OpenRISC 1000 htrace
@table @code
@kindex hwatch
@item hwatch @var{conditional}
Set hardware watchpoint on combination of Load/Store Effective Address(es)
or Data. For example:
There are some known problems with the current implementation
@cindex OpenRISC 1000 known problems
 
@code{hwatch ($LEA == my_var) && ($LDATA < 50) || ($SEA == my_var) && ($SDATA >= 50)}
@enumerate
 
@code{hwatch ($LEA == my_var) && ($LDATA < 50) || ($SEA == my_var) && ($SDATA >= 50)}
@item
@cindex OpenRISC 1000 known problems, hardware breakpoints and watchpoints
Some OpenRISC 1000 targets support hardware breakpoints and watchpoints.
Consult the target documentation for details. @value{GDBN} is not
perfect in handling of watchpoints. It is possible to allocate hardware
watchpoints and not discover until running that sufficient watchpoints
are not available. It is also possible that GDB will report watchpoints
being hit spuriously. This can be down to the assembly code having
additional memory accesses that are not obviously reflected in the
source code.
 
@kindex htrace
@item htrace info
Display information about current HW trace configuration.
@item
@cindex OpenRISC 1000 known problems, architectural compatability
The OpenRISC 1000 architecture has evolved since the first port of @value{GDBN}. In particular the structure of the Unit Present register has
changed and the CPU Configuration register has been added. The port of
@value{GDBN} version @value{GDBVN} uses the @emph{current}
specification of the OpenRISC 1000.
 
@item htrace trigger @var{conditional}
Set starting criteria for HW trace.
@end enumerate
 
@item htrace qualifier @var{conditional}
Set acquisition qualifier for HW trace.
@cindex Bugs, reporting
@cindex Reporting bugs
Reports of bugs are much welcomed. Please report problems through the
OpenRISC tracker at @uref{http://opencores.org/openrisc,downloads}.
 
@item htrace stop @var{conditional}
Set HW trace stopping criteria.
 
@item htrace record [@var{data}]*
Selects the data to be recorded, when qualifier is met and HW trace was
triggered.
 
@item htrace enable
@itemx htrace disable
Enables/disables the HW trace.
 
@item htrace rewind [@var{filename}]
Clears currently recorded trace data.
 
If filename is specified, new trace file is made and any newly collected data
will be written there.
 
@item htrace print [@var{start} [@var{len}]]
Prints trace buffer, using current record configuration.
 
@item htrace mode continuous
Set continuous trace mode.
 
@item htrace mode suspend
Set suspend trace mode.
 
@end table
 
@node PowerPC Embedded
@subsection PowerPC Embedded
 
/gnu-src/gdb-7.2/gdb/doc/ChangeLog.or32
1,3 → 1,10
2010-09-05 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* gdb.texinfo: Incorporated up to date OpenRISC information.
* Makefile.in: Removed OR32 targets.
* or32.info: deleted
* or32.texinfo: deleted
 
2009-07-26 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* Makefile.in: Added entries for OR32 manual.
/gnu-src/gdb-7.2/gdb/version.in
1,3 → 2,10
7.2
7.2-or32-1.0rc1
 
/gnu-src/gdb-7.2/gdb/ChangeLog.or32
1,3 → 1,7
2010-09-05 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* version.in: Updated for release 7.2-or32-1.0rc1.
 
2010-08-25 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* or32-tdep.c (or32_push_dummy_call): Corrected handling of double
/gnu-src/gdb-7.2/etc/gnu-oids.texi
0,0 → 1,55
@c This table of OID's is included in the GNU Coding Standards.
@c
@c Copyright 2008, 2009, 2010 Free Software Foundation, Inc.
@c
@c Copying and distribution of this file, with or without modification,
@c are permitted in any medium without royalty provided the copyright
@c notice and this notice are preserved.
@c
@c When adding new OIDs, please add them also to
@c http://www.alvestrand.no/objectid/ (except it gets an internal
@c server error, so never mind)
@c (Our page is http://www.alvestrand.no/objectid/1.3.6.1.4.1.11591.html.)
 
1.3.6.1.4.1.11591 GNU
 
1.3.6.1.4.1.11591.1 GNU Radius
 
1.3.6.1.4.1.11591.2 GnuPG
1.3.6.1.4.1.11591.2.1 notation
1.3.6.1.4.1.11591.2.1.1 pkaAddress
 
1.3.6.1.4.1.11591.3 GNU Radar
 
1.3.6.1.4.1.11591.4 GNU GSS
 
@c Added 2008-10-24 on request from Sergey Poznyakoff <gray@gnu.org.ua>
1.3.6.1.4.1.11591.5 GNU Mailutils
 
@c Added 2009-03-03 on request from Simon Josefsson <simon@josefsson.org>
1.3.6.1.4.1.11591.6 GNU Shishi
 
@c Added 2010-05-17 on request from Eric Blossom <eb@comsec.com>
1.3.6.1.4.1.11591.7 GNU Radio
 
@c Added 2010-07-02 on request from Sergey Poznyakoff <gray@gnu.org.ua>
1.3.6.1.4.1.11591.8 GNU Dico
 
1.3.6.1.4.1.11591.12 digestAlgorithm
1.3.6.1.4.1.11591.12.2 TIGER/192
1.3.6.1.4.1.11591.13 encryptionAlgorithm
1.3.6.1.4.1.11591.13.2 Serpent
1.3.6.1.4.1.11591.13.2.1 Serpent-128-ECB
1.3.6.1.4.1.11591.13.2.2 Serpent-128-CBC
1.3.6.1.4.1.11591.13.2.3 Serpent-128-OFB
1.3.6.1.4.1.11591.13.2.4 Serpent-128-CFB
1.3.6.1.4.1.11591.13.2.21 Serpent-192-ECB
1.3.6.1.4.1.11591.13.2.22 Serpent-192-CBC
1.3.6.1.4.1.11591.13.2.23 Serpent-192-OFB
1.3.6.1.4.1.11591.13.2.24 Serpent-192-CFB
1.3.6.1.4.1.11591.13.2.41 Serpent-256-ECB
1.3.6.1.4.1.11591.13.2.42 Serpent-256-CBC
1.3.6.1.4.1.11591.13.2.43 Serpent-256-OFB
1.3.6.1.4.1.11591.13.2.44 Serpent-256-CFB
1.3.6.1.4.1.11591.14 CRC algorithms
1.3.6.1.4.1.11591.14.1 CRC 32
gnu-src/gdb-7.2/etc/gnu-oids.texi Property changes : Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +Id \ No newline at end of property

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