OpenCores
URL https://opencores.org/ocsvn/or1200_soc/or1200_soc/trunk

Subversion Repositories or1200_soc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /or1200_soc/trunk/boards/de1_board/sw/tests
    from Rev 22 to Rev 25
    Reverse comparison

Rev 22 → Rev 25

/ecos_debug/serial.c
0,0 → 1,38
//
//
//
 
#include "de1_or1200.h"
#include "serial.h"
 
 
//
// use 57600 baud
 
void init_serial( void )
{
REG8(0x50000003) = 0x83;
REG8(0x50000001) = 0x00;
// REG8(0x50000000) = 0x06;
REG8(0x50000000) = 0x1a; // 57600 baud w/ clk=24MHz
// REG8(0x50000000) = 0x2b; // 57600 baud w/ clk=40MHz
REG8(0x50000003) = 0x03;
REG8(0x50000002) = 0x01;
}
 
void NS16550_putc( char c )
{
while ( (LSR_BASE & LSR_THRE) == 0);
THR_BASE = c;
}
 
 
int puts( char *s )
{
while (*s) {
NS16550_putc (*s++);
}
}
 
 
/ecos_debug/de1_or1200.h
0,0 → 1,18
//
//
//
 
 
#ifndef __DE1_OR1200_H
#define __DE1_OR1200_H
 
/* Register access macros */
#define REG8(add) *((volatile unsigned char *)(add))
#define REG16(add) *((volatile unsigned short *)(add))
#define REG32(add) *((volatile unsigned long *)(add))
 
#define LSR_BASE ( REG8(0x50000005) )
#define THR_BASE ( REG8(0x50000000) )
 
 
#endif
/ecos_debug/or_soc.ld
0,0 → 1,50
/* ------------------------------ */
/* link script */
/* ------------------------------ */
 
MEMORY
{
boot_vector_rom : ORIGIN = 0x00000000, LENGTH = 0x00000010
boot_rom_0 : ORIGIN = 0x04000000, LENGTH = 0x04000000
boot_rom_1 : ORIGIN = 0x08000000, LENGTH = 0x04000000
boot_rom_2 : ORIGIN = 0x0c000000, LENGTH = 0x04000000
mem_bank_1 : ORIGIN = 0x10000000, LENGTH = 0x10000000
mem_bank_2 : ORIGIN = 0x20000000, LENGTH = 0x10000000
mem_bank_3 : ORIGIN = 0x30000000, LENGTH = 0x10000000
}
 
SECTIONS
{
.boot_vector_rom :
{
} > boot_vector_rom
 
.text :
{
reset_func = .;
*(.vectors)
*(.text)
} > boot_rom_0
 
.rodata :
{
*(.rodata)
*(.rodata.*)
. = ALIGN(4);
} > boot_rom_0
 
.data :
{
*(.data)
} > mem_bank_3
 
.bss :
{
*(.bss)
} > mem_bank_3
 
.stack (NOLOAD) :
{
*(.stack)
} > mem_bank_3
}
/ecos_debug/reset.s
0,0 → 1,24
/* */
/* */
 
/* #define STACK_SIZE 0x2000 */
 
.section .stack, "aw", @nobits
.space 0x0800
_stack:
 
.section .vectors, "ax"
# .org 0x100
_reset:
 
/* Set stack pointer */
l.movhi r1,hi(_stack)
l.ori r1,r1,lo(_stack)
/* Jump to main */
l.movhi r2,hi(_main)
l.ori r2,r2,lo(_main)
l.jr r2
l.nop
 
/ecos_debug/boot_vector_rom.s
0,0 → 1,13
 
 
.section .boot_vector_rom, "ax"
.org 0x0
 
_boot_reset:
/* Jump to main */
l.movhi r2,hi(reset_func)
l.ori r2,r2,lo(reset_func)
l.jr r2
l.nop
/ecos_debug/main.c
0,0 → 1,71
//
//
//
 
 
extern void init_serial( void );
extern int puts(const char *s);
 
 
int main (void)
{
unsigned int temp_buf;
// test flash
temp_buf = *((volatile unsigned int *)(0x20000100));
temp_buf = *((volatile unsigned int *)(0x20000104));
temp_buf = *((volatile unsigned int *)(0x20000108));
temp_buf = *((volatile unsigned int *)(0x20000040));
temp_buf = *((volatile unsigned int *)(0x20000044));
temp_buf = *((volatile unsigned int *)(0x20000048));
// test on chip ram
*((volatile unsigned int *)(0x30000000)) = 0xab1122ef;
temp_buf = *((volatile unsigned int *)(0x30000000));
*((volatile unsigned char *)(0x30000001)) = 0xba;
*((volatile unsigned char *)(0x30000002)) = 0xbe;
 
temp_buf = *((volatile unsigned int *)(0x30000000));
// test gpio
temp_buf = *((volatile unsigned int *)(0x60000000));
*((volatile unsigned int *)(0x60000008)) = 0x000000ff;
*((volatile unsigned int *)(0x60000014)) = 0x000000ff;
temp_buf = *((volatile unsigned int *)(0x60000000));
temp_buf = *((volatile unsigned int *)(0x61000000));
*((volatile unsigned int *)(0x61000014)) = 0xffffffff;
*((volatile unsigned int *)(0x61000008)) = 0xffffffff;
temp_buf = *((volatile unsigned int *)(0x61000000));
temp_buf = *((volatile unsigned int *)(0x66000000));
temp_buf = *((volatile unsigned int *)(0x60000028));
temp_buf = *((volatile unsigned int *)(0x6000002c));
temp_buf = *((volatile unsigned int *)(0x60000040));
temp_buf = *((volatile unsigned int *)(0x60400000));
temp_buf = *((volatile unsigned int *)(0x6f000000));
 
*((volatile unsigned int *)(0x5ffffffc)) = 0xcea5e0ff;
// test serial port
init_serial();
NS16550_putc( 'q' );
NS16550_putc( 'a' );
NS16550_putc( 'z' );
NS16550_putc( '\n' );
NS16550_putc( '\r' );
 
puts( "arrg! arrg!!\n\r" );
 
*((volatile unsigned int *)(0x5ffffffc)) = 0xcea5e0ff;
while(1) {};
return 0;
}
 
/ecos_debug/redboot.bin Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
ecos_debug/redboot.bin Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: ecos_debug/serial.h =================================================================== --- ecos_debug/serial.h (nonexistent) +++ ecos_debug/serial.h (revision 25) @@ -0,0 +1,47 @@ +// +// +// + +#ifndef __SERIAL_H +#define __SERIAL_H + +#define FCR_FIFO_EN 0x01 /* Fifo enable */ +#define FCR_RXSR 0x02 /* Receiver soft reset */ +#define FCR_TXSR 0x04 /* Transmitter soft reset */ + +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_DMA_EN 0x04 +#define MCR_TX_DFR 0x08 + +#define LCR_WLS_MSK 0x03 /* character length select mask */ +#define LCR_WLS_5 0x00 /* 5 bit character length */ +#define LCR_WLS_6 0x01 /* 6 bit character length */ +#define LCR_WLS_7 0x02 /* 7 bit character length */ +#define LCR_WLS_8 0x03 /* 8 bit character length */ +#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define LCR_PEN 0x08 /* Parity eneble */ +#define LCR_EPS 0x10 /* Even Parity Select */ +#define LCR_STKP 0x20 /* Stick Parity */ +#define LCR_SBRK 0x40 /* Set Break */ +#define LCR_BKSE 0x80 /* Bank select enable */ + +#define LSR_DR 0x01 /* Data ready */ +#define LSR_OE 0x02 /* Overrun */ +#define LSR_PE 0x04 /* Parity error */ +#define LSR_FE 0x08 /* Framing error */ +#define LSR_BI 0x10 /* Break */ +#define LSR_THRE 0x20 /* Xmit holding register empty */ +#define LSR_TEMT 0x40 /* Xmitter empty */ +#define LSR_ERR 0x80 /* Error */ + +/* useful defaults for LCR */ +#define LCR_8N1 0x03 + + +void init_serial( void ); +void NS16550_putc( char c ); +int puts( char *s); + + +#endif Index: ecos_debug/Makefile =================================================================== --- ecos_debug/Makefile (nonexistent) +++ ecos_debug/Makefile (revision 25) @@ -0,0 +1,92 @@ +ifndef CROSS_COMPILE +# CROSS_COMPILE = or32-elf- +CROSS_COMPILE = or32-uclinux- +CC = $(CROSS_COMPILE)gcc +LD = $(CROSS_COMPILE)ld +NM = $(CROSS_COMPILE)nm +OBJDUMP = $(CROSS_COMPILE)objdump +OBJCOPY = $(CROSS_COMPILE)objcopy +endif + +export CROSS_COMPILE + +ROOT_DIR = ../../../../.. +BOARD_DIR = ../../.. + + +# +# main target +all: main.or32 System.map main_dis.txt main.hex + + +# +# compile the code + +boot_vector_rom.o: boot_vector_rom.s or_soc.ld Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +reset.o: reset.s or_soc.ld Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +serial.o: serial.c serial.h Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +main.o: main.c Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +# +# link the objects + +main.or32: boot_vector_rom.o reset.o serial.o main.o Makefile + $(LD) --warn-common -Tor_soc.ld -o $@ boot_vector_rom.o reset.o main.o serial.o $(LIBS) + +# +# dump human readable stuff + +System.map: main.or32 + @$(NM) $< | \ + grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ + sort > System.map + +main_dis.txt: main.or32 + $(OBJDUMP) -h -t -D main.or32 >main_dis.txt + +# +# generate programing files + +# main.hex: Makefile main.or32 $(ROOT_DIR)/sw/u-boot-1.3.4/u-boot.bin +main.hex: Makefile main.or32 + $(OBJCOPY) -O binary -j .boot_vector_rom main.or32 boot_vector_rom.bin + $(ROOT_DIR)/sw/perl/bin2readmemh.pl -s 32 -f boot_vector_rom.bin > boot_vector_rom.txt + $(OBJCOPY) -O binary -R .boot_vector_rom main.or32 boot_rom_0.bin + $(ROOT_DIR)/sw/perl/bin2readmemh.pl -s 32 -f boot_rom_0.bin > boot_rom_0.txt + $(OBJCOPY) -O binary $(ROOT_DIR)/sw/ecos_debug/install/bin/redboot.elf redboot.bin + $(ROOT_DIR)/sw/perl/bin2readmemh.pl -s 8 -f ./redboot.bin > boot_rom_2.txt + cp *.txt $(BOARD_DIR)/sw/load_this_to_ram/ + + +######################################################################### +clean: + find . -type f \ + \( -name 'core' -o -name '*.bak' -o -name '*~' \ + -o -name '*.o' -o -name '*.a' -o -name '*.tmp' \ + -o -name '*.or32' -o -name '*.bin' -o -name '*.srec' \ + -o -name '*.mem' -o -name '*.img' -o -name '*.out' \ + -o -name '*.aux' -o -name '*.log' \) -print \ + | xargs rm -f + rm -f $(BOARD_DIR)/sw/load_this_to_ram/*.txt + rm -f $(BOARD_DIR)/sw/load_this_to_ram/*.mif + rm -f *.hex + rm -f *.mif + rm -f *.txt + rm -f System.map + +distclean: clean + find . -type f \ + \( -name .depend -o -name '*.srec' -o -name '*.bin' \ + -o -name '*.pdf' -o -name '*.hex' \) \ + -print | xargs rm -f + rm -f $(OBJS) *.bak tags TAGS + rm -fr *.*~ + + Index: uboot/serial.c =================================================================== --- uboot/serial.c (nonexistent) +++ uboot/serial.c (revision 25) @@ -0,0 +1,38 @@ +// +// +// + +#include "de1_or1200.h" +#include "serial.h" + + +// +// use 57600 baud + +void init_serial( void ) +{ + REG8(0x50000003) = 0x83; + REG8(0x50000001) = 0x00; +// REG8(0x50000000) = 0x06; + REG8(0x50000000) = 0x1a; // 57600 baud w/ clk=24MHz +// REG8(0x50000000) = 0x2b; // 57600 baud w/ clk=40MHz + REG8(0x50000003) = 0x03; + REG8(0x50000002) = 0x01; + +} + +void NS16550_putc( char c ) +{ + while ( (LSR_BASE & LSR_THRE) == 0); + THR_BASE = c; +} + + +int puts( char *s ) +{ + while (*s) { + NS16550_putc (*s++); + } +} + + Index: uboot/or_soc.ld =================================================================== --- uboot/or_soc.ld (nonexistent) +++ uboot/or_soc.ld (revision 25) @@ -0,0 +1,50 @@ +/* ------------------------------ */ +/* link script */ +/* ------------------------------ */ + +MEMORY + { + boot_vector_rom : ORIGIN = 0x00000000, LENGTH = 0x00000010 + boot_rom_0 : ORIGIN = 0x04000000, LENGTH = 0x04000000 + boot_rom_1 : ORIGIN = 0x08000000, LENGTH = 0x04000000 + boot_rom_2 : ORIGIN = 0x0c000000, LENGTH = 0x04000000 + mem_bank_1 : ORIGIN = 0x10000000, LENGTH = 0x10000000 + mem_bank_2 : ORIGIN = 0x20000000, LENGTH = 0x10000000 + mem_bank_3 : ORIGIN = 0x30000000, LENGTH = 0x10000000 + } + +SECTIONS +{ + .boot_vector_rom : + { + } > boot_vector_rom + + .text : + { + reset_func = .; + *(.vectors) + *(.text) + } > boot_rom_0 + + .rodata : + { + *(.rodata) + *(.rodata.*) + . = ALIGN(4); + } > boot_rom_0 + + .data : + { + *(.data) + } > mem_bank_3 + + .bss : + { + *(.bss) + } > mem_bank_3 + + .stack (NOLOAD) : + { + *(.stack) + } > mem_bank_3 +} Index: uboot/de1_or1200.h =================================================================== --- uboot/de1_or1200.h (nonexistent) +++ uboot/de1_or1200.h (revision 25) @@ -0,0 +1,18 @@ +// +// +// + + +#ifndef __DE1_OR1200_H +#define __DE1_OR1200_H + +/* Register access macros */ +#define REG8(add) *((volatile unsigned char *)(add)) +#define REG16(add) *((volatile unsigned short *)(add)) +#define REG32(add) *((volatile unsigned long *)(add)) + +#define LSR_BASE ( REG8(0x50000005) ) +#define THR_BASE ( REG8(0x50000000) ) + + +#endif Index: uboot/reset.s =================================================================== --- uboot/reset.s (nonexistent) +++ uboot/reset.s (revision 25) @@ -0,0 +1,24 @@ +/* */ +/* */ + +/* #define STACK_SIZE 0x2000 */ + +.section .stack, "aw", @nobits +.space 0x0800 +_stack: + +.section .vectors, "ax" +# .org 0x100 + +_reset: + + /* Set stack pointer */ + l.movhi r1,hi(_stack) + l.ori r1,r1,lo(_stack) + + /* Jump to main */ + l.movhi r2,hi(_main) + l.ori r2,r2,lo(_main) + l.jr r2 + l.nop + Index: uboot/boot_vector_rom.s =================================================================== --- uboot/boot_vector_rom.s (nonexistent) +++ uboot/boot_vector_rom.s (revision 25) @@ -0,0 +1,13 @@ + + +.section .boot_vector_rom, "ax" +.org 0x0 + +_boot_reset: + + /* Jump to main */ + l.movhi r2,hi(reset_func) + l.ori r2,r2,lo(reset_func) + l.jr r2 + l.nop + \ No newline at end of file Index: uboot/serial.h =================================================================== --- uboot/serial.h (nonexistent) +++ uboot/serial.h (revision 25) @@ -0,0 +1,47 @@ +// +// +// + +#ifndef __SERIAL_H +#define __SERIAL_H + +#define FCR_FIFO_EN 0x01 /* Fifo enable */ +#define FCR_RXSR 0x02 /* Receiver soft reset */ +#define FCR_TXSR 0x04 /* Transmitter soft reset */ + +#define MCR_DTR 0x01 +#define MCR_RTS 0x02 +#define MCR_DMA_EN 0x04 +#define MCR_TX_DFR 0x08 + +#define LCR_WLS_MSK 0x03 /* character length select mask */ +#define LCR_WLS_5 0x00 /* 5 bit character length */ +#define LCR_WLS_6 0x01 /* 6 bit character length */ +#define LCR_WLS_7 0x02 /* 7 bit character length */ +#define LCR_WLS_8 0x03 /* 8 bit character length */ +#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define LCR_PEN 0x08 /* Parity eneble */ +#define LCR_EPS 0x10 /* Even Parity Select */ +#define LCR_STKP 0x20 /* Stick Parity */ +#define LCR_SBRK 0x40 /* Set Break */ +#define LCR_BKSE 0x80 /* Bank select enable */ + +#define LSR_DR 0x01 /* Data ready */ +#define LSR_OE 0x02 /* Overrun */ +#define LSR_PE 0x04 /* Parity error */ +#define LSR_FE 0x08 /* Framing error */ +#define LSR_BI 0x10 /* Break */ +#define LSR_THRE 0x20 /* Xmit holding register empty */ +#define LSR_TEMT 0x40 /* Xmitter empty */ +#define LSR_ERR 0x80 /* Error */ + +/* useful defaults for LCR */ +#define LCR_8N1 0x03 + + +void init_serial( void ); +void NS16550_putc( char c ); +int puts( char *s); + + +#endif Index: uboot/main.c =================================================================== --- uboot/main.c (nonexistent) +++ uboot/main.c (revision 25) @@ -0,0 +1,71 @@ +// +// +// + + +extern void init_serial( void ); +extern int puts(const char *s); + + +int main (void) +{ + unsigned int temp_buf; + + // test flash + temp_buf = *((volatile unsigned int *)(0x20000100)); + temp_buf = *((volatile unsigned int *)(0x20000104)); + temp_buf = *((volatile unsigned int *)(0x20000108)); + + temp_buf = *((volatile unsigned int *)(0x20000040)); + temp_buf = *((volatile unsigned int *)(0x20000044)); + temp_buf = *((volatile unsigned int *)(0x20000048)); + + // test on chip ram + *((volatile unsigned int *)(0x30000000)) = 0xab1122ef; + temp_buf = *((volatile unsigned int *)(0x30000000)); + + *((volatile unsigned char *)(0x30000001)) = 0xba; + *((volatile unsigned char *)(0x30000002)) = 0xbe; + + temp_buf = *((volatile unsigned int *)(0x30000000)); + + // test gpio + temp_buf = *((volatile unsigned int *)(0x60000000)); + *((volatile unsigned int *)(0x60000008)) = 0x000000ff; + *((volatile unsigned int *)(0x60000014)) = 0x000000ff; + temp_buf = *((volatile unsigned int *)(0x60000000)); + + temp_buf = *((volatile unsigned int *)(0x61000000)); + *((volatile unsigned int *)(0x61000014)) = 0xffffffff; + *((volatile unsigned int *)(0x61000008)) = 0xffffffff; + temp_buf = *((volatile unsigned int *)(0x61000000)); + + temp_buf = *((volatile unsigned int *)(0x66000000)); + + temp_buf = *((volatile unsigned int *)(0x60000028)); + temp_buf = *((volatile unsigned int *)(0x6000002c)); + temp_buf = *((volatile unsigned int *)(0x60000040)); + temp_buf = *((volatile unsigned int *)(0x60400000)); + temp_buf = *((volatile unsigned int *)(0x6f000000)); + + *((volatile unsigned int *)(0x5ffffffc)) = 0xcea5e0ff; + + // test serial port + init_serial(); + + NS16550_putc( 'q' ); + NS16550_putc( 'a' ); + NS16550_putc( 'z' ); + NS16550_putc( '\n' ); + NS16550_putc( '\r' ); + + puts( "arrg! arrg!!\n\r" ); + + + *((volatile unsigned int *)(0x5ffffffc)) = 0xcea5e0ff; + + while(1) {}; + + return 0; +} + Index: uboot/uboot_flash.bin =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: uboot/uboot_flash.bin =================================================================== --- uboot/uboot_flash.bin (nonexistent) +++ uboot/uboot_flash.bin (revision 25)
uboot/uboot_flash.bin Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: uboot/Makefile =================================================================== --- uboot/Makefile (nonexistent) +++ uboot/Makefile (revision 25) @@ -0,0 +1,94 @@ +ifndef CROSS_COMPILE +# CROSS_COMPILE = or32-elf- +CROSS_COMPILE = or32-uclinux- +CC = $(CROSS_COMPILE)gcc +LD = $(CROSS_COMPILE)ld +NM = $(CROSS_COMPILE)nm +OBJDUMP = $(CROSS_COMPILE)objdump +OBJCOPY = $(CROSS_COMPILE)objcopy +endif + +export CROSS_COMPILE + +ROOT_DIR = ../../../../.. +BOARD_DIR = ../../.. + + +# +# main target +all: main.or32 System.map main_dis.txt main.hex + + +# +# compile the code + +boot_vector_rom.o: boot_vector_rom.s or_soc.ld Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +reset.o: reset.s or_soc.ld Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +serial.o: serial.c serial.h Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +main.o: main.c Makefile + $(CC) -O2 -g -c -fomit-frame-pointer -o $@ $< $(CFLAGS) + +# +# link the objects + +main.or32: boot_vector_rom.o reset.o serial.o main.o Makefile + $(LD) --warn-common -Tor_soc.ld -o $@ boot_vector_rom.o reset.o main.o serial.o $(LIBS) + +# +# dump human readable stuff + +System.map: main.or32 + @$(NM) $< | \ + grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ + sort > System.map + +main_dis.txt: main.or32 + $(OBJDUMP) -h -t -D main.or32 >main_dis.txt + +# +# generate programing files + +# main.hex: Makefile main.or32 $(ROOT_DIR)/sw/u-boot-1.3.4/u-boot.bin +main.hex: Makefile main.or32 + $(OBJCOPY) -O binary -j .boot_vector_rom main.or32 boot_vector_rom.bin +# $(ROOT_DIR)/sw/perl/bin2readmemh.pl -x 1 -d 4 -s 32 -f boot_vector_rom.bin > boot_vector_rom.txt + $(ROOT_DIR)/sw/perl/bin2readmemh.pl -s 32 -f boot_vector_rom.bin > boot_vector_rom.txt + $(OBJCOPY) -O binary -R .boot_vector_rom main.or32 boot_rom_0.bin +# $(ROOT_DIR)/sw/perl/bin2readmemh.pl -x 1 -d 256 -s 32 -f boot_rom_0.bin > boot_rom_0.txt + $(ROOT_DIR)/sw/perl/bin2readmemh.pl -s 32 -f boot_rom_0.bin > boot_rom_0.txt +# $(ROOT_DIR)/sw/perl/bin2readmemh.pl -x 1 -d 32768 -s 32 -f $(ROOT_DIR)/sw/u-boot-2009.03/u-boot.bin > boot_rom_2.txt + $(ROOT_DIR)/sw/perl/bin2readmemh.pl -s 8 -f $(ROOT_DIR)/sw/u-boot-2009.03/u-boot.bin > boot_rom_2.txt + cp *.txt $(BOARD_DIR)/sw/load_this_to_ram/ + + +######################################################################### +clean: + find . -type f \ + \( -name 'core' -o -name '*.bak' -o -name '*~' \ + -o -name '*.o' -o -name '*.a' -o -name '*.tmp' \ + -o -name '*.or32' -o -name '*.bin' -o -name '*.srec' \ + -o -name '*.mem' -o -name '*.img' -o -name '*.out' \ + -o -name '*.aux' -o -name '*.log' \) -print \ + | xargs rm -f + rm -f $(BOARD_DIR)/sw/load_this_to_ram/*.txt + rm -f $(BOARD_DIR)/sw/load_this_to_ram/*.mif + rm -f *.hex + rm -f *.mif + rm -f *.txt + rm -f System.map + +distclean: clean + find . -type f \ + \( -name .depend -o -name '*.srec' -o -name '*.bin' \ + -o -name '*.pdf' -o -name '*.hex' \) \ + -print | xargs rm -f + rm -f $(OBJS) *.bak tags TAGS + rm -fr *.*~ + +

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.