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/or1k/tags/ECOS_2_0/ecos-2.0/packages/hal/powerpc/mbx
- from Rev 1255 to Rev 1765
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Rev 1255 → Rev 1765
/v2_0/cdl/hal_powerpc_mbx.cdl
0,0 → 1,335
# ==================================================================== |
# |
# hal_powerpc_mbx.cdl |
# |
# PowerPC/MBX board HAL package configuration data |
# |
# ==================================================================== |
#####ECOSGPLCOPYRIGHTBEGIN#### |
## ------------------------------------------- |
## This file is part of eCos, the Embedded Configurable Operating System. |
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
## Copyright (C) 2002 Gary Thomas |
## |
## eCos is free software; you can redistribute it and/or modify it under |
## the terms of the GNU General Public License as published by the Free |
## Software Foundation; either version 2 or (at your option) any later version. |
## |
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
## WARRANTY; without even the implied warranty of MERCHANTABILITY or |
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
## for more details. |
## |
## You should have received a copy of the GNU General Public License along |
## with eCos; if not, write to the Free Software Foundation, Inc., |
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
## |
## As a special exception, if other files instantiate templates or use macros |
## or inline functions from this file, or you compile this file and link it |
## with other works to produce a work based on this file, this file does not |
## by itself cause the resulting work to be covered by the GNU General Public |
## License. However the source code for this file must still be made available |
## in accordance with section (3) of the GNU General Public License. |
## |
## This exception does not invalidate any other reasons why a work based on |
## this file might be covered by the GNU General Public License. |
## |
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
## at http://sources.redhat.com/ecos/ecos-license/ |
## ------------------------------------------- |
#####ECOSGPLCOPYRIGHTEND#### |
# ==================================================================== |
######DESCRIPTIONBEGIN#### |
# |
# Author(s): jskov |
# Original data: hmt |
# Contributors: |
# Date: 1999-11-02 |
# |
#####DESCRIPTIONEND#### |
# |
# ==================================================================== |
|
cdl_package CYGPKG_HAL_POWERPC_MBX { |
display "Motorola MBX PowerPC evaluation board" |
parent CYGPKG_HAL_POWERPC |
requires CYGPKG_HAL_POWERPC_MPC8xx |
define_header hal_powerpc_mbx.h |
include_dir cyg/hal |
description " |
The MBX HAL package provides the support needed to run |
eCos on a Motorola MBX board equipped with a PowerPC processor." |
|
compile hal_diag.c hal_aux.c mbx.S |
|
implements CYGINT_HAL_DEBUG_GDB_STUBS |
implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK |
implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT |
implements CYGNUM_HAL_QUICC_SMC1 |
|
define_proc { |
puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_powerpc_mpc8xx.h>" |
puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_powerpc_mbx.h>" |
|
puts $::cdl_header "#define HAL_PLATFORM_CPU \"PowerPC 860\"" |
puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Motorola MBX\"" |
puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\"" |
} |
|
cdl_component CYG_HAL_STARTUP { |
display "Startup type" |
flavor data |
legal_values {"RAM" "ROM"} |
default_value {"RAM"} |
no_define |
define -file system.h CYG_HAL_STARTUP |
description " |
This option is used to control where the application program will |
run, either from RAM or ROM (flash) memory. ROM based applications |
must be self contained, while RAM applications will typically assume |
the existence of a debug environment, such as GDB stubs." |
} |
|
cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED { |
display "Development board clock speed (MHz)" |
flavor data |
legal_values 40 50 |
default_value 50 |
description " |
MBX Development Boards have various system clock speeds |
depending on the processor fitted. Select the clock speed |
appropriate for your board so that the system can set the serial |
baud rate correctly, amongst other things." |
} |
|
cdl_option CYGHWR_HAL_POWERPC_MBX_BOOT_32BIT_FLASH { |
display "Boot ROM is 32-bit Flash device" |
default_value 0 |
description " |
MBX Development Boards have a socketed 8-bit ROM (AM27F040, |
AM29F040 or similar) and a permanently soldered 32-bit flash |
device. Which is used for booting is link selectable (refer to |
the MBX Series documentation from Motorola). Enable this option |
when booting from the 32-bit flash so that the correct memory |
timing and access method is initialized. This consideration |
does apply to RAM start eCos applications as well as ROM start |
or stub ROMs." |
} |
|
# Real-time clock/counter specifics |
cdl_component CYGNUM_HAL_RTC_CONSTANTS { |
display "Real-time clock constants." |
description " |
Period is busclock/16/100." |
flavor none |
no_define |
|
cdl_option CYGNUM_HAL_RTC_NUMERATOR { |
display "Real-time clock numerator" |
flavor data |
calculated 1000000000 |
} |
cdl_option CYGNUM_HAL_RTC_DENOMINATOR { |
display "Real-time clock denominator" |
flavor data |
default_value 100 |
description " |
This option selects the number of system clock 'ticks' |
per second. This rate is sometimes known as the heartbeat rate." |
} |
cdl_option CYGNUM_HAL_RTC_PERIOD { |
display "Real-time clock period" |
flavor data |
calculated { (((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/CYGNUM_HAL_RTC_DENOMINATOR) } |
} |
} |
|
cdl_component CYGBLD_GLOBAL_OPTIONS { |
display "Global build options" |
flavor none |
description " |
Global build options including control over |
compiler flags, linker flags and choice of toolchain." |
|
|
parent CYGPKG_NONE |
|
cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX { |
display "Global command prefix" |
flavor data |
no_define |
default_value { "powerpc-eabi" } |
description " |
This option specifies the command prefix used when |
invoking the build tools." |
} |
|
cdl_option CYGBLD_GLOBAL_CFLAGS { |
display "Global compiler flags" |
flavor data |
no_define |
default_value { "-msoft-float -mcpu=860 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" } |
description " |
This option controls the global compiler flags which |
are used to compile all packages by |
default. Individual packages may define |
options which override these global flags." |
} |
|
cdl_option CYGBLD_GLOBAL_LDFLAGS { |
display "Global linker flags" |
flavor data |
no_define |
default_value { "-msoft-float -mcpu=860 -g -nostdlib -Wl,--gc-sections -Wl,-static" } |
description " |
This option controls the global linker flags. Individual |
packages may define options which override these global flags." |
} |
|
cdl_option CYGBLD_BUILD_GDB_STUBS { |
display "Build GDB stub ROM image" |
default_value 0 |
requires { CYG_HAL_STARTUP == "ROM" } |
requires CYGSEM_HAL_ROM_MONITOR |
requires CYGBLD_BUILD_COMMON_GDB_STUBS |
requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT |
requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT |
requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM |
no_define |
description " |
This option enables the building of the GDB stubs for the |
board. The common HAL controls takes care of most of the |
build process, but the platform CDL takes care of creating |
an S-Record data file suitable for programming using |
the board's EPPC-Bug firmware monitor." |
|
make -priority 320 { |
<PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img |
$(OBJCOPY) -O srec --change-address=0x02040000 $< $(@:.bin=.srec) |
$(OBJCOPY) -O binary $< $@ |
} |
} |
} |
|
cdl_component CYGPKG_HAL_POWERPC_MBX_OPTIONS { |
display "MBX build options" |
flavor none |
description " |
Package specific build options including control over |
compiler flags used only in building this package, |
and details of which tests are built." |
|
|
cdl_option CYGPKG_HAL_POWERPC_MBX_CFLAGS_ADD { |
display "Additional compiler flags" |
flavor data |
no_define |
default_value { "" } |
description " |
This option modifies the set of compiler flags for |
building the MBX HAL. These flags are used in addition |
to the set of global flags." |
} |
|
cdl_option CYGPKG_HAL_POWERPC_MBX_CFLAGS_REMOVE { |
display "Suppressed compiler flags" |
flavor data |
no_define |
default_value { "" } |
description " |
This option modifies the set of compiler flags for |
building the MBX HAL. These flags are removed from |
the set of global flags if present." |
} |
|
cdl_option CYGPKG_HAL_POWERPC_MBX_TESTS { |
display "MBX tests" |
flavor data |
no_define |
calculated { "tests/mbxtime" } |
description " |
This option specifies the set of tests for the MBX HAL." |
} |
} |
|
cdl_component CYGHWR_MEMORY_LAYOUT { |
display "Memory layout" |
flavor data |
no_define |
calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_mbx_ram" : \ |
"powerpc_mbx_rom" } |
|
cdl_option CYGHWR_MEMORY_LAYOUT_LDI { |
display "Memory layout linker script fragment" |
flavor data |
no_define |
define -file system.h CYGHWR_MEMORY_LAYOUT_LDI |
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_mbx_ram.ldi>" : \ |
"<pkgconf/mlt_powerpc_mbx_rom.ldi>" } |
} |
|
cdl_option CYGHWR_MEMORY_LAYOUT_H { |
display "Memory layout header file" |
flavor data |
no_define |
define -file system.h CYGHWR_MEMORY_LAYOUT_H |
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_powerpc_mbx_ram.h>" : \ |
"<pkgconf/mlt_powerpc_mbx_rom.h>" } |
} |
} |
|
cdl_option CYGSEM_HAL_ROM_MONITOR { |
display "Behave as a ROM monitor" |
flavor bool |
default_value 0 |
parent CYGPKG_HAL_ROM_MONITOR |
requires { CYG_HAL_STARTUP == "ROM" } |
description " |
Enable this option if this program is to be used as a ROM monitor, |
i.e. applications will be loaded into RAM on the board, and this |
ROM monitor may process exceptions or interrupts generated from the |
application. This enables features such as utilizing a separate |
interrupt stack when exceptions are generated." |
} |
|
cdl_component CYGPKG_REDBOOT_HAL_OPTIONS { |
display "Redboot HAL options" |
flavor none |
no_define |
parent CYGPKG_REDBOOT |
active_if CYGPKG_REDBOOT |
description " |
This option lists the target's requirements for a valid Redboot |
configuration." |
|
cdl_option CYGSEM_REDBOOT_HAL_LINUX_BOOT { |
active_if CYGBLD_BUILD_REDBOOT_WITH_EXEC |
display "Support booting Linux via RedBoot" |
flavor bool |
default_value 1 |
description " |
This option enables RedBoot to support booting of a Linux kernel." |
|
compile -library=libextras.a redboot_linux_exec.c |
} |
|
cdl_option CYGBLD_BUILD_REDBOOT_BIN { |
display "Build Redboot ROM binary image" |
active_if CYGBLD_BUILD_REDBOOT |
default_value 1 |
no_define |
description "This option enables the conversion of the Redboot ELF |
image to a binary image suitable for ROM programming." |
|
make -priority 325 { |
<PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf |
$(OBJCOPY) --strip-debug $< $(@:.bin=.img) |
$(OBJCOPY) -O srec $< $(@:.bin=.srec) |
$(OBJCOPY) -O srec --change-address=0x02040000 $< $(@:.bin=.ppcbug) |
$(OBJCOPY) -O binary $< $@ |
} |
} |
} |
} |
/v2_0/tests/mbxtime.cxx
0,0 → 1,209
/*================================================================= |
// |
// mbxtime.cxx |
// |
// PowerPC MBX HAL timing tests |
// |
//========================================================================== |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//========================================================================== |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): hmt |
// Contributors: hmt |
// Date: 1999-06-01 |
//####DESCRIPTIONEND#### |
*/ |
|
#include <pkgconf/system.h> |
#include <pkgconf/hal.h> |
|
#include <cyg/infra/cyg_type.h> |
#include <cyg/infra/cyg_ass.h> |
#include <cyg/infra/testcase.h> |
|
#ifdef CYGPKG_KERNEL |
|
#include <pkgconf/kernel.h> |
|
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK |
|
#include <cyg/hal/hal_arch.h> |
#include <cyg/hal/hal_intr.h> |
#include <cyg/hal/hal_diag.h> |
|
#include <pkgconf/infra.h> |
|
#include <cyg/infra/diag.h> |
|
#include <cyg/kernel/thread.hxx> |
#include <cyg/kernel/thread.inl> |
#include <cyg/kernel/sched.hxx> |
#include <cyg/kernel/sched.inl> |
|
// ------------------------------------------------------------------------ |
|
externC void hal_mbx_flash_led( int count ); |
externC void hal_mbx_set_led( int val ); |
|
// ------------------------------------------------------------------------- |
|
static void entry1( CYG_ADDRWORD arg ) |
{ |
int i; |
char *s = "tick 00"; |
extern Cyg_Thread thread2; |
CYG_TEST_INFO( "Starting measured seconds..." ); |
for ( i = 0; i < 20 ; i++ ) { |
Cyg_Thread::self()->delay( 100 ); // units should be centiSeconds |
|
hal_mbx_set_led( ((~i) & 7)<<1 ); |
|
if ( '9' == s[ 6 ]++ ) { |
s[ 6 ] = '0'; |
s[ 5 ] ++; |
} |
CYG_TEST_INFO( s ); |
} |
|
CYG_TEST_PASS( "Done measured seconds..." ); |
|
hal_mbx_flash_led( 5 ); |
|
thread2.resume(); |
} |
|
//--------------------------------------------------------------- |
|
#define LOOPS 30 |
|
int loops[ LOOPS ] = { 0,0,0,0,0 , 0,0,0,0,0 , |
0,0,0,0,0 , 0,0,0,0,0 , |
0,0,0,0,0 , 0,0,0,0,0 }; |
|
char s[] = "0 count 00 loops 00000"; |
|
static void entry2( CYG_ADDRWORD arg ) |
{ |
#if 0 // Do not bother with this on PPC |
int i, t1, t2, a; |
for ( a = 0; a < 10; a++, (*s)++ ) { |
CYG_TEST_INFO( "------------------------------------------" ); |
HAL_CLOCK_READ( &t1 ); |
do { |
t2 = t1; |
HAL_CLOCK_READ( &t1 ); |
} while ( t1 >= t2 ); |
|
for ( i = 0; i < LOOPS; i++ ) { |
register int z = 0; |
while ( t1 <= i ) { |
z++; |
HAL_CLOCK_READ( &t1 ); |
} |
loops[ i ] = z; |
} |
|
s[9] = '0'; |
s[8] = '0'; |
for ( i = 0; i < LOOPS; i++ ) { |
s[ sizeof( s ) - 2 ] = '0' + loops[ i ] / 1 % 10; |
s[ sizeof( s ) - 3 ] = '0' + loops[ i ] / 10 % 10; |
s[ sizeof( s ) - 4 ] = '0' + loops[ i ] / 100 % 10; |
s[ sizeof( s ) - 5 ] = '0' + loops[ i ] / 1000 % 10; |
s[ sizeof( s ) - 6 ] = '0' + loops[ i ] / 10000 % 10; |
CYG_TEST_INFO( s ); |
if ( '9' == s[9]++ ) { |
s[9] = '0'; |
s[8]++; |
} |
} |
} |
#endif |
CYG_TEST_PASS( "Counted loops per timer tick" ); |
CYG_TEST_EXIT( "All done" ); |
} |
|
// ------------------------------------------------------------------------- |
|
static char stack1[ CYGNUM_HAL_STACK_SIZE_TYPICAL ]; |
static char stack2[ CYGNUM_HAL_STACK_SIZE_TYPICAL ]; |
|
static Cyg_Thread thread1 CYG_INIT_PRIORITY( APPLICATION ) |
= Cyg_Thread( 2u, entry1, 0u, "timed minute thread", |
(CYG_ADDRWORD)stack1, |
(CYG_ADDRWORD)CYGNUM_HAL_STACK_SIZE_TYPICAL ); |
|
static Cyg_Thread thread2 CYG_INIT_PRIORITY( APPLICATION ) |
= Cyg_Thread( 4u, entry2, 0u, "uS clock loops timing thread", |
(CYG_ADDRWORD)stack2, |
(CYG_ADDRWORD)CYGNUM_HAL_STACK_SIZE_TYPICAL ); |
|
// ------------------------------------------------------------------------- |
|
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG |
externC void |
cyg_hal_invoke_constructors(); |
#endif |
|
externC void |
cyg_user_start( void ) |
{ |
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG |
cyg_hal_invoke_constructors(); |
#endif |
CYG_TEST_INIT(); |
CYG_TEST_INFO( "cyg_user_start()" ); |
thread1.resume(); |
} |
|
// ------------------------------------------------------------------------- |
|
#else // ! CYGVAR_KERNEL_COUNTERS_CLOCK |
#define N_A_MSG "no kernel clock" |
#endif // CYGVAR_KERNEL_COUNTERS_CLOCK |
#else // ! CYGPKG_KERNEL |
#define N_A_MSG "no kernel" |
#endif // CYGPKG_KERNEL |
|
#ifdef N_A_MSG |
externC void |
cyg_start( void ) |
{ |
CYG_TEST_INIT(); |
CYG_TEST_NA( N_A_MSG ); |
} |
#endif // N_A_MSG defined ie. we are N/A. |
|
/* EOF mbxtime.cxx */ |
/v2_0/include/plf_intr.h
0,0 → 1,82
#ifndef CYGONCE_HAL_PLF_INTR_H |
#define CYGONCE_HAL_PLF_INTR_H |
|
//========================================================================== |
// |
// plf_intr.h |
// |
// MBX platform specific interrupt definitions |
// |
//========================================================================== |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// Copyright (C) 2002 Gary Thomas |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//========================================================================== |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): jskov |
// Contributors: jskov, gthomas |
// Date: 2000-06-13 |
// Purpose: Define platform specific interrupt support |
// |
// Usage: |
// #include <cyg/hal/plf_intr.h> |
// ... |
// |
// |
//####DESCRIPTIONEND#### |
// |
//========================================================================== |
|
#include <pkgconf/hal.h> |
|
#include <cyg/infra/cyg_type.h> |
|
//-------------------------------------------------------------------------- |
// Control-C support. |
|
// Defined by the quicc driver |
#include <cyg/hal/quicc/quicc_smc1.h> |
|
|
//---------------------------------------------------------------------------- |
// Reset. |
|
externC void _mpc8xx_reset(void); |
#define HAL_PLATFORM_RESET() _mpc8xx_reset() |
|
#define HAL_PLATFORM_RESET_ENTRY 0xfe000100 |
|
//-------------------------------------------------------------------------- |
#endif // ifndef CYGONCE_HAL_PLF_INTR_H |
// End of plf_intr.h |
/v2_0/include/plf_stub.h
0,0 → 1,88
#ifndef CYGONCE_HAL_PLF_STUB_H |
#define CYGONCE_HAL_PLF_STUB_H |
|
//============================================================================= |
// |
// plf_stub.h |
// |
// Platform header for GDB stub support. |
// |
//============================================================================= |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//============================================================================= |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): jskov |
// Contributors:jskov |
// Date: 1999-02-12 |
// Purpose: Platform HAL stub support for PowerPC/MBX board. |
// Usage: #include <cyg/hal/plf_stub.h> |
// |
//####DESCRIPTIONEND#### |
// |
//============================================================================= |
|
#include <pkgconf/hal.h> |
#include <pkgconf/hal_powerpc_mbx.h> |
|
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
|
#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM |
|
#include <cyg/hal/ppc_stub.h> // architecture stub support |
|
//---------------------------------------------------------------------------- |
// Define some platform specific communication details. This is mostly |
// handled by hal_if now, but we need to make sure the comms tables are |
// properly initialized. |
|
externC void cyg_hal_plf_comms_init(void); |
|
#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init() |
|
#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud)) |
#define HAL_STUB_PLATFORM_INIT_BREAK_IRQ() CYG_EMPTY_STATEMENT |
#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0 |
//---------------------------------------------------------------------------- |
// Stub initializer. |
externC void hal_mbx_set_led( int val ); |
#ifdef CYG_HAL_STARTUP_ROM |
# define HAL_STUB_PLATFORM_INIT() hal_mbx_set_led( 4 ) |
// to distinguish eCos stub ROM ready state from either CygMon or app. |
#endif |
|
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
//----------------------------------------------------------------------------- |
#endif // CYGONCE_HAL_PLF_STUB_H |
// End of plf_stub.h |
/v2_0/include/plf_regs.h
0,0 → 1,60
#ifndef CYGONCE_HAL_PLF_REGS_H |
#define CYGONCE_HAL_PLF_REGS_H |
|
//========================================================================== |
// |
// plf_regs.h |
// |
// PowerPC 8xx platform CPU definitions |
// |
//========================================================================== |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 2002 Gary Thomas |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//========================================================================== |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): gthomas |
// Contributors: gthomas |
// Date: 2002-06-27 |
// Purpose: |
// Description: Possibly override any platform assumptions |
// |
// Usage: Included via the variant+architecture register headers: |
// ... |
// |
// |
//####DESCRIPTIONEND#### |
// |
//========================================================================== |
|
#endif // CYGONCE_HAL_PLF_REGS_H |
/v2_0/include/pkgconf/mlt_powerpc_mbx_rom.h
0,0 → 1,35
// eCos memory layout - Fri Oct 20 10:35:48 2000 |
|
// This is a generated file - do not edit |
|
#ifndef __ASSEMBLER__ |
#include <cyg/infra/cyg_type.h> |
#include <stddef.h> |
|
#endif |
#define CYGMEM_REGION_ram (0) |
#define CYGMEM_REGION_ram_SIZE (0x400000) |
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) |
#define CYGMEM_REGION_rom (0xfe000000) |
#define CYGMEM_REGION_rom_SIZE (0x800000) |
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_vectors) []; |
#endif |
#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) |
#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_vsr_table) []; |
#endif |
#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) |
#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_virtual_table) []; |
#endif |
#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) |
#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__heap1) []; |
#endif |
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) |
#define CYGMEM_SECTION_heap1_SIZE (0x400000 - (size_t) CYG_LABEL_NAME (__heap1)) |
/v2_0/include/pkgconf/mlt_powerpc_mbx_rom.ldi
0,0 → 1,31
// eCos memory layout - Fri Oct 20 10:35:48 2000 |
|
// This is a generated file - do not edit |
|
#include <cyg/infra/cyg_type.inc> |
|
MEMORY |
{ |
ram : ORIGIN = 0, LENGTH = 0x400000 |
rom : ORIGIN = 0xfe000000, LENGTH = 0x800000 |
} |
|
SECTIONS |
{ |
SECTIONS_BEGIN |
SECTION_vectors (rom, 0xfe000000, LMA_EQ_VMA) |
SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA) |
CYG_LABEL_DEFN(__reserved_vectors) = 0; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000; |
CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; |
CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; |
SECTION_data (ram, ALIGN (0x10), FOLLOWING (.gcc_except_table)) |
SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) |
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); |
SECTIONS_END |
} |
/v2_0/include/pkgconf/mlt_powerpc_mbx_ram.h
0,0 → 1,37
// eCos memory layout - Fri Oct 20 10:35:23 2000 |
|
// This is a generated file - do not edit |
|
#ifndef __ASSEMBLER__ |
#include <cyg/infra/cyg_type.h> |
#include <stddef.h> |
|
#endif |
#define CYGMEM_REGION_ram (0) |
#define CYGMEM_REGION_ram_SIZE (0x400000) |
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_vectors) []; |
#endif |
#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors)) |
#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_vsr_table) []; |
#endif |
#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) |
#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_virtual_table) []; |
#endif |
#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table)) |
#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_for_rom) []; |
#endif |
#define CYGMEM_SECTION_reserved_for_rom (CYG_LABEL_NAME (__reserved_for_rom)) |
#define CYGMEM_SECTION_reserved_for_rom_SIZE (0x1cd00) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__heap1) []; |
#endif |
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) |
#define CYGMEM_SECTION_heap1_SIZE (0x400000 - (size_t) CYG_LABEL_NAME (__heap1)) |
/v2_0/include/pkgconf/mlt_powerpc_mbx_ram.ldi
0,0 → 1,31
// eCos memory layout - Fri Oct 20 10:35:23 2000 |
|
// This is a generated file - do not edit |
|
#include <cyg/infra/cyg_type.inc> |
|
MEMORY |
{ |
ram : ORIGIN = 0, LENGTH = 0x400000 |
} |
|
SECTIONS |
{ |
SECTIONS_BEGIN |
CYG_LABEL_DEFN(__reserved_vectors) = 0; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000; |
CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; |
CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100; |
CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10); . = CYG_LABEL_DEFN(__reserved_for_rom) + 0x1cd00; |
SECTION_vectors (ram, ALIGN (0x10), LMA_EQ_VMA) |
SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) |
SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) |
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); |
SECTIONS_END |
} |
/v2_0/include/pkgconf/mlt_powerpc_mbx_rom.mlt
0,0 → 1,17
version 0 |
region ram 0 400000 0 ! |
region rom fe000000 800000 1 ! |
section reserved_vectors 3000 1 0 0 1 1 1 1 0 0 reserved_vsr_table reserved_vsr_table ! |
section reserved_vsr_table 200 1 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! |
section reserved_virtual_table 100 1 0 0 0 1 0 0 data ! |
section data 0 10 1 1 0 1 0 0 sbss ! |
section sbss 0 4 0 1 0 1 0 1 bss bss ! |
section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! |
section heap1 0 8 0 0 0 0 0 0 ! |
section vectors 0 1 0 1 1 1 1 1 fe000000 fe000000 text text ! |
section text 0 4 0 1 0 1 0 1 fini fini ! |
section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! |
section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! |
section rodata 0 8 0 1 0 1 0 1 fixup fixup ! |
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! |
section gcc_except_table 0 1 0 1 0 0 0 1 data ! |
/v2_0/include/pkgconf/mlt_powerpc_mbx_ram.mlt
0,0 → 1,17
version 0 |
region ram 0 400000 0 ! |
section reserved_vectors 3000 1 0 0 1 1 1 1 0 0 reserved_vsr_table reserved_vsr_table ! |
section reserved_vsr_table 200 10 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table ! |
section reserved_virtual_table 100 10 0 0 0 1 0 1 reserved_for_rom reserved_for_rom ! |
section reserved_for_rom 1cd00 10 0 0 0 1 0 1 vectors vectors ! |
section vectors 0 10 0 1 0 1 0 1 text text ! |
section text 0 4 0 1 0 1 0 1 fini fini ! |
section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! |
section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! |
section rodata 0 8 0 1 0 1 0 1 fixup fixup ! |
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! |
section gcc_except_table 0 1 0 1 0 1 0 1 data data ! |
section data 0 8 0 1 0 1 0 1 sbss sbss ! |
section sbss 0 4 0 1 0 1 0 1 bss bss ! |
section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! |
section heap1 0 8 0 0 0 0 0 0 ! |
/v2_0/include/plf_cache.h
0,0 → 1,64
#ifndef CYGONCE_PLF_CACHE_H |
#define CYGONCE_PLF_CACHE_H |
|
//============================================================================= |
// |
// plf_cache.h |
// |
// Platform HAL cache details |
// |
//============================================================================= |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//============================================================================= |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): jskov |
// Contributors:jskov |
// Date: 2000-01-26 |
// Purpose: Platform cache control API |
// Description: The macros defined here provide the platform specific |
// cache control operations / behavior. |
// Usage: Is included via the architecture cache header: |
// #include <cyg/hal/hal_cache.h> |
// |
//####DESCRIPTIONEND#### |
// |
//============================================================================= |
|
//--------------------------------------------------------------------------- |
// Initial cache enabling - controlled by common CDL |
|
//----------------------------------------------------------------------------- |
#endif // ifndef CYGONCE_PLF_CACHE_H |
// End of plf_cache.h |
/v2_0/include/hal_diag.h
0,0 → 1,92
#ifndef CYGONCE_HAL_HAL_DIAG_H |
#define CYGONCE_HAL_HAL_DIAG_H |
|
//============================================================================= |
// |
// hal_diag.h |
// |
// HAL Support for Kernel Diagnostic Routines |
// |
//============================================================================= |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//============================================================================= |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): nickg |
// Contributors:nickg |
// Date: 1998-03-02 |
// Purpose: HAL Support for Kernel Diagnostic Routines |
// Description: Diagnostic routines for use during kernel development. |
// Usage: #include <cyg/hal/hal_diag.h> |
// |
//####DESCRIPTIONEND#### |
// |
//============================================================================= |
|
#include <pkgconf/hal.h> |
|
#include <cyg/infra/cyg_type.h> |
|
#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG) |
|
#include <cyg/hal/hal_if.h> |
|
#define HAL_DIAG_INIT() hal_if_diag_init() |
#define HAL_DIAG_WRITE_CHAR(_c_) hal_if_diag_write_char(_c_) |
#define HAL_DIAG_READ_CHAR(_c_) hal_if_diag_read_char(&_c_) |
|
#else // everything by steam |
|
//----------------------------------------------------------------------------- |
// functions implemented in hal_diag.c |
|
externC void hal_diag_init(void); |
|
externC void hal_diag_write_char(char c); |
|
externC void hal_diag_read_char(char *c); |
|
//----------------------------------------------------------------------------- |
|
#define HAL_DIAG_INIT() hal_diag_init() |
|
#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_) |
|
#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_) |
|
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG |
|
//----------------------------------------------------------------------------- |
// end of hal_diag.h |
#endif // CYGONCE_HAL_HAL_DIAG_H |
/v2_0/ChangeLog
0,0 → 1,589
2002-12-02 Gary Thomas <gthomas@ecoscentric.com> |
|
* include/plf_intr.h: Use MPC8xx variant RESET support. |
|
2002-11-26 Gary Thomas <gthomas@ecoscentric.com> |
|
* cdl/hal_powerpc_mbx.cdl: Move platform defines to platform package. |
|
2002-11-25 Gary Thomas <gthomas@ecoscentric.com> |
|
* cdl/hal_powerpc_mbx.cdl: Add new CDL which describes port layout. |
|
2002-08-02 Andrew Lunn <Andrew.Lunn@ascom.ch> |
|
* cdl/hal_powerpc_mbx.cdl: Redboot exec command can now be disabled |
by CDL |
|
2002-06-27 Gary Thomas <gary@chez-thomas.org> |
|
* include/plf_regs.h: New file - platform overrides. |
|
2002-05-13 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Removed implemntation of |
CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED. |
|
2002-04-11 Gary Thomas <gthomas@redhat.com> |
|
* include/plf_cache.h: Cache control is in hal/common CDL. |
|
2002-01-23 Gary Thomas <gthomas@redhat.com> |
|
* src/redboot_linux_exec.c (do_exec): Better match for EPPCbug |
environment, necessary for Linux boot. |
|
* src/hal_aux.c: Move IMMR to match what Motorola EPPCbug uses. |
|
2002-01-16 Nick Garnett <nickg@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Added CYGSEM_REDBOOT_HAL_LINUX_BOOT to |
enable Linux booting support. |
|
* src/redboot_linux_exec.c: Added this file to contain Linux exec |
command. |
|
2001-06-21 Jonathan Larmour <jlarmour@redhat.com> |
|
* images/*: Remove. Don't bloat repository with things already on |
the web. |
|
2001-05-07 Gary Thomas <gthomas@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: |
Disable CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED since most |
installations will now use RedBoot. |
|
2001-05-05 Gary Thomas <gthomas@redhat.com> |
|
* misc/redboot_ROM_40.ecm: |
* misc/redboot_RAM_40.ecm: New configuration - 40MHz boards. |
|
* misc/redboot_ROM.ecm: |
* misc/redboot_RAM.ecm: Update for latest RedBoot, include compression. |
|
* src/hal_diag.c: |
* include/plf_stub.h: |
* include/plf_intr.h: |
* cdl/hal_powerpc_mbx.cdl: Fix copyrights. |
|
2001-03-08 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Does not guarantee virtual vector |
support. |
|
2001-02-23 Gary Thomas <gthomas@redhat.com> |
|
* misc/redboot_RAM.ecm: Renamed from redboot_RAM.cfg |
|
* misc/redboot_ROM.ecm: Renamed from redboot_ROM.cfg |
|
2001-02-23 Jesper Skov <jskov@redhat.com> |
|
* include/plf_cache.h (HAL_FLASH_CACHES_WANT_OPTIMAL): Added. |
Removed again. |
|
2001-02-08 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Respect channel configuration |
constraints. |
|
* src/hal_diag.c: Replace CYGSEM_HAL_DIAG_MANGLER_None with |
CYGDBG_HAL_DIAG_TO_DEBUG_CHAN. |
|
2001-01-31 Jesper Skov <jskov@redhat.com> |
|
* src/hal_diag.c: Replaced CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL |
with CYGSEM_HAL_DIAG_MANGLER_GDB/None |
|
2001-01-26 Jesper Skov <jskov@redhat.com> |
|
* include/plf_stub.h: Moved reset macro to |
* include/plf_intr.h: this file. |
|
2001-01-19 Gary Thomas <gthomas@redhat.com> |
|
* include/hal_diag.h: Remove unwarranted disclaimer [commentary]. |
|
2001-01-03 Gary Thomas <gthomas@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Let RTC [heartbeat] rate be user |
specified. |
|
2000-10-20 Gary Thomas <gthomas@redhat.com> |
|
* include/pkgconf/mlt_powerpc_mbx_ram.mlt: |
* include/pkgconf/mlt_powerpc_mbx_ram.ldi: |
* include/pkgconf/mlt_powerpc_mbx_ram.h: |
Increase reserved memory - required by RedBoot. |
|
* misc/redboot_ROM.cfg: |
* misc/redboot_RAM.cfg: |
* images/redboot_ROM.srec: |
* images/redboot_ROM.img: |
* images/redboot_ROM.bin: |
* images/redboot_RAM.bin: |
* images/redboot_RAM.img: |
* images/redboot_RAM.srec: New file(s). |
|
* cdl/hal_powerpc_mbx.cdl: Add RedBoot configuration rules. |
|
2000-10-20 Jonathan Larmour <jlarmour@redhat.com> |
|
* tests/mbxtime.cxx: Ensure default priority constructors |
are called. |
|
2000-10-20 Jonathan Larmour <jlarmour@redhat.com> |
|
* include/pkgconf/mlt_powerpc_mbx_ram.h: |
* include/pkgconf/mlt_powerpc_mbx_rom.h: |
* include/pkgconf/mlt_powerpc_mbx_ram.ldi: |
* include/pkgconf/mlt_powerpc_mbx_rom.ldi: |
Regenerated with updated host tools |
|
2000-10-19 Jesper Skov <jskov@redhat.com> |
|
* include/pkgconf/mlt_powerpc_mbx_ram.h: Added heap1 label. |
* include/pkgconf/mlt_powerpc_mbx_ram.mlt: Same. |
* include/pkgconf/mlt_powerpc_mbx_ram.ldi: Same. |
* include/pkgconf/mlt_powerpc_mbx_rom.h: Same. |
* include/pkgconf/mlt_powerpc_mbx_rom.mlt: Same. |
* include/pkgconf/mlt_powerpc_mbx_rom.ldi: Same. |
|
2000-09-17 Gary Thomas <gthomas@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Add platform/cpu identification strings. |
|
2000-08-28 Gary Thomas <gthomas@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Fix startup type description - was |
totally bogus stuff copied from a different HAL. |
|
2000-08-15 Gary Thomas <gthomas@redhat.com> |
|
* src/mbx.S: Use actual ROM layout instead of magic numbers. |
|
2000-06-28 Jesper Skov <jskov@redhat.com> |
|
* include/hal_diag.h: |
* src/hal_diag.c: |
Cleanup. |
|
2000-06-22 John Dallaway <jld@redhat.com> |
|
* include/pkgconf/mlt_powerpc_mbx_rom.mlt: |
|
Synchronize with mlt_powerpc_mbx_rom.ldi. |
|
2000-06-21 Jesper Skov <jskov@redhat.com> |
|
* src/hal_diag.c: Provide comms_init function, initializing the |
serial device. Changed quicc calls to provide eppc_base. |
|
* include/plf_stub.h: |
* include/hal_diag.h: |
Changed defines to match new procs table handling of IO. |
|
2000-06-15 Jesper Skov <jskov@redhat.com> |
|
* include/pkgconf/mlt_powerpc_mbx_rom.h: |
* include/pkgconf/mlt_powerpc_mbx_ram.h: |
* include/pkgconf/mlt_powerpc_mbx_ram.ldi: |
* include/pkgconf/mlt_powerpc_mbx_ram.mlt: |
Updated. |
|
* src/hal_aux.c: Fix warning. |
|
* include/hal_diag.h: Fix typo. Moved diag-inclusion decision |
expression to common HAL. |
Only define HAL_PLF_DIAG routines when necessary. |
|
* cdl/hal_powerpc_mbx.cdl: Last CDL tweaks. |
|
2000-06-14 Jesper Skov <jskov@redhat.com> |
|
* include/plf_stub.h: Move reset stuff out of INCLUDE_STUBS |
config. It really should live in the platform equivalent of |
hal_arch.h... |
|
* include/hal_diag.h: |
* src/hal_diag.c: |
Changes to use the common virtual vector code for diagnostics. |
|
2000-06-13 Jesper Skov <jskov@redhat.com> |
|
* include/plf_stub.h (HAL_STUB_PLATFORM_RESET_ENTRY): Use an |
absolute address. |
|
* src/hal_aux.c (hal_platform_init): Added. |
|
* include/plf_stub.h: Cleaned up reset definitions. |
|
* include/pkgconf/mlt_powerpc_mbx_rom.ldi: |
* include/pkgconf/mlt_powerpc_mbx_rom.mlt: |
* include/pkgconf/mlt_powerpc_mbx_ram.ldi: |
* include/pkgconf/mlt_powerpc_mbx_ram.mlt: |
Reserve space for virtual table. |
|
* cdl/hal_powerpc_mbx.cdl: Added support for virtual |
vectors. Change stub requirements accordingly. |
|
2000-03-13 Jesper Skov <jskov@redhat.com> |
|
* include/plf_stub.h (HAL_STUB_PLATFORM_RESET): Jump to stub |
entry-point on GDB kill. |
|
2000-03-04 Gary Thomas <gthomas@redhat.com> |
|
* src/hal_aux.c (_mbx_init_i2c): I2C now working from eCos/GDB. |
|
2000-03-03 Gary Thomas <gthomas@redhat.com> |
|
* src/hal_aux.c (_mbx_fetch_VPD): New function - reads EEPROM and |
builds a queryable database. |
|
2000-03-02 Jesper Skov <jskov@redhat.com> |
|
* src/hal_diag.c: Fix typo. |
|
2000-02-29 Gary Thomas <gthomas@cygnus.co.uk> |
|
* src/hal_diag.c: Support option to suppress GDB protocol on |
the diag/serial device. |
|
2000-02-28 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Remove hardcoded copy_vectors |
definition. |
|
2000-02-21 Jesper Skov <jskov@redhat.com> |
|
* src/mbx.S: use arch.inc instead of ppc.inc |
|
2000-02-18 Jonathan Larmour <jlarmour@redhat.co.uk> |
|
* cdl/hal_powerpc_mbx.cdl (CYGBLD_BUILD_GDB_STUBS): When building |
stubs, define every dependency required here rather than in the |
template |
|
2000-02-17 Jonathan Larmour <jlarmour@redhat.co.uk> |
|
* include/pkgconf/hal_powerpc_mbx.h: Fix MPC860 -> MPC8xx typo |
* cdl/hal_powerpc_mbx.cdl: likewise |
|
2000-02-11 Jesper Skov <jskov@redhat.com> |
|
* src/hal_aux.c: Cleaned up includes. |
|
2000-02-10 Jesper Skov <jskov@redhat.com> |
|
* include/plf_stub.h: |
Removed HAL_STUB_PLATFORM_STUBS_INIT. |
|
* misc/STUBS_config: [added] |
Removed stubs as a legal startup type. |
|
2000-02-07 Jesper Skov <jskov@redhat.com> |
|
* include/pkgconf/mlt_powerpc_mbx_ram.mlt: |
* include/pkgconf/mlt_powerpc_mbx_rom.mlt: |
Fixed some typos. |
|
* src/mbx.S: Use CYGHWR_HAL_POWERPC_BOARD_SPEED. |
|
* include/pkgconf/mlt*.*: Use new exception scheme. |
* include/pkgconf/hal_powerpc_mbx.h: Use |
CYGHWR_HAL_POWERPC_BOARD_SPEED. Use MPC8xx variant code. |
|
|
* cdl/hal_powerpc_mbx.cdl: Use MPC8xx variant code. Fix some CDL |
bugs. Use CYGHWR_HAL_POWERPC_BOARD_SPEED |
Specify CPU options in linker flags. |
|
2000-02-03 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: CYG_HAL_POWERPC_x->CYGPKG_... |
|
2000-02-03 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Generate S-record version of stub. |
Implements stubs. |
|
2000-01-27 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Moved part of stubs build rule to |
common HAL. Changed description. |
|
2000-01-26 Jesper Skov <jskov@redhat.com> |
|
* include/plf_cache.h: Added. |
|
2000-01-26 Jesper Skov <jskov@redhat.com> |
|
* cdl/hal_powerpc_mbx.cdl: Fix display string. |
|
2000-01-24 Jesper Skov <jskov@cygnus.co.uk> |
* cdl/hal_powerpc_mbx.cdl: Add stubs build rule. |
* src/mbx.S: Depend on CYGSEM_HAL_ROM_MONITOR instead of |
CYG_HAL_ROM_MONITOR. |
|
2000-01-24 John Dallaway <jld@cygnus.co.uk> |
|
* cdl/*.cdl: |
|
Remove obsolete option CYGTST_TESTING_IDENTIFIER. |
|
2000-01-19 Hugo Tyson <hmt@cygnus.co.uk> |
|
* cdl/*.cdl: Add descriptions to a number of options &c which were |
lacking same, also tidied up other typos as noticed en passant. |
|
1999-12-21 Jonathan Larmour <jlarmour@cygnus.co.uk> |
|
* cdl/hal_powerpc_mbx.cdl: Ensure we "puts" to appropriate CDL header |
|
1999-12-20 Gary Thomas <gthomas@cygnus.co.uk> |
|
* cdl/hal_powerpc_mbx.cdl: Add -Wl for linker options. |
|
1999-11-25 Gary Thomas <gthomas@cygnus.co.uk> |
|
* include/pkgconf/mlt_powerpc_mbx_rom.h: |
* include/pkgconf/mlt_powerpc_mbx_ram.h: New file(s). |
|
1999-11-03 John Dallaway <jld@cygnus.co.uk> |
|
* cdl/hal_powerpc_mbx.cdl: Define build options. |
|
1999-10-22 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/hal_diag.c (hal_diag_write_char): Call new hal_stub.h macro |
CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION() instead of simply disabling |
interrupts, ditto for enable. This provides atomicity wrt single |
stepping and watching variables when this code to output a whole |
GDB $O packet is entered. |
|
1999-09-20 Hugo Tyson <hmt@cygnus.co.uk> |
|
* include/pkgconf/hal_powerpc_mbx.h: |
(CYGHWR_HAL_POWERPC_MBX_BOOT_32BIT_FLASH) new config option to |
control chip select initialization. |
|
* src/mbx.S: Take notice of CYGHWR_HAL_POWERPC_MBX_BOOT_32BIT_FLASH. |
|
* misc/stubrom.perm: Reference the new option for folks who want |
to boot from the 32-bit flash. |
|
1999-09-13 Gary Thomas <gthomas@cygnus.co.uk> |
|
* include/pkgconf/hal_powerpc_mbx.h (CYGHWR_HAL_POWERPC_BOARD_SPEED): |
Missing default value (wouldn't build sans ConfigTool). |
|
1999-09-09 Gary Thomas <gthomas@cygnus.co.uk> |
|
* include/pkgconf/hal_powerpc_mbx.h (CYGHWR_HAL_POWERPC_MBX_BOARD_SPEED): |
Rename CDL option to avoid a name clash. |
|
1999-07-27 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/mbx.S: Fix typo in PLL setup value. Reported from the net. |
|
1999-06-28 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/hal_diag.c (hal_diag_init): Fix a "default type" warning. |
|
1999-06-28 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/hal_diag.c (hal_diag_write_char): Only gobble the GDB ACK |
characters if there is no pre-ISR polling call to look for ^C |
chars to interrupt the prog. (CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
- should not be enabled if devices are in use) |
|
1999-06-28 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/mbx.S (__upmtbl_start): We do not trust rewriting the UPMs |
for DRAM timing whilst running out of that very DRAM. So only |
init UPMs in ROM start (including when making a stub rom). |
|
1999-06-27 Gary Thomas <gthomas@cygnus.co.uk> |
|
* src/hal_diag.c: Support buffering of diagnostic data for later |
display. Controlled by CYGDBG_DIAG_BUF. Also, turn on code to |
handle GDB ACK characters when stubs are enabled. |
|
1999-06-25 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/mbx.S (__upmtbl_start): depending on CYG_HAL_ROM_MONITOR, we |
use the OLD TABLES if making a stub rom. For greatest commonality |
of startup code between RAM startup development binaries and ROM |
startup "product" binaries we completely re-initialize the UPMs |
that control DRAM timing even in RAM start when executing out of |
that very DRAM. |
|
It appears that it is OK to rewrite the UPMs with the new timing |
data when already running with the old timing data, but not OK to |
update from new to new. So we use the old timing data when |
building stubs. |
|
An alternative would be to conditionally not perform the UPM |
initialization in RAM startup, but that would weaken the testing |
value of RAM startup programs. |
|
1999-06-24 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/mbx.S (__upmtbl_start): Use the new tables recently supplied |
by email from Motorola; without them, the cache-line-zero |
operation only zeros 12 bytes rather than 16. [PR 20226] |
|
1999-06-24 Hugo Tyson <hmt@cygnus.co.uk> |
|
* include/plf_stub.h (HAL_STUB_PLATFORM_INIT_BREAK_IRQ): Define |
this (empty) for it is required if HAL_DEBUG_GDB_BREAK_SUPPORT is |
enabled. Improve HAL_STUB_PLATFORM_SET_BAUD_RATE. |
|
1999-06-18 John Dallaway <jld@cygnus.co.uk> |
|
* include/pkgconf/mlt_powerpc_mbx_rom.mlt: |
* include/pkgconf/mlt_powerpc_mbx_ram.mlt: |
Fix MLT save files to match the default linker script |
fragments. |
|
1999-06-18 Hugo Tyson <hmt@cygnus.co.uk> |
|
* include/pkgconf/mlt_powerpc_mbx_rom.mlt: |
* include/pkgconf/mlt_powerpc_mbx_ram.mlt: |
Initial attempt at getting these to match the reality of the |
linker script fragment; we'll have to see whether they're right. |
|
1999-06-18 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/mbx.S: Data cache setup in hal_hardware_init: set |
force-writethrough mode and explicitly disable little-endian swap |
mode, whatever _that_ is. Force-writethrough is required if you |
are to enable the data cache, it crashes otherwise. Cause |
unknown, could be the memory system doesn't support whatever |
access regime is used, or caching problems with loading code |
through the stubs? In any case, this is a fine workaround. |
|
* src/hal_aux.c (CYGARC_MEMDESC_TABLE): Enable caching of the ROM; |
seems to do no harm, and helps ROM-based performance. |
|
1999-06-18 Jesper Skov <jskov@cygnus.co.uk> |
|
* include/pkgconf/hal_powerpc_mbx.h: Fixed CDL description. |
|
1999-06-17 Hugo Tyson <hmt@cygnus.co.uk> |
|
* misc/stubrom.perm: New file: a perm for creating an eCos stub |
ROM for the MBX. Pro tem, ^C to break is not supported, so the |
feature must remain disabled. |
|
* include/plf_stub.h (HAL_STUB_PLATFORM_INIT): Diddle the LEDs if |
ROM start to distinguish eCos stub ROM from CygMon ROM from eCos |
app running/internal stubs. |
|
1999-06-17 Hugo Tyson <hmt@cygnus.co.uk> |
|
* include/pkgconf/mlt_powerpc_mbx_rom.ldi: Move RAM usage in ROM |
startup to 2000 so that we can build stubs that don't fight with |
RAM started apps' RAM use from 10000. |
|
1999-06-17 Hugo Tyson <hmt@cygnus.co.uk> |
|
* tests/PKGconf.mak: New file, to build that below. |
|
* tests/mbxtime.cxx: New file, a simple test of the system timer |
for a human to check it's roughly seconds. |
|
* include/pkgconf/mlt_powerpc_mbx_rom.ldi: ROM startup supported. |
|
* include/pkgconf/hal_powerpc_mbx.h |
(CYGHWR_HAL_POWERPC_MBX_BOARD_SPEED): Add this config option to |
select 40MHz or 50MHz system clock speed. |
|
* src/mbx.S (hal_hardware_init): Complete system init for ROM |
start; move return address to inside the ROM from wherever we |
booted. Proper board clock speed selection. |
|
* src/hal_diag.c (hal_diag_write_char_serial): Do not encode |
packets for GDB if using ROM start. |
|
* src/hal_aux.c (CYGARC_MEMDESC_TABLE): Map the ROM correctly so |
that ROM start works. |
|
1999-06-15 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/mbx.S (hal_hardware_init): Add full ROM-type startup code |
and some useful LED-diddling routines and macro, to assist in |
debugging ROM startup. |
|
* src/hal_aux.c (CYGARC_MEMDESC_TABLE): Enable memory mapping to |
the LED control register so that we can treak them with mem mgt |
enabled ie. in a normal execution context. |
|
1999-06-11 Hugo Tyson <hmt@cygnus.co.uk> |
|
* src/mbx.S (hal_hardware_init): Set up the base address of the |
control registers in IMMR to 0xff000000 (as defined in arch). |
Turn off external interrupts, initialize the decrementer. |
|
* src/PKGconf.mak: Build the new file. |
|
* src/hal_aux.c (CYGARC_MEMDESC_TABLE): New file, to define this |
object for per-platform table-driven memory map initialization. |
The table used to be in hal_misc.c in the architectural HAL; this |
is platform dependent so better and cleaner here. |
|
1999-06-10 Hugo Tyson <hmt@cygnus.co.uk> |
|
* ChangeLog: Component created, based partly on the FADS work and |
on CygMon's serial IO code for the MBX860, to support the Motorola |
MBX860 development board. Actual serial support lies in |
neighbouring component HAL_QUICC [hal/powerpc/quicc/...] |
|
* include/hal_diag.h |
* include/plf_stub.h |
* include/pkgconf/hal_powerpc_mbx.h |
* include/pkgconf/mlt_powerpc_mbx_ram.ldi |
* include/pkgconf/mlt_powerpc_mbx_ram.mlt |
* include/pkgconf/mlt_powerpc_mbx_rom.ldi |
* include/pkgconf/mlt_powerpc_mbx_rom.mlt |
* src/PKGconf.mak |
* src/hal_diag.c |
* src/mbx.S |
New files. |
|
//=========================================================================== |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//=========================================================================== |
/v2_0/src/Notes_GDB_stub
0,0 → 1,94
=========================================================================== |
#####ECOSGPLCOPYRIGHTBEGIN#### |
## ------------------------------------------- |
## This file is part of eCos, the Embedded Configurable Operating System. |
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
## |
## eCos is free software; you can redistribute it and/or modify it under |
## the terms of the GNU General Public License as published by the Free |
## Software Foundation; either version 2 or (at your option) any later version. |
## |
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
## WARRANTY; without even the implied warranty of MERCHANTABILITY or |
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
## for more details. |
## |
## You should have received a copy of the GNU General Public License along |
## with eCos; if not, write to the Free Software Foundation, Inc., |
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
## |
## As a special exception, if other files instantiate templates or use macros |
## or inline functions from this file, or you compile this file and link it |
## with other works to produce a work based on this file, this file does not |
## by itself cause the resulting work to be covered by the GNU General Public |
## License. However the source code for this file must still be made available |
## in accordance with section (3) of the GNU General Public License. |
## |
## This exception does not invalidate any other reasons why a work based on |
## this file might be covered by the GNU General Public License. |
## |
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
## at http://sources.redhat.com/ecos/ecos-license/ |
## ------------------------------------------- |
#####ECOSGPLCOPYRIGHTEND#### |
=========================================================================== |
|
2000.02.03 |
|
How to build and install the GDB module on the MBX board |
|
Make GDB module |
~~~~~~~~~~~~~~~ |
Configure and build using the 'stubs_old_scheme' template for the MBX |
target. These are the necessary CLI instructions. It can also be done |
from the Configtool by selecting the appropriate templates. |
|
% cd /tmp |
% mkdir stubs |
% cd stubs |
% ecosconfig new mbx stubs_old_scheme |
% ecosconfig tree |
% make |
|
This will install some files in ./install/bin: |
|
cygmon.img: The built stubs image |
cygmon.bin: The image converted to binary (suitable for burning to ROM) |
cygmon.srec: The S-Record image (suitable for flash programming, see below) |
|
|
Prepare board for flash programming |
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
This assumes you have EPPC-Bug in the on-board flash. This can be determined |
by setting up the board according to the below instructions and powering |
up the board. The EPPC-Bug prompt should appear on the SMC1 connector at |
9600 baud, 8N1. |
|
1. Set jumper 3 to 2-3 [allow XU2 flash to be programmed] |
2. Set jumper 4 to 2-3 [boot EPPC-Bug] |
|
|
Program FLASH |
~~~~~~~~~~~~~ |
1. Prepare EPPC-Bug for download: |
|
EPPC-Bug>lo 0 |
|
At this point the monitor is ready for input. It will not return the |
prompt until the file has been downloaded. |
|
2. Use the terminal emulator's ASCII download feature (or a simple clipboard |
copy/paste operation) to download the gdb_module.srec data. |
|
Note: On Linux, Minicom's ASCII download feature seems to be broken. |
A workaround is to load the file into emacs (or another editor) |
and copy the full contents to the clipboard. Then press the |
mouse paste-button (usually middle) over the Minicom window. |
|
3. Program the flash with the downloaded data: |
|
EPPC-Bug>pflash 40000 60000 fc000000 |
|
4. Switch off the power, and change jumper 4 to 1-2. Turn on the power |
again. The board should now boot using the newly programmed stubs. |
|
/v2_0/src/hal_aux.c
0,0 → 1,320
//============================================================================= |
// |
// hal_aux.c |
// |
// HAL auxiliary objects and code; per platform |
// |
//============================================================================= |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//============================================================================= |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): hmt |
// Contributors:hmt |
// Date: 1999-06-08 |
// Purpose: HAL aux objects: startup tables. |
// Description: Tables for per-platform initialization |
// |
//####DESCRIPTIONEND#### |
// |
//============================================================================= |
|
#include <pkgconf/hal.h> |
#include <cyg/hal/hal_mem.h> // HAL memory definitions |
#include <pkgconf/hal_powerpc_quicc.h> |
#include <cyg/infra/cyg_type.h> |
#include <cyg/hal/quicc/ppc8xx.h> |
#include <cyg/hal/hal_if.h> // hal_if_init |
|
// The memory map is weakly defined, allowing the application to redefine |
// it if necessary. The regions defined below are the minimum requirements. |
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = { |
// Mapping for the Motorola MBX860 development board |
CYGARC_MEMDESC_CACHE( 0xfe000000, 0x00400000 ), // ROM region |
CYGARC_MEMDESC_NOCACHE( 0xfa000000, 0x00400000 ), // Control/Status+LEDs |
CYGARC_MEMDESC_CACHE( 0x00000000, 0x00800000 ), // Main memory |
|
CYGARC_MEMDESC_TABLE_END |
}; |
|
#ifdef _DOWNLOAD_UCODE_UPDATE // Not currently used |
// |
// The MPC8xx CPM (Control Processor) has some problems (overlapping structures) which |
// can be fixed by downloading new ucode. This code came from: |
// http://www.mot.com/SPS/ADC/pps/subpgs/etoolbox/8XX/i2c_spi.html |
// |
|
static unsigned char i2c_ucode_low[] = { |
0x7F, 0xFF, 0xEF, 0xD9, 0x3F, 0xFD, 0x00, 0x00, |
0x7F, 0xFB, 0x49, 0xF7, 0x7F, 0xF9, 0x00, 0x00, |
0x5F, 0xEF, 0xAD, 0xF7, 0x5F, 0x89, 0xAD, 0xF7, |
0x5F, 0xEF, 0xAF, 0xF7, 0x5F, 0x89, 0xAF, 0xF7, |
0x3A, 0x9C, 0xFB, 0xC8, 0xE7, 0xC0, 0xED, 0xF0, |
0x77, 0xC1, 0xE1, 0xBB, 0xF4, 0xDC, 0x7F, 0x1D, |
0xAB, 0xAD, 0x93, 0x2F, 0x4E, 0x08, 0xFD, 0xCF, |
0x6E, 0x0F, 0xAF, 0xF8, 0x7C, 0xCF, 0x76, 0xCF, |
0xFD, 0x1F, 0xF9, 0xCF, 0xAB, 0xF8, 0x8D, 0xC6, |
0xAB, 0x56, 0x79, 0xF7, 0xB0, 0x93, 0x73, 0x83, |
0xDF, 0xCE, 0x79, 0xF7, 0xB0, 0x91, 0xE6, 0xBB, |
0xE5, 0xBB, 0xE7, 0x4F, 0xB3, 0xFA, 0x6F, 0x0F, |
0x6F, 0xFB, 0x76, 0xCE, 0xEE, 0x0D, 0xF9, 0xCF, |
0x2B, 0xFB, 0xEF, 0xEF, 0xCF, 0xEE, 0xF9, 0xCF, |
0x76, 0xCE, 0xAD, 0x24, 0x90, 0xB2, 0xDF, 0x9A, |
0x7F, 0xDD, 0xD0, 0xBF, 0x4B, 0xF8, 0x47, 0xFD, |
0x7C, 0xCF, 0x76, 0xCE, 0xCF, 0xEF, 0x7E, 0x1F, |
0x7F, 0x1D, 0x7D, 0xFD, 0xF0, 0xB6, 0xEF, 0x71, |
0x7F, 0xC1, 0x77, 0xC1, 0xFB, 0xC8, 0x60, 0x79, |
0xE7, 0x22, 0xFB, 0xC8, 0x5F, 0xFF, 0xDF, 0xFF, |
0x5F, 0xB2, 0xFF, 0xFB, 0xFB, 0xC8, 0xF3, 0xC8, |
0x94, 0xA6, 0x7F, 0x01, 0x7F, 0x1D, 0x5F, 0x39, |
0xAF, 0xE8, 0x5F, 0x5E, 0xFF, 0xDF, 0xDF, 0x96, |
0xCB, 0x9F, 0xAF, 0x7D, 0x5F, 0xC1, 0xAF, 0xED, |
0x8C, 0x1C, 0x5F, 0xC1, 0xAF, 0xDD, 0x5F, 0xC3, |
0xDF, 0x9A, 0x7E, 0xFD, 0xB0, 0xB2, 0x5F, 0xB2, |
0xFF, 0xFE, 0xAB, 0xAD, 0x5F, 0xB2, 0xFF, 0xFE, |
0x5F, 0xCE, 0x60, 0x0B, 0xE6, 0xBB, 0x60, 0x0B, |
0x5F, 0xCE, 0xDF, 0xC6, 0x27, 0xFB, 0xEF, 0xDF, |
0x5F, 0xC8, 0xCF, 0xDE, 0x3A, 0x9C, 0xE7, 0xC0, |
0xED, 0xF0, 0xF3, 0xC8, 0x7F, 0x01, 0x54, 0xCD, |
0x7F, 0x1D, 0x2D, 0x3D, 0x36, 0x3A, 0x75, 0x70, |
0x7E, 0x0A, 0xF1, 0xCE, 0x37, 0xEF, 0x2E, 0x68, |
0x7F, 0xEE, 0x10, 0xEC, 0xAD, 0xF8, 0xEF, 0xDE, |
0xCF, 0xEA, 0xE5, 0x2F, 0x7D, 0x0F, 0xE1, 0x2B, |
0xF1, 0xCE, 0x5F, 0x65, 0x7E, 0x0A, 0x4D, 0xF8, |
0xCF, 0xEA, 0x5F, 0x72, 0x7D, 0x0B, 0xEF, 0xEE, |
0xCF, 0xEA, 0x5F, 0x74, 0xE5, 0x22, 0xEF, 0xDE, |
0x5F, 0x74, 0xCF, 0xDA, 0x0B, 0x62, 0x73, 0x85, |
0xDF, 0x62, 0x7E, 0x0A, 0x30, 0xD8, 0x14, 0x5B, |
0xBF, 0xFF, 0xF3, 0xC8, 0x5F, 0xFF, 0xDF, 0xFF, |
0xA7, 0xF8, 0x5F, 0x5E, 0xBF, 0xFE, 0x7F, 0x7D, |
0x10, 0xD3, 0x14, 0x50, 0x5F, 0x36, 0xBF, 0xFF, |
0xAF, 0x78, 0x5F, 0x5E, 0xBF, 0xFD, 0xA7, 0xF8, |
0x5F, 0x36, 0xBF, 0xFE, 0x77, 0xFD, 0x30, 0xC0, |
0x4E, 0x08, 0xFD, 0xCF, 0xE5, 0xFF, 0x6E, 0x0F, |
0xAF, 0xF8, 0x7E, 0x1F, 0x7E, 0x0F, 0xFD, 0x1F, |
0xF1, 0xCF, 0x5F, 0x1B, 0xAB, 0xF8, 0x0D, 0x5E, |
0x5F, 0x5E, 0xFF, 0xEF, 0x79, 0xF7, 0x30, 0xA2, |
0xAF, 0xDD, 0x5F, 0x34, 0x47, 0xF8, 0x5F, 0x34, |
0xAF, 0xED, 0x7F, 0xDD, 0x50, 0xB2, 0x49, 0x78, |
0x47, 0xFD, 0x7F, 0x1D, 0x7D, 0xFD, 0x70, 0xAD, |
0xEF, 0x71, 0x7E, 0xC1, 0x6B, 0xA4, 0x7F, 0x01, |
0x2D, 0x26, 0x7E, 0xFD, 0x30, 0xDE, 0x5F, 0x5E, |
0xFF, 0xFD, 0x5F, 0x5E, 0xFF, 0xEF, 0x5F, 0x5E, |
0xFF, 0xDF, 0x0C, 0xA0, 0xAF, 0xED, 0x0A, 0x9E, |
0xAF, 0xDD, 0x0C, 0x3A, 0x5F, 0x3A, 0xAF, 0xBD, |
0x7F, 0xBD, 0xB0, 0x82, 0x5F, 0x82, 0x47, 0xF8, |
}; |
static unsigned char i2c_ucode_high[] = { |
0x3E, 0x30, 0x34, 0x30, 0x34, 0x34, 0x37, 0x37, |
0xAB, 0xF7, 0xBF, 0x9B, 0x99, 0x4B, 0x4F, 0xBD, |
0xBD, 0x59, 0x94, 0x93, 0x34, 0x9F, 0xFF, 0x37, |
0xFB, 0x9B, 0x17, 0x7D, 0xD9, 0x93, 0x69, 0x56, |
0xBB, 0xFD, 0xD6, 0x97, 0xBD, 0xD2, 0xFD, 0x11, |
0x31, 0xDB, 0x9B, 0xB3, 0x63, 0x13, 0x96, 0x37, |
0x93, 0x73, 0x36, 0x93, 0x19, 0x31, 0x37, 0xF7, |
0x33, 0x17, 0x37, 0xAF, 0x7B, 0xB9, 0xB9, 0x99, |
0xBB, 0x19, 0x79, 0x57, 0x7F, 0xDF, 0xD3, 0xD5, |
0x73, 0xB7, 0x73, 0xF7, 0x37, 0x93, 0x3B, 0x99, |
0x1D, 0x11, 0x53, 0x16, 0x99, 0x31, 0x53, 0x15, |
0x31, 0x69, 0x4B, 0xF4, 0xFB, 0xDB, 0xD3, 0x59, |
0x31, 0x49, 0x73, 0x53, 0x76, 0x95, 0x6D, 0x69, |
0x7B, 0x9D, 0x96, 0x93, 0x13, 0x13, 0x19, 0x79, |
0x79, 0x37, 0x69, 0x35, |
}; |
#endif |
|
#define QUICC_I2C_MOD_EN 0x01 // Enable I2C controller |
#define QUICC_I2C_MOD_PDIV_CLK32 0x00 // I2C BRG - /32 |
#define QUICC_I2C_MOD_PDIV_CLK16 0x02 // /16 |
#define QUICC_I2C_MOD_PDIV_CLK8 0x04 // /8 |
#define QUICC_I2C_MOD_PDIV_CLK4 0x06 // /4 |
#define QUICC_I2C_MOD_FLT 0x08 // 1 = input clock is filtered |
#define QUICC_I2C_MOD_GCD 0x10 // 1 = deny general call address |
#define QUICC_I2C_MOD_REVD 0x20 // 1 = reverse TxD and RxD order |
|
#define QUICC_I2C_CMD_MASTER 0x01 // 1 = master, 0 = slave |
#define QUICC_I2C_CMD_START 0x80 // 1 = start transmit |
|
#define QUICC_I2C_FCR_BE 0x10 // Big Endian operation |
|
#define MBX_CONFIG_EEPROM 0xA5 // I2C address of configuration ROM |
|
static unsigned char _MBX_eeprom_data[0x100]; |
#define VPD_EOD 0xFF |
|
static void |
_mbx_init_i2c(void) |
{ |
volatile EPPC *eppc = eppc_base(); |
unsigned char *sp, *ep; |
int i, len, RxBD, TxBD; |
struct i2c_pram *i2c; |
volatile struct cp_bufdesc *rxbd, *txbd; |
unsigned char i2c_address[521]; |
static int i2c_init = 0; |
|
if (i2c_init) return; |
i2c_init = 1; |
eppc->cp_rccr = 0; // Disables any current ucode running |
#ifdef _DOWNLOAD_UCODE_UPDATE // Not currently used |
// Patch the ucode |
sp = i2c_ucode_low; |
ep = (unsigned char *)eppc->udata_ucode; |
for (i = 0; i < sizeof(i2c_ucode_low); i++) { |
*ep++ = *sp++; |
} |
sp = i2c_ucode_high; |
ep = (unsigned char *)eppc->udata_ext; |
for (i = 0; i < sizeof(i2c_ucode_high); i++) { |
*ep++ = *sp++; |
} |
eppc->cp_rctr1 = 0x802A; |
eppc->cp_rctr2 = 0x8028; |
eppc->cp_rctr3 = 0x802E; |
eppc->cp_rctr4 = 0x802C; |
diag_printf("RCCR: %x, RTCRx: %x/%x/%x/%x\n", |
eppc->cp_rccr, eppc->cp_rctr1, eppc->cp_rctr2, eppc->cp_rctr3, eppc->cp_rctr4); |
diag_dump_buf(eppc->udata_ucode, 256); |
diag_dump_buf(&eppc->pram[0].scc.pothers.i2c_idma, 0x40); |
eppc->cp_rccr = 0x01; // Enable ucode |
diag_printf("RCCR: %x, RTCRx: %x/%x/%x/%x\n", |
eppc->cp_rccr, eppc->cp_rctr1, eppc->cp_rctr2, eppc->cp_rctr3, eppc->cp_rctr4); |
diag_dump_buf(eppc->udata_ucode, 256); |
diag_dump_buf(&eppc->pram[0].scc.pothers.i2c_idma, 0x40); |
diag_printf("RPBASE = %x/%x\n", eppc->pram[0].scc.pothers.i2c_idma.i2c.rpbase, &eppc->pram[0].scc.pothers.i2c_idma.i2c.rpbase); |
eppc->pram[0].scc.pothers.i2c_idma.i2c.rpbase = (unsigned long)&eppc->i2c_spare_pram - (unsigned long)eppc; |
diag_printf("RPBASE = %x/%x\n", eppc->pram[0].scc.pothers.i2c_idma.i2c.rpbase, &eppc->pram[0].scc.pothers.i2c_idma.i2c.rpbase); |
eppc->i2c_i2mod = 0; // Disable I2C controller |
i2c = (struct i2c_pram *)&eppc->i2c_spare_pram; |
#else |
eppc->i2c_i2mod = 0; // Disable I2C controller |
i2c = (struct i2c_pram *)&eppc->pram[0].scc.pothers.i2c_idma.i2c; |
#endif // _DOWNLOAD_UCODE_UPDATE |
sp = (unsigned char *)i2c; |
for (i = 0; i < sizeof(*i2c); i++) { |
*sp++ = 0; |
} |
RxBD = 0x2E08; // CAUTION |
TxBD = 0x2E00; |
i2c->rbase = RxBD; |
i2c->tbase = TxBD; |
i2c->rfcr = QUICC_I2C_FCR_BE; |
i2c->tfcr = QUICC_I2C_FCR_BE; |
i2c->mrblr = sizeof(i2c_address); |
rxbd = (volatile struct cp_bufdesc *)((char *)eppc + RxBD); |
rxbd->ctrl = QUICC_BD_CTL_Ready | QUICC_BD_CTL_Wrap | QUICC_BD_CTL_Last; |
rxbd->length = 257; |
rxbd->buffer = i2c_address; |
txbd = (volatile struct cp_bufdesc *)((char *)eppc + TxBD); |
txbd->length = 1+520; |
i2c_address[0] = MBX_CONFIG_EEPROM; |
txbd->buffer = i2c_address; |
txbd->ctrl = QUICC_BD_CTL_Ready | QUICC_BD_CTL_Wrap | QUICC_BD_CTL_Last; |
eppc->i2c_i2add = 0x00; |
eppc->i2c_i2brg = 0x50; |
eppc->i2c_i2mod = QUICC_I2C_MOD_EN; // Enable I2C interface |
// Initialize the CPM (set up buffer pointers, etc). |
// This needs to be done *after* the interface is enabled. |
eppc->cp_cr = QUICC_CPM_I2C | QUICC_CPM_CR_INIT_RX | QUICC_CPM_CR_BUSY; |
while (eppc->cp_cr & QUICC_CPM_CR_BUSY) ; |
eppc->cp_cr = QUICC_CPM_I2C | QUICC_CPM_CR_INIT_TX | QUICC_CPM_CR_BUSY; |
while (eppc->cp_cr & QUICC_CPM_CR_BUSY) ; |
eppc->i2c_i2com = QUICC_I2C_CMD_MASTER | QUICC_I2C_CMD_START; |
i = 0; |
while (txbd->ctrl & QUICC_BD_CTL_Ready) { |
if (++i > 50000) break; |
} |
// Rebuild the actual VPD |
for (i = 0; i < sizeof(_MBX_eeprom_data); i++) { |
_MBX_eeprom_data[i] = VPD_EOD; // Undefined |
} |
sp = (unsigned char *)&i2c_address[1]; |
ep = (unsigned char *)&i2c_address[sizeof(i2c_address)]; |
while (sp != ep) { |
if ((sp[0] == 'M') && (sp[1] == 'O') && (sp[2] == 'T')) { |
// Found the "eye catcher" string |
sp += 8; |
len = (sp[0] << 8) | sp[1]; |
sp += 2; |
for (i = 0; i < len; i++) { |
_MBX_eeprom_data[i] = *sp++; |
if (sp == ep) sp = (unsigned char *)&i2c_address[1]; |
} |
break; |
} |
sp++; |
} |
eppc->i2c_i2mod = 0; // Disable I2C interface |
} |
|
// |
// Fetch a value from the VPD and return it's length. |
// Returns a length of zero if not found |
// |
int |
_mbx_fetch_VPD(int code, unsigned char *buf, int size) |
{ |
unsigned char *vp, *ep; |
int i, len; |
|
_mbx_init_i2c(); // Fetch the data if not already |
vp = &_MBX_eeprom_data[0]; |
ep = &_MBX_eeprom_data[sizeof(_MBX_eeprom_data)]; |
while (vp < ep) { |
if (*vp == (unsigned char)code) { |
// Found the desired item |
len = (int)vp[1]; |
if (len > size) len = size; |
vp += 2; |
for (i = 0; i < len; i++) { |
*buf++ = *vp++; |
} |
return len; |
} |
len = (int)vp[1]; |
vp += 2 + len; // Skip to next item |
if (*vp == VPD_EOD) break; |
} |
return 0; |
} |
|
//-------------------------------------------------------------------------- |
// Platform init code. |
void |
hal_platform_init(void) |
{ |
hal_if_init(); |
} |
|
// EOF hal_aux.c |
/v2_0/src/redboot_linux_exec.c
0,0 → 1,311
//========================================================================== |
// |
// redboot_linux_boot.c |
// |
// RedBoot command to boot Linux |
// |
//========================================================================== |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//####OTHERCOPYRIGHTBEGIN#### |
// |
// The structure definitions below are taken from include/asm-ppc/mbx.h in |
// the Linux kernel, Copyright (c) 1997 Dan Malek. Their presence |
// here is for the express purpose of communication with the Linux kernel |
// being booted and is considered 'fair use' by the original author and |
// are included with his permission. |
// |
//####OTHERCOPYRIGHTEND#### |
//========================================================================== |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): msalter |
// Contributors: gthomas,msalter |
// Date: 2002-01-14 |
// Purpose: |
// Description: |
// |
// This code is part of RedBoot (tm). |
// |
//####DESCRIPTIONEND#### |
// |
//========================================================================== |
|
#include <redboot.h> |
#include CYGBLD_HAL_TARGET_H |
#include CYGBLD_HAL_PLATFORM_H |
|
#include <cyg/hal/hal_intr.h> |
#include <cyg/hal/hal_cache.h> |
|
#ifdef CYGSEM_REDBOOT_HAL_LINUX_BOOT |
|
#include CYGHWR_MEMORY_LAYOUT_H |
|
//========================================================================= |
|
// Exported CLI function(s) |
static void do_exec(int argc, char *argv[]); |
RedBoot_cmd("exec", |
"Execute an image - with MMU off", |
"[-w timeout]\n" |
" [-r <ramdisk addr> [-s <ramdisk length>]]\n" |
" [-c \"kernel command line\"] [<entry_point>]", |
do_exec |
); |
|
//========================================================================= |
// Imported from Linux kernel include/asm-ppc/mbx.h |
// Copyright (c) 1997 Dan Malek (dmalek@jlc.net) |
// Used with permission of author. |
|
|
/* A Board Information structure that is given to a program when |
* EPPC-Bug starts it up. |
*/ |
typedef struct bd_info { |
unsigned int bi_tag; /* Should be 0x42444944 "BDID" */ |
unsigned int bi_size; /* Size of this structure */ |
unsigned int bi_revision; /* revision of this structure */ |
unsigned int bi_bdate; /* EPPCbug date, i.e. 0x11061997 */ |
unsigned int bi_memstart; /* Memory start address */ |
unsigned int bi_memsize; /* Memory (end) size in bytes */ |
unsigned int bi_intfreq; /* Internal Freq, in Hz */ |
unsigned int bi_busfreq; /* Bus Freq, in Hz */ |
unsigned int bi_clun; /* Boot device controller */ |
unsigned int bi_dlun; /* Boot device logical dev */ |
|
/* These fields are not part of the board information structure |
* provided by the boot rom. They are filled in by embed_config.c |
* so we have the information consistent with other platforms. |
*/ |
unsigned char bi_enetaddr[6]; |
unsigned int bi_baudrate; |
} bd_t; |
|
/* Memory map for the MBX as configured by EPPC-Bug. We could reprogram |
* The SIU and PCI bridge, and try to use larger MMU pages, but the |
* performance gain is not measureable and it certainly complicates the |
* generic MMU model. |
* |
* In a effort to minimize memory usage for embedded applications, any |
* PCI driver or ISA driver must request or map the region required by |
* the device. For convenience (and since we can map up to 4 Mbytes with |
* a single page table page), the MMU initialization will map the |
* NVRAM, Status/Control registers, CPM Dual Port RAM, and the PCI |
* Bridge CSRs 1:1 into the kernel address space. |
*/ |
#define PCI_ISA_IO_ADDR ((unsigned)0x80000000) |
#define PCI_ISA_IO_SIZE ((unsigned int)(512 * 1024 * 1024)) |
#define PCI_IDE_ADDR ((unsigned)0x81000000) |
#define PCI_ISA_MEM_ADDR ((unsigned)0xc0000000) |
#define PCI_ISA_MEM_SIZE ((unsigned int)(512 * 1024 * 1024)) |
#define PCMCIA_MEM_ADDR ((unsigned int)0xe0000000) |
#define PCMCIA_MEM_SIZE ((unsigned int)(64 * 1024 * 1024)) |
#define PCMCIA_DMA_ADDR ((unsigned int)0xe4000000) |
#define PCMCIA_DMA_SIZE ((unsigned int)(64 * 1024 * 1024)) |
#define PCMCIA_ATTRB_ADDR ((unsigned int)0xe8000000) |
#define PCMCIA_ATTRB_SIZE ((unsigned int)(64 * 1024 * 1024)) |
#define PCMCIA_IO_ADDR ((unsigned int)0xec000000) |
#define PCMCIA_IO_SIZE ((unsigned int)(64 * 1024 * 1024)) |
#define NVRAM_ADDR ((unsigned int)0xfa000000) |
#define NVRAM_SIZE ((unsigned int)(1 * 1024 * 1024)) |
#define MBX_CSR_ADDR ((unsigned int)0xfa100000) |
#define MBX_CSR_SIZE ((unsigned int)(1 * 1024 * 1024)) |
#define IMAP_ADDR ((unsigned int)0xfa200000) |
#define IMAP_SIZE ((unsigned int)(64 * 1024)) |
#define PCI_CSR_ADDR ((unsigned int)0xfa210000) |
#define PCI_CSR_SIZE ((unsigned int)(64 * 1024)) |
|
/* Map additional physical space into well known virtual addresses. Due |
* to virtual address mapping, these physical addresses are not accessible |
* in a 1:1 virtual to physical mapping. |
*/ |
#define ISA_IO_VIRT_ADDR ((unsigned int)0xfa220000) |
#define ISA_IO_VIRT_SIZE ((unsigned int)64 * 1024) |
|
/* Interrupt assignments. |
* These are defined (and fixed) by the MBX hardware implementation. |
*/ |
#define POWER_FAIL_INT SIU_IRQ0 /* Power fail */ |
#define TEMP_HILO_INT SIU_IRQ1 /* Temperature sensor */ |
#define QSPAN_INT SIU_IRQ2 /* PCI Bridge (DMA CTLR?) */ |
#define ISA_BRIDGE_INT SIU_IRQ3 /* All those PC things */ |
#define COMM_L_INT SIU_IRQ6 /* MBX Comm expansion connector pin */ |
#define STOP_ABRT_INT SIU_IRQ7 /* Stop/Abort header pin */ |
|
/* The MBX uses the 8259. |
*/ |
#define NR_8259_INTS 16 |
|
// End of imported data/structures |
//========================================================================= |
|
#define MBX_CSR_COM1 0x02 // COM1 enabled |
|
// |
// Execute a Linux kernel - this is a RedBoot CLI command |
// |
static void |
do_exec(int argc, char *argv[]) |
{ |
unsigned long entry; |
bool wait_time_set; |
int wait_time; |
bool cmd_line_set, ramdisk_addr_set, ramdisk_size_set; |
unsigned long ramdisk_addr, ramdisk_size; |
char *cmd_line; |
char *cline; |
struct option_info opts[6]; |
|
bd_t *board_info; |
|
CYG_INTERRUPT_STATE oldints; |
unsigned long sp = CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE; |
|
init_opts(&opts[0], 'w', true, OPTION_ARG_TYPE_NUM, |
(void **)&wait_time, (bool *)&wait_time_set, "wait timeout"); |
init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_STR, |
(void **)&cmd_line, (bool *)&cmd_line_set, "kernel command line"); |
init_opts(&opts[2], 'r', true, OPTION_ARG_TYPE_NUM, |
(void **)&ramdisk_addr, (bool *)&ramdisk_addr_set, "ramdisk_addr"); |
init_opts(&opts[3], 's', true, OPTION_ARG_TYPE_NUM, |
(void **)&ramdisk_size, (bool *)&ramdisk_size_set, "ramdisk_size"); |
if (!scan_opts(argc, argv, 1, opts, 4, (void *)&entry, OPTION_ARG_TYPE_NUM, |
"[physical] starting address")) |
{ |
return; |
} |
|
// Make a little space at the top of the stack, and align to |
// 64-bit boundary. |
sp = (sp-8) & ~7; |
|
// Set up parameter struct at top of stack |
|
sp = sp-sizeof(bd_t); |
|
board_info = (bd_t *)sp; |
|
board_info->bi_tag = 0x42444944; |
board_info->bi_size = sizeof(board_info); |
board_info->bi_revision = 1; |
board_info->bi_bdate = 0x11061997; |
board_info->bi_memstart = CYGMEM_REGION_ram; |
board_info->bi_memsize = CYGMEM_REGION_ram_SIZE; |
board_info->bi_intfreq = CYGHWR_HAL_POWERPC_BOARD_SPEED; |
board_info->bi_busfreq = 66; // ???? |
board_info->bi_clun = 0; // ???? |
board_info->bi_dlun = 0; // ???? |
|
// Copy the commandline onto the stack, and set the SP to just below it. |
|
// If no cmd_line set in args, set it to empty string. |
if( !cmd_line_set ) |
cmd_line = ""; |
|
{ |
int len,i; |
|
// get length of string |
for( len = 0; cmd_line[len] != '\0'; len++ ); |
|
// decrement sp by length of string and align to |
// word boundary. |
sp = (sp-(len+1)) & ~3; |
|
// assign this SP value to command line start |
cline = (char *)sp; |
|
// copy command line over. |
for( i = 0; i < len; i++ ) |
cline[i] = cmd_line[i]; |
cline[len] = '\0'; |
|
// adjust SP to 64 bit boundary, and leave a little space |
// between it and the commandline for PowerPC calling |
// conventions. |
|
sp = (sp-32)&~7; |
|
} |
|
// Disable interrupts |
HAL_DISABLE_INTERRUPTS(oldints); |
|
// Put the caches to sleep. |
HAL_DCACHE_SYNC(); |
HAL_ICACHE_DISABLE(); |
HAL_DCACHE_DISABLE(); |
HAL_DCACHE_SYNC(); |
HAL_ICACHE_INVALIDATE_ALL(); |
HAL_DCACHE_INVALIDATE_ALL(); |
|
// diag_printf("entry %08x sp %08x bi %08x cl %08x\n", |
// entry,sp,board_info,cline); |
// breakpoint(); |
|
// Call into Linux |
*(volatile unsigned char *)MBX_CSR_ADDR |= MBX_CSR_COM1; // Magic that says COM1 enabled |
__asm__ volatile ( |
// Linux seems to want the I/O mapped at 0xFA200000 |
"lis 3,0xFA20\n" |
"mtspr 638,3\n" |
|
// Start by disabling MMU - the mappings are |
// 1-1 so this should not cause any problems |
"mfmsr 3\n" |
"li 4,0xFFFFFFCF\n" |
"and 3,3,4\n" |
"sync\n" |
"mtmsr 3\n" |
"sync\n" |
|
// Now set up parameters to jump into linux |
|
"mtlr %0\n" // set entry address in LR |
"mr 1,%1\n" // set stack pointer |
"mr 3,%2\n" // set board info in R3 |
"mr 4,%3\n" // set command line in R4 |
"blr \n" // jump into linux |
: |
: "r"(entry),"r"(sp),"r"(board_info),"r"(cline) |
: "r3", "r4" |
|
); |
} |
|
#endif // CYGSEM_REDBOOT_HAL_LINUX_BOOT |
|
//========================================================================= |
// EOF redboot_linux_exec.c |
/v2_0/src/mbx.S
0,0 → 1,674
##============================================================================= |
## |
## mbx.S |
## |
## MBX board hardware setup |
## |
##============================================================================= |
#####ECOSGPLCOPYRIGHTBEGIN#### |
## ------------------------------------------- |
## This file is part of eCos, the Embedded Configurable Operating System. |
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
## |
## eCos is free software; you can redistribute it and/or modify it under |
## the terms of the GNU General Public License as published by the Free |
## Software Foundation; either version 2 or (at your option) any later version. |
## |
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
## WARRANTY; without even the implied warranty of MERCHANTABILITY or |
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
## for more details. |
## |
## You should have received a copy of the GNU General Public License along |
## with eCos; if not, write to the Free Software Foundation, Inc., |
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
## |
## As a special exception, if other files instantiate templates or use macros |
## or inline functions from this file, or you compile this file and link it |
## with other works to produce a work based on this file, this file does not |
## by itself cause the resulting work to be covered by the GNU General Public |
## License. However the source code for this file must still be made available |
## in accordance with section (3) of the GNU General Public License. |
## |
## This exception does not invalidate any other reasons why a work based on |
## this file might be covered by the GNU General Public License. |
## |
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
## at http://sources.redhat.com/ecos/ecos-license/ |
## ------------------------------------------- |
#####ECOSGPLCOPYRIGHTEND#### |
##============================================================================= |
#######DESCRIPTIONBEGIN#### |
## |
## Author(s): hmt |
## Contributors:hmt |
## Date: 1999-06-08 |
## Purpose: MBX board hardware setup |
## Description: This file contains any code needed to initialize the |
## hardware on a MBX860 or 821 PowerPC board. |
## |
######DESCRIPTIONEND#### |
## |
##============================================================================= |
|
#include <pkgconf/system.h> |
#include <pkgconf/hal.h> |
#include <pkgconf/hal_powerpc.h> |
#include <pkgconf/hal_powerpc_mbx.h> |
|
#include <cyg/hal/arch.inc> /* register symbols et al */ |
#include <cyg/hal/ppc_regs.h> /* on-chip resource layout, special */ |
/* registers, IMM layout... */ |
#include <cyg/hal/quicc/ppc8xx.h> /* more of the same */ |
|
#------------------------------------------------------------------------------ |
# this is kept thus for commonality with CygMon code |
|
#if 40 == CYGHWR_HAL_POWERPC_BOARD_SPEED |
# define __40MHZ 1 |
#elif 50 == CYGHWR_HAL_POWERPC_BOARD_SPEED |
# define __50MHZ 1 |
#else |
# error Bad Board speed defined: see CYGBLD_HAL_PLATFORM_H |
#endif |
|
#------------------------------------------------------------------------------ |
# this is controlled with one define for tidiness: |
# (and it is undefined by default) |
|
//#define CYGPRI_RAM_START_PROGRAMS_UPMS |
|
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYGPRI_RAM_START_PROGRAMS_UPMS) |
# define CYGPRI_DO_PROGRAM_UPMS |
#endif |
|
#if defined(CYGPRI_RAM_START_PROGRAMS_UPMS) && defined(CYGSEM_HAL_ROM_MONITOR) |
/* use old tables in a StubROM build iff RAM start will reprogram them */ |
# define CYGPRI_USE_OLD_UPM_TABLES |
#endif |
|
/* The intention is that we only set up the UPMs in ROM start, be it actual |
* ROM application start or Stub ROMs that we built from the same sources. |
* |
* The alternative approach - in which we have reliability doubts - is to |
* program the UPMs with *old* timing data in StubROM start, then |
* *reprogram* them with *new* timing data in RAM start - and of course |
* program with *new* timing data in plain ROM application start. |
* (Re-programming from new to new timing data fails - hence the suspicion |
* of reprogramming _at_all_, hence this private configuration) |
* |
* With CYGPRI_RAM_START_PROGRAMS_UPMS left undefined, the former behaviour |
* - programming the UPMs exactly once - is obtained. Define it to get the |
* latter, untrusted behaviour. |
*/ |
|
#------------------------------------------------------------------------------ |
|
// LED macro uses r3, r5: r4 left alone |
#define LED( x ) \ |
lwi r5,0xfa100001; \ |
lwi r3,((x) & 0xe); \ |
stb r3,0(r5) |
|
|
#------------------------------------------------------------------------------ |
|
FUNC_START( hal_hardware_init ) |
|
# Throughout this routine, r4 is the base address of the control |
# registers. r3 and r5 are scratch in general. |
|
lwi r4,CYGARC_REG_IMM_BASE # base address of control registers |
mtspr CYGARC_REG_IMMR,r4 |
|
LED( 0 ) # turn all LEDs on |
|
#define CACHE_UNLOCKALL 0x0a00 |
#define CACHE_DISABLE 0x0400 |
#define CACHE_INVALIDATEALL 0x0c00 |
#define CACHE_ENABLE 0x0200 |
#define CACHE_ENABLEBIT 0x8000 |
|
#define CACHE_FORCEWRITETHROUGH 0x0100 |
#define CACHE_NOWRITETHROUGH 0x0300 |
#define CACHE_CLEAR_LE_SWAP 0x0700 |
|
# DATA CACHE |
mfspr r3,CYGARC_REG_DC_CST /* clear error bits */ |
lis r3,CACHE_UNLOCKALL |
sync |
mtspr CYGARC_REG_DC_CST,r3 /* unlock all lines */ |
|
lis r3,CACHE_INVALIDATEALL |
sync |
mtspr CYGARC_REG_DC_CST,r3 /* invalidate all lines */ |
|
lis r3,CACHE_DISABLE |
sync |
mtspr CYGARC_REG_DC_CST,r3 /* disable */ |
|
lis r3,CACHE_FORCEWRITETHROUGH |
sync |
mtspr CYGARC_REG_DC_CST,r3 /* set force-writethrough mode */ |
|
lis r3,CACHE_CLEAR_LE_SWAP |
sync |
mtspr CYGARC_REG_DC_CST,r3 /* clear little-endian swap mode */ |
/* (dunno what this is, but it sounds like a bad thing) */ |
|
# INSTRUCTION CACHE (no writeback modes) |
mfspr r3,CYGARC_REG_IC_CST /* clear error bits */ |
lis r3,CACHE_UNLOCKALL |
mtspr CYGARC_REG_IC_CST,r3 /* unlock all lines */ |
isync |
lis r3,CACHE_INVALIDATEALL |
mtspr CYGARC_REG_IC_CST,r3 /* invalidate all lines */ |
isync |
lis r3,CACHE_DISABLE |
mtspr CYGARC_REG_IC_CST,r3 /* disable */ |
isync |
|
sync |
|
/* |
* SIU Initialization. |
*/ |
/* lwi r3,0x0062A900*/ |
/* lwi r3,0x006A2900*/ |
lwi r3,0x00602400 |
stw r3,SIUMCR(r4) |
|
/* |
* Enable bus monitor. Disable Watchdog timer. |
*/ |
lwi r3,0xffffff88 |
stw r3,SYPCR(r4) |
|
/* |
* Clear REFA & REFB. Enable but freeze timebase. |
*/ |
lwi r3,0x00c2 |
sth r3,TBSCR(r4) |
|
/* |
* Unlock some RTC registers (see section 5.11.2) |
*/ |
lwi r3,0x55ccaa33 |
stw r3,RTCSCK(r4) |
stw r3,RTCK(r4) |
stw r3,RTSECK(r4) |
stw r3,RTCALK(r4) |
|
/* |
* Clear SERC & ALR. RTC runs on freeze. Enable RTC. |
*/ |
li r3,0x00c3 |
sth r3,RTCSC(r4) |
|
/* |
* Clear periodic timer interrupt status. |
* Enable periodic timer and stop it on freeze. |
*/ |
li r3,0x0083 |
sth r3,PISCR(r4) |
|
#ifdef CYGPRI_DO_PROGRAM_UPMS |
/* |
* Perform UPM programming by writing to its 64 RAM locations. |
* Note that UPM initialization must be done before the Bank Register |
* initialization. Otherwise, system may hang when writing to Bank |
* Registers in certain cases. |
*/ |
lis r5,__upmtbl_start@h |
ori r5,r5,__upmtbl_start@l |
lis r6,__upmtbl_end@h |
ori r6,r6,__upmtbl_end@l |
sub r7,r6,r5 /* size of table */ |
srawi r7,r7,2 /* in words */ |
|
li r6,0x0000 /* Command - OP=Write, UPMA, MAD=0 */ |
1: |
lwz r3,0(r5) /* get data from table */ |
stw r3,MDR(r4) /* store the data to MD register */ |
stw r6,MCR(r4) /* issue command to MCR register */ |
addi r5,r5,4 /* next entry in the table */ |
addi r6,r6,1 /* next MAD address */ |
cmpw r6,r7 /* done yet ? */ |
blt 1b |
#endif // CYGPRI_DO_PROGRAM_UPMS |
|
/* |
* Set refresh timer prescaler to divide by 8. |
*/ |
li r3,PTP_DIV32 |
sth r3,MPTPR(r4) |
|
/* |
* See Table 15-16 MPC860 User's Manual. |
* |
* PTA = 0x13 (clock dependent) |
* PTAE = enabled |
* AMA = 0 |
* DSA = 2 cycle disable |
* G0CLA = A12 |
* GPL_A4DIS = 0 |
* RLFA = 0 |
* WLFA = 0 |
* TLFA = 0 |
*/ |
#ifdef __50MHZ |
lwi r3,0x18801000 |
#else |
lwi r3,0x13801000 |
#endif |
stw r3,MAMR(r4) |
|
/* |
* Base Register initialization. |
*/ |
/* BOOT ROM */ |
lwi r3,0xfe000401 # 8-bit, GPCM |
#ifdef __50MHZ |
lwi r5,0xff800960 /* for 120nS devices, else 0xff800940 */ |
#else |
lwi r5,0xff800930 |
#endif |
#ifdef CYGHWR_HAL_POWERPC_MBX_BOOT_32BIT_FLASH |
// Then the 32-bit FLASH device is on CS0, the "ROM" is on CS7 |
stw r3,BR7(r4) |
stw r5,OR7(r4) |
#else // Boot from 8-bit ROM - the default, on CS0 |
stw r3,BR0(r4) |
stw r5,OR0(r4) |
#endif |
/* ONBOARD DRAM */ |
lwi r3,0x00000081 # 32-bit, UPMA |
lwi r5,0xffc00400 |
stw r3,BR1(r4) |
stw r5,OR1(r4) |
|
/* DRAM DIMM BANK0 */ |
lwi r3,0x00000080 # 32-bit, UPMA, INVALID |
lwi r5,0x00000400 |
stw r3,BR2(r4) |
stw r5,OR2(r4) |
|
/* DRAM DIMM BANK1 */ |
lwi r3,0x00000080 # 32-bit, UPMA, INVALID |
lwi r5,0x00000400 |
stw r3,BR3(r4) |
stw r5,OR3(r4) |
|
/* NVRAM */ |
lwi r3,0xfa000401 # 8-bit, GPCM |
#ifdef __50MHZ |
lwi r5,0xffe00930 |
#else |
lwi r5,0xffe00920 |
#endif |
stw r3,BR4(r4) |
stw r5,OR4(r4) |
|
/* PCI BRIDGE MEM/IO */ |
lwi r3,0x80000001 # 32-bit, GPCM |
lwi r5,0xa0000108 |
stw r3,BR5(r4) |
stw r5,OR5(r4) |
|
/* PCI BRIDGE REGISTERS */ |
lwi r3,0xfa210001 # 32-bit, GPCM |
lwi r5,0xffff0108 |
stw r3,BR6(r4) |
stw r5,OR6(r4) |
|
/* FLASH */ |
lwi r3,0xfc000001 # 32-bit, GPCM |
#ifdef __50MHZ |
lwi r5,0xff800940 |
#else |
lwi r5,0xff800930 |
#endif |
#ifdef CYGHWR_HAL_POWERPC_MBX_BOOT_32BIT_FLASH |
// Then the 32-bit FLASH device is on CS0, the "ROM" is on CS7 |
stw r3,BR0(r4) |
stw r5,OR0(r4) |
#else // Boot from 8-bit ROM - so the 32-bit FLASH is on CS7 |
stw r3,BR7(r4) |
stw r5,OR7(r4) |
#endif |
/* |
* SYSTEM CLOCK CONTROL REGISTER |
* |
* COM (1:2) = 0 |
* TBS (6) = 1 |
* RTDIV (7) = 0 |
* RTSEL (8) = 0 |
* CRQEN (9) = 0 |
* PRQEN (10) = 0 |
* EBDF (13:14) = 0 |
* DFSYNC(17:18) = 0 |
* DFBRG (19:20) = 0 |
* DFNL (21:23) = 0 |
* DFNH (24:26) = 0 |
*/ |
lwi r3,0x02000000 |
stw r3,SCCR(r4) |
|
/* |
* The following sets up a 40MHz CPU clock. |
* I've seen 2 variations of MBX boards. One |
* uses a direct feed (1:1) 40MHz clock on |
* EXTCLK inputs. The other uses a 32KHz |
* oscillator on the OSCM inputs. |
*/ |
lwz r3,PLPRCR(r4) |
rlwinm r3,r3,12,20,31 |
cmpwi r3,0 |
beq 1f |
|
/* |
* PLL, LOW POWER, AND RESET CONTROL REGISTER |
* |
* MF (0:11) = depends on source clock |
* SPLSS (16) = 1 |
* TEXPS (17) = 1 |
* TMIST (19) = 1 |
* CSRC (21) = 0 |
* LPM (22:23) = 0 |
* CSR (24) = 0 |
* LOLRE (25) = 0 |
* FIOPD (26) = 0 |
*/ |
/* MF (0:11) = 0x4c4 = 1220 = (40MHz/32.768KHz) */ |
#ifdef __50MHZ |
lwi r3,0x5f50d000 |
#else |
lwi r3,0x4c40d000 |
#endif |
b 2f |
1: |
/* MF (0:11) = 0x000 = 1 = (1:1) */ |
lwi r3,0x0000d000 |
2: |
stw r3,PLPRCR(r4) |
|
# mask interrupt sources in the SIU |
lis r2,0 |
lwi r3,CYGARC_REG_IMM_SIMASK |
stw r2,0(r3) |
|
# set the decrementer to maxint |
lwi r2,0 |
not r2,r2 |
mtdec r2 |
|
# and enable the timebase and decrementer to make sure |
li r2,1 # TBEnable and not TBFreeze |
lwi r3,CYGARC_REG_IMM_TBSCR |
sth r2,0(r3) |
|
LED( 8 ) # turn red led off |
|
#ifdef CYG_HAL_STARTUP_ROM |
# move return address to where the ROM is |
mflr r3 |
andi. r3,r3,0xffff |
oris r3,r3,CYGMEM_REGION_rom>>16 |
mtlr r3 |
#endif |
|
blr |
FUNC_END( hal_hardware_init ) |
|
|
#ifdef CYGPRI_DO_PROGRAM_UPMS |
# ------------------------------------------------------------------------- |
# this table initializes the User Programmable Machine (UPM) nastiness |
# in the QUICC to control DRAM timing. |
|
__upmtbl_start: |
|
#ifdef __25MHZ |
/* UPM contents for 25MHz clk. DRAM: EDO,4K,60ns */ |
|
/* Single read. (offset 0 in upm RAM) */ |
.long 0xcfffe004, 0x0fffe404, 0x08af2c04, 0x03af2c08 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Burst read. (offset 8 in upm RAM) */ |
.long 0xcfffe004, 0x0fffe404, 0x08af2c04, 0x03af2c08 |
.long 0x08af2c04, 0x03af2c08, 0x08af2c04, 0x03af2c08 |
.long 0x08af2c04, 0x03af2c08, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Single write. (offset 18 in upm RAM) */ |
.long 0xcfffe004, 0x0fffa404, 0x08ff2c00, 0x33ff6c0f |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Burst write. (offset 20 in upm RAM) */ |
.long 0xcfffe004, 0x0fffa404, 0x08ff2c00, 0x03ff2c0c |
.long 0x08ff2c00, 0x03ff2c0c, 0x08ff2c00, 0x03ff2c0c |
.long 0x08ff2c00, 0x33ff6c0f, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Refresh (offset 30 in upm RAM) */ |
.long 0xc0ffec04, 0x07ffec04, 0x3fffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Exception. (offset 3c in upm RAM) */ |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
#endif |
|
#ifdef __33MHZ |
/* UPM contents for 33MHz clk. DRAM: EDO,4K,60ns */ |
|
/* Single read. (offset 0 in upm RAM) */ |
.long 0xcfffe004, 0x0fffe404, 0x08af2c04, 0x03af2c08 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Burst read. (offset 8 in upm RAM) */ |
.long 0xcfffe004, 0x0fffe404, 0x08af2c04, 0x03af2c08 |
.long 0x08af2c04, 0x03af2c08, 0x08af2c04, 0x03af2c08 |
.long 0x08af2c04, 0x03af2c08, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Single write. (offset 18 in upm RAM) */ |
.long 0xcfffe004, 0x0fff2404, 0x08ff2c00, 0x33ff6c07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Burst write. (offset 20 in upm RAM) */ |
.long 0xcfffe004, 0x0fff2404, 0x08ff2c00, 0x03ff2c0c |
.long 0x08ff2c00, 0x03ff2c0c, 0x08ff2c00, 0x03ff2c0c |
.long 0x08ff2c00, 0x33ff6c07, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Refresh (offset 30 in upm RAM) */ |
.long 0xc0ffec04, 0x03ffec04, 0x1fffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Exception. (offset 3c in upm RAM) */ |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
#endif |
|
#ifdef CYGPRI_USE_OLD_UPM_TABLES |
|
// BUT new tables received from motorola are further down |
|
// And I just discovered a good reason for using the NEW TABLES: |
// with the old tables, the cache zero-a-line command does not |
// work. It only zeros the first 12 bytes of the line, not all 16. |
// This may be related to having the cache set up write-through, as |
// seems necessary to have it work on this platform. |
|
#ifdef __40MHZ |
/* UPM contents for 40MHz clk. DRAM: EDO,4K,60ns */ |
|
/* Single read. (offset 0 in upm RAM) */ |
.long 0xefffe004, 0x0fffe004, 0x0eefac04, 0x00af2c04 |
.long 0x03af2c08, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Burst read. (offset 8 in upm RAM) */ |
.long 0xefffe004, 0x0fffe004, 0x0eefac04, 0x00af2c04 |
.long 0x03af2c08, 0x0caf2c04, 0x00af2c04, 0x03af2c08 |
.long 0x0caf2c04, 0x00af2c04, 0x03af2c08, 0x0caf2c04 |
.long 0x00af2c04, 0x03af2c08, 0xffffec07, 0xffffec07 |
|
/* Single write. (offset 18 in upm RAM) */ |
.long 0xefffe004, 0x0fffa004, 0x0eff2c04, 0x00ff2c00 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Burst write. (offset 20 in upm RAM) */ |
.long 0xefffe004, 0x0fffa004, 0x0eff2c04, 0x00ff2c00 |
.long 0x0fff2c0c, 0x0cff2c00, 0x03ff2c0c, 0x0cff2c00 |
.long 0x03ff2c0c, 0x0cff2c00, 0x33ff6c07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Refresh (offset 30 in upm RAM) */ |
.long 0xf0ffec04, 0x00ffec04, 0x0fffec04, 0x0fffec04 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Exception. (offset 3c in upm RAM) */ |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
#endif |
|
#ifdef __50MHZ |
/* UPM contents for 50MHZ clk. DRAM: EDO,4K,60ns */ |
|
/* Single read. (offset 0 in upm RAM) */ |
.long 0xffffe004, 0x0fffe004, 0x0fffe404, 0x0cafac04 |
.long 0x00af2c04, 0x0faf2c08, 0xffffec07, 0xffffec07 |
|
/* Burst read. (offset 8 in upm RAM) */ |
.long 0xffffe004, 0x0fffe004, 0x0fffe404, 0x0cafac04 |
.long 0x00af2c04, 0x0faf2c08, 0x0caf2c04, 0x00af2c04 |
.long 0x0faf2c08, 0x0caf2c04, 0x00af2c04, 0x0faf2c08 |
.long 0x0caf2c04, 0x00af2c04, 0x0faf2c08, 0xffffec07 |
|
/* Single write. (offset 18 in upm RAM) */ |
.long 0xffffe004, 0x0fffe004, 0x0fffa404, 0x0cff2c04 |
.long 0x00ff2c00, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Burst write. (offset 20 in upm RAM) */ |
.long 0xffffe004, 0x0fffe004, 0x0fffa404, 0x0cff2c04 |
.long 0x00ff2c00, 0x0fff2c08, 0x0cff2c04, 0x00ff2c00 |
.long 0x0fff2c00, 0x0cff2c04, 0x00ff2c00, 0x0fff2c08 |
.long 0x0cff2c04, 0x00ff2c00, 0xffffec07, 0xffffec07 |
|
/* Refresh (offset 30 in upm RAM) */ |
.long 0xf0ffec04, 0xc0ffec04, 0x00ffec04, 0x0fffec04 |
.long 0x1fffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
|
/* Exception. (offset 3c in upm RAM) */ |
.long 0xffffec07, 0xffffec07, 0xffffec07, 0xffffec07 |
#endif |
|
#else // !CYGPRI_USE_OLD_UPM_TABLES: use the NEW TABLES |
|
// for RAM startup or ROM application when NOT making a stub rom, |
// ie. CYGSEM_HAL_ROM_MONITOR not defined. |
|
#ifdef __40MHZ |
/* UPM contents for 40MHz clk. DRAM: EDO,4K,60ns */ |
.long 0xcfafc004, 0x0fafc404, 0x0caf0c04, 0x30af0c00 |
.long 0xf1bf4805, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xcfafc004, 0x0fafc404, 0x0caf0c04, 0x03af0c08 |
.long 0x0caf0c04, 0x03af0c08, 0x0caf0c04, 0x03af0c08 |
.long 0x0caf0c04, 0x30af0c00, 0xf3bf4805, 0xffffc005 |
.long 0xffffc005, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xcfff0004, 0x0fff0404, 0x0cff0c00, 0x33ff4804 |
.long 0xffffc005, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xcfff0004, 0x0fff0404, 0x0cff0c00, 0x03ff0c0c |
.long 0x0cff0c00, 0x03ff0c0c, 0x0cff0c00, 0x03ff0c0c |
.long 0x0cff0c00, 0x33ff4804, 0xffffc005, 0xffffc005 |
.long 0xffffc005, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xfcffc004, 0xc0ffc004, 0x01ffc004, 0x0fffc004 |
.long 0x3fffc004, 0xffffc005, 0xffffc005, 0xffffc005 |
.long 0xffffc005, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xffffc007, 0xffffc007, 0xffffc007, 0xffffc007 |
#endif |
|
#ifdef __50MHZ |
/* UPM contents for 50MHZ clk. DRAM: EDO,4K,60ns */ |
|
.long 0xcfafc004, 0x0fafc404, 0x0caf8c04, 0x10af0c04 |
.long 0xf0af0c00, 0xf3bf4805, 0xffffc005, 0xffffc005 |
|
.long 0xcfafc004, 0x0fafc404, 0x0caf8c04, 0x00af0c04 |
.long 0x07af0c08, 0x0caf0c04, 0x01af0c04, 0x0faf0c08 |
.long 0x0caf0c04, 0x01af0c04, 0x0faf0c08, 0x0caf0c04 |
.long 0x10af0c04, 0xf0afc000, 0xf3bf4805, 0xffffc005 |
|
.long 0xcfff0004, 0x0fff0404, 0x0cff0c00, 0x13ff4804 |
.long 0xffffc004, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xcfff0004, 0x0fff0404, 0x0cff0c00, 0x03ff0c0c |
.long 0x0cff0c00, 0x03ff0c0c, 0x0cff0c00, 0x03ff0c0c |
.long 0x0cff0c00, 0x13ff4804, 0xffffc004, 0xffffc005 |
.long 0xffffc005, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xfcffc004, 0xc0ffc004, 0x01ffc004, 0x0fffc004 |
.long 0x1fffc004, 0xffffc004, 0xffffc005, 0xffffc005 |
.long 0xffffc005, 0xffffc005, 0xffffc005, 0xffffc005 |
|
.long 0xffffc007, 0xffffc007, 0xffffc007, 0xffffc007 |
#endif |
#endif // OLD/NEW TABLES == CYGPRI_USE_OLD_UPM_TABLES or not. |
// depending on CYGSEM_HAL_ROM_MONITOR and whether RAM |
// start re-initializes. |
|
__upmtbl_end: |
#endif // CYGPRI_DO_PROGRAM_UPMS |
|
FUNC_START(hal_mbx_set_led) |
andi. r3,r3,0x0e |
lwi r4,0xfa100001 |
stb r3,0(r4) |
blr |
FUNC_END(hal_mbx_set_led) |
|
FUNC_START(hal_mbx_flash_led) |
lwi r4,0xfa100001 |
1: |
li r5,10 |
stb r5,0(r4) |
|
lis r5,10 |
mtctr r5 |
2: |
bdnz 2b |
|
li r5,12 |
stb r5,0(r4) |
|
lis r5,10 |
mtctr r5 |
3: |
bdnz 3b |
|
subi r3,r3,1 |
cmpwi r3,0 |
bge 1b |
|
li r5,6 |
stb r5,0(r4) |
|
lis r5,20 |
mtctr r5 |
4: |
bdnz 4b |
|
blr |
FUNC_END(hal_mbx_flash_led) |
|
|
#------------------------------------------------------------------------------ |
# end of mbx.S |
/v2_0/src/hal_diag.c
0,0 → 1,275
//============================================================================= |
// |
// hal_diag.c |
// |
// HAL diagnostic output code |
// |
//============================================================================= |
//####ECOSGPLCOPYRIGHTBEGIN#### |
// ------------------------------------------- |
// This file is part of eCos, the Embedded Configurable Operating System. |
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
// |
// eCos is free software; you can redistribute it and/or modify it under |
// the terms of the GNU General Public License as published by the Free |
// Software Foundation; either version 2 or (at your option) any later version. |
// |
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
// WARRANTY; without even the implied warranty of MERCHANTABILITY or |
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
// for more details. |
// |
// You should have received a copy of the GNU General Public License along |
// with eCos; if not, write to the Free Software Foundation, Inc., |
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
// |
// As a special exception, if other files instantiate templates or use macros |
// or inline functions from this file, or you compile this file and link it |
// with other works to produce a work based on this file, this file does not |
// by itself cause the resulting work to be covered by the GNU General Public |
// License. However the source code for this file must still be made available |
// in accordance with section (3) of the GNU General Public License. |
// |
// This exception does not invalidate any other reasons why a work based on |
// this file might be covered by the GNU General Public License. |
// |
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
// at http://sources.redhat.com/ecos/ecos-license/ |
// ------------------------------------------- |
//####ECOSGPLCOPYRIGHTEND#### |
//============================================================================= |
//#####DESCRIPTIONBEGIN#### |
// |
// Author(s): hmt |
// Contributors:hmt, jskov |
// Date: 1999-06-08 |
// Purpose: HAL diagnostic output |
// Description: Implementations of HAL diagnostic output support. |
// |
//####DESCRIPTIONEND#### |
// |
//============================================================================= |
|
#include <pkgconf/hal.h> |
|
#include <cyg/infra/cyg_type.h> // base types |
#include <cyg/infra/cyg_trac.h> // tracing macros |
#include <cyg/infra/cyg_ass.h> // assertion macros |
|
#include <cyg/hal/hal_io.h> // IO macros |
#include <cyg/hal/hal_diag.h> |
#include <cyg/hal/hal_intr.h> // Interrupt macros |
|
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) |
#include <cyg/hal/hal_stub.h> // hal_output_gdb_string |
#endif |
|
#include <cyg/hal/ppc_regs.h> |
#include <cyg/hal/quicc/quicc_smc1.h> |
|
|
void |
cyg_hal_plf_comms_init(void) |
{ |
static int initialized = 0; |
|
if (initialized) |
return; |
initialized = 1; |
|
cyg_hal_plf_serial_init(); |
} |
|
|
#if !defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG) |
|
//----------------------------------------------------------------------------- |
// Select default diag channel to use |
|
//#define CYG_KERNEL_DIAG_ROMART |
//#define CYG_KERNEL_DIAG_SERIAL |
|
#if !defined(CYG_KERNEL_DIAG_SERIAL) |
#define CYG_KERNEL_DIAG_SERIAL |
#endif |
|
#ifdef CYGDBG_DIAG_BUF |
// Keep diag messages in a buffer for later [re]display |
|
int enable_diag_uart = 1; |
int enable_diag_buf = 1; |
static char diag_buf[40960*4]; |
static int diag_buf_ptr = 0; |
|
static void |
diag_putc(char c) |
{ |
if (enable_diag_buf) { |
diag_buf[diag_buf_ptr++] = c; |
if (diag_buf_ptr == sizeof(diag_buf)) diag_buf_ptr--; |
} |
} |
|
void |
dump_diag_buf(int start, int len) |
{ |
int i; |
enable_diag_uart = 1; |
enable_diag_buf = 0; |
if (len == 0) len = diag_buf_ptr; |
diag_printf("\nDiag buf\n"); |
for (i = start; i < len; i++) { |
hal_diag_write_char(diag_buf[i]); |
} |
} |
#endif // CYGDBG_DIAG_BUF |
|
|
//----------------------------------------------------------------------------- |
// MBX board specific serial output; using GDB protocol by default: |
|
|
#if defined(CYG_KERNEL_DIAG_SERIAL) |
|
EPPC *eppc; |
|
void hal_diag_init(void) |
{ |
static int init = 0; |
if (init) return; |
init++; |
|
// hardwired base |
eppc = eppc_base(); |
|
// init the actual serial port |
cyg_hal_plf_serial_init_channel(); |
#ifdef CYGSEM_HAL_DIAG_MANGLER_GDB |
#ifndef CYG_HAL_STARTUP_ROM |
// We are talking to GDB; ack the "go" packet! |
cyg_hal_plf_serial_putc(eppc, '+'); |
#endif |
#endif |
} |
|
void hal_diag_write_char_serial( char c ) |
{ |
unsigned long __state; |
HAL_DISABLE_INTERRUPTS(__state); |
cyg_hal_plf_serial_putc(eppc, c); |
HAL_RESTORE_INTERRUPTS(__state); |
} |
|
#if defined(CYG_HAL_STARTUP_ROM) || !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN) |
void hal_diag_write_char(char c) |
{ |
#ifdef CYGDBG_DIAG_BUF |
diag_putc(c); |
if (!enable_diag_uart) return; |
#endif // CYGDBG_DIAG_BUF |
hal_diag_write_char_serial(c); |
} |
|
#else // RAM start so encode for GDB |
|
void hal_diag_write_char(char c) |
{ |
static char line[100]; |
static int pos = 0; |
|
#ifdef CYGDBG_DIAG_BUF |
diag_putc(c); |
if (!enable_diag_uart) return; |
#endif // CYGDBG_DIAG_BUF |
|
// No need to send CRs |
if( c == '\r' ) return; |
|
line[pos++] = c; |
|
if( c == '\n' || pos == sizeof(line) ) |
{ |
CYG_INTERRUPT_STATE old; |
|
// Disable interrupts. This prevents GDB trying to interrupt us |
// while we are in the middle of sending a packet. The serial |
// receive interrupt will be seen when we re-enable interrupts |
// later. |
|
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); |
#else |
HAL_DISABLE_INTERRUPTS(old); |
#endif |
|
while(1) |
{ |
static char hex[] = "0123456789ABCDEF"; |
cyg_uint8 csum = 0; |
int i; |
|
hal_diag_write_char_serial('$'); |
hal_diag_write_char_serial('O'); |
csum += 'O'; |
for( i = 0; i < pos; i++ ) |
{ |
char ch = line[i]; |
char h = hex[(ch>>4)&0xF]; |
char l = hex[ch&0xF]; |
hal_diag_write_char_serial(h); |
hal_diag_write_char_serial(l); |
csum += h; |
csum += l; |
} |
hal_diag_write_char_serial('#'); |
hal_diag_write_char_serial(hex[(csum>>4)&0xF]); |
hal_diag_write_char_serial(hex[csum&0xF]); |
|
#ifndef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
// only gobble characters if no interrupt handler to grab ^Cs |
// is installed (which is exclusive with device driver use) |
|
// Wait for the ACK character '+' from GDB here and handle |
// receiving a ^C instead. This is the reason for this clause |
// being a loop. |
c = cyg_hal_plf_serial_getc(eppc); |
|
if( c == '+' ) |
break; // a good acknowledge |
#if 0 |
if( c1 == 3 ) { |
// Ctrl-C: breakpoint. |
breakpoint(); |
break; |
} |
#endif |
// otherwise, loop round again |
#else |
break; |
#endif |
} |
|
pos = 0; |
|
// And re-enable interrupts |
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); |
#else |
HAL_RESTORE_INTERRUPTS(old); |
#endif |
|
} |
} |
#endif // NOT def CYG_HAL_STARTUP_ROM |
|
|
void hal_diag_read_char(char *c) |
{ |
*c = cyg_hal_plf_serial_getc(eppc); |
} |
|
#endif // CYG_KERNEL_DIAG_SERIAL |
|
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG |
|
// EOF hal_diag.c |
/v2_0/misc/redboot_RAM.ecm
0,0 → 1,93
cdl_savefile_version 1; |
cdl_savefile_command cdl_savefile_version {}; |
cdl_savefile_command cdl_savefile_command {}; |
cdl_savefile_command cdl_configuration { description hardware template package }; |
cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; |
|
cdl_configuration eCos { |
description "" ; |
hardware mbx ; |
template redboot ; |
package -hardware CYGPKG_HAL_POWERPC v2_0 ; |
package -hardware CYGPKG_HAL_POWERPC_MPC8xx v2_0 ; |
package -hardware CYGPKG_HAL_POWERPC_MBX v2_0 ; |
package -hardware CYGPKG_HAL_QUICC v2_0 ; |
package -hardware CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC v2_0 ; |
package -hardware CYGPKG_DEVS_ETH_POWERPC_QUICC v2_0 ; |
package -hardware CYGPKG_DEVS_FLASH_MBX v2_0 ; |
package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX v2_0 ; |
package -template CYGPKG_HAL v2_0 ; |
package -template CYGPKG_INFRA v2_0 ; |
package -template CYGPKG_REDBOOT v2_0 ; |
package -template CYGPKG_ISOINFRA v2_0 ; |
package -template CYGPKG_LIBC_STRING v2_0 ; |
package -template CYGPKG_NS_DNS v2_0 ; |
package CYGPKG_IO_FLASH v2_0 ; |
package CYGPKG_IO_ETH_DRIVERS v2_0 ; |
package CYGPKG_COMPRESS_ZLIB v2_0 ; |
}; |
|
cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS { |
inferred_value 0 |
}; |
|
cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE { |
user_value 4096 |
}; |
|
cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { |
user_value 0 |
}; |
|
cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { |
inferred_value 0 |
}; |
|
cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { |
inferred_value 1 |
}; |
|
cdl_component CYGBLD_BUILD_REDBOOT { |
user_value 1 |
}; |
|
cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE { |
user_value 0x00030000 |
}; |
|
cdl_option CYGBLD_ISO_STRTOK_R_HEADER { |
inferred_value 1 <cyg/libc/string/string.h> |
}; |
|
cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER { |
inferred_value 1 <cyg/libc/string/string.h> |
}; |
|
cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER { |
inferred_value 1 <cyg/libc/string/bsdstring.h> |
}; |
|
cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER { |
inferred_value 1 <cyg/libc/string/string.h> |
}; |
|
cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER { |
inferred_value 1 <cyg/libc/string/string.h> |
}; |
|
cdl_option CYGBLD_ISO_DNS_HEADER { |
inferred_value 1 <cyg/ns/dns/dns.h> |
}; |
|
cdl_option CYGPKG_NS_DNS_BUILD { |
inferred_value 0 |
}; |
|
cdl_option CYGHWR_DEVS_FLASH_AMD_AM29F040B { |
inferred_value 1 |
}; |
|
|
/v2_0/misc/redboot_ROM_40.ecm
0,0 → 1,60
cdl_savefile_version 1; |
cdl_savefile_command cdl_savefile_version {}; |
cdl_savefile_command cdl_savefile_command {}; |
cdl_savefile_command cdl_configuration { description hardware template package }; |
cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; |
|
cdl_configuration eCos { |
description "" ; |
hardware mbx ; |
template redboot ; |
package -hardware CYGPKG_HAL_POWERPC v2_0 ; |
package -hardware CYGPKG_HAL_POWERPC_MPC8xx v2_0 ; |
package -hardware CYGPKG_HAL_POWERPC_MBX v2_0 ; |
package -hardware CYGPKG_HAL_QUICC v2_0 ; |
package -hardware CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC v2_0 ; |
package -hardware CYGPKG_DEVS_ETH_POWERPC_QUICC v2_0 ; |
package -hardware CYGPKG_DEVS_FLASH_MBX v2_0 ; |
package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX v2_0 ; |
package -template CYGPKG_HAL v2_0 ; |
package -template CYGPKG_INFRA v2_0 ; |
package -template CYGPKG_REDBOOT v2_0 ; |
package CYGPKG_COMPRESS_ZLIB v2_0 ; |
package CYGPKG_MEMALLOC v2_0 ; |
package CYGPKG_ISOINFRA v2_0 ; |
package CYGPKG_IO_FLASH v2_0 ; |
package CYGPKG_IO_ETH_DRIVERS v2_0 ; |
}; |
|
cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { |
user_value 0 |
}; |
|
cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { |
inferred_value 0 |
}; |
|
cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { |
inferred_value 1 |
}; |
|
cdl_option CYGSEM_HAL_ROM_MONITOR { |
inferred_value 1 |
}; |
|
cdl_component CYG_HAL_STARTUP { |
user_value ROM |
}; |
|
cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED { |
user_value 40 |
}; |
|
cdl_component CYGBLD_BUILD_REDBOOT { |
user_value 1 |
}; |
|
|
/v2_0/misc/redboot_RAM_40.ecm
0,0 → 1,52
cdl_savefile_version 1; |
cdl_savefile_command cdl_savefile_version {}; |
cdl_savefile_command cdl_savefile_command {}; |
cdl_savefile_command cdl_configuration { description hardware template package }; |
cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value }; |
cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value }; |
|
cdl_configuration eCos { |
description "" ; |
hardware mbx ; |
template redboot ; |
package -hardware CYGPKG_HAL_POWERPC v2_0 ; |
package -hardware CYGPKG_HAL_POWERPC_MPC8xx v2_0 ; |
package -hardware CYGPKG_HAL_POWERPC_MBX v2_0 ; |
package -hardware CYGPKG_HAL_QUICC v2_0 ; |
package -hardware CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC v2_0 ; |
package -hardware CYGPKG_DEVS_ETH_POWERPC_QUICC v2_0 ; |
package -hardware CYGPKG_DEVS_FLASH_MBX v2_0 ; |
package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX v2_0 ; |
package -template CYGPKG_HAL v2_0 ; |
package -template CYGPKG_INFRA v2_0 ; |
package -template CYGPKG_REDBOOT v2_0 ; |
package CYGPKG_IO_FLASH v2_0 ; |
package CYGPKG_IO_ETH_DRIVERS v2_0 ; |
package CYGPKG_COMPRESS_ZLIB v2_0 ; |
package CYGPKG_MEMALLOC v2_0 ; |
package CYGPKG_ISOINFRA v2_0 ; |
}; |
|
cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT { |
user_value 0 |
}; |
|
cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM { |
inferred_value 0 |
}; |
|
cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS { |
inferred_value 1 |
}; |
|
cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED { |
user_value 40 |
}; |
|
cdl_component CYGBLD_BUILD_REDBOOT { |
user_value 1 |
}; |
|
|
/v2_0/misc/STUBS_config
0,0 → 1,85
#! /bin/sh |
# Configure PowerPC/cogent eCos to create Cogent GDB stubs |
# Ensure that PATH include the directory where the PPC tools reside. |
# |
# Run from an empty temporary directory with one argument: the path to |
# the packages directory (i.e., where pkgconf.tcl lives). |
# |
# Output will be ./stubrom.bin which is suitable for burning into ROM. |
# Remember to be careful with byte-endianess in the ROM programmer. |
|
if ( echo | tclsh ) 2>/dev/null ; then |
TCL=tclsh |
elif ( echo | cygtclsh80 ) 2>/dev/null ; then |
TCL=cygtclsh80 |
else |
echo Could not find TCL interpreter |
exit 1 |
fi |
|
$TCL $1/pkgconf.tcl \ |
--target=powerpc --platform=mbx --startup=rom \ |
--disable CYGPKG_KERNEL --disable CYGPKG_UITRON \ |
--disable CYGPKG_LIBC --disable CYGPKG_LIBM \ |
--disable CYGPKG_ERROR --disable CYGPKG_IO \ |
--disable CYGPKG_IO_SERIAL --disable CYGPKG_DEVICES_WALLCLOCK \ |
--disable CYGPKG_DEVICES_WATCHDOG |
|
patch <<END_OF_PATCH -p0 |
--- pkgconf/hal.h.orig Thu Feb 10 09:05:07 2000 |
+++ pkgconf/hal.h Thu Feb 10 09:04:56 2000 |
@@ -122,7 +122,7 @@ |
} |
|
}}CFG_DATA */ |
-#define CYGFUN_HAL_COMMON_KERNEL_SUPPORT |
+#undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT |
#undef CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL |
|
#ifdef CYGDBG_HAL_DIAG_DISABLE_GDB_PROTOCOL |
@@ -243,7 +243,7 @@ |
#define CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK |
#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096 |
#undef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING |
-#define CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT |
+#undef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT |
#undef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN |
#undef CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS |
|
@@ -272,7 +272,7 @@ |
} |
|
}}CFG_DATA */ |
-#define CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM |
+#undef CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM |
|
/* {{CFG_DATA |
|
@@ -423,10 +423,10 @@ |
|
}}CFG_DATA */ |
|
-#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
+#define CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
#undef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT |
-#define CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT |
-#define CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT |
+#undef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT |
+#undef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT |
|
/* |
* NOTE: |
@@ -522,7 +522,7 @@ |
|
|
/* Enable this when configuring as a ROM monitor (i.e., stub) */ |
-#undef CYGSEM_HAL_ROM_MONITOR |
+#define CYGSEM_HAL_ROM_MONITOR |
|
#include CYGBLD_HAL_TARGET_H |
#include CYGBLD_HAL_PLATFORM_H |
END_OF_PATCH |
|
make |
make -C hal/common/current/src/stubrom |
powerpc-eabi-objcopy -O binary hal/common/current/src/stubrom/stubrom stubrom.bin |
v2_0/misc/STUBS_config
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: v2_0/misc/stubrom.perm
===================================================================
--- v2_0/misc/stubrom.perm (nonexistent)
+++ v2_0/misc/stubrom.perm (revision 1765)
@@ -0,0 +1,37 @@
+#
+# A configuration for building a GDB stub ROM for the Motorola MBX board,
+# with MPC 860 or 821 CPU.
+#
+# To build the ROMs:
+# 1. Create a build directory and cd into it.
+# 2. Run: permtest.tcl --srcdir= /hal/powerpc/mbx/current/misc/stubrom.perm
+# Where is the path to your source repository.
+# (If necessary, make sure the system clock speed is set correctly in
+# pkgconf/hal_powerpc_mbx.h: 40MHz (MPC821) versus 50MHz (MPC860) by default)
+# If you do not have permtest, use the config tool or an editor to make
+# the changes listed below to the relevant configuration files.
+# If you intend to install the image into the 32-bit flash device instead of
+# the 8-bit socketed ROM, set the option CYGHWR_HAL_POWERPC_MBX_BOOT_32BIT_FLASH
+# in hal_powerpc_mbx.h
+# 3. Run: make
+# 4. Run: make -C hal/common/current/src/stubrom
+#
+# The file hal/common/current/src/stubrom/stubrom will be an excutable of the ROM.
+# Use objcopy to convert this to the appropriate format for your PROM burner:
+# powerpc-eabi-objcopy -O binary hal/common/current/src/stubrom/stubrom stubrom.img
+# Enjoy!
+#
+
+pkgconf --target=powerpc --platform=mbx --startup=rom --disable-kernel --disable-uitron --disable-libc --disable-libm --disable-io --disable-io_serial --disable-wallclock --disable-watchdog
+
+header hal.h {
+ enable CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
+ disable CYGFUN_HAL_COMMON_KERNEL_SUPPORT
+ disable CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
+ disable CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT
+ disable CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
+ enable CYG_HAL_ROM_MONITOR
+}
+
+# enable CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT excluded for now
+
Index: v2_0/misc/redboot_ROM.ecm
===================================================================
--- v2_0/misc/redboot_ROM.ecm (nonexistent)
+++ v2_0/misc/redboot_ROM.ecm (revision 1765)
@@ -0,0 +1,101 @@
+cdl_savefile_version 1;
+cdl_savefile_command cdl_savefile_version {};
+cdl_savefile_command cdl_savefile_command {};
+cdl_savefile_command cdl_configuration { description hardware template package };
+cdl_savefile_command cdl_package { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_component { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_option { value_source user_value wizard_value inferred_value };
+cdl_savefile_command cdl_interface { value_source user_value wizard_value inferred_value };
+
+cdl_configuration eCos {
+ description "" ;
+ hardware mbx ;
+ template redboot ;
+ package -hardware CYGPKG_HAL_POWERPC v2_0 ;
+ package -hardware CYGPKG_HAL_POWERPC_MPC8xx v2_0 ;
+ package -hardware CYGPKG_HAL_POWERPC_MBX v2_0 ;
+ package -hardware CYGPKG_HAL_QUICC v2_0 ;
+ package -hardware CYGPKG_IO_SERIAL_POWERPC_QUICC_SMC v2_0 ;
+ package -hardware CYGPKG_DEVS_ETH_POWERPC_QUICC v2_0 ;
+ package -hardware CYGPKG_DEVS_FLASH_MBX v2_0 ;
+ package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX v2_0 ;
+ package -template CYGPKG_HAL v2_0 ;
+ package -template CYGPKG_INFRA v2_0 ;
+ package -template CYGPKG_REDBOOT v2_0 ;
+ package -template CYGPKG_ISOINFRA v2_0 ;
+ package -template CYGPKG_LIBC_STRING v2_0 ;
+ package -template CYGPKG_NS_DNS v2_0 ;
+ package CYGPKG_COMPRESS_ZLIB v2_0 ;
+ package CYGPKG_IO_FLASH v2_0 ;
+ package CYGPKG_IO_ETH_DRIVERS v2_0 ;
+};
+
+cdl_option CYGFUN_LIBC_STRING_BSD_FUNCS {
+ inferred_value 0
+};
+
+cdl_option CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE {
+ user_value 4096
+};
+
+cdl_option CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT {
+ user_value 0
+};
+
+cdl_option CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM {
+ inferred_value 0
+};
+
+cdl_option CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS {
+ inferred_value 1
+};
+
+cdl_option CYGSEM_HAL_ROM_MONITOR {
+ inferred_value 1
+};
+
+cdl_component CYG_HAL_STARTUP {
+ user_value ROM
+};
+
+cdl_component CYGBLD_BUILD_REDBOOT {
+ user_value 1
+};
+
+cdl_option CYGBLD_REDBOOT_MIN_IMAGE_SIZE {
+ user_value 0x00030000
+};
+
+cdl_option CYGBLD_ISO_STRTOK_R_HEADER {
+ inferred_value 1
+};
+
+cdl_option CYGBLD_ISO_STRING_LOCALE_FUNCS_HEADER {
+ inferred_value 1
+};
+
+cdl_option CYGBLD_ISO_STRING_BSD_FUNCS_HEADER {
+ inferred_value 1
+};
+
+cdl_option CYGBLD_ISO_STRING_MEMFUNCS_HEADER {
+ inferred_value 1
+};
+
+cdl_option CYGBLD_ISO_STRING_STRFUNCS_HEADER {
+ inferred_value 1
+};
+
+cdl_option CYGBLD_ISO_DNS_HEADER {
+ inferred_value 1
+};
+
+cdl_option CYGPKG_NS_DNS_BUILD {
+ inferred_value 0
+};
+
+cdl_option CYGHWR_DEVS_FLASH_AMD_AM29F040B {
+ inferred_value 1
+};
+
+