OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /or1k/tags/nog_patch_70/or1ksim/mmu
    from Rev 1466 to Rev 1765
    ↔ Reverse comparison
  •

Rev 1466 → Rev 1765

/immu.c
0,0 → 1,327
/* immu.c -- Instruction MMU simulation
Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
/* IMMU model (not functional yet, currently just copy of data cache). */
 
#include "config.h"
 
#ifdef HAVE_INTTYPES_H
#include <inttypes.h>
#endif
 
#include "port.h"
#include "arch.h"
#include "immu.h"
#include "abstract.h"
#include "opcode/or32.h"
#include "spr_defs.h"
#include "execute.h"
#include "stats.h"
#include "sprs.h"
#include "except.h"
#include "sim-config.h"
#include "debug.h"
 
DEFAULT_DEBUG_CHANNEL(immu);
 
extern int cont_run;
 
/* Insn MMU */
 
static inline oraddr_t immu_simulate_tlb(oraddr_t virtaddr)
{
int set, way = -1;
int i;
oraddr_t tagaddr;
oraddr_t vpn, ppn;
 
if (!(mfspr(SPR_SR) & SPR_SR_IME) || !(testsprbits(SPR_UPR, SPR_UPR_IMP))) {
insn_ci = (virtaddr >= 0x80000000);
return virtaddr;
}
 
TRACE("IMMU enabled, checking mmu ways\n");
 
/* Which set to check out? */
set = (virtaddr / config.immu.pagesize) % config.immu.nsets;
tagaddr = (virtaddr / config.immu.pagesize) / config.immu.nsets;
vpn = virtaddr / (config.immu.pagesize * config.immu.nsets);
 
/* Scan all ways and try to find a matching way. */
for (i = 0; i < config.immu.nways; i++)
if (((mfspr(SPR_ITLBMR_BASE(i) + set) / (config.immu.pagesize * config.immu.nsets)) == vpn) &&
testsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_V))
way = i;
/* Did we find our tlb entry? */
if (way >= 0) { /* Yes, we did. */
immu_stats.fetch_tlbhit++;
TRACE("ITLB hit (virtaddr=%"PRIxADDR").\n", virtaddr);
/* Set LRUs */
for (i = 0; i < config.immu.nways; i++)
if (testsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_LRU))
setsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_LRU, getsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_LRU) - 1);
setsprbits(SPR_ITLBMR_BASE(way) + set, SPR_ITLBMR_LRU, config.immu.nsets - 1);
/* Check if page is cache inhibited */
insn_ci = (mfspr(SPR_ITLBTR_BASE(way) + set) & SPR_ITLBTR_CI) == SPR_ITLBTR_CI;
 
runtime.sim.mem_cycles += config.immu.hitdelay;
 
/* Test for page fault */
if (mfspr (SPR_SR) & SPR_SR_SM) {
if (!(mfspr (SPR_ITLBTR_BASE(way) + set) & SPR_ITLBTR_SXE))
except_handle(EXCEPT_IPF, virtaddr);
} else {
if (!(mfspr (SPR_ITLBTR_BASE(way) + set) & SPR_ITLBTR_UXE))
except_handle(EXCEPT_IPF, virtaddr);
}
 
ppn = mfspr(SPR_ITLBTR_BASE(way) + set) / config.immu.pagesize;
return (ppn * config.immu.pagesize) + (virtaddr % config.immu.pagesize);
}
else { /* No, we didn't. */
immu_stats.fetch_tlbmiss++;
#if 0
for (i = 0; i < config.immu.nways; i++)
if (getsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_LRU) < minlru)
minway = i;
setsprbits(SPR_ITLBMR_BASE(minway) + set, SPR_ITLBMR_VPN, vpn);
for (i = 0; i < config.immu.nways; i++)
if (testsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_LRU))
setsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_LRU, getsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_LRU) - 1);
setsprbits(SPR_ITLBMR_BASE(minway) + set, SPR_ITLBMR_LRU, config.immu.ustates - 1);
setsprbits(SPR_ITLBTR_BASE(minway) + set, SPR_ITLBTR_PPN, vpn); /* 1 to 1 */
setsprbits(SPR_ITLBMR_BASE(minway) + set, SPR_ITLBMR_V, 1);
#endif
 
/* if tlb refill implemented in HW */
/* return getsprbits(SPR_ITLBTR_BASE(minway) + set, SPR_ITLBTR_PPN) * config.immu.pagesize + (virtaddr % config.immu.pagesize); */
runtime.sim.mem_cycles += config.immu.missdelay;
 
except_handle(EXCEPT_ITLBMISS, virtaddr);
return 0;
}
}
 
/* DESC: try to find EA -> PA transaltion without changing
* any of precessor states. if this is not passible gives up
* (without triggering exceptions).
*
* PRMS: virtaddr - EA for which to find translation
*
* RTRN: 0 - no IMMU, IMMU disabled or ITLB miss
* else - appropriate PA (note it IMMU is not present
* PA === EA)
*/
oraddr_t peek_into_itlb(oraddr_t virtaddr)
{
int set, way = -1;
int i;
oraddr_t tagaddr;
oraddr_t vpn, ppn;
 
if (!(mfspr(SPR_SR) & SPR_SR_IME) || !(testsprbits(SPR_UPR, SPR_UPR_IMP))) {
return(virtaddr);
}
 
/* Which set to check out? */
set = (virtaddr / config.immu.pagesize) % config.immu.nsets;
tagaddr = (virtaddr / config.immu.pagesize) / config.immu.nsets;
vpn = virtaddr / (config.immu.pagesize * config.immu.nsets);
 
/* Scan all ways and try to find a matching way. */
for (i = 0; i < config.immu.nways; i++)
if (((mfspr(SPR_ITLBMR_BASE(i) + set) / (config.immu.pagesize * config.immu.nsets)) == vpn) &&
testsprbits(SPR_ITLBMR_BASE(i) + set, SPR_ITLBMR_V))
way = i;
/* Did we find our tlb entry? */
if (way >= 0) { /* Yes, we did. */
/* Test for page fault */
if (mfspr (SPR_SR) & SPR_SR_SM) {
if (!(mfspr (SPR_ITLBTR_BASE(way) + set) & SPR_ITLBTR_SXE)) {
/* no luck, giving up */
return(0);
}
} else {
if (!(mfspr (SPR_ITLBTR_BASE(way) + set) & SPR_ITLBTR_UXE)) {
/* no luck, giving up */
return(0);
}
}
 
ppn = mfspr(SPR_ITLBTR_BASE(way) + set) / config.immu.pagesize;
return (ppn * config.immu.pagesize) + (virtaddr % config.immu.pagesize);
}
else {
return(0);
}
ERR("should never have happened\n");
return(0);
}
 
 
oraddr_t immu_translate(oraddr_t virtaddr)
{
oraddr_t phyaddr = immu_simulate_tlb(virtaddr);
/* PRINTF("IMMU translate(%x) = %x\n", virtaddr, phyaddr);*/
return phyaddr;
}
 
void itlb_info()
{
if (!testsprbits(SPR_UPR, SPR_UPR_IMP)) {
PRINTF("IMMU not implemented. Set UPR[IMP].\n");
return;
}
 
PRINTF("Insn MMU %dKB: ", config.immu.nsets * config.immu.entrysize * config.immu.nways / 1024);
PRINTF("%d ways, %d sets, entry size %d bytes\n", config.immu.nways, config.immu.nsets, config.immu.entrysize);
}
 
/* First check if virtual address is covered by ITLB and if it is:
- increment ITLB read hit stats,
- set 'lru' at this way to config.immu.ustates - 1 and
decrement 'lru' of other ways unless they have reached 0,
- check page access attributes and invoke IMMU page fault exception
handler if necessary
and if not:
- increment ITLB read miss stats
- find lru way and entry and invoke ITLB miss exception handler
- set 'lru' with config.immu.ustates - 1 and decrement 'lru' of other
ways unless they have reached 0
*/
 
void itlb_status(int start_set)
{
int set;
int way;
int end_set = config.immu.nsets;
 
if (!testsprbits(SPR_UPR, SPR_UPR_IMP)) {
PRINTF("IMMU not implemented. Set UPR[IMP].\n");
return;
}
 
if ((start_set >= 0) && (start_set < end_set))
end_set = start_set + 1;
else
start_set = 0;
 
if (start_set < end_set) PRINTF("\nIMMU: ");
/* Scan set(s) and way(s). */
for (set = start_set; set < end_set; set++) {
PRINTF("\nSet %x: ", set);
for (way = 0; way < config.immu.nways; way++) {
PRINTF(" way %d: ", way);
PRINTF("vpn=%lx ", getsprbits(SPR_ITLBMR_BASE(way) + set, SPR_ITLBMR_VPN));
PRINTF("lru=%lx ", getsprbits(SPR_ITLBMR_BASE(way) + set, SPR_ITLBMR_LRU));
PRINTF("pl1=%lx ", getsprbits(SPR_ITLBMR_BASE(way) + set, SPR_ITLBMR_PL1));
PRINTF("v=%lx ", getsprbits(SPR_ITLBMR_BASE(way) + set, SPR_ITLBMR_V));
PRINTF("a=%lx ", getsprbits(SPR_ITLBTR_BASE(way) + set, SPR_ITLBTR_A));
PRINTF("d=%lx ", getsprbits(SPR_ITLBTR_BASE(way) + set, SPR_ITLBTR_D));
PRINTF("uxe=%lx ", getsprbits(SPR_ITLBTR_BASE(way) + set, SPR_ITLBTR_UXE));
PRINTF("sxe=%lx ", getsprbits(SPR_ITLBTR_BASE(way) + set, SPR_ITLBTR_SXE));
PRINTF("ppn=%lx ", getsprbits(SPR_ITLBTR_BASE(way) + set, SPR_ITLBTR_PPN));
}
}
if (start_set < end_set) PRINTF("\n");
}
 
/*---------------------------------------------------[ IMMU configuration ]---*/
void immu_enabled(union param_val val, void *dat)
{
setsprbits (SPR_UPR, SPR_UPR_IMP, val.int_val ? 1 : 0);
config.immu.enabled = val.int_val;
}
 
void immu_nsets(union param_val val, void *dat)
{
if (is_power2(val.int_val) && val.int_val <= 256) {
config.immu.nsets = val.int_val;
setsprbits (SPR_IMMUCFGR, SPR_IMMUCFGR_NTS, log2(val.int_val));
}
else
CONFIG_ERROR("value of power of two and lower or equal than 256 expected.");
}
 
void immu_nways(union param_val val, void *dat)
{
if (val.int_val >= 1 && val.int_val <= 4) {
config.immu.nways = val.int_val;
setsprbits (SPR_DMMUCFGR, SPR_DMMUCFGR_NTW, val.int_val-1);
}
else
CONFIG_ERROR("value 1, 2, 3 or 4 expected.");
}
 
void immu_pagesize(union param_val val, void *dat)
{
if (is_power2(val.int_val))
config.immu.pagesize = val.int_val;
else
CONFIG_ERROR("value of power of two expected.");
}
 
void immu_entrysize(union param_val val, void *dat)
{
if (is_power2(val.int_val))
config.immu.entrysize = val.int_val;
else
CONFIG_ERROR("value of power of two expected.");
}
 
void immu_ustates(union param_val val, void *dat)
{
if (val.int_val >= 2 && val.int_val <= 4)
config.immu.ustates = val.int_val;
else
CONFIG_ERROR("invalid USTATE.");
}
 
void immu_missdelay(union param_val val, void *dat)
{
config.immu.missdelay = val.int_val;
}
 
void immu_hitdelay(union param_val val, void *dat)
{
config.immu.hitdelay = val.int_val;
}
 
void reg_immu_sec(void)
{
struct config_section *sec = reg_config_sec("immu", NULL, NULL);
 
reg_config_param(sec, "enabled", paramt_int, immu_enabled);
reg_config_param(sec, "nsets", paramt_int, immu_nsets);
reg_config_param(sec, "nways", paramt_int, immu_nways);
reg_config_param(sec, "pagesize", paramt_int, immu_pagesize);
reg_config_param(sec, "entrysize", paramt_int, immu_entrysize);
reg_config_param(sec, "ustates", paramt_int, immu_ustates);
reg_config_param(sec, "missdelay", paramt_int, immu_missdelay);
reg_config_param(sec, "hitdelay", paramt_int, immu_hitdelay);
}
/dmmu.c
0,0 → 1,350
/* dmmu.c -- Data MMU simulation
Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
/* DMMU model (not functional yet, currently just copy of data cache). */
 
#include "config.h"
 
#ifdef HAVE_INTTYPES_H
#include <inttypes.h>
#endif
 
#include "port.h"
#include "arch.h"
#include "dmmu.h"
#include "abstract.h"
#include "opcode/or32.h"
#include "spr_defs.h"
#include "execute.h"
#include "stats.h"
#include "sprs.h"
#include "except.h"
#include "sim-config.h"
#include "debug.h"
 
DEFAULT_DEBUG_CHANNEL(dmmu);
 
extern int cont_run;
 
/* Data MMU */
 
inline oraddr_t dmmu_simulate_tlb(oraddr_t virtaddr, int write_access)
{
int set, way = -1;
int i;
oraddr_t tagaddr;
oraddr_t vpn, ppn;
 
if (!(mfspr(SPR_SR) & SPR_SR_DME) || !testsprbits(SPR_UPR, SPR_UPR_DMP)) {
data_ci = (virtaddr >= 0x80000000);
return virtaddr;
}
 
/* Which set to check out? */
set = (virtaddr / config.dmmu.pagesize) % config.dmmu.nsets;
tagaddr = (virtaddr / config.dmmu.pagesize) / config.dmmu.nsets;
vpn = virtaddr / (config.dmmu.pagesize * config.dmmu.nsets);
/* Scan all ways and try to find a matching way. */
for (i = 0; i < config.dmmu.nways; i++)
if (((mfspr(SPR_DTLBMR_BASE(i) + set) / (config.dmmu.pagesize * config.dmmu.nsets)) == vpn) &&
testsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_V))
way = i;
 
/* Did we find our tlb entry? */
if (way >= 0) { /* Yes, we did. */
dmmu_stats.loads_tlbhit++;
TRACE("DTLB hit (virtaddr=%"PRIxADDR") at %lli.\n", virtaddr,
runtime.sim.cycles);
/* Set LRUs */
for (i = 0; i < config.dmmu.nways; i++)
if (testsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_LRU))
setsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_LRU, getsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_LRU) - 1);
setsprbits(SPR_DTLBMR_BASE(way) + set, SPR_DTLBMR_LRU, config.dmmu.nsets - 1);
 
/* Check if page is cache inhibited */
data_ci = (mfspr(SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_CI) == SPR_DTLBTR_CI;
 
runtime.sim.mem_cycles += config.dmmu.hitdelay;
ppn = mfspr(SPR_DTLBTR_BASE(way) + set) / config.dmmu.pagesize;
 
/* Test for page fault */
if (mfspr (SPR_SR) & SPR_SR_SM) {
if ( write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_SWE)
|| !write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_SRE))
except_handle(EXCEPT_DPF, virtaddr);
} else {
if ( write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_UWE)
|| !write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_URE))
except_handle(EXCEPT_DPF, virtaddr);
}
 
return (ppn * config.dmmu.pagesize) + (virtaddr % config.dmmu.pagesize);
}
else { /* No, we didn't. */
dmmu_stats.loads_tlbmiss++;
#if 0
for (i = 0; i < config.dmmu.nways; i++)
if (getsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_LRU) < minlru)
minway = i;
setsprbits(SPR_DTLBMR_BASE(minway) + set, SPR_DTLBMR_VPN, vpn);
for (i = 0; i < config.dmmu.nways; i++)
if (getsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_LRU))
setsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_LRU, getsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_LRU) - 1);
setsprbits(SPR_DTLBMR_BASE(minway) + set, SPR_DTLBMR_LRU, config.dmmu.ustates - 1);
setsprbits(SPR_DTLBTR_BASE(minway) + set, SPR_DTLBTR_PPN, vpn); /* 1 to 1 */
setsprbits(SPR_DTLBMR_BASE(minway) + set, SPR_DTLBMR_V, 1);
#endif
TRACE("DTLB miss (virtaddr=%"PRIxADDR") at %lli.\n", virtaddr,
runtime.sim.cycles);
runtime.sim.mem_cycles += config.dmmu.missdelay;
/* if tlb refill implemented in HW */
/* return getsprbits(SPR_DTLBTR_BASE(minway) + set, SPR_DTLBTR_PPN) * config.dmmu.pagesize + (virtaddr % config.dmmu.pagesize); */
except_handle(EXCEPT_DTLBMISS, virtaddr);
return 0;
}
}
 
/* DESC: try to find EA -> PA transaltion without changing
* any of precessor states. if this is not passible gives up
* (without triggering exceptions)
*
* PRMS: virtaddr - EA for which to find translation
*
* write_access - 0 ignore testing for write access
* 1 test for write access, if fails
* do not return translation
*
* through_dc - 1 go through data cache
* 0 ignore data cache
*
* RTRN: 0 - no DMMU, DMMU disabled or ITLB miss
* else - appropriate PA (note it DMMU is not present
* PA === EA)
*/
oraddr_t peek_into_dtlb(oraddr_t virtaddr, int write_access, int through_dc)
{
int set, way = -1;
int i;
oraddr_t tagaddr;
oraddr_t vpn, ppn;
 
if (!(mfspr(SPR_SR) & SPR_SR_DME) || !testsprbits(SPR_UPR, SPR_UPR_DMP)) {
if (through_dc)
data_ci = (virtaddr >= 0x80000000);
return virtaddr;
}
 
/* Which set to check out? */
set = (virtaddr / config.dmmu.pagesize) % config.dmmu.nsets;
tagaddr = (virtaddr / config.dmmu.pagesize) / config.dmmu.nsets;
vpn = virtaddr / (config.dmmu.pagesize * config.dmmu.nsets);
/* Scan all ways and try to find a matching way. */
for (i = 0; i < config.dmmu.nways; i++)
if (((mfspr(SPR_DTLBMR_BASE(i) + set) / (config.dmmu.pagesize * config.dmmu.nsets)) == vpn) &&
testsprbits(SPR_DTLBMR_BASE(i) + set, SPR_DTLBMR_V))
way = i;
 
/* Did we find our tlb entry? */
if (way >= 0) { /* Yes, we did. */
dmmu_stats.loads_tlbhit++;
TRACE("DTLB hit (virtaddr=%"PRIxADDR") at %lli.\n", virtaddr,
runtime.sim.cycles);
/* Test for page fault */
if (mfspr (SPR_SR) & SPR_SR_SM) {
if ( write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_SWE)
|| !write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_SRE))
/* otherwise exception DPF would be raised */
return(0);
} else {
if ( write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_UWE)
|| !write_access && !(mfspr (SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_URE))
/* otherwise exception DPF would be raised */
return(0);
}
 
if (through_dc) {
/* Check if page is cache inhibited */
data_ci = (mfspr(SPR_DTLBTR_BASE(way) + set) & SPR_DTLBTR_CI) == SPR_DTLBTR_CI;
}
 
ppn = mfspr(SPR_DTLBTR_BASE(way) + set) / config.dmmu.pagesize;
return (ppn * config.dmmu.pagesize) + (virtaddr % config.dmmu.pagesize);
}
else { /* No, we didn't. */
return(0);
}
ERR("ERR, should never have happened\n");
return(0);
}
 
 
oraddr_t dmmu_translate(oraddr_t virtaddr, int write_access)
{
oraddr_t phyaddr = dmmu_simulate_tlb(virtaddr, write_access);
/* PRINTF("DMMU translate(%"PRIxADDR") = %"PRIxADDR"\n", virtaddr, phyaddr);*/
return phyaddr;
}
 
 
void dtlb_info()
{
if (!testsprbits(SPR_UPR, SPR_UPR_DMP)) {
PRINTF("DMMU not implemented. Set UPR[DMP].\n");
return;
}
PRINTF("Data MMU %dKB: ", config.dmmu.nsets * config.dmmu.entrysize * config.dmmu.nways / 1024);
PRINTF("%d ways, %d sets, entry size %d bytes\n", config.dmmu.nways, config.dmmu.nsets, config.dmmu.entrysize);
}
 
/* First check if virtual address is covered by DTLB and if it is:
- increment DTLB read hit stats,
- set 'lru' at this way to config.dmmu.ustates - 1 and
decrement 'lru' of other ways unless they have reached 0,
- check page access attributes and invoke DMMU page fault exception
handler if necessary
and if not:
- increment DTLB read miss stats
- find lru way and entry and invoke DTLB miss exception handler
- set 'lru' with config.dmmu.ustates - 1 and decrement 'lru' of other
ways unless they have reached 0
*/
 
void dtlb_status(int start_set)
{
int set;
int way;
int end_set = config.dmmu.nsets;
 
if (!testsprbits(SPR_UPR, SPR_UPR_DMP)) {
PRINTF("DMMU not implemented. Set UPR[DMP].\n");
return;
}
 
if ((start_set >= 0) && (start_set < end_set))
end_set = start_set + 1;
else
start_set = 0;
 
if (start_set < end_set) PRINTF("\nDMMU: ");
/* Scan set(s) and way(s). */
for (set = start_set; set < end_set; set++) {
PRINTF("\nSet %x: ", set);
for (way = 0; way < config.dmmu.nways; way++) {
PRINTF(" way %d: ", way);
PRINTF("vpn=%lx ", getsprbits(SPR_DTLBMR_BASE(way) + set, SPR_DTLBMR_VPN));
PRINTF("lru=%lx ", getsprbits(SPR_DTLBMR_BASE(way) + set, SPR_DTLBMR_LRU));
PRINTF("pl1=%lx ", getsprbits(SPR_DTLBMR_BASE(way) + set, SPR_DTLBMR_PL1));
PRINTF("v=%lx ", getsprbits(SPR_DTLBMR_BASE(way) + set, SPR_DTLBMR_V));
PRINTF("a=%lx ", getsprbits(SPR_DTLBTR_BASE(way) + set, SPR_DTLBTR_A));
PRINTF("d=%lx ", getsprbits(SPR_DTLBTR_BASE(way) + set, SPR_DTLBTR_D));
PRINTF("ure=%lx ", getsprbits(SPR_DTLBTR_BASE(way) + set, SPR_DTLBTR_URE));
PRINTF("uwe=%lx ", getsprbits(SPR_DTLBTR_BASE(way) + set, SPR_DTLBTR_UWE));
PRINTF("sre=%lx ", getsprbits(SPR_DTLBTR_BASE(way) + set, SPR_DTLBTR_SRE));
PRINTF("swe=%lx ", getsprbits(SPR_DTLBTR_BASE(way) + set, SPR_DTLBTR_SWE));
PRINTF("ppn=%lx ", getsprbits(SPR_DTLBTR_BASE(way) + set, SPR_DTLBTR_PPN));
}
}
if (start_set < end_set) PRINTF("\n");
}
 
/*---------------------------------------------------[ DMMU configuration ]---*/
void dmmu_enabled(union param_val val, void *dat)
{
setsprbits (SPR_UPR, SPR_UPR_DMP, val.int_val ? 1 : 0);
config.dmmu.enabled = val.int_val;
}
 
void dmmu_nsets(union param_val val, void *dat)
{
if (is_power2(val.int_val) && val.int_val <= 256) {
config.dmmu.nsets = val.int_val;
setsprbits (SPR_DMMUCFGR, SPR_DMMUCFGR_NTS, log2(val.int_val));
}
else
CONFIG_ERROR("value of power of two and lower or equal than 256 expected.");
}
 
void dmmu_nways(union param_val val, void *dat)
{
if (val.int_val >= 1 && val.int_val <= 4) {
config.dmmu.nways = val.int_val;
setsprbits (SPR_DMMUCFGR, SPR_DMMUCFGR_NTW, val.int_val-1);
}
else
CONFIG_ERROR("value 1, 2, 3 or 4 expected.");
}
 
void dmmu_pagesize(union param_val val, void *dat)
{
if (is_power2(val.int_val))
config.dmmu.pagesize = val.int_val;
else
CONFIG_ERROR("value of power of two expected.");
}
 
void dmmu_entrysize(union param_val val, void *dat)
{
if (is_power2(val.int_val))
config.dmmu.entrysize = val.int_val;
else
CONFIG_ERROR("value of power of two expected.");
}
 
void dmmu_ustates(union param_val val, void *dat)
{
if (val.int_val >= 2 && val.int_val <= 4)
config.dmmu.ustates = val.int_val;
else
CONFIG_ERROR("invalid USTATE.");
}
 
void dmmu_missdelay(union param_val val, void *dat)
{
config.dmmu.missdelay = val.int_val;
}
 
void dmmu_hitdelay(union param_val val, void *dat)
{
config.immu.hitdelay = val.int_val;
}
 
void reg_dmmu_sec(void)
{
struct config_section *sec = reg_config_sec("dmmu", NULL, NULL);
 
reg_config_param(sec, "enabled", paramt_int, dmmu_enabled);
reg_config_param(sec, "nsets", paramt_int, dmmu_nsets);
reg_config_param(sec, "nways", paramt_int, dmmu_nways);
reg_config_param(sec, "pagesize", paramt_int, dmmu_pagesize);
reg_config_param(sec, "entrysize", paramt_int, dmmu_entrysize);
reg_config_param(sec, "ustates", paramt_int, dmmu_ustates);
reg_config_param(sec, "missdelay", paramt_int, dmmu_missdelay);
reg_config_param(sec, "hitdelay", paramt_int, dmmu_hitdelay);
}
/Makefile.in
0,0 → 1,332
# Makefile.in generated by automake 1.6.3 from Makefile.am.
# @configure_input@
 
# Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
# Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
 
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
# PARTICULAR PURPOSE.
 
@SET_MAKE@
 
# Makefile -- Makefile for cpu architecture independent simulation
# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
#
# This file is part of OpenRISC 1000 Architectural Simulator.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
#
SHELL = @SHELL@
 
srcdir = @srcdir@
top_srcdir = @top_srcdir@
VPATH = @srcdir@
prefix = @prefix@
exec_prefix = @exec_prefix@
 
bindir = @bindir@
sbindir = @sbindir@
libexecdir = @libexecdir@
datadir = @datadir@
sysconfdir = @sysconfdir@
sharedstatedir = @sharedstatedir@
localstatedir = @localstatedir@
libdir = @libdir@
infodir = @infodir@
mandir = @mandir@
includedir = @includedir@
oldincludedir = /usr/include
pkgdatadir = $(datadir)/@PACKAGE@
pkglibdir = $(libdir)/@PACKAGE@
pkgincludedir = $(includedir)/@PACKAGE@
top_builddir = ..
 
ACLOCAL = @ACLOCAL@
AUTOCONF = @AUTOCONF@
AUTOMAKE = @AUTOMAKE@
AUTOHEADER = @AUTOHEADER@
 
am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
install_sh_DATA = $(install_sh) -c -m 644
install_sh_PROGRAM = $(install_sh) -c
install_sh_SCRIPT = $(install_sh) -c
INSTALL_SCRIPT = @INSTALL_SCRIPT@
INSTALL_HEADER = $(INSTALL_DATA)
transform = @program_transform_name@
NORMAL_INSTALL = :
PRE_INSTALL = :
POST_INSTALL = :
NORMAL_UNINSTALL = :
PRE_UNINSTALL = :
POST_UNINSTALL = :
build_alias = @build_alias@
build_triplet = @build@
host_alias = @host_alias@
host_triplet = @host@
target_alias = @target_alias@
target_triplet = @target@
 
EXEEXT = @EXEEXT@
OBJEXT = @OBJEXT@
PATH_SEPARATOR = @PATH_SEPARATOR@
AMTAR = @AMTAR@
AR = @AR@
ARFLAGS = @ARFLAGS@
AWK = @AWK@
BUILD_DIR = @BUILD_DIR@
CC = @CC@
CFLAGS = @CFLAGS@
CPU_ARCH = @CPU_ARCH@
DEPDIR = @DEPDIR@
INCLUDES = @INCLUDES@
INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
LOCAL_CFLAGS = @LOCAL_CFLAGS@
LOCAL_DEFS = @LOCAL_DEFS@
MAKE_SHELL = @MAKE_SHELL@
PACKAGE = @PACKAGE@
RANLIB = @RANLIB@
STRIP = @STRIP@
SUMVERSION = @SUMVERSION@
TERMCAP_LIB = @TERMCAP_LIB@
VERSION = @VERSION@
am__include = @am__include@
am__quote = @am__quote@
host = @host@
host_cpu = @host_cpu@
host_os = @host_os@
install_sh = @install_sh@
 
noinst_LIBRARIES = libmmu.a
libmmu_a_SOURCES = dmmu.c immu.c
subdir = mmu
mkinstalldirs = $(SHELL) $(top_srcdir)/mkinstalldirs
CONFIG_HEADER = $(top_builddir)/config.h
CONFIG_CLEAN_FILES =
LIBRARIES = $(noinst_LIBRARIES)
 
libmmu_a_AR = $(AR) cru
libmmu_a_LIBADD =
am_libmmu_a_OBJECTS = dmmu.$(OBJEXT) immu.$(OBJEXT)
libmmu_a_OBJECTS = $(am_libmmu_a_OBJECTS)
 
DEFS = @DEFS@
DEFAULT_INCLUDES = -I. -I$(srcdir) -I$(top_builddir)
CPPFLAGS = @CPPFLAGS@
LDFLAGS = @LDFLAGS@
LIBS = @LIBS@
depcomp = $(SHELL) $(top_srcdir)/depcomp
am__depfiles_maybe = depfiles
@AMDEP_TRUE@DEP_FILES = ./$(DEPDIR)/dmmu.Po ./$(DEPDIR)/immu.Po
COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
$(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
CCLD = $(CC)
LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
DIST_SOURCES = $(libmmu_a_SOURCES)
DIST_COMMON = Makefile.am Makefile.in
SOURCES = $(libmmu_a_SOURCES)
 
all: all-am
 
.SUFFIXES:
.SUFFIXES: .c .o .obj
$(srcdir)/Makefile.in: Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4)
cd $(top_srcdir) && \
$(AUTOMAKE) --gnu mmu/Makefile
Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)
 
clean-noinstLIBRARIES:
-test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
libmmu.a: $(libmmu_a_OBJECTS) $(libmmu_a_DEPENDENCIES)
-rm -f libmmu.a
$(libmmu_a_AR) libmmu.a $(libmmu_a_OBJECTS) $(libmmu_a_LIBADD)
$(RANLIB) libmmu.a
 
mostlyclean-compile:
-rm -f *.$(OBJEXT) core *.core
 
distclean-compile:
-rm -f *.tab.c
 
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dmmu.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/immu.Po@am__quote@
 
distclean-depend:
-rm -rf ./$(DEPDIR)
 
.c.o:
@AMDEP_TRUE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@ depfile='$(DEPDIR)/$*.Po' tmpdepfile='$(DEPDIR)/$*.TPo' @AMDEPBACKSLASH@
@AMDEP_TRUE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
$(COMPILE) -c `test -f '$<' || echo '$(srcdir)/'`$<
 
.c.obj:
@AMDEP_TRUE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@ depfile='$(DEPDIR)/$*.Po' tmpdepfile='$(DEPDIR)/$*.TPo' @AMDEPBACKSLASH@
@AMDEP_TRUE@ $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
$(COMPILE) -c `cygpath -w $<`
CCDEPMODE = @CCDEPMODE@
uninstall-info-am:
 
ETAGS = etags
ETAGSFLAGS =
 
tags: TAGS
 
ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
unique=`for i in $$list; do \
if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
done | \
$(AWK) ' { files[$$0] = 1; } \
END { for (i in files) print i; }'`; \
mkid -fID $$unique
 
TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
$(TAGS_FILES) $(LISP)
tags=; \
here=`pwd`; \
list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
unique=`for i in $$list; do \
if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
done | \
$(AWK) ' { files[$$0] = 1; } \
END { for (i in files) print i; }'`; \
test -z "$(ETAGS_ARGS)$$tags$$unique" \
|| $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
$$tags $$unique
 
GTAGS:
here=`$(am__cd) $(top_builddir) && pwd` \
&& cd $(top_srcdir) \
&& gtags -i $(GTAGS_ARGS) $$here
 
distclean-tags:
-rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH
DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
 
top_distdir = ..
distdir = $(top_distdir)/$(PACKAGE)-$(VERSION)
 
distdir: $(DISTFILES)
@list='$(DISTFILES)'; for file in $$list; do \
if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
dir=`echo "$$file" | sed -e 's,/[^/]*$$,,'`; \
if test "$$dir" != "$$file" && test "$$dir" != "."; then \
dir="/$$dir"; \
$(mkinstalldirs) "$(distdir)$$dir"; \
else \
dir=''; \
fi; \
if test -d $$d/$$file; then \
if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
fi; \
cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
else \
test -f $(distdir)/$$file \
|| cp -p $$d/$$file $(distdir)/$$file \
|| exit 1; \
fi; \
done
check-am: all-am
check: check-am
all-am: Makefile $(LIBRARIES)
 
installdirs:
 
install: install-am
install-exec: install-exec-am
install-data: install-data-am
uninstall: uninstall-am
 
install-am: all-am
@$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
 
installcheck: installcheck-am
install-strip:
$(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
INSTALL_STRIP_FLAG=-s \
`test -z '$(STRIP)' || \
echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
mostlyclean-generic:
 
clean-generic:
 
distclean-generic:
-rm -f Makefile $(CONFIG_CLEAN_FILES)
 
maintainer-clean-generic:
@echo "This command is intended for maintainers to use"
@echo "it deletes files that may require special tools to rebuild."
clean: clean-am
 
clean-am: clean-generic clean-noinstLIBRARIES mostlyclean-am
 
distclean: distclean-am
 
distclean-am: clean-am distclean-compile distclean-depend \
distclean-generic distclean-tags
 
dvi: dvi-am
 
dvi-am:
 
info: info-am
 
info-am:
 
install-data-am:
 
install-exec-am:
 
install-info: install-info-am
 
install-man:
 
installcheck-am:
 
maintainer-clean: maintainer-clean-am
 
maintainer-clean-am: distclean-am maintainer-clean-generic
 
mostlyclean: mostlyclean-am
 
mostlyclean-am: mostlyclean-compile mostlyclean-generic
 
uninstall-am: uninstall-info-am
 
.PHONY: GTAGS all all-am check check-am clean clean-generic \
clean-noinstLIBRARIES distclean distclean-compile \
distclean-depend distclean-generic distclean-tags distdir dvi \
dvi-am info info-am install install-am install-data \
install-data-am install-exec install-exec-am install-info \
install-info-am install-man install-strip installcheck \
installcheck-am installdirs maintainer-clean \
maintainer-clean-generic mostlyclean mostlyclean-compile \
mostlyclean-generic tags uninstall uninstall-am \
uninstall-info-am
 
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:
/dmmu.h
0,0 → 1,23
/* dmmu.h -- Data MMU header file
Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
This file is part of OpenRISC 1000 Architectural Simulator.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
oraddr_t dmmu_translate(oraddr_t virtaddr, int write_access);
oraddr_t dmmu_simulate_tlb(oraddr_t virtaddr, int write_access);
oraddr_t peek_into_dtlb(oraddr_t virtaddr, int write_access, int through_dc);
void dtlb_status(int start_set);
/immu.h
0,0 → 1,23
/* immu.h -- Instruction MMU header file
Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
This file is part of OpenRISC 1000 Architectural Simulator.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
oraddr_t immu_translate(oraddr_t virtaddr);
oraddr_t immu_simulate_tlb(oraddr_t virtaddr);
oraddr_t peek_into_itlb(oraddr_t virtaddr);
void itlb_status(int start_set);
/Makefile.am
0,0 → 1,23
# Makefile -- Makefile for cpu architecture independent simulation
# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
#
# This file is part of OpenRISC 1000 Architectural Simulator.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
#
 
noinst_LIBRARIES = libmmu.a
libmmu_a_SOURCES = dmmu.c immu.c
 
/.
. Property changes : Added: svn:ignore ## -0,0 +1,2 ## +Makefile +.deps

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.