URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/or1k/tags/rel-0-3-0-rc2/or1ksim/support
- from Rev 1753 to Rev 1765
- ↔ Reverse comparison
Rev 1753 → Rev 1765
/sched.c
0,0 → 1,191
/* sched.c -- Abstract entities, handling job scheduling |
|
Copyright (C) 2001 Marko Mlinar, markom@opencores.org |
Copyright (C) 2008 Embecosm Limited |
|
Contributor Jeremy Bennett <jeremy.bennett@embecosm.com> |
|
This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. |
|
This program is free software; you can redistribute it and/or modify it |
under the terms of the GNU General Public License as published by the Free |
Software Foundation; either version 3 of the License, or (at your option) |
any later version. |
|
This program is distributed in the hope that it will be useful, but WITHOUT |
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
more details. |
|
You should have received a copy of the GNU General Public License along |
with this program. If not, see <http://www.gnu.org/licenses/>. */ |
|
/* This program is commented throughout in a fashion suitable for processing |
with Doxygen. */ |
|
|
/* Autoconf and/or portability configuration */ |
#include "config.h" |
#include "port.h" |
|
/* System includes */ |
#include <stdlib.h> |
#include <stdio.h> |
#include <limits.h> |
|
/* Package includes */ |
#include "sched.h" |
#include "debug.h" |
#include "sim-config.h" |
|
|
DECLARE_DEBUG_CHANNEL(sched_jobs); |
|
#define SCHED_HEAP_SIZE 128 |
#define SCHED_TIME_MAX INT32_MAX |
|
/* FIXME: Scheduler should continue from previous cycles not current ones */ |
|
struct scheduler_struct scheduler; |
|
/* Dummy function, representing a guard, which protects heap from |
emptying */ |
void sched_guard (void *dat) |
{ |
if(scheduler.job_queue) |
SCHED_ADD(sched_guard, dat, SCHED_TIME_MAX); |
else { |
scheduler.job_queue = scheduler.free_job_queue; |
scheduler.free_job_queue = scheduler.free_job_queue->next; |
scheduler.job_queue->next = NULL; |
scheduler.job_queue->func = sched_guard; |
scheduler.job_queue->time = SCHED_TIME_MAX; |
} |
} |
|
void sched_reset(void) |
{ |
struct sched_entry *cur, *next; |
|
for(cur = scheduler.job_queue; cur; cur = next) { |
next = cur->next; |
cur->next = scheduler.free_job_queue; |
scheduler.free_job_queue = cur; |
} |
scheduler.job_queue = NULL; |
sched_guard(NULL); |
} |
|
void sched_init(void) |
{ |
int i; |
struct sched_entry *new; |
|
scheduler.free_job_queue = NULL; |
|
for(i = 0; i < SCHED_HEAP_SIZE; i++) { |
if(!(new = malloc(sizeof(struct sched_entry)))) { |
fprintf(stderr, "Out-of-memory while allocateing scheduler queue\n"); |
exit(1); |
} |
new->next = scheduler.free_job_queue; |
scheduler.free_job_queue = new; |
} |
scheduler.job_queue = NULL; |
sched_guard(NULL); |
} |
|
/* Executes jobs in time queue */ |
void do_scheduler(void) |
{ |
struct sched_entry *tmp; |
|
/* Execute all jobs till now */ |
do { |
tmp = scheduler.job_queue; |
scheduler.job_queue = tmp->next; |
tmp->next = scheduler.free_job_queue; |
scheduler.free_job_queue = tmp; |
|
scheduler.job_queue->time += tmp->time; |
|
tmp->func (tmp->param); |
} while(scheduler.job_queue->time <= 0); |
} |
|
/* Adds new job to the queue */ |
void sched_add(void (*job_func)(void *), void *job_param, int32_t job_time, |
const char *func) |
{ |
struct sched_entry *cur, *prev, *new_job; |
int32_t alltime; |
|
cur = scheduler.job_queue; |
prev = NULL; |
alltime = cur->time; |
while(cur && (alltime < job_time)) { |
prev = cur; |
cur = cur->next; |
if(cur) |
alltime += cur->time; |
} |
|
new_job = scheduler.free_job_queue; |
scheduler.free_job_queue = new_job->next; |
new_job->next = cur; |
|
new_job->func = job_func; |
new_job->param = job_param; |
|
if(prev) { |
new_job->time = job_time - (alltime - (cur ? cur->time : 0)); |
prev->next = new_job; |
} else { |
scheduler.job_queue = new_job; |
new_job->time = job_time >= 0 ? job_time : cur->time; |
} |
|
if(cur) |
cur->time -= new_job->time; |
|
} |
|
/* Returns a job with specified function and param, NULL if not found */ |
void sched_find_remove(void (*job_func)(void *), void *dat) |
{ |
struct sched_entry *cur; |
struct sched_entry *prev = NULL; |
|
for (cur = scheduler.job_queue; cur; prev = cur, cur = cur->next) { |
if ((cur->func == job_func) && (cur->param == dat)) { |
if(cur->next) |
cur->next->time += cur->time; |
|
if(prev) |
prev->next = cur->next; |
else |
scheduler.job_queue = cur->next; |
cur->next = scheduler.free_job_queue; |
scheduler.free_job_queue = cur; |
break; |
} |
} |
} |
|
/* Schedules the next job so that it will run after the next instruction */ |
void sched_next_insn(void (*func)(void *), void *dat) |
{ |
int32_t cycles = 1; |
struct sched_entry *cur = scheduler.job_queue; |
|
/* The cycles count of the jobs may go into negatives. If this happens, func |
* will get called before the next instruction has executed. */ |
while(cur && (cur->time < 0)) { |
cycles -= cur->time; |
cur = cur->next; |
} |
|
SCHED_ADD(func, dat, cycles); |
} |
|
|
sched.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: sched.h
===================================================================
--- sched.h (nonexistent)
+++ sched.h (revision 1765)
@@ -0,0 +1,69 @@
+/* sched.h -- Abstract entities header file handling job scheduler
+
+ Copyright (C) 2001 Marko Mlinar, markom@opencores.org
+ Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
+ Copyright (C) 2008 Embecosm Limited
+
+ Contributor Jeremy Bennett
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
sched.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: simprintf.c
===================================================================
--- simprintf.c (nonexistent)
+++ simprintf.c (revision 1765)
@@ -0,0 +1,189 @@
+/* simprintf.c -- Simulator printf implementation
+
+ Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
+ Copyright (C) 2008 Embecosm Limited
+
+ Contributor Jeremy Bennett
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+
+/* Package includes */
+#include "sim-config.h"
+#include "arch.h"
+#include "debug.h"
+#include "abstract.h"
+#include "execute.h"
+
+
+/* Should args be passed on stack for simprintf
+ *
+ * FIXME: do not enable this since it causes problems
+ * in some cases (an example beeing cbasic test
+ * from orp testbench). the problems is in
+ *
+ * or1k/support/simprintf.c
+ *
+ * #if STACK_ARGS
+ * arg = eval_mem32(argaddr,&breakpoint);
+ * argaddr += 4;
+ * #else
+ * sprintf(regstr, "r%u", ++argaddr);
+ * arg = evalsim_reg(atoi(regstr));
+ * #endif
+ *
+ * the access to memory should be without any
+ * checks (ie not like or32 application accessed it)
+ *
+ */
+#define STACK_ARGS 0
+
+/* Length of PRINTF format string */
+#define FMTLEN 2000
+
+char fmtstr[FMTLEN];
+
+static char *
+simgetstr (oraddr_t stackaddr, unsigned long regparam)
+{
+ oraddr_t fmtaddr;
+ int i;
+
+ fmtaddr = regparam;
+
+ i = 0;
+ while (eval_direct8 (fmtaddr, 1, 0) != '\0')
+ {
+ fmtstr[i++] = eval_direct8 (fmtaddr, 1, 0);
+ fmtaddr++;
+ if (i == FMTLEN - 1)
+ break;
+ }
+ fmtstr[i] = '\0';
+
+ return fmtstr;
+}
+
+void
+simprintf (oraddr_t stackaddr, unsigned long regparam)
+{
+ uint32_t arg;
+ oraddr_t argaddr;
+ char *fmtstrend;
+ char *fmtstrpart = fmtstr;
+ int tee_exe_log;
+
+ simgetstr (stackaddr, regparam);
+
+#if STACK_ARGS
+ argaddr = stackaddr;
+#else
+ argaddr = 3;
+#endif
+ tee_exe_log = (config.sim.exe_log
+ && (config.sim.exe_log_type == EXE_LOG_SOFTWARE
+ || config.sim.exe_log_type == EXE_LOG_SIMPLE)
+ && config.sim.exe_log_start <= runtime.cpu.instructions
+ && (config.sim.exe_log_end <= 0
+ || runtime.cpu.instructions <= config.sim.exe_log_end));
+
+ if (tee_exe_log)
+ fprintf (runtime.sim.fexe_log, "SIMPRINTF: ");
+ while (strlen (fmtstrpart))
+ {
+ if ((fmtstrend = strstr (fmtstrpart + 1, "%")))
+ *fmtstrend = '\0';
+ if (strstr (fmtstrpart, "%"))
+ {
+ char *tmp;
+ int string = 0;
+#if STACK_ARGS
+ arg = eval_direct32 (argaddr, 1, 0);
+ argaddr += 4;
+#else
+ {
+ /* JPB. I can't see how the original code ever worked. It does trash
+ the file pointer by overwriting the end of regstr. In any case
+ why create a string, only to turn it back into an integer! */
+
+ /* orig: char regstr[5]; */
+ /* orig: */
+ /* orig: sprintf(regstr, "r%"PRIxADDR, ++argaddr); */
+ /* orig: arg = evalsim_reg(atoi(regstr)); */
+
+ arg = evalsim_reg (++argaddr);
+ }
+#endif
+ tmp = fmtstrpart;
+ if (*tmp == '%')
+ {
+ tmp++;
+ while (*tmp == '-' || (*tmp >= '0' && *tmp <= '9'))
+ tmp++;
+ if (*tmp == 's')
+ string = 1;
+ }
+ if (string)
+ {
+ int len = 0;
+ char *str;
+ for (; eval_direct8 (arg++, 1, 0); len++);
+ len++; /* for null char */
+ arg -= len;
+ str = (char *) malloc (len);
+ len = 0;
+ for (; eval_direct8 (arg, 1, 0); len++)
+ *(str + len) = eval_direct8 (arg++, 1, 0);
+ *(str + len) = eval_direct8 (arg, 1, 0); /* null ch */
+ printf (fmtstrpart, str);
+ if (tee_exe_log)
+ fprintf (runtime.sim.fexe_log, fmtstrpart, str);
+ free (str);
+ }
+ else
+ {
+ printf (fmtstrpart, arg);
+ if (tee_exe_log)
+ fprintf (runtime.sim.fexe_log, fmtstrpart, arg);
+ }
+ }
+ else
+ {
+ printf (fmtstrpart);
+ if (tee_exe_log)
+ fprintf (runtime.sim.fexe_log, fmtstrpart);
+ }
+ if (!fmtstrend)
+ break;
+ fmtstrpart = fmtstrend;
+ *fmtstrpart = '%';
+ }
+}
Index: dumpverilog.c
===================================================================
--- dumpverilog.c (nonexistent)
+++ dumpverilog.c (revision 1765)
@@ -0,0 +1,183 @@
+/* dumpverilog.c -- Dumps memory region as Verilog representation
+ or as hex code
+
+ Copyright (C) 2000 Damjan Lampret, lampret@opencores.org
+ Copyright (C) 2008 Embecosm Limited
+
+ Contributor Jeremy Bennett
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+
+/* Package includes */
+#include "profile.h"
+#include "sim-config.h"
+#include "arch.h"
+
+
+/* Adds a new entry to the memory profile file */
+void
+mprofile (oraddr_t memaddr, unsigned char type)
+{
+ struct mprofentry_struct mp;
+ mp.addr = memaddr;
+ mp.type = type;
+ if (!fwrite (&mp, sizeof (struct mprofentry_struct), 1, runtime.sim.fmprof))
+ config.sim.mprofile = 0;
+}
profile.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: simprintf.h
===================================================================
--- simprintf.h (nonexistent)
+++ simprintf.h (revision 1765)
@@ -0,0 +1,36 @@
+/* simprintf.h -- Simulator printf implementation header
+
+ Copyright (C) 2008 Embecosm Limited
+
+ Contributor Jeremy Bennett
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
profile.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: debug.c
===================================================================
--- debug.c (nonexistent)
+++ debug.c (revision 1765)
@@ -0,0 +1,177 @@
+/* debug.c -- Debug channel support code
+
+ Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
+ Copyright (C) 2008 Embecosm Limited
+
+ Contributor Jeremy Bennett
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+#include
+#include
+
+/* Package includes */
+#include "arch.h"
+#include "sim-config.h"
+
+#define __ORSIM_NO_DEC_DBCH
+#include "debug.h"
+
+#define DECLARE_DEBUG_CHANNEL(dbch) char __orsim_dbch_##dbch[] = "\0"#dbch;
+#include "dbchs.h"
+#undef DECLARE_DEBUG_CHANNEL
+
+#define DECLARE_DEBUG_CHANNEL(dbch) __orsim_dbch_##dbch,
+static char *__orsim_dbchs[] = {
+#include "dbchs.h"
+NULL };
+#undef DECLARE_DEBUG_CHANNEL
+
+static const char *debug_classes[] = { "trace", "fixme", "warn", "err" };
+
+
+void orsim_dbg_log(enum __ORSIM_DEBUG_CLASS dbcl, const char *dbch,
+ const char *function, const char *format, ...)
+{
+ va_list ap;
+ static int last_lf = 1; /* There *has* to be a better way */
+
+ if(last_lf) {
+ if(!TRACE_ON(cycles))
+ fprintf(stderr, "%s:%s:%s: ", debug_classes[dbcl], dbch + 1, function);
+ else
+ fprintf(stderr, "%lld:%s:%s:%s: ", runtime.sim.cycles,
+ debug_classes[dbcl], dbch + 1, function);
+ }
+ last_lf = format[strlen(format) - 1] == '\n'; /* This is wrong... */
+ va_start(ap, format);
+ vfprintf(stderr, format, ap);
+ va_end(ap);
+}
+
+void orsim_dbcl_set(enum __ORSIM_DEBUG_CLASS dbcl, char *dbch, int on)
+{
+ if(on)
+ dbch[0] |= 1 << dbcl;
+ else
+ dbch[0] &= ~(1 << dbcl);
+}
+
+void orsim_dbcl_set_name(enum __ORSIM_DEBUG_CLASS dbcl, const char *dbch, int on)
+{
+ char **dbchs = __orsim_dbchs;
+
+ for(dbchs = __orsim_dbchs; *dbchs; dbchs++) {
+ if(!strcmp(*dbchs + 1, dbch)) {
+ orsim_dbcl_set(dbcl, *dbchs, on);
+ break;
+ }
+ }
+}
+
+void parse_dbchs(const char *str)
+{
+ enum __ORSIM_DEBUG_CLASS dbcl = 0;
+ int i;
+ int disen;
+ int all;
+ const char *cend;
+ const char *chan_end;
+
+ while(*str) {
+ cend = strpbrk(str, "+-");
+ chan_end = strchr(str, ',');
+ if(!chan_end)
+ chan_end = str + strlen(str);
+
+ if(!cend || (cend > chan_end)) {
+ disen = 1;
+ cend = --str;
+ } else
+ disen = *cend == '+' ? 1 : 0;
+
+ if(cend == str) {
+ all = 1;
+ } else {
+ for(i = 0; i < 4; i++) {
+ if(!strncmp(str, debug_classes[i], cend - str)) {
+ dbcl = i;
+ break;
+ }
+ }
+ if(i >= 4)
+ fprintf(stderr, "Unknown class specified\n");
+ all = 0;
+ }
+ cend++;
+
+ for(i = 0; __orsim_dbchs[i]; i++)
+ if(!strncmp(cend, __orsim_dbchs[i] + 1, chan_end - cend))
+ break;
+
+ if(!__orsim_dbchs[i])
+ fprintf(stderr, "Unknown channel specified\n");
+ else if(all) {
+ orsim_dbcl_set(__ORSIM_DBCL_TRACE, __orsim_dbchs[i], disen);
+ orsim_dbcl_set(__ORSIM_DBCL_FIXME, __orsim_dbchs[i], disen);
+ orsim_dbcl_set(__ORSIM_DBCL_WARN, __orsim_dbchs[i], disen);
+ orsim_dbcl_set(__ORSIM_DBCL_ERR, __orsim_dbchs[i], disen);
+ } else
+ orsim_dbcl_set(dbcl, __orsim_dbchs[i], disen);
+ if(*chan_end)
+ str = chan_end + 1;
+ else
+ str = chan_end;
+ }
+}
+
+
+/*---------------------------------------------------------------------------*/
+/*!Internal debug function
+
+ Print the message if the level is greater than or equal to that specified
+ in the configuration.
+
+ @param[in] level The debug level of this message
+ @param[in] format Varargs format string
+ @param[in] ... The varargs required by the string */
+/*---------------------------------------------------------------------------*/
+void
+debug (int level,
+ const char *format,
+ ...)
+{
+ if (config.sim.debug >= level)
+ {
+ va_list ap;
+
+ va_start (ap, format);
+ vfprintf (runtime.sim.fout, format, ap);
+ fflush (runtime.sim.fout);
+ }
+} /* debug() */
+
+
Index: Makefile.am
===================================================================
--- Makefile.am (nonexistent)
+++ Makefile.am (revision 1765)
@@ -0,0 +1,37 @@
+# Makefile -- Makefile for cpu architecture independent simulation
+#
+# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
+# Copyright (C) 2008 Embecosm Limited
+#
+# Contributor Jeremy Bennett
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along
+# with this program. If not, see
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
+
+ This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program. If not, see
.
Property changes :
Added: svn:ignore
## -0,0 +1,2 ##
+Makefile
+.deps