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/profile.c

profile.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: profile.h =================================================================== --- profile.h (nonexistent) +++ profile.h (revision 1765) @@ -0,0 +1,33 @@ +/* profile.c -- definitions for profiling + Copyright (C) 2002 Marko Mlinar, markom@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +#define MPROF_READ 1 +#define MPROF_WRITE 2 +#define MPROF_FETCH 4 +#define MPROF_8 8 +#define MPROF_16 16 +#define MPROF_32 32 + +/* Adds a new entry to the memory profile file */ +void mprofile (oraddr_t memaddr, unsigned char type); + +struct mprofentry_struct { + oraddr_t addr; + unsigned char type; +};

profile.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: simprintf.c =================================================================== --- simprintf.c (nonexistent) +++ simprintf.c (revision 1765) @@ -0,0 +1,161 @@ +/* libc.c -- dummy C library simulation + Copyright (C) 1999 Damjan Lampret, lampret@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* Debugger LIBC functions. Working, but VERY, VERY ugly written. +I wrote following code when basic simulator started to work and I was +desperate to use some PRINTFs in my debugged code. And it was +also used to get some output from Dhrystone MIPS benchmark. */ + +#include +#include +#include +#include +#include + +#include "config.h" + +#ifdef HAVE_INTTYPES_H +#include +#endif + +#include "port.h" +#include "arch.h" +#include "abstract.h" +#include "sim-config.h" +#include "debug.h" + +/* Length of PRINTF format string */ +#define FMTLEN 2000 + +char fmtstr[FMTLEN]; + +char *simgetstr(oraddr_t stackaddr, unsigned long regparam) +{ + oraddr_t fmtaddr; + int i; + int breakpoint = 0; + + fmtaddr = regparam; + + i = 0; + while (eval_direct8(fmtaddr,&breakpoint) != '\0') { + fmtstr[i++] = eval_direct8(fmtaddr,&breakpoint); + fmtaddr++; + if (i == FMTLEN - 1) + break; + } + fmtstr[i] = '\0'; + + return fmtstr; +} + +void simprintf(oraddr_t stackaddr, unsigned long regparam) +{ + FILE *f; + int breakpoint = 0; + + simgetstr(stackaddr, regparam); + + debug(6, "simprintf: stackaddr: 0x%"PRIxADDR"\n", stackaddr); + if ((f = fopen(config.sim.fstdout, "a+"))) { + uint32_t arg; + oraddr_t argaddr; + char *fmtstrend; + char *fmtstrpart = fmtstr; + int tee_exe_log; + +#if STACK_ARGS + argaddr = stackaddr; +#else + argaddr = 3; +#endif + tee_exe_log = (config.sim.exe_log && (config.sim.exe_log_type == EXE_LOG_SOFTWARE || config.sim.exe_log_type == EXE_LOG_SIMPLE) + && config.sim.exe_log_start <= runtime.cpu.instructions && (config.sim.exe_log_end <= 0 || runtime.cpu.instructions <= config.sim.exe_log_end)); + + if (tee_exe_log) fprintf (runtime.sim.fexe_log, "SIMPRINTF: "); + debug(6, "simprintf: %s\n", fmtstrpart); + while(strlen(fmtstrpart)) { + debug(6, "simprintf(): 1"); + if ((fmtstrend = strstr(fmtstrpart + 1, "%"))) + *fmtstrend = '\0'; + debug(6," 2"); + if (strstr(fmtstrpart, "%")) { + char *tmp; + int string = 0; + debug(6, " 3"); +#if STACK_ARGS + arg = eval_direct32(argaddr,&breakpoint); + argaddr += 4; +#else + { + unsigned char regstr[5]; + + sprintf(regstr, "r%"PRIxADDR, ++argaddr); + arg = evalsim_reg(atoi(regstr)); + } +#endif + debug(6, " 4: fmtstrpart=%p fmtstrpart=%s arg=%p\n", fmtstrpart, fmtstrpart, arg); + tmp = fmtstrpart; + if (*tmp == '%') { + tmp++; + while (*tmp == '-' || *tmp >= '0' && *tmp <= '9') tmp++; + if (*tmp == 's') string = 1; + } + if (string) { + int len = 0; + char *str; + for(; eval_direct8(arg++,&breakpoint); len++); + len++; /* for null char */ + arg -= len; + str = (char *)malloc(len); + len = 0; + for(; eval_direct8(arg,&breakpoint); len++) + *(str+len) = eval_direct8(arg++,&breakpoint); + *(str+len) = eval_direct8(arg,&breakpoint); /* null ch */ + debug(6, "4a: len=%d str=%s\n", len, str); + debug(6, "4b:"); + fprintf(f, fmtstrpart, str); + if (tee_exe_log) fprintf(runtime.sim.fexe_log, fmtstrpart, str); + free(str); + } else { + fprintf(f, fmtstrpart, arg); + if (tee_exe_log) fprintf(runtime.sim.fexe_log, fmtstrpart, arg); + } + } else { + debug(6, " 5"); + fprintf(f, fmtstrpart); + if (tee_exe_log) fprintf(runtime.sim.fexe_log, fmtstrpart); + debug(6, fmtstrpart); + } + if (!fmtstrend) + break; + debug(6, " 6"); + fmtstrpart = fmtstrend; + *fmtstrpart = '%'; + debug(6, " 7"); + } + + debug(6," 8\n"); + if (fclose(f)) + perror(strerror(errno)); + } + else + perror(strerror(errno)); + +} Index: dumpverilog.c =================================================================== --- dumpverilog.c (nonexistent) +++ dumpverilog.c (revision 1765) @@ -0,0 +1,125 @@ +/* dumpverilog.c -- Dumps memory region as Verilog representation + or as hex code + Copyright (C) 2000 Damjan Lampret, lampret@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* Verilog dump can be used for stimulating OpenRISC Verilog RTL models. */ + +#include +#include +#include + +#include "config.h" + +#ifdef HAVE_INTTYPES_H +#include +#endif + +#include "port.h" +#include "sim-config.h" +#include "arch.h" +#include "parse.h" +#include "abstract.h" +#include "opcode/or32.h" +#include "labels.h" +#include "execute.h" +#include "sprs.h" +#include "stats.h" +#include "except.h" +#include "dumpverilog.h" + +extern char rcsrev[]; +extern char *disassembled; + +void dumpverilog(char *verilog_modname, unsigned int from, unsigned int to) +{ + unsigned int i, done = 0; + struct label_entry *tmp; + char dis[DISWIDTH + 100]; + PRINTF("// This file was generated by or1ksim %s\n", rcsrev); + PRINTF(OR1K_MEM_VERILOG_HEADER(verilog_modname, from/DWQ, to/DWQ, (DISWIDTH*8))); + + for(i = from; i < to; i++) + { + unsigned int _insn = evalsim_mem32 (i); + int index = insn_decode(_insn); + if (index >= 0) + { + if (verify_memoryarea(i) && (tmp = get_label(i))) + if (tmp) + PRINTF("\n//\t%s%s", tmp->name, LABELEND_CHAR); + + PRINTF("\n\tmem['h%x] = %d'h%.8"PRIx32";", i/DWQ, DW, evalsim_mem32(i)); + + disassemble_insn (_insn); + strcpy (dis, disassembled); + + if (strlen(dis) < DISWIDTH) + memset(dis + strlen(dis), ' ', DISWIDTH); + dis[DISWIDTH] = '\0'; + PRINTF("\n\tdis['h%x] = {\"%s\"};", i/DWQ, dis); + dis[0] = '\0'; + i += insn_len(index) - 1; + } else { + if (i % 64 == 0) + PRINTF("\n"); + + PRINTF("\n\tmem['h%x] = 'h%.2x;", i/DWQ, evalsim_mem8(i)); + } + done = 1; + } + + if (done) + { + PRINTF(OR1K_MEM_VERILOG_FOOTER); + return; + } + + /* this needs to be fixed */ + + for(i = from; i < to; i++) + { + if (i % 8 == 0) + PRINTF("\n%.8x: ", i); + + /* don't print ascii chars below 0x20. */ + if (evalsim_mem32(i) < 0x20) + PRINTF("0x%.2x ", (unsigned char)evalsim_mem32(i)); + else + PRINTF("0x%.2x'%c' ", (unsigned char)evalsim_mem32(i), (unsigned char)evalsim_mem32(i)); + } + PRINTF(OR1K_MEM_VERILOG_FOOTER); +} + +void dumphex(unsigned int from, unsigned int to) +{ + unsigned int i; + + for(i = from; i < to; i++) { + unsigned int _insn = evalsim_mem32 (i); + int index = insn_decode(_insn); + if (index >= 0) + { + PRINTF("%.8"PRIx32"\n", evalsim_mem32(i)); + + i += insn_len(index) - 1; + } + else + PRINTF("%.2x\n", evalsim_mem8(i)); + } +} Index: sched.h =================================================================== --- sched.h (nonexistent) +++ sched.h (revision 1765) @@ -0,0 +1,133 @@ +/* sched.h -- Abstract entities header file handling job scheduler + Copyright (C) 2001 Marko Mlinar, markom@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +#ifndef _SCHED_H_ +#define _SCHED_H_ + +/* Scheduler debug level */ +#define SCHED_DEBUG 0 + +#define SCHED_HEAP_SIZE 128 +#define SCHED_TIME_MAX 0x7fffffffffffffffLL + + +/* Structure for holding one job entry */ +struct sched_entry { + long long time; /* Clock cycles before job starts */ + int param; /* Parameter to pass to the function */ + void (*func)(int); /* Function to call when time reaches 0 */ +}; + +/* Heap of jobs */ +struct scheduler_struct { + int size; + struct sched_entry heap[SCHED_HEAP_SIZE]; +}; + +extern struct scheduler_struct scheduler; + +/* Dummy function, representing a guard, which protects heap from + emptying */ +extern void sched_guard (int i); + +/* Init scheduler -- clear the heap */ +#define SCHED_INIT() {\ + scheduler.heap[1].func = sched_guard;\ + scheduler.heap[1].time = SCHED_TIME_MAX;\ + scheduler.size = 2;\ +} + +#if SCHED_DEBUG > 1 +#define SCHED_PRINT_JOBS() {\ + int i;\ + for (i = 1; i < scheduler.size; i++) \ + PRINTF ("\t%i: %x $%i @ %i\n", i, scheduler.heap[i].func, scheduler.heap[i].param, scheduler.heap[i].time);\ +} +#else +#define SCHED_PRINT_JOBS() +#endif + +/* Adds new job to the queue */ +#define SCHED_ADD(job_func, job_param, job_time) {\ + int ___i;\ + if (SCHED_DEBUG > 0) PRINTF ("%s@%i:SCHED_ADD(func %p, param %i, time %i)\n", __FUNCTION__, runtime.sim.cycles, (job_func), (job_param), (job_time));\ + SCHED_PRINT_JOBS();\ + if (SCHED_DEBUG > 1) PRINTF ("--------\n");\ + ___i = scheduler.size++;\ + while (___i > 1 && scheduler.heap[___i / 2].time > (job_time)) scheduler.heap[___i] = scheduler.heap[___i /= 2];\ + scheduler.heap[___i].func = (job_func);\ + scheduler.heap[___i].param = (job_param);\ + scheduler.heap[___i].time = (job_time);\ + SCHED_PRINT_JOBS();\ +} + +/* Removes an item from the heap */ +#define SCHED_REMOVE_ITEM(index) {\ + struct sched_entry *tmp;\ + int ___i = (index), ___j;\ + if (SCHED_DEBUG > 0) PRINTF ("%s@%i:SCHED_REMOVE%i(time %li)\n", __FUNCTION__, runtime.sim.cycles, (index), scheduler.heap[___i].time); \ + SCHED_PRINT_JOBS();\ + if (SCHED_DEBUG > 1) PRINTF ("--------\n");\ + tmp = &scheduler.heap[--scheduler.size];\ + while (___i <= scheduler.size / 2) {\ + ___j = 2 * ___i;\ + if (___j < scheduler.size && scheduler.heap[___j].time > scheduler.heap[___j + 1].time) ___j++;\ + if (scheduler.heap[___j].time >= tmp->time) break;\ + scheduler.heap[___i] = scheduler.heap[___j];\ + ___i = ___j;\ + }\ + scheduler.heap[___i] = *tmp;\ + SCHED_PRINT_JOBS();\ +} + +/* Removes first item from the heap */ +#define SCHED_REMOVE() SCHED_REMOVE_ITEM(1) + +/* Returns item with lowest time in the heap */ +#define SCHED_PEEK() scheduler.heap[1] + +/* Returns a job with specified function and param, NULL if not found */ +#define SCHED_FIND(f, p) ({\ + int i;\ + struct sched_entry *t = NULL;\ + for (i = 1; i < scheduler.size; i++)\ + if (scheduler.heap[i].func == (f) && scheduler.heap[i].param == (p)) {\ + t = &scheduler.heap[i]; break;\ + }\ + tmp;\ +}) + +/* Returns a index of the job with specified function and param, 0 if not found */ +#define SCHED_FIND_INDEX(f, p) ({\ + int i, found = 0;\ + for (i = 1; i < scheduler.size; i++)\ + if (scheduler.heap[i].func == (f) && scheduler.heap[i].param == (p)) {\ + found = i; break;\ + }\ + found;\ +}) + +/* Deletes job with specified function and param */ +#define SCHED_FIND_REMOVE(f, p) {\ + int index;\ + index = SCHED_FIND_INDEX(f, p);\ + if (index) SCHED_REMOVE_ITEM(index);\ +} + +#endif /* _SCHED_H_ */

sched.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: dumpverilog.h =================================================================== --- dumpverilog.h (nonexistent) +++ dumpverilog.h (revision 1765) @@ -0,0 +1,47 @@ +#define DW 32 /* Data width of memory model generated by dumpverilog in bits */ +#define DWQ (DW/8) /* Same as DW but units are bytes */ +#define DISWIDTH 25 /* Width of disassembled message in bytes */ + +#define OR1K_MEM_VERILOG_HEADER(MODNAME, FROMADDR, TOADDR, DISWIDTH) "\n"\ +"include \"general.h\"\n\n"\ +"`timescale 1ns/100ps\n\n"\ +"// Simple dw-wide Sync SRAM with initial content generated by or1ksim.\n"\ +"// All control, data in and addr signals are sampled at rising clock edge \n"\ +"// Data out is not registered. Address bits specify dw-word (narrowest \n"\ +"// addressed data is not byte but dw-word !). \n"\ +"// There are still some bugs in generated output (dump word aligned regions)\n\n"\ +"module %s(clk, data, addr, ce, we, disout);\n\n"\ +"parameter dw = 32;\n"\ +"parameter amin = %d;\n\n"\ +"parameter amax = %d;\n\n"\ +"input clk;\n"\ +"inout [dw-1:0] data;\n"\ +"input [31:0] addr;\n"\ +"input ce;\n"\ +"input we;\n"\ +"output [%d:0] disout;\n\n"\ +"reg [%d:0] disout;\n"\ +"reg [dw-1:0] mem [amax:amin];\n"\ +"reg [%d:0] dis [amax:amin];\n"\ +"reg [dw-1:0] dataout;\n"\ +"tri [dw-1:0] data = (ce && ~we) ? dataout : 'bz;\n\n"\ +"initial begin\n", MODNAME, FROMADDR, TOADDR, DISWIDTH-1, DISWIDTH-1, DISWIDTH-1 + +#define OR1K_MEM_VERILOG_FOOTER "\n\ +end\n\n\ +always @(posedge clk) begin\n\ + if (ce && ~we) begin\n\ + dataout <= #1 mem[addr];\n\ + disout <= #1 dis[addr];\n\ + $display(\"or1k_mem: reading mem[%%0d]:%%h dis: %%0s\", addr, dataout, dis[addr]);\n\ + end else\n\ + if (ce && we) begin\n\ + mem[addr] <= #1 data;\n\ + dis[addr] <= #1 \"(data)\";\n\ + $display(\"or1k_mem: writing mem[%%0d]:%%h dis: %%0s\", addr, mem[addr], dis[addr]);\n\ + end\n\ +end\n\n\ +endmodule\n" + +void dumpverilog(char *verilog_modname, unsigned int from, unsigned int to); +void dumphex(unsigned int from, unsigned int to); Index: Makefile.in =================================================================== --- Makefile.in (nonexistent) +++ Makefile.in (revision 1765) @@ -0,0 +1,335 @@ +# Makefile.in generated by automake 1.6 from Makefile.am. +# @configure_input@ + +# Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 +# Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Makefile -- Makefile for cpu architecture independent simulation +# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org +# +# This file is part of OpenRISC 1000 Architectural Simulator. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# +SHELL = @SHELL@ + +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +VPATH = @srcdir@ +prefix = @prefix@ +exec_prefix = @exec_prefix@ + +bindir = @bindir@ +sbindir = @sbindir@ +libexecdir = @libexecdir@ +datadir = @datadir@ +sysconfdir = @sysconfdir@ +sharedstatedir = @sharedstatedir@ +localstatedir = @localstatedir@ +libdir = @libdir@ +infodir = @infodir@ +mandir = @mandir@ +includedir = @includedir@ +oldincludedir = /usr/include +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +top_builddir = .. + +ACLOCAL = @ACLOCAL@ +AUTOCONF = @AUTOCONF@ +AUTOMAKE = @AUTOMAKE@ +AUTOHEADER = @AUTOHEADER@ + +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +INSTALL = @INSTALL@ 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+mostlyclean-am: mostlyclean-compile mostlyclean-generic + +uninstall-am: uninstall-info-am + +.PHONY: GTAGS all all-am check check-am clean clean-generic \ + clean-noinstLIBRARIES distclean distclean-compile \ + distclean-depend distclean-generic distclean-tags distdir dvi \ + dvi-am info info-am install install-am install-data \ + install-data-am install-exec install-exec-am install-info \ + install-info-am install-man install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic tags uninstall uninstall-am \ + uninstall-info-am + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: Index: sched.c =================================================================== --- sched.c (nonexistent) +++ sched.c (revision 1765) @@ -0,0 +1,42 @@ +/* sched.c -- Abstract entities, handling job scheduling + Copyright (C) 2001 Marko Mlinar, markom@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* Abstract memory and routines that go with this. I need to +add all sorts of other abstract entities. Currently we have +only memory. */ + +#include +#include +#include +#include +#include + +#include "config.h" +#include "sim-config.h" +#include "sched.h" + +struct scheduler_struct scheduler; + +/* Dummy function, representing a guard, which protects heap from + emptying */ +void sched_guard (int i) +{ + SCHED_INIT (); +} +#warning Scheduler should continue from previous cycles not current ones

sched.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: Makefile.am =================================================================== --- Makefile.am (nonexistent) +++ Makefile.am (revision 1765) @@ -0,0 +1,22 @@ +# Makefile -- Makefile for cpu architecture independent simulation +# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org +# +# This file is part of OpenRISC 1000 Architectural Simulator. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# + +noinst_LIBRARIES = libsupport.a +libsupport_a_SOURCES = simprintf.c dumpverilog.c profile.c sched.c Index: . =================================================================== --- . (nonexistent) +++ . (revision 1765)

. Property changes : Added: svn:ignore ## -0,0 +1,2 ## +Makefile +.deps