URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
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- This comparison shows the changes necessary to convert path
/or1k/tags/tn_m001/or1ksim/testbench
- from Rev 861 to Rev 1765
- ↔ Reverse comparison
Rev 861 → Rev 1765
/eth.c
0,0 → 1,227
/* Ethernet test */ |
|
#include "spr_defs.h" |
#include "support.h" |
|
typedef long off_t; |
|
#include "../peripheral/fields.h" |
#include "../peripheral/ethernet.h" |
|
#define ETH_BASE 0x88000000LU |
#define ETH_INT_LINE 15 |
|
typedef volatile unsigned long *REGISTER; |
|
REGISTER |
eth_moder = (unsigned long *)(ETH_BASE + ETH_MODER), |
eth_int_source = (unsigned long *)(ETH_BASE + ETH_INT_SOURCE), |
eth_int_mask = (unsigned long *)(ETH_BASE + ETH_INT_MASK), |
eth_ipgt = (unsigned long *)(ETH_BASE + ETH_IPGT), |
eth_ipgr1 = (unsigned long *)(ETH_BASE + ETH_IPGR1), |
eth_ipgr2 = (unsigned long *)(ETH_BASE + ETH_IPGR2), |
eth_packetlen = (unsigned long *)(ETH_BASE + ETH_PACKETLEN), |
eth_collconf = (unsigned long *)(ETH_BASE + ETH_COLLCONF), |
eth_tx_bd_num = (unsigned long *)(ETH_BASE + ETH_TX_BD_NUM), |
eth_controlmoder = (unsigned long *)(ETH_BASE + ETH_CTRLMODER), |
eth_miimoder = (unsigned long *)(ETH_BASE + ETH_MIIMODER), |
eth_miicommand = (unsigned long *)(ETH_BASE + ETH_MIICOMMAND), |
eth_miiaddress = (unsigned long *)(ETH_BASE + ETH_MIIADDRESS), |
eth_miitx_data = (unsigned long *)(ETH_BASE + ETH_MIITX_DATA), |
eth_miirx_data = (unsigned long *)(ETH_BASE + ETH_MIIRX_DATA), |
eth_miistatus = (unsigned long *)(ETH_BASE + ETH_MIISTATUS), |
eth_mac_addr0 = (unsigned long *)(ETH_BASE + ETH_MAC_ADDR0), |
eth_mac_addr1 = (unsigned long *)(ETH_BASE + ETH_MAC_ADDR1), |
eth_bd_base = (unsigned long *)(ETH_BASE + ETH_BD_BASE); |
|
unsigned int_happend; |
unsigned char r_packet[2000]; |
unsigned char s_packet[1003]; |
unsigned tx_bindex; |
unsigned rx_bindex; |
|
void interrupt_handler() |
{ |
unsigned i,len; |
|
printf ("Int\n"); |
switch (*eth_int_source & 0x7f) { |
case 0x2 : |
printf ("Transmit Error.\n"); |
*eth_int_source = 0x2; |
break; |
case 0x8 : |
printf ("Receive Error\n"); |
*eth_int_source = 0x8; |
break; |
case 0x4 : |
printf ("Receive Frame\n"); |
*eth_int_source = 0x4; |
|
CLEAR_FLAG(*eth_moder, ETH_MODER, RXEN); |
|
len = GET_FIELD(eth_bd_base[*eth_tx_bd_num + 2], ETH_RX_BD, LENGTH); |
for (i=0; i<len; i++) |
if (r_packet[i] != (unsigned char)i) |
{ |
printf("Failed at byte %d. expect %d, received %d\n", i, i, r_packet[i]); |
exit(1); |
} |
break; |
case 0x10: |
printf ("Busy\n"); |
*eth_int_source = 0x10; |
break; |
case 0x1 : |
printf ("Transmit Frame.\n"); |
*eth_int_source = 0x1; |
CLEAR_FLAG(*eth_moder, ETH_MODER, TXEN); |
|
break; |
default: |
printf ("Invalid int @ %0x\n", (unsigned int)*eth_int_source & 0x7f); |
*eth_int_source = 0x7f; |
exit (1); |
} |
|
mtspr(SPR_PICSR, 0); |
int_happend = 1; |
} |
|
static void set_mac( void ) |
{ |
*eth_mac_addr0 = 0x04030201LU; |
*eth_mac_addr1 = 0x00000605LU; |
} |
|
static void transmit_one_packet( void ) |
{ |
unsigned i; |
|
/* Initialize packet */ |
for ( i = 0; i < sizeof(s_packet); ++ i ) |
s_packet[i] = (unsigned char)i; |
|
/* Set Ethernet BD */ |
SET_FIELD(eth_bd_base[tx_bindex], ETH_TX_BD, LENGTH, sizeof(s_packet)); |
eth_bd_base[tx_bindex + 1] = (unsigned long)s_packet; |
|
/* Start Ethernet */ |
SET_FLAG(eth_bd_base[tx_bindex], ETH_TX_BD, READY); |
SET_FLAG(*eth_moder, ETH_MODER, TXEN); |
|
/* Now wait till sent */ |
while ( TEST_FLAG( eth_bd_base[tx_bindex], ETH_TX_BD, READY ) ); |
CLEAR_FLAG(*eth_moder, ETH_MODER, TXEN); |
*eth_int_source = 0x7f; |
} |
|
static void transmit_one_packet_int( void ) |
{ |
unsigned i; |
|
int_happend = 0; |
/* Initialize packet */ |
printf("Init\n"); |
for ( i = 0; i < sizeof(s_packet); ++ i ) |
s_packet[i] = (unsigned char)i; |
|
/* Set Ethernet BD */ |
printf("Set BD\n"); |
SET_FIELD(eth_bd_base[tx_bindex], ETH_TX_BD, LENGTH, sizeof(s_packet)); |
eth_bd_base[tx_bindex + 1] = (unsigned long)s_packet; |
|
/* Start Ethernet */ |
printf("Set Flags\n"); |
SET_FLAG(eth_bd_base[tx_bindex], ETH_TX_BD, READY); |
SET_FLAG(*eth_moder, ETH_MODER, TXEN); |
} |
|
|
static void receive_one_packet(void) |
{ |
unsigned int i; |
unsigned int len; |
|
eth_bd_base[rx_bindex + 1] = (unsigned long)r_packet; |
|
SET_FLAG(eth_bd_base[rx_bindex], ETH_RX_BD, READY); |
SET_FLAG(*eth_moder, ETH_MODER, RXEN); |
|
while ( TEST_FLAG( eth_bd_base[rx_bindex], ETH_RX_BD, READY ) ); |
CLEAR_FLAG(*eth_moder, ETH_MODER, RXEN); |
*eth_int_source = 0x7f; |
|
len = GET_FIELD(eth_bd_base[rx_bindex], ETH_RX_BD, LENGTH); |
for (i=0; i<len; i++) |
if (r_packet[i] != (unsigned char)i) |
{ |
printf("Failed at byte %d. expect %d, received %d\n", i, i, r_packet[i]); |
exit(1); |
} |
} |
|
static void receive_one_packet_int(void) |
{ |
int_happend = 0; |
printf("Set BD\n"); |
eth_bd_base[rx_bindex + 1] = (unsigned long)r_packet; |
|
printf("SetFlags\n"); |
SET_FLAG(eth_bd_base[rx_bindex], ETH_RX_BD, READY); |
SET_FLAG(*eth_moder, ETH_MODER, RXEN); |
} |
|
int main() |
{ |
printf( "Starting Ethernet test\n" ); |
|
tx_bindex = 0; |
rx_bindex = *eth_tx_bd_num; |
|
set_mac(); |
|
/*-------------------*/ |
/* non iterrupt test */ |
transmit_one_packet(); |
tx_bindex += 2; |
receive_one_packet(); |
rx_bindex += 2; |
transmit_one_packet(); |
tx_bindex += 2; |
receive_one_packet(); |
rx_bindex += 2; |
|
|
/*-------------------*/ |
/* interrupt test */ |
excpt_int = (unsigned long)interrupt_handler; |
/* Enable interrup ts */ |
printf("enable ints\n"); |
mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE); |
mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << ETH_INT_LINE)); |
|
printf("set mask flags TX\n"); |
SET_FLAG(*eth_int_mask, ETH_INT_MASK, TXB_M); |
transmit_one_packet_int(); |
tx_bindex += 2; |
printf("waiting for int\n"); |
while (!int_happend); |
CLEAR_FLAG(*eth_int_mask, ETH_INT_MASK, TXB_M); |
|
printf("seting mask flag RX\n"); |
SET_FLAG(*eth_int_mask, ETH_INT_MASK, RXB_M); |
receive_one_packet_int(); |
rx_bindex += 2; |
printf("waiting for int\n"); |
while (!int_happend); |
CLEAR_FLAG(*eth_int_mask, ETH_INT_MASK, RXB_M); |
|
|
printf( "Ending Ethernet test\n" ); |
|
report (0xdeaddead); |
exit(0); |
} |
|
|
/eth.cfg
0,0 → 1,31
include "default.cfg" |
|
section sim |
verbose = 0 |
debug = 4 |
end |
|
section dma |
ndmas = 1 |
|
device 0 |
baseaddr = 0x90000000 |
irq = 4 |
enddevice |
end |
|
section ethernet |
nethernets = 1 |
|
device 0 |
baseaddr = 0x88000000 |
dma = 0 |
irq = 15 |
rtx_type = 0 |
tx_channel = 0 |
rx_channel = 1 |
rxfile = "eth0.tx" |
txfile = "eth0.tx" |
sockif = "eth0" |
enddevice |
end |
eth.cfg
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: eth0.tx
===================================================================
Index: config.sub
===================================================================
--- config.sub (nonexistent)
+++ config.sub (revision 1765)
@@ -0,0 +1,1257 @@
+#! /bin/sh
+# Configuration validation subroutine script, version 1.1.
+# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+# Free Software Foundation, Inc.
+#
+# This file is (in principle) common to ALL GNU software.
+# The presence of a machine in this file suggests that SOME GNU software
+# can handle that machine. It does not imply ALL GNU software can.
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330,
+# Boston, MA 02111-1307, USA.
+
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+# Written by Per Bothner .
+# Please send patches to .
+#
+# Configuration subroutine to validate and canonicalize a configuration type.
+# Supply the specified configuration type as an argument.
+# If it is invalid, we print an error message on stderr and exit with code 1.
+# Otherwise, we print the canonical config type on stdout and succeed.
+
+# This file is supposed to be the same for all GNU packages
+# and recognize all the CPU types, system types and aliases
+# that are meaningful with *any* GNU software.
+# Each package is responsible for reporting which valid configurations
+# it does not support. The user should be able to distinguish
+# a failure to support a valid configuration from a meaningless
+# configuration.
+
+# The goal of this file is to map all the various variations of a given
+# machine specification into a single specification in the form:
+# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM
+# or in some cases, the newer four-part form:
+# CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM
+# It is wrong to echo any other type of specification.
+
+if [ x$1 = x ]
+then
+ echo Configuration name missing. 1>&2
+ echo "Usage: $0 CPU-MFR-OPSYS" 1>&2
+ echo "or $0 ALIAS" 1>&2
+ echo where ALIAS is a recognized configuration type. 1>&2
+ exit 1
+fi
+
+# First pass through any local machine types.
+case $1 in
+ *local*)
+ echo $1
+ exit 0
+ ;;
+ *)
+ ;;
+esac
+
+# Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any).
+# Here we must recognize all the valid KERNEL-OS combinations.
+maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
+case $maybe_os in
+ linux-gnu*)
+ os=-$maybe_os
+ basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
+ ;;
+ *)
+ basic_machine=`echo $1 | sed 's/-[^-]*$//'`
+ if [ $basic_machine != $1 ]
+ then os=`echo $1 | sed 's/.*-/-/'`
+ else os=; fi
+ ;;
+esac
+
+### Let's recognize common machines as not being operating systems so
+### that things like config.sub decstation-3100 work. We also
+### recognize some manufacturers as not being operating systems, so we
+### can provide default operating systems below.
+case $os in
+ -sun*os*)
+ # Prevent following clause from handling this invalid input.
+ ;;
+ -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \
+ -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \
+ -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \
+ -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\
+ -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \
+ -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \
+ -apple)
+ os=
+ basic_machine=$1
+ ;;
+ -sim | -cisco | -oki | -wec | -winbond)
+ os=
+ basic_machine=$1
+ ;;
+ -scout)
+ ;;
+ -wrs)
+ os=-vxworks
+ basic_machine=$1
+ ;;
+ -hiux*)
+ os=-hiuxwe2
+ ;;
+ -sco5)
+ os=-sco3.2v5
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco4)
+ os=-sco3.2v4
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco3.2.[4-9]*)
+ os=`echo $os | sed -e 's/sco3.2./sco3.2v/'`
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco3.2v[4-9]*)
+ # Don't forget version if it is 3.2v4 or newer.
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco*)
+ os=-sco3.2v2
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -udk*)
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -isc)
+ os=-isc2.2
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -clix*)
+ basic_machine=clipper-intergraph
+ ;;
+ -isc*)
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -lynx*)
+ os=-lynxos
+ ;;
+ -ptx*)
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'`
+ ;;
+ -windowsnt*)
+ os=`echo $os | sed -e 's/windowsnt/winnt/'`
+ ;;
+ -psos*)
+ os=-psos
+ ;;
+ -mint | -mint[0-9]*)
+ basic_machine=m68k-atari
+ os=-mint
+ ;;
+esac
+
+# Decode aliases for certain CPU-COMPANY combinations.
+case $basic_machine in
+ # Recognize the basic CPU types without company name.
+ # Some are omitted here because they have special meanings below.
+ tahoe | i860 | ia64 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \
+ | arme[lb] | pyramid | mn10200 | mn10300 | tron | a29k \
+ | 580 | i960 | h8300 \
+ | hppa | hppa1.0 | hppa1.1 | hppa2.0 | hppa2.0w | hppa2.0n \
+ | alpha | alphaev[4-8] | alphaev56 | alphapca5[67] \
+ | alphaev6[78] \
+ | we32k | ns16k | clipper | i370 | sh | powerpc | powerpcle \
+ | 1750a | dsp16xx | pdp11 | mips16 | mips64 | mipsel | mips64el \
+ | mips64orion | mips64orionel | mipstx39 | mipstx39el \
+ | mips64vr4300 | mips64vr4300el | mips64vr4100 | mips64vr4100el \
+ | mips64vr5000 | miprs64vr5000el | mcore \
+ | sparc | sparclet | sparclite | sparc64 | sparcv9 | v850 | c4x \
+ | thumb | d10v | fr30 | avr)
+ basic_machine=$basic_machine-unknown
+ ;;
+ m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | z8k | v70 | h8500 | w65 | pj | pjl)
+ ;;
+
+ # We use `pc' rather than `unknown'
+ # because (1) that's what they normally are, and
+ # (2) the word "unknown" tends to confuse beginning users.
+ i[34567]86)
+ basic_machine=$basic_machine-pc
+ ;;
+ # Object if more than one company name word.
+ *-*-*)
+ echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
+ exit 1
+ ;;
+ # Recognize the basic CPU types with company name.
+ # FIXME: clean up the formatting here.
+ vax-* | tahoe-* | i[34567]86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \
+ | m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | arm-* | c[123]* \
+ | mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \
+ | power-* | none-* | 580-* | cray2-* | h8300-* | h8500-* | i960-* \
+ | xmp-* | ymp-* \
+ | hppa-* | hppa1.0-* | hppa1.1-* | hppa2.0-* | hppa2.0w-* | hppa2.0n-* \
+ | alpha-* | alphaev[4-8]-* | alphaev56-* | alphapca5[67]-* \
+ | alphaev6[78]-* \
+ | we32k-* | cydra-* | ns16k-* | pn-* | np1-* | xps100-* \
+ | clipper-* | orion-* \
+ | sparclite-* | pdp11-* | sh-* | powerpc-* | powerpcle-* \
+ | sparc64-* | sparcv9-* | sparc86x-* | mips16-* | mips64-* | mipsel-* \
+ | mips64el-* | mips64orion-* | mips64orionel-* \
+ | mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \
+ | mipstx39-* | mipstx39el-* | mcore-* \
+ | f301-* | armv*-* | s390-* | sv1-* | t3e-* \
+ | m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \
+ | thumb-* | v850-* | d30v-* | tic30-* | c30-* | fr30-* )
+ ;;
+ # Recognize the various machine names and aliases which stand
+ # for a CPU type and a company and sometimes even an OS.
+ 386bsd)
+ basic_machine=i386-unknown
+ os=-bsd
+ ;;
+ 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc)
+ basic_machine=m68000-att
+ ;;
+ 3b*)
+ basic_machine=we32k-att
+ ;;
+ a29khif)
+ basic_machine=a29k-amd
+ os=-udi
+ ;;
+ adobe68k)
+ basic_machine=m68010-adobe
+ os=-scout
+ ;;
+ alliant | fx80)
+ basic_machine=fx80-alliant
+ ;;
+ altos | altos3068)
+ basic_machine=m68k-altos
+ ;;
+ am29k)
+ basic_machine=a29k-none
+ os=-bsd
+ ;;
+ amdahl)
+ basic_machine=580-amdahl
+ os=-sysv
+ ;;
+ amiga | amiga-*)
+ basic_machine=m68k-cbm
+ ;;
+ amigaos | amigados)
+ basic_machine=m68k-cbm
+ os=-amigaos
+ ;;
+ amigaunix | amix)
+ basic_machine=m68k-cbm
+ os=-sysv4
+ ;;
+ apollo68)
+ basic_machine=m68k-apollo
+ os=-sysv
+ ;;
+ apollo68bsd)
+ basic_machine=m68k-apollo
+ os=-bsd
+ ;;
+ aux)
+ basic_machine=m68k-apple
+ os=-aux
+ ;;
+ balance)
+ basic_machine=ns32k-sequent
+ os=-dynix
+ ;;
+ convex-c1)
+ basic_machine=c1-convex
+ os=-bsd
+ ;;
+ convex-c2)
+ basic_machine=c2-convex
+ os=-bsd
+ ;;
+ convex-c32)
+ basic_machine=c32-convex
+ os=-bsd
+ ;;
+ convex-c34)
+ basic_machine=c34-convex
+ os=-bsd
+ ;;
+ convex-c38)
+ basic_machine=c38-convex
+ os=-bsd
+ ;;
+ cray | ymp)
+ basic_machine=ymp-cray
+ os=-unicos
+ ;;
+ cray2)
+ basic_machine=cray2-cray
+ os=-unicos
+ ;;
+ [ctj]90-cray)
+ basic_machine=c90-cray
+ os=-unicos
+ ;;
+ crds | unos)
+ basic_machine=m68k-crds
+ ;;
+ da30 | da30-*)
+ basic_machine=m68k-da30
+ ;;
+ decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn)
+ basic_machine=mips-dec
+ ;;
+ delta | 3300 | motorola-3300 | motorola-delta \
+ | 3300-motorola | delta-motorola)
+ basic_machine=m68k-motorola
+ ;;
+ delta88)
+ basic_machine=m88k-motorola
+ os=-sysv3
+ ;;
+ dpx20 | dpx20-*)
+ basic_machine=rs6000-bull
+ os=-bosx
+ ;;
+ dpx2* | dpx2*-bull)
+ basic_machine=m68k-bull
+ os=-sysv3
+ ;;
+ ebmon29k)
+ basic_machine=a29k-amd
+ os=-ebmon
+ ;;
+ elxsi)
+ basic_machine=elxsi-elxsi
+ os=-bsd
+ ;;
+ encore | umax | mmax)
+ basic_machine=ns32k-encore
+ ;;
+ es1800 | OSE68k | ose68k | ose | OSE)
+ basic_machine=m68k-ericsson
+ os=-ose
+ ;;
+ fx2800)
+ basic_machine=i860-alliant
+ ;;
+ genix)
+ basic_machine=ns32k-ns
+ ;;
+ gmicro)
+ basic_machine=tron-gmicro
+ os=-sysv
+ ;;
+ h3050r* | hiux*)
+ basic_machine=hppa1.1-hitachi
+ os=-hiuxwe2
+ ;;
+ h8300hms)
+ basic_machine=h8300-hitachi
+ os=-hms
+ ;;
+ h8300xray)
+ basic_machine=h8300-hitachi
+ os=-xray
+ ;;
+ h8500hms)
+ basic_machine=h8500-hitachi
+ os=-hms
+ ;;
+ harris)
+ basic_machine=m88k-harris
+ os=-sysv3
+ ;;
+ hp300-*)
+ basic_machine=m68k-hp
+ ;;
+ hp300bsd)
+ basic_machine=m68k-hp
+ os=-bsd
+ ;;
+ hp300hpux)
+ basic_machine=m68k-hp
+ os=-hpux
+ ;;
+ hp3k9[0-9][0-9] | hp9[0-9][0-9])
+ basic_machine=hppa1.0-hp
+ ;;
+ hp9k2[0-9][0-9] | hp9k31[0-9])
+ basic_machine=m68000-hp
+ ;;
+ hp9k3[2-9][0-9])
+ basic_machine=m68k-hp
+ ;;
+ hp9k6[0-9][0-9] | hp6[0-9][0-9])
+ basic_machine=hppa1.0-hp
+ ;;
+ hp9k7[0-79][0-9] | hp7[0-79][0-9])
+ basic_machine=hppa1.1-hp
+ ;;
+ hp9k78[0-9] | hp78[0-9])
+ # FIXME: really hppa2.0-hp
+ basic_machine=hppa1.1-hp
+ ;;
+ hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893)
+ # FIXME: really hppa2.0-hp
+ basic_machine=hppa1.1-hp
+ ;;
+ hp9k8[0-9][13679] | hp8[0-9][13679])
+ basic_machine=hppa1.1-hp
+ ;;
+ hp9k8[0-9][0-9] | hp8[0-9][0-9])
+ basic_machine=hppa1.0-hp
+ ;;
+ hppa-next)
+ os=-nextstep3
+ ;;
+ hppaosf)
+ basic_machine=hppa1.1-hp
+ os=-osf
+ ;;
+ hppro)
+ basic_machine=hppa1.1-hp
+ os=-proelf
+ ;;
+ i370-ibm* | ibm*)
+ basic_machine=i370-ibm
+ ;;
+# I'm not sure what "Sysv32" means. Should this be sysv3.2?
+ i[34567]86v32)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-sysv32
+ ;;
+ i[34567]86v4*)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-sysv4
+ ;;
+ i[34567]86v)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-sysv
+ ;;
+ i[34567]86sol2)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-solaris2
+ ;;
+ i386mach)
+ basic_machine=i386-mach
+ os=-mach
+ ;;
+ i386-vsta | vsta)
+ basic_machine=i386-unknown
+ os=-vsta
+ ;;
+ i386-go32 | go32)
+ basic_machine=i386-unknown
+ os=-go32
+ ;;
+ i386-mingw32 | mingw32)
+ basic_machine=i386-unknown
+ os=-mingw32
+ ;;
+ i386-qnx | qnx)
+ basic_machine=i386-qnx
+ ;;
+ iris | iris4d)
+ basic_machine=mips-sgi
+ case $os in
+ -irix*)
+ ;;
+ *)
+ os=-irix4
+ ;;
+ esac
+ ;;
+ isi68 | isi)
+ basic_machine=m68k-isi
+ os=-sysv
+ ;;
+ m88k-omron*)
+ basic_machine=m88k-omron
+ ;;
+ magnum | m3230)
+ basic_machine=mips-mips
+ os=-sysv
+ ;;
+ merlin)
+ basic_machine=ns32k-utek
+ os=-sysv
+ ;;
+ miniframe)
+ basic_machine=m68000-convergent
+ ;;
+ *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*)
+ basic_machine=m68k-atari
+ os=-mint
+ ;;
+ mipsel*-linux*)
+ basic_machine=mipsel-unknown
+ os=-linux-gnu
+ ;;
+ mips*-linux*)
+ basic_machine=mips-unknown
+ os=-linux-gnu
+ ;;
+ mips3*-*)
+ basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
+ ;;
+ mips3*)
+ basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown
+ ;;
+ mmix*)
+ basic_machine=mmix-knuth
+ os=-mmixware
+ ;;
+ monitor)
+ basic_machine=m68k-rom68k
+ os=-coff
+ ;;
+ msdos)
+ basic_machine=i386-unknown
+ os=-msdos
+ ;;
+ mvs)
+ basic_machine=i370-ibm
+ os=-mvs
+ ;;
+ ncr3000)
+ basic_machine=i486-ncr
+ os=-sysv4
+ ;;
+ netbsd386)
+ basic_machine=i386-unknown
+ os=-netbsd
+ ;;
+ netwinder)
+ basic_machine=armv4l-rebel
+ os=-linux
+ ;;
+ news | news700 | news800 | news900)
+ basic_machine=m68k-sony
+ os=-newsos
+ ;;
+ news1000)
+ basic_machine=m68030-sony
+ os=-newsos
+ ;;
+ news-3600 | risc-news)
+ basic_machine=mips-sony
+ os=-newsos
+ ;;
+ necv70)
+ basic_machine=v70-nec
+ os=-sysv
+ ;;
+ next | m*-next )
+ basic_machine=m68k-next
+ case $os in
+ -nextstep* )
+ ;;
+ -ns2*)
+ os=-nextstep2
+ ;;
+ *)
+ os=-nextstep3
+ ;;
+ esac
+ ;;
+ nh3000)
+ basic_machine=m68k-harris
+ os=-cxux
+ ;;
+ nh[45]000)
+ basic_machine=m88k-harris
+ os=-cxux
+ ;;
+ nindy960)
+ basic_machine=i960-intel
+ os=-nindy
+ ;;
+ mon960)
+ basic_machine=i960-intel
+ os=-mon960
+ ;;
+ np1)
+ basic_machine=np1-gould
+ ;;
+ op50n-* | op60c-*)
+ basic_machine=hppa1.1-oki
+ os=-proelf
+ ;;
+ or32 | or32-*)
+ basic_machine=or32
+ os=-rtems
+ ;;
+ OSE68000 | ose68000)
+ basic_machine=m68000-ericsson
+ os=-ose
+ ;;
+ os68k)
+ basic_machine=m68k-none
+ os=-os68k
+ ;;
+ pa-hitachi)
+ basic_machine=hppa1.1-hitachi
+ os=-hiuxwe2
+ ;;
+ paragon)
+ basic_machine=i860-intel
+ os=-osf
+ ;;
+ pbd)
+ basic_machine=sparc-tti
+ ;;
+ pbb)
+ basic_machine=m68k-tti
+ ;;
+ pc532 | pc532-*)
+ basic_machine=ns32k-pc532
+ ;;
+ pentium | p5 | k5 | k6 | nexen)
+ basic_machine=i586-pc
+ ;;
+ pentiumpro | p6 | 6x86)
+ basic_machine=i686-pc
+ ;;
+ pentiumii | pentium2)
+ basic_machine=i786-pc
+ ;;
+ pentium-* | p5-* | k5-* | k6-* | nexen-*)
+ basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ pentiumpro-* | p6-* | 6x86-*)
+ basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ pentiumii-* | pentium2-*)
+ basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ pn)
+ basic_machine=pn-gould
+ ;;
+ power) basic_machine=rs6000-ibm
+ ;;
+ ppc) basic_machine=powerpc-unknown
+ ;;
+ ppc-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ ppcle | powerpclittle | ppc-le | powerpc-little)
+ basic_machine=powerpcle-unknown
+ ;;
+ ppcle-* | powerpclittle-*)
+ basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ ps2)
+ basic_machine=i386-ibm
+ ;;
+ rom68k)
+ basic_machine=m68k-rom68k
+ os=-coff
+ ;;
+ rm[46]00)
+ basic_machine=mips-siemens
+ ;;
+ rtpc | rtpc-*)
+ basic_machine=romp-ibm
+ ;;
+ sa29200)
+ basic_machine=a29k-amd
+ os=-udi
+ ;;
+ sequent)
+ basic_machine=i386-sequent
+ ;;
+ sh)
+ basic_machine=sh-hitachi
+ os=-hms
+ ;;
+ sparclite-wrs)
+ basic_machine=sparclite-wrs
+ os=-vxworks
+ ;;
+ sps7)
+ basic_machine=m68k-bull
+ os=-sysv2
+ ;;
+ spur)
+ basic_machine=spur-unknown
+ ;;
+ st2000)
+ basic_machine=m68k-tandem
+ ;;
+ stratus)
+ basic_machine=i860-stratus
+ os=-sysv4
+ ;;
+ sun2)
+ basic_machine=m68000-sun
+ ;;
+ sun2os3)
+ basic_machine=m68000-sun
+ os=-sunos3
+ ;;
+ sun2os4)
+ basic_machine=m68000-sun
+ os=-sunos4
+ ;;
+ sun3os3)
+ basic_machine=m68k-sun
+ os=-sunos3
+ ;;
+ sun3os4)
+ basic_machine=m68k-sun
+ os=-sunos4
+ ;;
+ sun4os3)
+ basic_machine=sparc-sun
+ os=-sunos3
+ ;;
+ sun4os4)
+ basic_machine=sparc-sun
+ os=-sunos4
+ ;;
+ sun4sol2)
+ basic_machine=sparc-sun
+ os=-solaris2
+ ;;
+ sun3 | sun3-*)
+ basic_machine=m68k-sun
+ ;;
+ sun4)
+ basic_machine=sparc-sun
+ ;;
+ sun386 | sun386i | roadrunner)
+ basic_machine=i386-sun
+ ;;
+ sv1)
+ basic_machine=sv1-cray
+ os=-unicos
+ ;;
+ symmetry)
+ basic_machine=i386-sequent
+ os=-dynix
+ ;;
+ t3e)
+ basic_machine=t3e-cray
+ os=-unicos
+ ;;
+ tx39)
+ basic_machine=mipstx39-unknown
+ ;;
+ tx39el)
+ basic_machine=mipstx39el-unknown
+ ;;
+ tower | tower-32)
+ basic_machine=m68k-ncr
+ ;;
+ udi29k)
+ basic_machine=a29k-amd
+ os=-udi
+ ;;
+ ultra3)
+ basic_machine=a29k-nyu
+ os=-sym1
+ ;;
+ v810 | necv810)
+ basic_machine=v810-nec
+ os=-none
+ ;;
+ vaxv)
+ basic_machine=vax-dec
+ os=-sysv
+ ;;
+ vms)
+ basic_machine=vax-dec
+ os=-vms
+ ;;
+ vpp*|vx|vx-*)
+ basic_machine=f301-fujitsu
+ ;;
+ vxworks960)
+ basic_machine=i960-wrs
+ os=-vxworks
+ ;;
+ vxworks68)
+ basic_machine=m68k-wrs
+ os=-vxworks
+ ;;
+ vxworks29k)
+ basic_machine=a29k-wrs
+ os=-vxworks
+ ;;
+ w65*)
+ basic_machine=w65-wdc
+ os=-none
+ ;;
+ w89k-*)
+ basic_machine=hppa1.1-winbond
+ os=-proelf
+ ;;
+ xmp)
+ basic_machine=xmp-cray
+ os=-unicos
+ ;;
+ xps | xps100)
+ basic_machine=xps100-honeywell
+ ;;
+ z8k-*-coff)
+ basic_machine=z8k-unknown
+ os=-sim
+ ;;
+ none)
+ basic_machine=none-none
+ os=-none
+ ;;
+
+# Here we handle the default manufacturer of certain CPU types. It is in
+# some cases the only manufacturer, in others, it is the most popular.
+ w89k)
+ basic_machine=hppa1.1-winbond
+ ;;
+ op50n)
+ basic_machine=hppa1.1-oki
+ ;;
+ op60c)
+ basic_machine=hppa1.1-oki
+ ;;
+ mips)
+ if [ x$os = x-linux-gnu ]; then
+ basic_machine=mips-unknown
+ else
+ basic_machine=mips-mips
+ fi
+ ;;
+ romp)
+ basic_machine=romp-ibm
+ ;;
+ rs6000)
+ basic_machine=rs6000-ibm
+ ;;
+ vax)
+ basic_machine=vax-dec
+ ;;
+ pdp11)
+ basic_machine=pdp11-dec
+ ;;
+ we32k)
+ basic_machine=we32k-att
+ ;;
+ sparc | sparcv9)
+ basic_machine=sparc-sun
+ ;;
+ cydra)
+ basic_machine=cydra-cydrome
+ ;;
+ orion)
+ basic_machine=orion-highlevel
+ ;;
+ orion105)
+ basic_machine=clipper-highlevel
+ ;;
+ mac | mpw | mac-mpw)
+ basic_machine=m68k-apple
+ ;;
+ pmac | pmac-mpw)
+ basic_machine=powerpc-apple
+ ;;
+ c4x*)
+ basic_machine=c4x-none
+ os=-coff
+ ;;
+ *)
+ echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
+ exit 1
+ ;;
+esac
+
+# Here we canonicalize certain aliases for manufacturers.
+case $basic_machine in
+ *-digital*)
+ basic_machine=`echo $basic_machine | sed 's/digital.*/dec/'`
+ ;;
+ *-commodore*)
+ basic_machine=`echo $basic_machine | sed 's/commodore.*/cbm/'`
+ ;;
+ *)
+ ;;
+esac
+
+# Decode manufacturer-specific aliases for certain operating systems.
+
+if [ x"$os" != x"" ]
+then
+case $os in
+ # First match some system type aliases
+ # that might get confused with valid system types.
+ # -solaris* is a basic system type, with this one exception.
+ -solaris1 | -solaris1.*)
+ os=`echo $os | sed -e 's|solaris1|sunos4|'`
+ ;;
+ -solaris)
+ os=-solaris2
+ ;;
+ -svr4*)
+ os=-sysv4
+ ;;
+ -unixware*)
+ os=-sysv4.2uw
+ ;;
+ -gnu/linux*)
+ os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'`
+ ;;
+ # First accept the basic system types.
+ # The portable systems comes first.
+ # Each alternative MUST END IN A *, to match a version number.
+ # -sysv* is not here because it comes later, after sysvr4.
+ -gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \
+ | -*vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[34]*\
+ | -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \
+ | -amigaos* | -amigados* | -msdos* | -newsos* | -unicos* | -aof* \
+ | -aos* \
+ | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \
+ | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \
+ | -hiux* | -386bsd* | -netbsd* | -openbsd* | -freebsd* | -riscix* \
+ | -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \
+ | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
+ | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
+ | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
+ | -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \
+ | -interix* | -uwin* | -rhapsody* | -opened* | -openstep* | -oskit*)
+ # Remember, each alternative MUST END IN *, to match a version number.
+ ;;
+ -sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \
+ | -windows* | -osx | -abug | -netware* | -os9* | -beos* \
+ | -macos* | -mpw* | -magic* | -mmixware* | -mon960* | -lnews*)
+ ;;
+ -mac*)
+ os=`echo $os | sed -e 's|mac|macos|'`
+ ;;
+ -*linux*)
+ os=`echo $os | sed -e 's|linux|linux-gnu|'`
+ ;;
+ -sunos5*)
+ os=`echo $os | sed -e 's|sunos5|solaris2|'`
+ ;;
+ -sunos6*)
+ os=`echo $os | sed -e 's|sunos6|solaris3|'`
+ ;;
+ -opened*)
+ os=-openedition
+ ;;
+ -wince*)
+ os=-wince
+ ;;
+ -osfrose*)
+ os=-osfrose
+ ;;
+ -osf*)
+ os=-osf
+ ;;
+ -utek*)
+ os=-bsd
+ ;;
+ -dynix*)
+ os=-bsd
+ ;;
+ -acis*)
+ os=-aos
+ ;;
+ -386bsd)
+ os=-bsd
+ ;;
+ -ctix* | -uts*)
+ os=-sysv
+ ;;
+ -ns2 )
+ os=-nextstep2
+ ;;
+ # Preserve the version number of sinix5.
+ -sinix5.*)
+ os=`echo $os | sed -e 's|sinix|sysv|'`
+ ;;
+ -sinix*)
+ os=-sysv4
+ ;;
+ -triton*)
+ os=-sysv3
+ ;;
+ -oss*)
+ os=-sysv3
+ ;;
+ -qnx)
+ os=-qnx4
+ ;;
+ -svr4)
+ os=-sysv4
+ ;;
+ -svr3)
+ os=-sysv3
+ ;;
+ -sysvr4)
+ os=-sysv4
+ ;;
+ # This must come after -sysvr4.
+ -sysv*)
+ ;;
+ -ose*)
+ os=-ose
+ ;;
+ -es1800*)
+ os=-ose
+ ;;
+ -xenix)
+ os=-xenix
+ ;;
+ -*mint | -*MiNT)
+ os=-mint
+ ;;
+ -none)
+ ;;
+ *)
+ # Get rid of the `-' at the beginning of $os.
+ os=`echo $os | sed 's/[^-]*-//'`
+ echo Invalid configuration \`$1\': system \`$os\' not recognized 1>&2
+ exit 1
+ ;;
+esac
+else
+
+# Here we handle the default operating systems that come with various machines.
+# The value should be what the vendor currently ships out the door with their
+# machine or put another way, the most popular os provided with the machine.
+
+# Note that if you're going to try to match "-MANUFACTURER" here (say,
+# "-sun"), then you have to tell the case statement up towards the top
+# that MANUFACTURER isn't an operating system. Otherwise, code above
+# will signal an error saying that MANUFACTURER isn't an operating
+# system, and we'll never get to this point.
+
+case $basic_machine in
+ *-acorn)
+ os=-riscix1.2
+ ;;
+ arm*-rebel)
+ os=-linux
+ ;;
+ arm*-semi)
+ os=-aout
+ ;;
+ pdp11-*)
+ os=-none
+ ;;
+ *-dec | vax-*)
+ os=-ultrix4.2
+ ;;
+ m68*-apollo)
+ os=-domain
+ ;;
+ i386-sun)
+ os=-sunos4.0.2
+ ;;
+ m68000-sun)
+ os=-sunos3
+ # This also exists in the configure program, but was not the
+ # default.
+ # os=-sunos4
+ ;;
+ m68*-cisco)
+ os=-aout
+ ;;
+ mips*-cisco)
+ os=-elf
+ ;;
+ mips*-*)
+ os=-elf
+ ;;
+ or32-*)
+ os=-rtems
+ ;;
+ *-tti) # must be before sparc entry or we get the wrong os.
+ os=-sysv3
+ ;;
+ sparc-* | *-sun)
+ os=-sunos4.1.1
+ ;;
+ *-be)
+ os=-beos
+ ;;
+ *-ibm)
+ os=-aix
+ ;;
+ *-wec)
+ os=-proelf
+ ;;
+ *-winbond)
+ os=-proelf
+ ;;
+ *-oki)
+ os=-proelf
+ ;;
+ *-hp)
+ os=-hpux
+ ;;
+ *-hitachi)
+ os=-hiux
+ ;;
+ i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent)
+ os=-sysv
+ ;;
+ *-cbm)
+ os=-amigaos
+ ;;
+ *-dg)
+ os=-dgux
+ ;;
+ *-dolphin)
+ os=-sysv3
+ ;;
+ m68k-ccur)
+ os=-rtu
+ ;;
+ m88k-omron*)
+ os=-luna
+ ;;
+ *-next )
+ os=-nextstep
+ ;;
+ *-sequent)
+ os=-ptx
+ ;;
+ *-crds)
+ os=-unos
+ ;;
+ *-ns)
+ os=-genix
+ ;;
+ i370-*)
+ os=-mvs
+ ;;
+ *-next)
+ os=-nextstep3
+ ;;
+ *-gould)
+ os=-sysv
+ ;;
+ *-highlevel)
+ os=-bsd
+ ;;
+ *-encore)
+ os=-bsd
+ ;;
+ *-sgi)
+ os=-irix
+ ;;
+ *-siemens)
+ os=-sysv4
+ ;;
+ *-masscomp)
+ os=-rtu
+ ;;
+ f301-fujitsu)
+ os=-uxpv
+ ;;
+ *-rom68k)
+ os=-coff
+ ;;
+ *-*bug)
+ os=-coff
+ ;;
+ *-apple)
+ os=-macos
+ ;;
+ *-atari*)
+ os=-mint
+ ;;
+ *)
+ os=-none
+ ;;
+esac
+fi
+
+# Here we handle the case where we know the os, and the CPU type, but not the
+# manufacturer. We pick the logical manufacturer.
+vendor=unknown
+case $basic_machine in
+ *-unknown)
+ case $os in
+ -riscix*)
+ vendor=acorn
+ ;;
+ -sunos*)
+ vendor=sun
+ ;;
+ -aix*)
+ vendor=ibm
+ ;;
+ -beos*)
+ vendor=be
+ ;;
+ -hpux*)
+ vendor=hp
+ ;;
+ -mpeix*)
+ vendor=hp
+ ;;
+ -hiux*)
+ vendor=hitachi
+ ;;
+ -unos*)
+ vendor=crds
+ ;;
+ -dgux*)
+ vendor=dg
+ ;;
+ -luna*)
+ vendor=omron
+ ;;
+ -genix*)
+ vendor=ns
+ ;;
+ -mvs* | -opened*)
+ vendor=ibm
+ ;;
+ -ptx*)
+ vendor=sequent
+ ;;
+ -vxsim* | -vxworks*)
+ vendor=wrs
+ ;;
+ -aux*)
+ vendor=apple
+ ;;
+ -hms*)
+ vendor=hitachi
+ ;;
+ -mpw* | -macos*)
+ vendor=apple
+ ;;
+ -*mint | -*MiNT)
+ vendor=atari
+ ;;
+ esac
+ basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"`
+ ;;
+esac
+
+echo $basic_machine $vendor $os
config.sub
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: Makefile.in
===================================================================
--- Makefile.in (nonexistent)
+++ Makefile.in (revision 1765)
@@ -0,0 +1,774 @@
+# Makefile.in generated automatically by automake 1.4 from Makefile.am
+
+# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+
+################### Tests #####################
+# tests in this directory
+
+
+SHELL = @SHELL@
+
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+VPATH = @srcdir@
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+
+bindir = @bindir@
+sbindir = @sbindir@
+libexecdir = @libexecdir@
+datadir = @datadir@
+sysconfdir = @sysconfdir@
+sharedstatedir = @sharedstatedir@
+localstatedir = @localstatedir@
+libdir = @libdir@
+infodir = @infodir@
+mandir = @mandir@
+includedir = @includedir@
+oldincludedir = /usr/include
+
+DESTDIR =
+
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+
+top_builddir = .
+
+ACLOCAL = @ACLOCAL@
+AUTOCONF = @AUTOCONF@
+AUTOMAKE = @AUTOMAKE@
+AUTOHEADER = @AUTOHEADER@
+
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@ $(AM_INSTALL_PROGRAM_FLAGS)
+INSTALL_DATA = @INSTALL_DATA@
+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+transform = @program_transform_name@
+
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+host_alias = @host_alias@
+host_triplet = @host@
+CC = @CC@
+INCLUDES = @INCLUDES@
+LD = @LD@
+MAKEINFO = @MAKEINFO@
+MAKE_SHELL = @MAKE_SHELL@
+OR1K_SRCDIR = @OR1K_SRCDIR@
+PACKAGE = @PACKAGE@
+RANLIB = @RANLIB@
+SIM = @SIM@
+TESTS_ENV = @TESTS_ENV@
+VERSION = @VERSION@
+
+OR1K_TESTS = basic cache cfg dmatest eth mmu except_test int_test flag fbtest kbdtest
+IND_TESTS = exit cbasic local_global mul mycompress dhry functest mem_test
+# inst_set_test
+ACV_TESTS = acv_uart acv_gpio
+MC_TESTS = mc_dram mc_ssram mc_async mc_sync
+# Subdirectory tests
+SUB_TESTS =
+OR1K_SUB_TESTS = uos
+###############################################
+
+ALL_TESTS = $(IND_TESTS) $(OR1K_TESTS) $(ACV_TESTS) $(MC_TESTS)
+TESTS = $(IND_TESTS) $(OR1K_TESTS)
+bin_PROGRAMS = $(ALL_TESTS)
+
+######### Platform Independent Tests ##########
+exit_SOURCES = $(OR1K_SUPPORT_S) support.h exit.c
+cbasic_SOURCES = $(OR1K_SUPPORT_S) support.h cbasic.c
+local_global_SOURCES = $(OR1K_SUPPORT_S) support.h local_global.c
+mul_SOURCES = $(OR1K_SUPPORT_S) support.h mul.c
+dhry_SOURCES = $(OR1K_SUPPORT_S) support.h dhry.h dhry.c
+mycompress_SOURCES = $(OR1K_SUPPORT_S) support.h mycompress.c
+functest_SOURCES = $(OR1K_SUPPORT_S) support.h functest.c
+mem_test_SOURCES = $(OR1K_SUPPORT_S) support.h mem_test.c
+inst_set_test_SOURCES = $(OR1K_SUPPORT_S) support.h inst_set_test.c
+###############################################
+
+@OR1K_EXCEPT_TRUE@exit_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@cbasic_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@local_global_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@mul_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@dhry_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@mycompress_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@functest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@mem_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@inst_set_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+
+######### MC Tests ############################
+@OR1K_EXCEPT_TRUE@mc_dram_SOURCES = except_mc.S mc_common.h mc_common.c mc_dram.h mc_dram.c
+@OR1K_EXCEPT_TRUE@mc_dram_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+@OR1K_EXCEPT_TRUE@mc_ssram_SOURCES = except_mc.S mc_common.h mc_common.c mc_ssramh mc_ssram.c
+@OR1K_EXCEPT_TRUE@mc_ssram_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+@OR1K_EXCEPT_TRUE@mc_async_SOURCES = except_mc.S mc_common.h mc_common.c mc_async.h mc_async.c
+@OR1K_EXCEPT_TRUE@mc_async_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+@OR1K_EXCEPT_TRUE@mc_sync_SOURCES = except_mc.S mc_common.h mc_common.c mc_sync.h mc_sync.c
+@OR1K_EXCEPT_TRUE@mc_sync_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+################################################
+
+##### Platform Dependent Tests - not OR1K #####
+@OR1K_EXCEPT_TRUE@basic_SOURCES = basic.S spr_defs.h
+@OR1K_EXCEPT_FALSE@basic_SOURCES =
+@OR1K_EXCEPT_TRUE@basic_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+@OR1K_EXCEPT_TRUE@basic_LDADD =
+@OR1K_EXCEPT_TRUE@flag_SOURCES = flag.S spr_defs.h
+@OR1K_EXCEPT_FALSE@flag_SOURCES =
+@OR1K_EXCEPT_TRUE@flag_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+@OR1K_EXCEPT_TRUE@flag_LDADD =
+@OR1K_EXCEPT_TRUE@cache_SOURCES = $(OR1K_SUPPORT_S) support.h cache.c cache_asm.S
+@OR1K_EXCEPT_FALSE@cache_SOURCES =
+@OR1K_EXCEPT_TRUE@cache_LDFLAGS = -T$(OR1K_SRCDIR)/cache.ld
+@OR1K_EXCEPT_TRUE@cfg_SOURCES = cfg.S spr_defs.h
+@OR1K_EXCEPT_FALSE@cfg_SOURCES =
+@OR1K_EXCEPT_TRUE@cfg_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+@OR1K_EXCEPT_TRUE@cfg_LDADD =
+@OR1K_EXCEPT_TRUE@dmatest_SOURCES = $(OR1K_SUPPORT_S) support.h dmatest.c
+@OR1K_EXCEPT_FALSE@dmatest_SOURCES =
+@OR1K_EXCEPT_TRUE@dmatest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@eth_SOURCES = $(OR1K_SUPPORT_S) support.h eth.c
+@OR1K_EXCEPT_FALSE@eth_SOURCES =
+@OR1K_EXCEPT_TRUE@eth_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@acv_uart_SOURCES = $(OR1K_SUPPORT_S) support.h acv_uart.c
+@OR1K_EXCEPT_FALSE@acv_uart_SOURCES =
+@OR1K_EXCEPT_TRUE@acv_uart_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@acv_gpio_SOURCES = $(OR1K_SUPPORT_S) support.h acv_gpio.c
+@OR1K_EXCEPT_FALSE@acv_gpio_SOURCES =
+@OR1K_EXCEPT_TRUE@acv_gpio_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@mmu_SOURCES = $(OR1K_SUPPORT_S) support.h mmu.c mmu_asm.S
+@OR1K_EXCEPT_FALSE@mmu_SOURCES =
+@OR1K_EXCEPT_TRUE@mmu_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+@OR1K_EXCEPT_TRUE@except_test_SOURCES = except_test_s.S except_test.c spr_defs.h
+@OR1K_EXCEPT_FALSE@except_test_SOURCES =
+@OR1K_EXCEPT_TRUE@except_test_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+@OR1K_EXCEPT_TRUE@int_test_SOURCES = spr_defs.h int_test.S
+@OR1K_EXCEPT_FALSE@int_test_SOURCES =
+@OR1K_EXCEPT_TRUE@int_test_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+@OR1K_EXCEPT_TRUE@fbtest_SOURCES = $(OR1K_SUPPORT_S) support.h fbtest.c
+@OR1K_EXCEPT_FALSE@fbtest_SOURCES =
+@OR1K_EXCEPT_TRUE@fbtest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@kbdtest_SOURCES = $(OR1K_SUPPORT_S) support.h kbdtest.c
+@OR1K_EXCEPT_FALSE@kbdtest_SOURCES =
+@OR1K_EXCEPT_TRUE@kbdtest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+@OR1K_EXCEPT_TRUE@SUBDIRS = support $(SUB_TESTS) $(OR1K_SUB_TESTS)
+@OR1K_EXCEPT_FALSE@SUBDIRS = support $(SUB_TESTS)
+@OR1K_EXCEPT_TRUE@OR1K_SUPPORT_S = except.S
+@OR1K_EXCEPT_FALSE@OR1K_SUPPORT_S =
+
+LDADD = support/libsupport.a
+LDFLAGS =
+TESTS_ENVIRONMENT = $(SHELL) ${top_srcdir}/test $(TESTS_ENV)
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
+CONFIG_CLEAN_FILES =
+PROGRAMS = $(bin_PROGRAMS)
+
+
+DEFS = @DEFS@ -I. -I$(srcdir)
+CPPFLAGS = @CPPFLAGS@
+LIBS = @LIBS@
+@OR1K_EXCEPT_TRUE@exit_OBJECTS = except.o exit.o
+@OR1K_EXCEPT_FALSE@exit_OBJECTS = exit.o
+exit_LDADD = $(LDADD)
+exit_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@cbasic_OBJECTS = except.o cbasic.o
+@OR1K_EXCEPT_FALSE@cbasic_OBJECTS = cbasic.o
+cbasic_LDADD = $(LDADD)
+cbasic_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@local_global_OBJECTS = except.o local_global.o
+@OR1K_EXCEPT_FALSE@local_global_OBJECTS = local_global.o
+local_global_LDADD = $(LDADD)
+local_global_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mul_OBJECTS = except.o mul.o
+@OR1K_EXCEPT_FALSE@mul_OBJECTS = mul.o
+mul_LDADD = $(LDADD)
+mul_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mycompress_OBJECTS = except.o mycompress.o
+@OR1K_EXCEPT_FALSE@mycompress_OBJECTS = mycompress.o
+mycompress_LDADD = $(LDADD)
+mycompress_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@dhry_OBJECTS = except.o dhry.o
+@OR1K_EXCEPT_FALSE@dhry_OBJECTS = dhry.o
+dhry_LDADD = $(LDADD)
+dhry_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@functest_OBJECTS = except.o functest.o
+@OR1K_EXCEPT_FALSE@functest_OBJECTS = functest.o
+functest_LDADD = $(LDADD)
+functest_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mem_test_OBJECTS = except.o mem_test.o
+@OR1K_EXCEPT_FALSE@mem_test_OBJECTS = mem_test.o
+mem_test_LDADD = $(LDADD)
+mem_test_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@basic_OBJECTS = basic.o
+@OR1K_EXCEPT_FALSE@basic_OBJECTS =
+@OR1K_EXCEPT_TRUE@basic_DEPENDENCIES =
+@OR1K_EXCEPT_TRUE@cache_OBJECTS = except.o cache.o cache_asm.o
+@OR1K_EXCEPT_FALSE@cache_OBJECTS =
+cache_LDADD = $(LDADD)
+cache_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@cfg_OBJECTS = cfg.o
+@OR1K_EXCEPT_FALSE@cfg_OBJECTS =
+@OR1K_EXCEPT_TRUE@cfg_DEPENDENCIES =
+@OR1K_EXCEPT_TRUE@dmatest_OBJECTS = except.o dmatest.o
+@OR1K_EXCEPT_FALSE@dmatest_OBJECTS =
+dmatest_LDADD = $(LDADD)
+dmatest_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@eth_OBJECTS = except.o eth.o
+@OR1K_EXCEPT_FALSE@eth_OBJECTS =
+eth_LDADD = $(LDADD)
+eth_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mmu_OBJECTS = except.o mmu.o mmu_asm.o
+@OR1K_EXCEPT_FALSE@mmu_OBJECTS =
+mmu_LDADD = $(LDADD)
+mmu_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@except_test_OBJECTS = except_test_s.o except_test.o
+@OR1K_EXCEPT_FALSE@except_test_OBJECTS =
+except_test_LDADD = $(LDADD)
+except_test_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@int_test_OBJECTS = int_test.o
+@OR1K_EXCEPT_FALSE@int_test_OBJECTS =
+int_test_LDADD = $(LDADD)
+int_test_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@flag_OBJECTS = flag.o
+@OR1K_EXCEPT_FALSE@flag_OBJECTS =
+@OR1K_EXCEPT_TRUE@flag_DEPENDENCIES =
+@OR1K_EXCEPT_TRUE@fbtest_OBJECTS = except.o fbtest.o
+@OR1K_EXCEPT_FALSE@fbtest_OBJECTS =
+fbtest_LDADD = $(LDADD)
+fbtest_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@kbdtest_OBJECTS = except.o kbdtest.o
+@OR1K_EXCEPT_FALSE@kbdtest_OBJECTS =
+kbdtest_LDADD = $(LDADD)
+kbdtest_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@acv_uart_OBJECTS = except.o acv_uart.o
+@OR1K_EXCEPT_FALSE@acv_uart_OBJECTS =
+acv_uart_LDADD = $(LDADD)
+acv_uart_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@acv_gpio_OBJECTS = except.o acv_gpio.o
+@OR1K_EXCEPT_FALSE@acv_gpio_OBJECTS =
+acv_gpio_LDADD = $(LDADD)
+acv_gpio_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mc_dram_OBJECTS = except_mc.o mc_common.o mc_dram.o
+mc_dram_LDADD = $(LDADD)
+mc_dram_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mc_ssram_OBJECTS = except_mc.o mc_common.o mc_ssram.o
+mc_ssram_LDADD = $(LDADD)
+mc_ssram_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mc_async_OBJECTS = except_mc.o mc_common.o mc_async.o
+mc_async_LDADD = $(LDADD)
+mc_async_DEPENDENCIES = support/libsupport.a
+@OR1K_EXCEPT_TRUE@mc_sync_OBJECTS = except_mc.o mc_common.o mc_sync.o
+mc_sync_LDADD = $(LDADD)
+mc_sync_DEPENDENCIES = support/libsupport.a
+CFLAGS = @CFLAGS@
+COMPILE = $(CC) $(DEFS) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@
+DIST_COMMON = README COPYING Makefile.am Makefile.in TODO aclocal.m4 \
+config.sub configure configure.in
+
+
+DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
+
+TAR = gtar
+GZIP_ENV = --best
+DIST_SUBDIRS = support uos support
+DEP_FILES = .deps/acv_gpio.P .deps/acv_uart.P .deps/basic.P \
+.deps/cache.P .deps/cache_asm.P .deps/cbasic.P .deps/cfg.P .deps/dhry.P \
+.deps/dmatest.P .deps/eth.P .deps/except.P .deps/except_mc.P \
+.deps/except_test.P .deps/except_test_s.P .deps/exit.P .deps/fbtest.P \
+.deps/flag.P .deps/functest.P .deps/int_test.P .deps/kbdtest.P \
+.deps/local_global.P .deps/mc_async.P .deps/mc_common.P .deps/mc_dram.P \
+.deps/mc_ssram.P .deps/mc_sync.P .deps/mem_test.P .deps/mmu.P \
+.deps/mmu_asm.P .deps/mul.P .deps/mycompress.P
+SOURCES = $(exit_SOURCES) $(cbasic_SOURCES) $(local_global_SOURCES) $(mul_SOURCES) $(mycompress_SOURCES) $(dhry_SOURCES) $(functest_SOURCES) $(mem_test_SOURCES) $(basic_SOURCES) $(cache_SOURCES) $(cfg_SOURCES) $(dmatest_SOURCES) $(eth_SOURCES) $(mmu_SOURCES) $(except_test_SOURCES) $(int_test_SOURCES) $(flag_SOURCES) $(fbtest_SOURCES) $(kbdtest_SOURCES) $(acv_uart_SOURCES) $(acv_gpio_SOURCES) $(mc_dram_SOURCES) $(mc_ssram_SOURCES) $(mc_async_SOURCES) $(mc_sync_SOURCES)
+OBJECTS = $(exit_OBJECTS) $(cbasic_OBJECTS) $(local_global_OBJECTS) $(mul_OBJECTS) $(mycompress_OBJECTS) $(dhry_OBJECTS) $(functest_OBJECTS) $(mem_test_OBJECTS) $(basic_OBJECTS) $(cache_OBJECTS) $(cfg_OBJECTS) $(dmatest_OBJECTS) $(eth_OBJECTS) $(mmu_OBJECTS) $(except_test_OBJECTS) $(int_test_OBJECTS) $(flag_OBJECTS) $(fbtest_OBJECTS) $(kbdtest_OBJECTS) $(acv_uart_OBJECTS) $(acv_gpio_OBJECTS) $(mc_dram_OBJECTS) $(mc_ssram_OBJECTS) $(mc_async_OBJECTS) $(mc_sync_OBJECTS)
+
+all: all-redirect
+.SUFFIXES:
+.SUFFIXES: .S .c .o .s
+$(srcdir)/Makefile.in: Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4)
+ cd $(top_srcdir) && $(AUTOMAKE) --gnu Makefile
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status $(BUILT_SOURCES)
+ cd $(top_builddir) \
+ && CONFIG_FILES=$@ CONFIG_HEADERS= $(SHELL) ./config.status
+
+$(ACLOCAL_M4): configure.in
+ cd $(srcdir) && $(ACLOCAL)
+
+config.status: $(srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ $(SHELL) ./config.status --recheck
+$(srcdir)/configure: $(srcdir)/configure.in $(ACLOCAL_M4) $(CONFIGURE_DEPENDENCIES)
+ cd $(srcdir) && $(AUTOCONF)
+
+mostlyclean-binPROGRAMS:
+
+clean-binPROGRAMS:
+ -test -z "$(bin_PROGRAMS)" || rm -f $(bin_PROGRAMS)
+
+distclean-binPROGRAMS:
+
+maintainer-clean-binPROGRAMS:
+
+install-binPROGRAMS: $(bin_PROGRAMS)
+ @$(NORMAL_INSTALL)
+ $(mkinstalldirs) $(DESTDIR)$(bindir)
+ @list='$(bin_PROGRAMS)'; for p in $$list; do \
+ if test -f $$p; then \
+ echo " $(INSTALL_PROGRAM) $$p $(DESTDIR)$(bindir)/`echo $$p|sed 's/$(EXEEXT)$$//'|sed '$(transform)'|sed 's/$$/$(EXEEXT)/'`"; \
+ $(INSTALL_PROGRAM) $$p $(DESTDIR)$(bindir)/`echo $$p|sed 's/$(EXEEXT)$$//'|sed '$(transform)'|sed 's/$$/$(EXEEXT)/'`; \
+ else :; fi; \
+ done
+
+uninstall-binPROGRAMS:
+ @$(NORMAL_UNINSTALL)
+ list='$(bin_PROGRAMS)'; for p in $$list; do \
+ rm -f $(DESTDIR)$(bindir)/`echo $$p|sed 's/$(EXEEXT)$$//'|sed '$(transform)'|sed 's/$$/$(EXEEXT)/'`; \
+ done
+
+.s.o:
+ $(COMPILE) -c $<
+
+.S.o:
+ $(COMPILE) -c $<
+
+mostlyclean-compile:
+ -rm -f *.o core *.core
+
+clean-compile:
+
+distclean-compile:
+ -rm -f *.tab.c
+
+maintainer-clean-compile:
+
+exit: $(exit_OBJECTS) $(exit_DEPENDENCIES)
+ @rm -f exit
+ $(LINK) $(exit_LDFLAGS) $(exit_OBJECTS) $(exit_LDADD) $(LIBS)
+
+cbasic: $(cbasic_OBJECTS) $(cbasic_DEPENDENCIES)
+ @rm -f cbasic
+ $(LINK) $(cbasic_LDFLAGS) $(cbasic_OBJECTS) $(cbasic_LDADD) $(LIBS)
+
+local_global: $(local_global_OBJECTS) $(local_global_DEPENDENCIES)
+ @rm -f local_global
+ $(LINK) $(local_global_LDFLAGS) $(local_global_OBJECTS) $(local_global_LDADD) $(LIBS)
+
+mul: $(mul_OBJECTS) $(mul_DEPENDENCIES)
+ @rm -f mul
+ $(LINK) $(mul_LDFLAGS) $(mul_OBJECTS) $(mul_LDADD) $(LIBS)
+
+mycompress: $(mycompress_OBJECTS) $(mycompress_DEPENDENCIES)
+ @rm -f mycompress
+ $(LINK) $(mycompress_LDFLAGS) $(mycompress_OBJECTS) $(mycompress_LDADD) $(LIBS)
+
+dhry: $(dhry_OBJECTS) $(dhry_DEPENDENCIES)
+ @rm -f dhry
+ $(LINK) $(dhry_LDFLAGS) $(dhry_OBJECTS) $(dhry_LDADD) $(LIBS)
+
+functest: $(functest_OBJECTS) $(functest_DEPENDENCIES)
+ @rm -f functest
+ $(LINK) $(functest_LDFLAGS) $(functest_OBJECTS) $(functest_LDADD) $(LIBS)
+
+mem_test: $(mem_test_OBJECTS) $(mem_test_DEPENDENCIES)
+ @rm -f mem_test
+ $(LINK) $(mem_test_LDFLAGS) $(mem_test_OBJECTS) $(mem_test_LDADD) $(LIBS)
+
+basic: $(basic_OBJECTS) $(basic_DEPENDENCIES)
+ @rm -f basic
+ $(LINK) $(basic_LDFLAGS) $(basic_OBJECTS) $(basic_LDADD) $(LIBS)
+
+cache: $(cache_OBJECTS) $(cache_DEPENDENCIES)
+ @rm -f cache
+ $(LINK) $(cache_LDFLAGS) $(cache_OBJECTS) $(cache_LDADD) $(LIBS)
+
+cfg: $(cfg_OBJECTS) $(cfg_DEPENDENCIES)
+ @rm -f cfg
+ $(LINK) $(cfg_LDFLAGS) $(cfg_OBJECTS) $(cfg_LDADD) $(LIBS)
+
+dmatest: $(dmatest_OBJECTS) $(dmatest_DEPENDENCIES)
+ @rm -f dmatest
+ $(LINK) $(dmatest_LDFLAGS) $(dmatest_OBJECTS) $(dmatest_LDADD) $(LIBS)
+
+eth: $(eth_OBJECTS) $(eth_DEPENDENCIES)
+ @rm -f eth
+ $(LINK) $(eth_LDFLAGS) $(eth_OBJECTS) $(eth_LDADD) $(LIBS)
+
+mmu: $(mmu_OBJECTS) $(mmu_DEPENDENCIES)
+ @rm -f mmu
+ $(LINK) $(mmu_LDFLAGS) $(mmu_OBJECTS) $(mmu_LDADD) $(LIBS)
+
+except_test: $(except_test_OBJECTS) $(except_test_DEPENDENCIES)
+ @rm -f except_test
+ $(LINK) $(except_test_LDFLAGS) $(except_test_OBJECTS) $(except_test_LDADD) $(LIBS)
+
+int_test: $(int_test_OBJECTS) $(int_test_DEPENDENCIES)
+ @rm -f int_test
+ $(LINK) $(int_test_LDFLAGS) $(int_test_OBJECTS) $(int_test_LDADD) $(LIBS)
+
+flag: $(flag_OBJECTS) $(flag_DEPENDENCIES)
+ @rm -f flag
+ $(LINK) $(flag_LDFLAGS) $(flag_OBJECTS) $(flag_LDADD) $(LIBS)
+
+fbtest: $(fbtest_OBJECTS) $(fbtest_DEPENDENCIES)
+ @rm -f fbtest
+ $(LINK) $(fbtest_LDFLAGS) $(fbtest_OBJECTS) $(fbtest_LDADD) $(LIBS)
+
+kbdtest: $(kbdtest_OBJECTS) $(kbdtest_DEPENDENCIES)
+ @rm -f kbdtest
+ $(LINK) $(kbdtest_LDFLAGS) $(kbdtest_OBJECTS) $(kbdtest_LDADD) $(LIBS)
+
+acv_uart: $(acv_uart_OBJECTS) $(acv_uart_DEPENDENCIES)
+ @rm -f acv_uart
+ $(LINK) $(acv_uart_LDFLAGS) $(acv_uart_OBJECTS) $(acv_uart_LDADD) $(LIBS)
+
+acv_gpio: $(acv_gpio_OBJECTS) $(acv_gpio_DEPENDENCIES)
+ @rm -f acv_gpio
+ $(LINK) $(acv_gpio_LDFLAGS) $(acv_gpio_OBJECTS) $(acv_gpio_LDADD) $(LIBS)
+
+mc_dram: $(mc_dram_OBJECTS) $(mc_dram_DEPENDENCIES)
+ @rm -f mc_dram
+ $(LINK) $(mc_dram_LDFLAGS) $(mc_dram_OBJECTS) $(mc_dram_LDADD) $(LIBS)
+
+mc_ssram: $(mc_ssram_OBJECTS) $(mc_ssram_DEPENDENCIES)
+ @rm -f mc_ssram
+ $(LINK) $(mc_ssram_LDFLAGS) $(mc_ssram_OBJECTS) $(mc_ssram_LDADD) $(LIBS)
+
+mc_async: $(mc_async_OBJECTS) $(mc_async_DEPENDENCIES)
+ @rm -f mc_async
+ $(LINK) $(mc_async_LDFLAGS) $(mc_async_OBJECTS) $(mc_async_LDADD) $(LIBS)
+
+mc_sync: $(mc_sync_OBJECTS) $(mc_sync_DEPENDENCIES)
+ @rm -f mc_sync
+ $(LINK) $(mc_sync_LDFLAGS) $(mc_sync_OBJECTS) $(mc_sync_LDADD) $(LIBS)
+
+# This directory's subdirectories are mostly independent; you can cd
+# into them and run `make' without going through this Makefile.
+# To change the values of `make' variables: instead of editing Makefiles,
+# (1) if the variable is set in `config.status', edit `config.status'
+# (which will cause the Makefiles to be regenerated when you run `make');
+# (2) otherwise, pass the desired values on the `make' command line.
+
+@SET_MAKE@
+
+all-recursive install-data-recursive install-exec-recursive \
+installdirs-recursive install-recursive uninstall-recursive \
+check-recursive installcheck-recursive info-recursive dvi-recursive:
+ @set fnord $(MAKEFLAGS); amf=$$2; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ dot_seen=yes; \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
+ done; \
+ if test "$$dot_seen" = "no"; then \
+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+ fi; test -z "$$fail"
+
+mostlyclean-recursive clean-recursive distclean-recursive \
+maintainer-clean-recursive:
+ @set fnord $(MAKEFLAGS); amf=$$2; \
+ dot_seen=no; \
+ rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
+ rev="$$subdir $$rev"; \
+ test "$$subdir" = "." && dot_seen=yes; \
+ done; \
+ test "$$dot_seen" = "no" && rev=". $$rev"; \
+ target=`echo $@ | sed s/-recursive//`; \
+ for subdir in $$rev; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
+ local_target="$$target-am"; \
+ else \
+ local_target="$$target"; \
+ fi; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+ || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
+ done && test -z "$$fail"
+tags-recursive:
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ test "$$subdir" = . || (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) tags); \
+ done
+
+tags: TAGS
+
+ID: $(HEADERS) $(SOURCES) $(LISP)
+ list='$(SOURCES) $(HEADERS)'; \
+ unique=`for i in $$list; do echo $$i; done | \
+ awk ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ here=`pwd` && cd $(srcdir) \
+ && mkid -f$$here/ID $$unique $(LISP)
+
+TAGS: tags-recursive $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ if test "$$subdir" = .; then :; else \
+ test -f $$subdir/TAGS && tags="$$tags -i $$here/$$subdir/TAGS"; \
+ fi; \
+ done; \
+ list='$(SOURCES) $(HEADERS)'; \
+ unique=`for i in $$list; do echo $$i; done | \
+ awk ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ test -z "$(ETAGS_ARGS)$$unique$(LISP)$$tags" \
+ || (cd $(srcdir) && etags $(ETAGS_ARGS) $$tags $$unique $(LISP) -o $$here/TAGS)
+
+mostlyclean-tags:
+
+clean-tags:
+
+distclean-tags:
+ -rm -f TAGS ID
+
+maintainer-clean-tags:
+
+distdir = $(PACKAGE)-$(VERSION)
+top_distdir = $(distdir)
+
+# This target untars the dist file and tries a VPATH configuration. Then
+# it guarantees that the distribution is self-contained by making another
+# tarfile.
+distcheck: dist
+ -rm -rf $(distdir)
+ GZIP=$(GZIP_ENV) $(TAR) zxf $(distdir).tar.gz
+ mkdir $(distdir)/=build
+ mkdir $(distdir)/=inst
+ dc_install_base=`cd $(distdir)/=inst && pwd`; \
+ cd $(distdir)/=build \
+ && ../configure --srcdir=.. --prefix=$$dc_install_base \
+ && $(MAKE) $(AM_MAKEFLAGS) \
+ && $(MAKE) $(AM_MAKEFLAGS) dvi \
+ && $(MAKE) $(AM_MAKEFLAGS) check \
+ && $(MAKE) $(AM_MAKEFLAGS) install \
+ && $(MAKE) $(AM_MAKEFLAGS) installcheck \
+ && $(MAKE) $(AM_MAKEFLAGS) dist
+ -rm -rf $(distdir)
+ @banner="$(distdir).tar.gz is ready for distribution"; \
+ dashes=`echo "$$banner" | sed s/./=/g`; \
+ echo "$$dashes"; \
+ echo "$$banner"; \
+ echo "$$dashes"
+dist: distdir
+ -chmod -R a+r $(distdir)
+ GZIP=$(GZIP_ENV) $(TAR) chozf $(distdir).tar.gz $(distdir)
+ -rm -rf $(distdir)
+dist-all: distdir
+ -chmod -R a+r $(distdir)
+ GZIP=$(GZIP_ENV) $(TAR) chozf $(distdir).tar.gz $(distdir)
+ -rm -rf $(distdir)
+distdir: $(DISTFILES)
+ -rm -rf $(distdir)
+ mkdir $(distdir)
+ -chmod 777 $(distdir)
+ here=`cd $(top_builddir) && pwd`; \
+ top_distdir=`cd $(distdir) && pwd`; \
+ distdir=`cd $(distdir) && pwd`; \
+ cd $(top_srcdir) \
+ && $(AUTOMAKE) --include-deps --build-dir=$$here --srcdir-name=$(top_srcdir) --output-dir=$$top_distdir --gnu Makefile
+ @for file in $(DISTFILES); do \
+ d=$(srcdir); \
+ if test -d $$d/$$file; then \
+ cp -pr $$d/$$file $(distdir)/$$file; \
+ else \
+ test -f $(distdir)/$$file \
+ || ln $$d/$$file $(distdir)/$$file 2> /dev/null \
+ || cp -p $$d/$$file $(distdir)/$$file || :; \
+ fi; \
+ done
+ for subdir in $(DIST_SUBDIRS); do \
+ if test "$$subdir" = .; then :; else \
+ test -d $(distdir)/$$subdir \
+ || mkdir $(distdir)/$$subdir \
+ || exit 1; \
+ chmod 777 $(distdir)/$$subdir; \
+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) top_distdir=../$(distdir) distdir=../$(distdir)/$$subdir distdir) \
+ || exit 1; \
+ fi; \
+ done
+
+DEPS_MAGIC := $(shell mkdir .deps > /dev/null 2>&1 || :)
+
+-include $(DEP_FILES)
+
+mostlyclean-depend:
+
+clean-depend:
+
+distclean-depend:
+ -rm -rf .deps
+
+maintainer-clean-depend:
+
+%.o: %.c
+ @echo '$(COMPILE) -c $<'; \
+ $(COMPILE) -Wp,-MD,.deps/$(*F).pp -c $<
+ @-cp .deps/$(*F).pp .deps/$(*F).P; \
+ tr ' ' '\012' < .deps/$(*F).pp \
+ | sed -e 's/^\\$$//' -e '/^$$/ d' -e '/:$$/ d' -e 's/$$/ :/' \
+ >> .deps/$(*F).P; \
+ rm .deps/$(*F).pp
+
+%.lo: %.c
+ @echo '$(LTCOMPILE) -c $<'; \
+ $(LTCOMPILE) -Wp,-MD,.deps/$(*F).pp -c $<
+ @-sed -e 's/^\([^:]*\)\.o[ ]*:/\1.lo \1.o :/' \
+ < .deps/$(*F).pp > .deps/$(*F).P; \
+ tr ' ' '\012' < .deps/$(*F).pp \
+ | sed -e 's/^\\$$//' -e '/^$$/ d' -e '/:$$/ d' -e 's/$$/ :/' \
+ >> .deps/$(*F).P; \
+ rm -f .deps/$(*F).pp
+check-TESTS: $(TESTS)
+ @failed=0; all=0; \
+ srcdir=$(srcdir); export srcdir; \
+ for tst in $(TESTS); do \
+ if test -f $$tst; then dir=.; \
+ else dir="$(srcdir)"; fi; \
+ if $(TESTS_ENVIRONMENT) $$dir/$$tst; then \
+ all=`expr $$all + 1`; \
+ echo "PASS: $$tst"; \
+ elif test $$? -ne 77; then \
+ all=`expr $$all + 1`; \
+ failed=`expr $$failed + 1`; \
+ echo "FAIL: $$tst"; \
+ fi; \
+ done; \
+ if test "$$failed" -eq 0; then \
+ banner="All $$all tests passed"; \
+ else \
+ banner="$$failed of $$all tests failed"; \
+ fi; \
+ dashes=`echo "$$banner" | sed s/./=/g`; \
+ echo "$$dashes"; \
+ echo "$$banner"; \
+ echo "$$dashes"; \
+ test "$$failed" -eq 0
+info-am:
+info: info-recursive
+dvi-am:
+dvi: dvi-recursive
+check-am: all-am
+ $(MAKE) $(AM_MAKEFLAGS) check-TESTS
+check: check-recursive
+installcheck-am:
+installcheck: installcheck-recursive
+install-exec-am: install-binPROGRAMS
+install-exec: install-exec-recursive
+
+install-data-am:
+install-data: install-data-recursive
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+install: install-recursive
+uninstall-am: uninstall-binPROGRAMS
+uninstall: uninstall-recursive
+all-am: Makefile $(PROGRAMS)
+all-redirect: all-recursive
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) AM_INSTALL_PROGRAM_FLAGS=-s install
+installdirs: installdirs-recursive
+installdirs-am:
+ $(mkinstalldirs) $(DESTDIR)$(bindir)
+
+
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -rm -f Makefile $(CONFIG_CLEAN_FILES)
+ -rm -f config.cache config.log stamp-h stamp-h[0-9]*
+
+maintainer-clean-generic:
+mostlyclean-am: mostlyclean-binPROGRAMS mostlyclean-compile \
+ mostlyclean-tags mostlyclean-depend mostlyclean-generic
+
+mostlyclean: mostlyclean-recursive
+
+clean-am: clean-binPROGRAMS clean-compile clean-tags clean-depend \
+ clean-generic mostlyclean-am
+
+clean: clean-recursive
+
+distclean-am: distclean-binPROGRAMS distclean-compile distclean-tags \
+ distclean-depend distclean-generic clean-am
+
+distclean: distclean-recursive
+ -rm -f config.status
+
+maintainer-clean-am: maintainer-clean-binPROGRAMS \
+ maintainer-clean-compile maintainer-clean-tags \
+ maintainer-clean-depend maintainer-clean-generic \
+ distclean-am
+ @echo "This command is intended for maintainers to use;"
+ @echo "it deletes files that may require special tools to rebuild."
+
+maintainer-clean: maintainer-clean-recursive
+ -rm -f config.status
+
+.PHONY: mostlyclean-binPROGRAMS distclean-binPROGRAMS clean-binPROGRAMS \
+maintainer-clean-binPROGRAMS uninstall-binPROGRAMS install-binPROGRAMS \
+mostlyclean-compile distclean-compile clean-compile \
+maintainer-clean-compile install-data-recursive \
+uninstall-data-recursive install-exec-recursive \
+uninstall-exec-recursive installdirs-recursive uninstalldirs-recursive \
+all-recursive check-recursive installcheck-recursive info-recursive \
+dvi-recursive mostlyclean-recursive distclean-recursive clean-recursive \
+maintainer-clean-recursive tags tags-recursive mostlyclean-tags \
+distclean-tags clean-tags maintainer-clean-tags distdir \
+mostlyclean-depend distclean-depend clean-depend \
+maintainer-clean-depend check-TESTS info-am info dvi-am dvi check \
+check-am installcheck-am installcheck install-exec-am install-exec \
+install-data-am install-data install-am install uninstall-am uninstall \
+all-redirect all-am all installdirs-am installdirs mostlyclean-generic \
+distclean-generic clean-generic maintainer-clean-generic clean \
+mostlyclean distclean maintainer-clean
+
+
+again: clean all
+
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
Makefile.in
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: int_test.cfg
===================================================================
--- int_test.cfg (nonexistent)
+++ int_test.cfg (revision 1765)
@@ -0,0 +1,36 @@
+section memory
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 2
+ device 0
+ name = "RAM"
+ ce = 0
+ baseaddr = 0x40000000
+ size = 0x00200000
+ delayr = 2
+ delayw = 1
+ enddevice
+
+ device 1
+ name = "FLASH"
+ ce = 1
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 10
+ delayw = -1
+ enddevice
+end
+
+section sim
+ /* verbose = 1 */
+ debug = 0
+ profile = 0
+ prof_fn = "sim.profile"
+
+ history = 1
+ exe_log = 1
+ exe_log_type = software
+ exe_log_fn = "executed.log"
+ clkcycle = 4ns
+end
int_test.cfg
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: int_test.S
===================================================================
--- int_test.S (nonexistent)
+++ int_test.S (revision 1765)
@@ -0,0 +1,314 @@
+/* Within the test we'll use following global variables:
+
+ r16 interrupt counter
+ r17 current tick timer comparison counter
+ r18 sanity counter
+ r19 loop counter
+ r20 temp value of SR reg
+ r21 temp value of TTMR reg.
+ r23 RAM_START
+
+ r25-r31 used by int handler
+
+ The test do the following:
+ We set up the tick timer to trigger once and then we trigger interrupts incrementally
+ on every cycle in the specified test program; on interrupt handler we check if data computed
+ so far exactly matches precalculated values. If interrupt has returned incorreclty, we can
+ detect this using assertion routine at the end.
+*/
+
+#include "spr_defs.h"
+#define RAM_START 0x40000000
+
+.section .except
+.org 0x100
+ l.j _main
+ l.nop
+
+.org 0x500
+#
+# Tick timer exception handler
+#
+
+ l.addi r31,r3,0
+# get interrupted program pc
+ l.mfspr r25,r0,SPR_EPCR_BASE
+
+# calculate instruction address
+ l.movhi r26,hi(_ie_start)
+ l.ori r26,r26,lo(_ie_start)
+ l.addi r3,r25,0 #print insn index
+ l.nop 2
+ l.sub r25,r25,r26
+ l.addi r3,r25,0 #print insn index
+ l.nop 2
+
+ l.addi r3,r31,0 # restore r3
+ l.sfeqi r25, 0x00
+ l.bf _i00
+ l.sfeqi r25, 0x04
+ l.bf _i04
+ l.sfeqi r25, 0x08
+ l.bf _i08
+ l.sfeqi r25, 0x0c
+ l.bf _i0c
+ l.sfeqi r25, 0x10
+ l.bf _i10
+ l.sfeqi r25, 0x14
+ l.bf _i14
+ l.sfeqi r25, 0x18
+ l.bf _i18
+ l.sfeqi r25, 0x1c
+ l.bf _i1c
+ l.sfeqi r25, 0x20
+ l.bf _i20
+ l.sfeqi r25, 0x24
+ l.bf _i24
+ l.sfeqi r25, 0x28
+ l.bf _i28
+ l.sfeqi r25, 0x2c
+ l.bf _i2c
+ l.sfeqi r25, 0x30
+ l.bf _i30
+ l.sfeqi r25, 0x34
+ l.bf _i34
+ l.sfeqi r25, 0x38
+ l.bf _i38
+ l.nop
+
+# value not defined
+_die:
+ l.nop 2 #print r3
+
+ l.addi r3,r0,0xeeee
+ l.nop 2
+ l.addi r3,r0,1
+ l.nop 1
+1:
+ l.j 1b
+ l.nop
+
+.section .text
+_main:
+ l.nop
+ l.addi r3,r0,SPR_SR_SM
+ l.mtspr r0,r3,SPR_SR
+ l.nop
+
+#
+# set tick counter to initial 3 cycles
+#
+ l.addi r16,r0,0
+ l.addi r17,r0,1
+ l.addi r18,r0,0
+ l.addi r19,r0,0
+ l.addi r22,r0,0
+
+ l.movhi r23,hi(RAM_START)
+ l.ori r23,r23,lo(RAM_START)
+
+# Set r20 to hold enable tick exception
+ l.mfspr r20,r0,SPR_SR
+ l.ori r20,r20,SPR_SR_SM|SPR_SR_TEE|SPR_SR_F
+
+# Set r21 to hold value of TTMR
+ l.movhi r5,hi(SPR_TTMR_SR | SPR_TTMR_IE)
+ l.add r21,r5,r17
+
+#
+# MAIN LOOP
+#
+_main_loop:
+# reinitialize memory and registers
+ l.addi r3,r0,0xaaaa
+ l.addi r9,r0,0xbbbb
+ l.sw 0(r23),r3
+ l.sw 4(r23),r9
+ l.sw 8(r23),r3
+
+# Reinitializes tick timer
+ l.addi r17,r17,1
+ l.mtspr r0,r0,SPR_TTCR # set TTCR
+ l.mtspr r0,r21,SPR_TTMR # set TTMR
+ l.mtspr r0,r0,SPR_TTCR # set TTCR
+ l.addi r21,r21,1
+
+# Enable exceptions and interrupts
+ l.mtspr r0,r20,SPR_SR # set SR
+
+##### TEST CODE #####
+_ie_start:
+ l.movhi r3,0x1234 #00
+ l.sw 0(r23),r3 #04
+ l.movhi r3,hi(RAM_START) #08
+ l.lwz r3,0(r3) #0c
+ l.movhi r3,hi(RAM_START) #10
+ l.addi r3,r3,4 #14
+ l.j 1f #18
+ l.lwz r3,0(r3) #1c
+ l.addi r3,r3,1 #20
+1:
+ l.sfeqi r3,0xdead #24
+ l.jal 2f #28
+ l.addi r3,r0,0x5678 #2c
+
+_return_addr:
+2:
+ l.bf _die #30
+ l.sw 8(r23),r3 #34
+_ie_end:
+ l.nop #38
+##### END OF TEST CODE #####
+
+# do some testing
+
+ l.j _main_loop
+ l.nop
+
+_i00:
+ l.sfeqi r3,0xaaaa
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i04:
+ l.movhi r26,0x1234
+ l.sfeq r3,r26
+ l.bnf _die
+ l.nop
+ l.lwz r26,0(r23)
+ l.sfeqi r26,0xaaaa
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i08:
+ l.movhi r26,0x1234
+ l.sfeq r3,r26
+ l.bnf _die
+ l.nop
+ l.lwz r27,0(r23)
+ l.sfeq r27,r26
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i0c:
+ l.sfeq r3,r23
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i10:
+ l.movhi r26,0x1234
+ l.sfeq r26,r3
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i14:
+ l.sfeq r3,r23
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i18:
+ l.addi r26,r23,4
+ l.sfeq r3,r26
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i1c:
+ l.j _die
+ l.nop
+_i20:
+ l.j _die
+ l.nop
+_i24:
+ l.mfspr r26,r0,SPR_ESR_BASE
+ l.addi r30,r3,0
+ l.addi r3,r26,0
+ l.nop 2
+ l.addi r3,r30,0
+ l.andi r26,r26,SPR_SR_F
+ l.sfeq r26,r0
+ l.bnf _die
+ l.nop
+ l.sfeqi r3,0xbbbb
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i28:
+ l.mfspr r26,r0,SPR_ESR_BASE
+ l.addi r30,r3,0
+ l.addi r3,r26,0
+ l.nop 2
+ l.addi r3,r30,0
+ l.andi r26,r26,SPR_SR_F
+ l.sfeq r26,r0
+ l.bnf _die
+ l.nop
+ l.sfeqi r22,1
+ l.bf _resume
+ l.addi r22,r0,1
+ l.sfeqi r9,0xbbbb
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i2c:
+ l.movhi r26,hi(_return_addr)
+ l.ori r26,r26,lo(_return_addr)
+ l.sfeq r9,r26
+ l.bnf _die
+ l.nop
+ l.sfeqi r3,0xbbbb
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i30:
+ l.sfeqi r3,0x5678
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i34:
+ l.sfeqi r3,0x5678
+ l.bnf _die
+ l.nop
+ l.lwz r26,8(r23)
+ l.sfeqi r26,0xaaaa
+ l.bnf _die
+ l.nop
+ l.j _resume
+ l.nop
+_i38:
+ l.lwz r26,8(r23)
+ l.sfeqi r26,0x5678
+ l.bnf _die
+ l.nop
+#
+# mark finished ok
+#
+ l.movhi r3,hi(0xdeaddead)
+ l.ori r3,r3,lo(0xdeaddead)
+ l.nop 2
+ l.addi r3,r0,0
+ l.nop 1
+_ok:
+ l.j _ok
+ l.nop
+
+_resume:
+ l.mfspr r27,r0,SPR_ESR_BASE
+ l.addi r26,r0,SPR_SR_TEE
+ l.addi r28,r0,-1
+ l.xor r26,r26,r28
+ l.and r26,r26,r27
+ l.mtspr r0,r26,SPR_ESR_BASE
+
+ l.rfe
+ l.addi r3,r3,5 # should not be executed
int_test.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: Makefile.am
===================================================================
--- Makefile.am (nonexistent)
+++ Makefile.am (revision 1765)
@@ -0,0 +1,143 @@
+## Makefile for or1ksim testsuite
+## (c) Marko Mlinar, 2001
+## To add new test, edit between marked areas only
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+
+################### Tests #####################
+# tests in this directory
+OR1K_TESTS = basic cache cfg dmatest eth mmu except_test int_test flag fbtest kbdtest
+IND_TESTS = exit cbasic local_global mul mycompress dhry functest mem_test
+# inst_set_test
+ACV_TESTS = acv_uart acv_gpio
+MC_TESTS = mc_dram mc_ssram mc_async mc_sync
+# Subdirectory tests
+SUB_TESTS =
+OR1K_SUB_TESTS = uos
+###############################################
+
+ALL_TESTS = $(IND_TESTS) $(OR1K_TESTS) $(ACV_TESTS) $(MC_TESTS)
+TESTS = $(IND_TESTS) $(OR1K_TESTS)
+bin_PROGRAMS = $(ALL_TESTS)
+
+######### Platform Independent Tests ##########
+exit_SOURCES = $(OR1K_SUPPORT_S) support.h exit.c
+cbasic_SOURCES = $(OR1K_SUPPORT_S) support.h cbasic.c
+local_global_SOURCES = $(OR1K_SUPPORT_S) support.h local_global.c
+mul_SOURCES = $(OR1K_SUPPORT_S) support.h mul.c
+dhry_SOURCES = $(OR1K_SUPPORT_S) support.h dhry.h dhry.c
+mycompress_SOURCES = $(OR1K_SUPPORT_S) support.h mycompress.c
+functest_SOURCES = $(OR1K_SUPPORT_S) support.h functest.c
+mem_test_SOURCES = $(OR1K_SUPPORT_S) support.h mem_test.c
+inst_set_test_SOURCES = $(OR1K_SUPPORT_S) support.h inst_set_test.c
+###############################################
+
+if OR1K_EXCEPT
+
+exit_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+cbasic_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+local_global_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+mul_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+dhry_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+mycompress_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+functest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+mem_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+inst_set_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+
+######### MC Tests ############################
+mc_dram_SOURCES = except_mc.S mc_common.h mc_common.c mc_dram.h mc_dram.c
+mc_dram_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+mc_ssram_SOURCES = except_mc.S mc_common.h mc_common.c mc_ssramh mc_ssram.c
+mc_ssram_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+mc_async_SOURCES = except_mc.S mc_common.h mc_common.c mc_async.h mc_async.c
+mc_async_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+mc_sync_SOURCES = except_mc.S mc_common.h mc_common.c mc_sync.h mc_sync.c
+mc_sync_LDFLAGS = -T$(OR1K_SRCDIR)except_mc.ld
+###############################################
+
+####### Platform Dependent Tests - OR1K ########
+basic_SOURCES = basic.S spr_defs.h
+basic_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+basic_LDADD =
+flag_SOURCES = flag.S spr_defs.h
+flag_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+flag_LDADD =
+cache_SOURCES = $(OR1K_SUPPORT_S) support.h cache.c cache_asm.S
+cache_LDFLAGS = -T$(OR1K_SRCDIR)/cache.ld
+cfg_SOURCES = cfg.S spr_defs.h
+cfg_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+cfg_LDADD =
+dmatest_SOURCES = $(OR1K_SUPPORT_S) support.h dmatest.c
+dmatest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+eth_SOURCES = $(OR1K_SUPPORT_S) support.h eth.c
+eth_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+acv_uart_SOURCES = $(OR1K_SUPPORT_S) support.h acv_uart.c
+acv_uart_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+acv_gpio_SOURCES = $(OR1K_SUPPORT_S) support.h acv_gpio.c
+acv_gpio_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+mmu_SOURCES = $(OR1K_SUPPORT_S) support.h mmu.c mmu_asm.S
+mmu_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+except_test_SOURCES = except_test_s.S except_test.c spr_defs.h
+except_test_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+int_test_SOURCES = spr_defs.h int_test.S
+int_test_LDFLAGS = -T$(OR1K_SRCDIR)/xess.ld
+fbtest_SOURCES = $(OR1K_SUPPORT_S) support.h fbtest.c
+fbtest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+kbdtest_SOURCES = $(OR1K_SUPPORT_S) support.h kbdtest.c
+kbdtest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
+################################################
+
+else
+
+##### Platform Dependent Tests - not OR1K #####
+basic_SOURCES =
+flag_SOURCES =
+cache_SOURCES =
+cfg_SOURCES =
+dmatest_SOURCES =
+eth_SOURCES =
+acv_uart_SOURCES =
+acv_gpio_SOURCES =
+mmu_SOURCES =
+except_test_SOURCES =
+int_test_SOURCES =
+fbtest_SOURCES =
+kbdtest_SOURCES =
+###############################################
+
+endif
+
+## Neccessary stuff
+
+if OR1K_EXCEPT
+SUBDIRS = support $(SUB_TESTS) $(OR1K_SUB_TESTS)
+else
+SUBDIRS = support $(SUB_TESTS)
+endif
+
+if OR1K_EXCEPT
+OR1K_SUPPORT_S = except.S
+else
+OR1K_SUPPORT_S =
+endif
+
+LDADD = support/libsupport.a
+LDFLAGS =
+TESTS_ENVIRONMENT = $(SHELL) ${top_srcdir}/test $(TESTS_ENV)
+
+again: clean all
Makefile.am
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: except_test.cfg
===================================================================
--- except_test.cfg (nonexistent)
+++ except_test.cfg (revision 1765)
@@ -0,0 +1,69 @@
+section memory
+ /*random_seed = 12345
+ type = random*/
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 3
+ device 0
+ name = "RAM1"
+ ce = 0
+ baseaddr = 0x40000000
+ size = 0x00200000
+ delayr = 1
+ delayw = 2
+ enddevice
+
+ device 1
+ name = "FLASH"
+ ce = 1
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 10
+ delayw = -1
+ enddevice
+
+ device 2
+ name = "RAM2"
+ ce = 2
+ baseaddr = 0x80000000
+ size = 0x00200000
+ delayr = 1
+ delayw = 2
+ enddevice
+end
+
+section immu
+ enabled = 1
+ nsets = 32
+ nways = 1
+ pagesize = 8192
+end
+
+section dmmu
+ enabled = 1
+ nsets = 32
+ nways = 1
+ pagesize = 8192
+end
+
+section ic
+ enabled = 0
+ nsets = 512
+ nways = 1
+ blocksize = 16
+end
+
+section dc
+ enabled = 0
+ nsets = 512
+ nways = 1
+ blocksize = 16
+end
+
+section sim
+ history = 1
+ exe_log = 1
+ exe_log_fn = "executed.log"
+ clkcycle = 4ns
+end
Index: default.cfg
===================================================================
--- default.cfg (nonexistent)
+++ default.cfg (revision 1765)
@@ -0,0 +1,85 @@
+/* default.cfg -- Simulator testbench default configuration script file
+ Copyright (C) 2001, Marko Mlinar, markom@opencores.org
+
+This file is part of OpenRISC 1000 Architectural Simulator.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+section memory
+ /*random_seed = 12345
+ type = random*/
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 2
+ device 0
+ name = "RAM"
+ ce = 0
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 10
+ delayw = -1
+ enddevice
+
+ device 1
+ name = "FLASH"
+ ce = 1
+ baseaddr = 0x40000000
+ size = 0x00200000
+ delayr = 2
+ delayw = 4
+ enddevice
+end
+
+section cpu
+ ver = 0x1200
+ rev = 0x0001
+ /* upr = */
+ superscalar = 0
+ hazards = 0
+ dependstats = 0
+end
+
+section bpb
+ enabled = 0
+ btic = 0
+end
+
+section debug
+ /*enabled = 0
+ gdb_enabled = 0*/
+ server_port = 9999
+end
+
+section sim
+ debug = 0
+ profile = 0
+ prof_fn = "sim.profile"
+
+ exe_log = 0
+ exe_log_type = software
+ exe_log_fn = "executed.log"
+end
+
+section mc
+ enabled = 0
+ baseaddr = 0xa0000000
+ POC = 0x00000008 /* Power on configuration register */
+end
+
+section VAPI
+ enabled = 0
+ server_port = 9998
+end
default.cfg
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: dmatest.cfg
===================================================================
--- dmatest.cfg (nonexistent)
+++ dmatest.cfg (revision 1765)
@@ -0,0 +1,40 @@
+section memory
+ memory_table_file = "defaultmem.cfg"
+ /*random_seed = 12345
+ type = random*/
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 2
+ device 0
+ name = "RAM"
+ ce = 0
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 10
+ delayw = -1
+ enddevice
+
+ device 1
+ name = "FLASH"
+ ce = 1
+ baseaddr = 0x40000000
+ size = 0x00200000
+ delayr = 2
+ delayw = 4
+ enddevice
+end
+
+section dma
+ ndmas = 1
+
+ device 0
+ baseaddr = 0x90000000
+ irq = 4
+ enddevice
+end
+
+section sim
+ debug = 4
+ verbose = 0
+end
dmatest.cfg
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: dhry.c
===================================================================
--- dhry.c (nonexistent)
+++ dhry.c (revision 1765)
@@ -0,0 +1,726 @@
+/*
+ ****************************************************************************
+ *
+ * "DHRYSTONE" Benchmark Program
+ * -----------------------------
+ *
+ * Version: C, Version 2.1
+ *
+ * File: dhry_1.c (part 2 of 3)
+ *
+ * Date: May 25, 1988
+ *
+ * Author: Reinhold P. Weicker
+ *
+ ****************************************************************************
+ */
+#include "support.h"
+#include "dhry.h"
+
+#define NUM_RUNS (20)
+#define DLX_FREQ 200 /* in MHz */
+#define PROC_6 0
+
+#ifndef strcpy
+char *strcpy (char *dst0, char *src0)
+{
+ char *s = dst0;
+
+ while ((*dst0++ = *src0++));
+
+ return s;
+}
+#endif
+
+#ifndef strcmp
+int strcmp (const char *s1, const char *s2)
+{
+ while (*s1 && *s2 && *s1 == *s2) {
+ s1++;
+ s2++;
+ }
+ return (*(unsigned char *) s1) - (*(unsigned char *) s2);
+}
+#endif
+
+#define DETECTNULL(X) (((X) - 0x01010101) & ~(X) & 0x80808080)
+#define UNALIGNED(X, Y) \
+ (((long)X & (sizeof (long) - 1)) | ((long)Y & (sizeof (long) - 1)))
+
+
+/* Global Variables: */
+
+Rec_Pointer Ptr_Glob,
+ Next_Ptr_Glob;
+int Int_Glob;
+Boolean Bool_Glob;
+char Ch_1_Glob,
+ Ch_2_Glob;
+int Arr_1_Glob [50];
+int Arr_2_Glob [50] [50];
+
+
+ /* forward declaration necessary since Enumeration may not simply be int */
+
+#ifndef REG
+ Boolean Reg = false;
+#define REG
+ /* REG becomes defined as empty */
+ /* i.e. no register variables */
+#else
+ Boolean Reg = true;
+#endif
+
+/* variables for time measurement: */
+
+#if DLX || OR1K
+#define Too_Small_Time DLX_FREQ
+#else
+#define Too_Small_Time 1
+#endif
+
+#define TIMER0 0
+#define TIMER1 1
+
+
+
+
+
+unsigned int Begin_Time,
+ End_Time,
+ User_Time,
+ Microseconds,
+ Dhrystones_Per_Second;
+
+/* end of variables for time measurement */
+
+
+void Proc_1(REG Rec_Pointer Ptr_Val_Par);
+void Proc_2(One_Fifty *Int_Par_Ref);
+void Proc_3(Rec_Pointer *Ptr_Ref_Par);
+void Proc_4();
+void Proc_5();
+void Proc_6(
+ Enumeration Enum_Val_Par,
+ Enumeration *Enum_Ref_Par);
+void Proc_7(
+ One_Fifty Int_1_Par_Val,
+ One_Fifty Int_2_Par_Val,
+ One_Fifty *Int_Par_Ref);
+void Proc_8(
+ Arr_1_Dim Arr_1_Par_Ref,
+ Arr_2_Dim Arr_2_Par_Ref,
+ int Int_1_Par_Val,
+ int Int_2_Par_Val);
+Enumeration Func_1(Capital_Letter Ch_1_Par_Val,
+ Capital_Letter Ch_2_Par_Val);
+Boolean Func_2(Str_30 Str_1_Par_Ref, Str_30 Str_2_Par_Ref);
+Boolean Func_3(Enumeration Enum_Par_Val);
+
+int main ()
+/*****/
+
+ /* main program, corresponds to procedures */
+ /* Main and Proc_0 in the Ada version */
+{
+ One_Fifty Int_1_Loc;
+ REG One_Fifty Int_2_Loc;
+ One_Fifty Int_3_Loc;
+ REG char Ch_Index;
+ Enumeration Enum_Loc;
+ Str_30 Str_1_Loc;
+ Str_30 Str_2_Loc;
+ REG int Run_Index;
+ REG int Number_Of_Runs;
+ Rec_Type x, y;
+
+ /* Initializations */
+
+ Next_Ptr_Glob = (Rec_Pointer) &x;
+ Ptr_Glob = (Rec_Pointer) &y;
+
+ Ptr_Glob->Ptr_Comp = Next_Ptr_Glob;
+ Ptr_Glob->Discr = Ident_1;
+ Ptr_Glob->variant.var_1.Enum_Comp = Ident_3;
+ Ptr_Glob->variant.var_1.Int_Comp = 40;
+ strcpy (Ptr_Glob->variant.var_1.Str_Comp,
+ "DHRYSTONE PROGRAM, SOME STRING");
+ strcpy (Str_1_Loc, "DHRYSTONE PROGRAM, 1'ST STRING");
+
+ Arr_2_Glob [8][7] = 10;
+ /* Was missing in published program. Without this statement, */
+ /* Arr_2_Glob [8][7] would have an undefined value. */
+ /* Warning: With 16-Bit processors and Number_Of_Runs > 32000, */
+ /* overflow may occur for this array element. */
+
+/* Initalize Data and Instruction Cache */
+
+
+/* printf ("\n");
+ printf ("Dhrystone Benchmark, Version 2.1 (Language: C)\n");
+ printf ("\n");
+ if (Reg)
+ {
+ printf ("Program compiled with 'register' attribute\n");
+ printf ("\n");
+ }
+ else
+ {
+ printf ("Program compiled without 'register' attribute\n");
+ printf ("\n");
+ }
+ printf ("Please give the number of runs through the benchmark: ");
+ */
+ {
+ int n;
+ /* scanf ("%d", &n);
+ */
+ n = NUM_RUNS;
+ Number_Of_Runs = n;
+ }
+ printf ("\n");
+
+ printf ("Execution starts, %d runs through Dhrystone\n", Number_Of_Runs);
+
+
+ /***************/
+ /* Start timer */
+ /***************/
+
+/* printf("%d", my_test2(Number_Of_Runs));*/
+ start_timer(TIMER0);
+ Begin_Time = read_timer(TIMER0);
+
+ for (Run_Index = 1; Run_Index <= Number_Of_Runs; ++Run_Index)
+ {
+
+ report(1);
+ report(Run_Index);
+ Proc_5();
+ report(2);
+ Proc_4();
+ report(3);
+ /* Ch_1_Glob == 'A', Ch_2_Glob == 'B', Bool_Glob == true */
+ Int_1_Loc = 2;
+ Int_2_Loc = 3;
+ strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 2'ND STRING");
+ Enum_Loc = Ident_2;
+ report(0x31);
+ report((unsigned long)Str_1_Loc);
+ report((unsigned long)Str_2_Loc);
+
+ Bool_Glob = ! Func_2 (Str_1_Loc, Str_2_Loc);
+ /* Bool_Glob == 1 */
+ report(4);
+ while (Int_1_Loc < Int_2_Loc) /* loop body executed once */
+ {
+ Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc;
+ /* Int_3_Loc == 7 */
+ Proc_7 (Int_1_Loc, Int_2_Loc, &Int_3_Loc);
+ /* Int_3_Loc == 7 */
+ Int_1_Loc += 1;
+ } /* while */
+ report(5);
+ /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */
+#if DBG
+ printf("a) Int_1_Loc: %x\n", Int_1_Loc);
+ printf("a) Int_2_Loc: %x\n", Int_2_Loc);
+ printf("a) Int_3_Loc: %x\n\n", Int_3_Loc);
+#endif
+ Proc_8 (Arr_1_Glob, Arr_2_Glob, Int_1_Loc, Int_3_Loc);
+ /* Int_Glob == 5 */
+#if DBG
+ printf("b) Int_1_Loc: %x\n", Int_1_Loc);
+ printf("b) Int_2_Loc: %x\n", Int_2_Loc);
+ printf("b) Int_3_Loc: %x\n\n", Int_3_Loc);
+#endif
+ report(6);
+
+ Proc_1 (Ptr_Glob);
+#if DBG
+ printf("c) Int_1_Loc: %x\n", Int_1_Loc);
+ printf("c) Int_2_Loc: %x\n", Int_2_Loc);
+ printf("c) Int_3_Loc: %x\n\n", Int_3_Loc);
+#endif
+ report(7);
+
+ for (Ch_Index = 'A'; Ch_Index <= Ch_2_Glob; ++Ch_Index)
+ /* loop body executed twice */
+ {
+ if (Enum_Loc == Func_1 (Ch_Index, 'C'))
+ /* then, not executed */
+ {
+ Proc_6 (Ident_1, &Enum_Loc);
+ strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 3'RD STRING");
+ Int_2_Loc = Run_Index;
+ Int_Glob = Run_Index;
+#if DBG
+ printf("d) Int_1_Loc: %x\n", Int_1_Loc);
+ printf("d) Int_2_Loc: %x\n", Int_2_Loc);
+ printf("d) Int_3_Loc: %x\n\n", Int_3_Loc);
+#endif
+ }
+ }
+ report(8);
+
+ /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */
+#if DBG
+ printf("e) Int_1_Loc: %x\n", Int_1_Loc);
+ printf("e) Int_2_Loc: %x\n", Int_2_Loc);
+ printf("e) Int_3_Loc: %x\n", Int_3_Loc);
+ printf("e) Ch_1_Glob: %c\n\n", Ch_1_Glob);
+#endif
+ Int_2_Loc = Int_2_Loc * Int_1_Loc;
+ Int_1_Loc = Int_2_Loc / Int_3_Loc;
+ Int_2_Loc = 7 * (Int_2_Loc - Int_3_Loc) - Int_1_Loc;
+ /* Int_1_Loc == 1, Int_2_Loc == 13, Int_3_Loc == 7 */
+ Proc_2 (&Int_1_Loc);
+ report(9);
+
+ /* Int_1_Loc == 5 */
+#if DBG
+ printf("f) Int_1_Loc: %x\n", Int_1_Loc);
+ printf("f) Int_2_Loc: %x\n", Int_2_Loc);
+ printf("f) Int_3_Loc: %x\n\n", Int_3_Loc);
+#endif
+
+ } /* loop "for Run_Index" */
+
+ /**************/
+ /* Stop timer */
+ /**************/
+
+ End_Time = read_timer(TIMER0);
+
+/* printf ("Execution ends\n");
+ printf ("\n");
+ printf ("Final values of the variables used in the benchmark:\n");
+ printf ("\n");
+ printf ("Int_Glob: %d\n", Int_Glob);
+ printf (" should be: %d\n", 5);
+ printf ("Bool_Glob: %d\n", Bool_Glob);
+ printf (" should be: %d\n", 1);
+ printf ("Ch_1_Glob: %c\n", Ch_1_Glob);
+ printf (" should be: %c\n", 'A');
+ printf ("Ch_2_Glob: %c\n", Ch_2_Glob);
+ printf (" should be: %c\n", 'B');
+ printf ("Arr_1_Glob[8]: %d\n", Arr_1_Glob[8]);
+ printf (" should be: %d\n", 7);
+ printf ("Arr_2_Glob[8][7]: %d\n", Arr_2_Glob[8][7]);
+ printf (" should be: Number_Of_Runs + 10\n");
+ printf ("Ptr_Glob->\n");
+ printf (" Ptr_Comp: %d\n", (int) Ptr_Glob->Ptr_Comp);
+ printf (" should be: (implementation-dependent)\n");
+ printf (" Discr: %d\n", Ptr_Glob->Discr);
+ printf (" should be: %d\n", 0);
+ printf (" Enum_Comp: %d\n", Ptr_Glob->variant.var_1.Enum_Comp);
+ printf (" should be: %d\n", 2);
+ printf (" Int_Comp: %d\n", Ptr_Glob->variant.var_1.Int_Comp);
+ printf (" should be: %d\n", 17);
+ printf (" Str_Comp: %s\n", Ptr_Glob->variant.var_1.Str_Comp);
+ printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n");
+ printf ("Next_Ptr_Glob->\n");
+ printf (" Ptr_Comp: %d\n", (int) Next_Ptr_Glob->Ptr_Comp);
+ printf (" should be: (implementation-dependent), same as above\n");
+ printf (" Discr: %d\n", Next_Ptr_Glob->Discr);
+ printf (" should be: %d\n", 0);
+ printf (" Enum_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Enum_Comp);
+ printf (" should be: %d\n", 1);
+ printf (" Int_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Int_Comp);
+ printf (" should be: %d\n", 18);
+ printf (" Str_Comp: %s\n",
+ Next_Ptr_Glob->variant.var_1.Str_Comp);
+ printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n");
+ printf ("Int_1_Loc: %d\n", Int_1_Loc);
+ printf (" should be: %d\n", 5);
+ printf ("Int_2_Loc: %d\n", Int_2_Loc);
+ printf (" should be: %d\n", 13);
+ printf ("Int_3_Loc: %d\n", Int_3_Loc);
+ printf (" should be: %d\n", 7);
+ printf ("Enum_Loc: %d\n", Enum_Loc);
+ printf (" should be: %d\n", 1);
+ printf ("Str_1_Loc: %s\n", Str_1_Loc);
+ printf (" should be: DHRYSTONE PROGRAM, 1'ST STRING\n");
+ printf ("Str_2_Loc: %s\n", Str_2_Loc);
+ printf (" should be: DHRYSTONE PROGRAM, 2'ND STRING\n");
+
+*/
+
+
+ User_Time = End_Time - Begin_Time;
+ /* microseconds */
+
+ printf("Begin Time = %d\n",Begin_Time);
+ printf("End Time = %d\n",End_Time);
+
+
+ if (User_Time < Too_Small_Time)
+ {
+ printf ("Measured time too small to obtain meaningful results\n");
+ printf ("Please increase number of runs\n");
+ printf ("\n");
+ }
+ else
+ {
+#if DLX || OR1K
+ User_Time /= DLX_FREQ;
+#if DLX
+ printf("DLX ");
+#else
+#if OR1K
+ printf("OR1K ");
+#else
+ printf("Unknown CPU ");
+#endif
+#endif
+ printf("at %u MHz ", DLX_FREQ);
+ if (PROC_6)
+ printf("(+PROC_6)");
+ printf("\n");
+#endif
+ Microseconds = User_Time / Number_Of_Runs;
+ Dhrystones_Per_Second = Number_Of_Runs * 1000 / User_Time;
+ printf ("Microseconds for one run through Dhrystone: ");
+ printf ("%d us / %d runs\n", User_Time,Number_Of_Runs);
+ printf ("Dhrystones per Second: ");
+ printf ("%d \n", Dhrystones_Per_Second);
+ }
+ report (0xdeaddead);
+ return 0;
+}
+
+
+void Proc_1(Ptr_Val_Par)
+/******************/
+
+ REG Rec_Pointer Ptr_Val_Par;
+ /* executed once */
+{
+ REG Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp;
+ /* == Ptr_Glob_Next */
+ /* Local variable, initialized with Ptr_Val_Par->Ptr_Comp, */
+ /* corresponds to "rename" in Ada, "with" in Pascal */
+
+ report(0x20010);
+
+ structassign(*Ptr_Val_Par->Ptr_Comp, *Ptr_Glob);
+ Ptr_Val_Par->variant.var_1.Int_Comp = 5;
+ Next_Record->variant.var_1.Int_Comp
+ = Ptr_Val_Par->variant.var_1.Int_Comp;
+ Next_Record->Ptr_Comp = Ptr_Val_Par->Ptr_Comp;
+ Proc_3(&Next_Record->Ptr_Comp);
+ report(0x20011);
+ /*
+ * Ptr_Val_Par->Ptr_Comp->Ptr_Comp == Ptr_Glob->Ptr_Comp
+ */
+ if (Next_Record->Discr == Ident_1)
+ /* then, executed */
+ {
+ Next_Record->variant.var_1.Int_Comp = 6;
+ Proc_6(Ptr_Val_Par->variant.var_1.Enum_Comp,
+ &Next_Record->variant.var_1.Enum_Comp);
+ report(0x20012);
+ Next_Record->Ptr_Comp = Ptr_Glob->Ptr_Comp;
+ Proc_7(Next_Record->variant.var_1.Int_Comp, 10,
+ &Next_Record->variant.var_1.Int_Comp);
+ } else /* not executed */
+ structassign(*Ptr_Val_Par, *Ptr_Val_Par->Ptr_Comp);
+ report(0x20013);
+
+} /* Proc_1 */
+
+
+void
+ Proc_2(Int_Par_Ref)
+/******************/
+ /* executed once */
+ /* *Int_Par_Ref == 1, becomes 4 */
+
+ One_Fifty *Int_Par_Ref;
+{
+ One_Fifty Int_Loc;
+ Enumeration Enum_Loc = 0;
+
+ report(0x20020);
+
+ Int_Loc = *Int_Par_Ref + 10;
+ do /* executed once */
+ if (Ch_1_Glob == 'A')
+ /* then, executed */
+ {
+ Int_Loc -= 1;
+ *Int_Par_Ref = Int_Loc - Int_Glob;
+ Enum_Loc = Ident_1;
+ } /* if */
+ while (Enum_Loc != Ident_1);/* true */
+} /* Proc_2 */
+
+
+void
+ Proc_3(Ptr_Ref_Par)
+/******************/
+ /* executed once */
+ /* Ptr_Ref_Par becomes Ptr_Glob */
+
+ Rec_Pointer *Ptr_Ref_Par;
+
+{
+ report(0x20030);
+
+ if (Ptr_Glob != Null)
+ /* then, executed */
+ *Ptr_Ref_Par = Ptr_Glob->Ptr_Comp;
+ Proc_7(10, Int_Glob, &Ptr_Glob->variant.var_1.Int_Comp);
+} /* Proc_3 */
+
+
+void
+ Proc_4()
+{ /* without parameters */
+ /*******/
+ /* executed once */
+ Boolean Bool_Loc;
+
+ report(0x20040);
+
+ Bool_Loc = Ch_1_Glob == 'A';
+ Bool_Glob = Bool_Loc | Bool_Glob;
+ Ch_2_Glob = 'B';
+} /* Proc_4 */
+
+
+void
+ Proc_5()
+{ /* without parameters */
+ /*******/
+ /* executed once */
+ report(0x20050);
+
+ Ch_1_Glob = 'A';
+ Bool_Glob = false;
+} /* Proc_5 */
+
+/* @(#)dhry_2.c 1.2 92/05/28 14:44:54, AMD */
+/*
+ ****************************************************************************
+ *
+ * "DHRYSTONE" Benchmark Program
+ * -----------------------------
+ *
+ * Version: C, Version 2.1
+ *
+ * File: dhry_2.c (part 3 of 3)
+ *
+ * Date: May 25, 1988
+ *
+ * Author: Reinhold P. Weicker
+ *
+ ****************************************************************************
+ */
+
+#ifndef REG
+#define REG
+ /* REG becomes defined as empty */
+ /* i.e. no register variables */
+#ifdef _AM29K
+#undef REG
+#define REG register /* Define REG; saves room on 127-char MS-DOS cmd line */
+#endif
+#endif
+
+
+void
+ Proc_6(Enum_Val_Par, Enum_Ref_Par)
+/*********************************/
+ /* executed once */
+ /* Enum_Val_Par == Ident_3, Enum_Ref_Par becomes Ident_2 */
+
+ Enumeration Enum_Val_Par;
+ Enumeration *Enum_Ref_Par;
+{
+#if PROC_6
+ report(0x20060);
+
+ *Enum_Ref_Par = Enum_Val_Par;
+ if (!Func_3(Enum_Val_Par))
+ /* then, not executed */
+ *Enum_Ref_Par = Ident_4;
+ switch (Enum_Val_Par) {
+ case Ident_1:
+ *Enum_Ref_Par = Ident_1;
+ break;
+ case Ident_2:
+ if (Int_Glob > 100)
+ /* then */
+ *Enum_Ref_Par = Ident_1;
+ else
+ *Enum_Ref_Par = Ident_4;
+ break;
+ case Ident_3: /* executed */
+ *Enum_Ref_Par = Ident_2;
+ break;
+ case Ident_4:
+ break;
+ case Ident_5:
+ *Enum_Ref_Par = Ident_3;
+ break;
+ } /* switch */
+#endif
+ return;
+} /* Proc_6 */
+
+
+void
+ Proc_7(Int_1_Par_Val, Int_2_Par_Val, Int_Par_Ref)
+/**********************************************/
+ /* executed three times */
+ /* first call: Int_1_Par_Val == 2, Int_2_Par_Val == 3, */
+ /* Int_Par_Ref becomes 7 */
+ /* second call: Int_1_Par_Val == 10, Int_2_Par_Val == 5, */
+ /* Int_Par_Ref becomes 17 */
+ /* third call: Int_1_Par_Val == 6, Int_2_Par_Val == 10, */
+ /* Int_Par_Ref becomes 18 */
+ One_Fifty Int_1_Par_Val;
+ One_Fifty Int_2_Par_Val;
+ One_Fifty *Int_Par_Ref;
+{
+ One_Fifty Int_Loc;
+
+ report(0x20070);
+
+ Int_Loc = Int_1_Par_Val + 2;
+ *Int_Par_Ref = Int_2_Par_Val + Int_Loc;
+} /* Proc_7 */
+
+
+void
+ Proc_8(Arr_1_Par_Ref, Arr_2_Par_Ref, Int_1_Par_Val, Int_2_Par_Val)
+/*********************************************************************/
+ /* executed once */
+ /* Int_Par_Val_1 == 3 */
+ /* Int_Par_Val_2 == 7 */
+ Arr_1_Dim Arr_1_Par_Ref;
+ Arr_2_Dim Arr_2_Par_Ref;
+ int Int_1_Par_Val;
+ int Int_2_Par_Val;
+{
+ REG One_Fifty Int_Index;
+ REG One_Fifty Int_Loc;
+
+#if DBG
+ printf("X) Int_1_Par_Val: %x\n", Int_1_Par_Val);
+ printf("X) Int_2_Par_Val: %x\n", Int_2_Par_Val);
+#endif
+
+ report(0x20080);
+
+ Int_Loc = Int_1_Par_Val + 5;
+ Arr_1_Par_Ref[Int_Loc] = Int_2_Par_Val;
+ Arr_1_Par_Ref[Int_Loc + 1] = Arr_1_Par_Ref[Int_Loc];
+ Arr_1_Par_Ref[Int_Loc + 30] = Int_Loc;
+ for (Int_Index = Int_Loc; Int_Index <= Int_Loc + 1; ++Int_Index)
+ Arr_2_Par_Ref[Int_Loc][Int_Index] = Int_Loc;
+ Arr_2_Par_Ref[Int_Loc][Int_Loc - 1] += 1;
+ Arr_2_Par_Ref[Int_Loc + 20][Int_Loc] = Arr_1_Par_Ref[Int_Loc];
+ Int_Glob = 5;
+
+#if DBG
+ printf("Y) Int_1_Par_Val: %x\n", Int_1_Par_Val);
+ printf("Y) Int_2_Par_Val: %x\n", Int_2_Par_Val);
+#endif
+
+} /* Proc_8 */
+
+
+Enumeration
+ Func_1(Ch_1_Par_Val, Ch_2_Par_Val)
+/*************************************************/
+ /* executed three times */
+ /* first call: Ch_1_Par_Val == 'H', Ch_2_Par_Val == 'R' */
+ /* second call: Ch_1_Par_Val == 'A', Ch_2_Par_Val == 'C' */
+ /* third call: Ch_1_Par_Val == 'B', Ch_2_Par_Val == 'C' */
+
+ Capital_Letter Ch_1_Par_Val;
+ Capital_Letter Ch_2_Par_Val;
+{
+ Capital_Letter Ch_1_Loc;
+ Capital_Letter Ch_2_Loc;
+
+ report(0x30010);
+
+ Ch_1_Loc = Ch_1_Par_Val;
+ Ch_2_Loc = Ch_1_Loc;
+ if (Ch_2_Loc != Ch_2_Par_Val)
+ /* then, executed */
+ return (Ident_1);
+ else { /* not executed */
+ Ch_1_Glob = Ch_1_Loc;
+ return (Ident_2);
+ }
+} /* Func_1 */
+
+
+Boolean
+ Func_2(Str_1_Par_Ref, Str_2_Par_Ref)
+/*************************************************/
+ /* executed once */
+ /* Str_1_Par_Ref == "DHRYSTONE PROGRAM, 1'ST STRING" */
+ /* Str_2_Par_Ref == "DHRYSTONE PROGRAM, 2'ND STRING" */
+
+ Str_30 Str_1_Par_Ref;
+ Str_30 Str_2_Par_Ref;
+{
+ REG One_Thirty Int_Loc;
+ Capital_Letter Ch_Loc = 0;
+
+ report(0x30020);
+
+ Int_Loc = 2;
+ while (Int_Loc <= 2) /* loop body executed once */
+ if (Func_1(Str_1_Par_Ref[Int_Loc],
+ Str_2_Par_Ref[Int_Loc + 1]) == Ident_1)
+ /* then, executed */
+ {
+ Ch_Loc = 'A';
+ Int_Loc += 1;
+ } /* if, while */
+ report(0x30021);
+
+ if (Ch_Loc >= 'W' && Ch_Loc < 'Z')
+ /* then, not executed */
+ Int_Loc = 7;
+ report(0x30022);
+ if (Ch_Loc == 'R')
+ /* then, not executed */
+ return (true);
+ else { /* executed */
+ report(0x30023);
+ if (strcmp(Str_1_Par_Ref, Str_2_Par_Ref) > 0)
+ /* then, not executed */
+ {
+ Int_Loc += 7;
+ Int_Glob = Int_Loc;
+ return (true);
+ } else /* executed */
+ return (false);
+ } /* if Ch_Loc */
+} /* Func_2 */
+
+
+Boolean
+ Func_3(Enum_Par_Val)
+/***************************/
+ /* executed once */
+ /* Enum_Par_Val == Ident_3 */
+ Enumeration Enum_Par_Val;
+{
+ Enumeration Enum_Loc;
+
+ Enum_Loc = Enum_Par_Val;
+ report(0x30030);
+ if (Enum_Loc == Ident_3)
+ /* then, executed */
+ return (true);
+ else /* not executed */
+ return (false);
+} /* Func_3 */
dhry.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: support/support.c
===================================================================
--- support/support.c (nonexistent)
+++ support/support.c (revision 1765)
@@ -0,0 +1,131 @@
+/* Support */
+
+#include
+#include "spr_defs.h"
+#include "support.h"
+#include "int.h"
+
+#if OR1K
+void excpt_dummy();
+void int_main();
+
+unsigned long excpt_buserr = (unsigned long) excpt_dummy;
+unsigned long excpt_dpfault = (unsigned long) excpt_dummy;
+unsigned long excpt_ipfault = (unsigned long) excpt_dummy;
+unsigned long excpt_tick = (unsigned long) excpt_dummy;
+unsigned long excpt_align = (unsigned long) excpt_dummy;
+unsigned long excpt_illinsn = (unsigned long) excpt_dummy;
+unsigned long excpt_int = (unsigned long) int_main;
+unsigned long excpt_dtlbmiss = (unsigned long) excpt_dummy;
+unsigned long excpt_itlbmiss = (unsigned long) excpt_dummy;
+unsigned long excpt_range = (unsigned long) excpt_dummy;
+unsigned long excpt_syscall = (unsigned long) excpt_dummy;
+unsigned long excpt_break = (unsigned long) excpt_dummy;
+unsigned long excpt_trap = (unsigned long) excpt_dummy;
+
+
+/* Start function, called by reset exception handler. */
+void reset ()
+{
+ int i = main();
+ exit (i);
+}
+
+/* return value by making a syscall */
+void exit (int i)
+{
+ asm("l.add r3,r0,%0": : "r" (i));
+ asm("l.nop %0": :"K" (NOP_EXIT));
+ while (1);
+}
+
+/* activate printf support in simulator */
+void printf(const char *fmt, ...)
+{
+ va_list args;
+ va_start(args, fmt);
+ __asm__ __volatile__ (" l.addi\tr3,%1,0\n \
+ l.addi\tr4,%2,0\n \
+ l.nop %0": :"K" (NOP_PRINTF), "r" (fmt), "r" (args));
+}
+
+/* print long */
+void report(unsigned long value)
+{
+ asm("l.addi\tr3,%0,0": :"r" (value));
+ asm("l.nop %0": :"K" (NOP_REPORT));
+}
+
+/* just to satisfy linker */
+void __main()
+{
+}
+
+/* start_TIMER */
+void start_timer(int x)
+{
+}
+
+/* read_TIMER */
+/* Returns a value since started in uS */
+unsigned int read_timer(int x)
+{
+ unsigned long count = 0;
+
+ /* Read the Time Stamp Counter */
+/* asm("simrdtsc %0" :"=r" (count)); */
+ /*asm("l.sys 201"); */
+ return count;
+}
+
+/* For writing into SPR. */
+void mtspr(unsigned long spr, unsigned long value)
+{
+ asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
+}
+
+/* For reading SPR. */
+unsigned long mfspr(unsigned long spr)
+{
+ unsigned long value;
+ asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
+ return value;
+}
+
+#else
+void report(unsigned long value)
+{
+ printf("report(0x%x);\n", (unsigned) value);
+}
+
+/* start_TIMER */
+void start_timer(int tmrnum)
+{
+}
+
+/* read_TIMER */
+/* Returns a value since started in uS */
+unsigned int read_timer(int tmrnum)
+{
+ struct timeval tv;
+ struct timezone tz;
+
+ gettimeofday(&tv, &tz);
+
+ return(tv.tv_sec*1000000+tv.tv_usec);
+}
+
+#endif
+
+void *memcpy (void *__restrict dstvoid,
+ __const void *__restrict srcvoid, size_t length)
+{
+ char *dst = dstvoid;
+ const char *src = (const char *) srcvoid;
+
+ while (length--)
+ *dst++ = *src++;
+ return dst;
+}
+
+void excpt_dummy() {}
support/support.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: support/int.h
===================================================================
--- support/int.h (nonexistent)
+++ support/int.h (revision 1765)
@@ -0,0 +1,15 @@
+
+/* Number of interrupt handlers */
+#define MAX_INT_HANDLERS 32
+
+/* Handler entry */
+struct ihnd {
+ void (*handler)(void *);
+ void *arg;
+};
+
+/* Add interrupt handler */
+int int_add(unsigned long vect, void (* handler)(void *), void *arg);
+
+/* Initialize routine */
+int int_init();
Index: support/support.h
===================================================================
--- support/support.h (nonexistent)
+++ support/support.h (revision 1765)
@@ -0,0 +1,65 @@
+/* Support file for or32 tests. This file should is included
+ in each test. It calls main() function and add support for
+ basic functions */
+
+#ifndef SUPPORT_H
+#define SUPPORT_H
+
+#include
+#include
+#include
+
+#if OR1K
+#include <_ansi.h>
+
+/* Register access macros */
+#define REG8(add) *((volatile unsigned char *)(add))
+#define REG16(add) *((volatile unsigned short *)(add))
+#define REG32(add) *((volatile unsigned long *)(add))
+
+void printf(const char *fmt, ...);
+
+/* For writing into SPR. */
+void mtspr(unsigned long spr, unsigned long value);
+
+/* For reading SPR. */
+unsigned long mfspr(unsigned long spr);
+
+#else /* OR1K */
+
+#include
+
+#endif /* OR1K */
+
+/* Function to be called at entry point - not defined here. */
+int main ();
+
+/* Prints out a value */
+void report(unsigned long value);
+
+/* return value by making a syscall */
+extern void exit (int i) __attribute__ ((__noreturn__));
+
+/* memcpy clone */
+extern void *memcpy (void *__restrict __dest,
+ __const void *__restrict __src, size_t __n);
+
+/* Timer functions */
+extern void start_timer(int);
+extern unsigned int read_timer(int);
+
+extern unsigned long excpt_buserr;
+extern unsigned long excpt_dpfault;
+extern unsigned long excpt_ipfault;
+extern unsigned long excpt_tick;
+extern unsigned long excpt_align;
+extern unsigned long excpt_illinsn;
+extern unsigned long excpt_int;
+extern unsigned long excpt_dtlbmiss;
+extern unsigned long excpt_itlbmiss;
+extern unsigned long excpt_range;
+extern unsigned long excpt_syscall;
+extern unsigned long excpt_break;
+extern unsigned long excpt_trap;
+
+#endif
support/support.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: support/int.c
===================================================================
--- support/int.c (nonexistent)
+++ support/int.c (revision 1765)
@@ -0,0 +1,79 @@
+/* This file is part of test microkernel for OpenRISC 1000. */
+/* (C) 2001 Simon Srot, srot@opencores.org */
+
+#include "support.h"
+#include "spr_defs.h"
+#include "int.h"
+
+#ifdef OR1K
+
+/* Interrupt handlers table */
+struct ihnd int_handlers[MAX_INT_HANDLERS];
+
+/* Initialize routine */
+int int_init()
+{
+ int i;
+
+ for(i = 0; i < MAX_INT_HANDLERS; i++) {
+ int_handlers[i].handler = 0;
+ int_handlers[i].arg = 0;
+ }
+
+ return 0;
+}
+
+/* Add interrupt handler */
+int int_add(unsigned long vect, void (* handler)(void *), void *arg)
+{
+ if(vect >= MAX_INT_HANDLERS)
+ return -1;
+
+ int_handlers[vect].handler = handler;
+ int_handlers[vect].arg = arg;
+
+ mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
+
+ return 0;
+}
+
+/* Disable interrupt */
+int int_disable(unsigned long vect)
+{
+ if(vect >= MAX_INT_HANDLERS)
+ return -1;
+
+ mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect));
+
+ return 0;
+}
+
+/* Enable interrupt */
+int int_enable(unsigned long vect)
+{
+ if(vect >= MAX_INT_HANDLERS)
+ return -1;
+
+ mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect));
+
+ return 0;
+}
+
+/* Main interrupt handler */
+void int_main()
+{
+ unsigned long picsr = mfspr(SPR_PICSR);
+ unsigned long i = 0;
+
+ mtspr(SPR_PICSR, 0);
+
+ while(i < 32) {
+ if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {
+ (*int_handlers[i].handler)(int_handlers[i].arg);
+ mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));
+ }
+ i++;
+ }
+}
+
+#endif
Index: support/Makefile.in
===================================================================
--- support/Makefile.in (nonexistent)
+++ support/Makefile.in (revision 1765)
@@ -0,0 +1,320 @@
+# Makefile.in generated automatically by automake 1.4 from Makefile.am
+
+# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+# Makefile -- Makefile for cpu architecture independent simulation
+# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+
+
+SHELL = @SHELL@
+
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+VPATH = @srcdir@
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+
+bindir = @bindir@
+sbindir = @sbindir@
+libexecdir = @libexecdir@
+datadir = @datadir@
+sysconfdir = @sysconfdir@
+sharedstatedir = @sharedstatedir@
+localstatedir = @localstatedir@
+libdir = @libdir@
+infodir = @infodir@
+mandir = @mandir@
+includedir = @includedir@
+oldincludedir = /usr/include
+
+DESTDIR =
+
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+
+top_builddir = ..
+
+ACLOCAL = @ACLOCAL@
+AUTOCONF = @AUTOCONF@
+AUTOMAKE = @AUTOMAKE@
+AUTOHEADER = @AUTOHEADER@
+
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@ $(AM_INSTALL_PROGRAM_FLAGS)
+INSTALL_DATA = @INSTALL_DATA@
+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+transform = @program_transform_name@
+
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+host_alias = @host_alias@
+host_triplet = @host@
+CC = @CC@
+INCLUDES = @INCLUDES@
+LD = @LD@
+MAKEINFO = @MAKEINFO@
+MAKE_SHELL = @MAKE_SHELL@
+OR1K_SRCDIR = @OR1K_SRCDIR@
+PACKAGE = @PACKAGE@
+RANLIB = @RANLIB@
+SIM = @SIM@
+TESTS_ENV = @TESTS_ENV@
+VERSION = @VERSION@
+
+noinst_LIBRARIES = libsupport.a
+libsupport_a_SOURCES = support.c support.h int.c int.h
+mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
+CONFIG_CLEAN_FILES =
+LIBRARIES = $(noinst_LIBRARIES)
+
+
+DEFS = @DEFS@ -I. -I$(srcdir)
+CPPFLAGS = @CPPFLAGS@
+LDFLAGS = @LDFLAGS@
+LIBS = @LIBS@
+libsupport_a_LIBADD =
+libsupport_a_OBJECTS = support.o int.o
+AR = ar
+CFLAGS = @CFLAGS@
+COMPILE = $(CC) $(DEFS) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@
+DIST_COMMON = Makefile.am Makefile.in
+
+
+DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
+
+TAR = gtar
+GZIP_ENV = --best
+DEP_FILES = .deps/int.P .deps/support.P
+SOURCES = $(libsupport_a_SOURCES)
+OBJECTS = $(libsupport_a_OBJECTS)
+
+all: all-redirect
+.SUFFIXES:
+.SUFFIXES: .S .c .o .s
+$(srcdir)/Makefile.in: Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4)
+ cd $(top_srcdir) && $(AUTOMAKE) --gnu support/Makefile
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status $(BUILT_SOURCES)
+ cd $(top_builddir) \
+ && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
+
+
+mostlyclean-noinstLIBRARIES:
+
+clean-noinstLIBRARIES:
+ -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
+
+distclean-noinstLIBRARIES:
+
+maintainer-clean-noinstLIBRARIES:
+
+.s.o:
+ $(COMPILE) -c $<
+
+.S.o:
+ $(COMPILE) -c $<
+
+mostlyclean-compile:
+ -rm -f *.o core *.core
+
+clean-compile:
+
+distclean-compile:
+ -rm -f *.tab.c
+
+maintainer-clean-compile:
+
+libsupport.a: $(libsupport_a_OBJECTS) $(libsupport_a_DEPENDENCIES)
+ -rm -f libsupport.a
+ $(AR) cru libsupport.a $(libsupport_a_OBJECTS) $(libsupport_a_LIBADD)
+ $(RANLIB) libsupport.a
+
+tags: TAGS
+
+ID: $(HEADERS) $(SOURCES) $(LISP)
+ list='$(SOURCES) $(HEADERS)'; \
+ unique=`for i in $$list; do echo $$i; done | \
+ awk ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ here=`pwd` && cd $(srcdir) \
+ && mkid -f$$here/ID $$unique $(LISP)
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS)'; \
+ unique=`for i in $$list; do echo $$i; done | \
+ awk ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ test -z "$(ETAGS_ARGS)$$unique$(LISP)$$tags" \
+ || (cd $(srcdir) && etags $(ETAGS_ARGS) $$tags $$unique $(LISP) -o $$here/TAGS)
+
+mostlyclean-tags:
+
+clean-tags:
+
+distclean-tags:
+ -rm -f TAGS ID
+
+maintainer-clean-tags:
+
+distdir = $(top_builddir)/$(PACKAGE)-$(VERSION)/$(subdir)
+
+subdir = support
+
+distdir: $(DISTFILES)
+ here=`cd $(top_builddir) && pwd`; \
+ top_distdir=`cd $(top_distdir) && pwd`; \
+ distdir=`cd $(distdir) && pwd`; \
+ cd $(top_srcdir) \
+ && $(AUTOMAKE) --include-deps --build-dir=$$here --srcdir-name=$(top_srcdir) --output-dir=$$top_distdir --gnu support/Makefile
+ @for file in $(DISTFILES); do \
+ d=$(srcdir); \
+ if test -d $$d/$$file; then \
+ cp -pr $$d/$$file $(distdir)/$$file; \
+ else \
+ test -f $(distdir)/$$file \
+ || ln $$d/$$file $(distdir)/$$file 2> /dev/null \
+ || cp -p $$d/$$file $(distdir)/$$file || :; \
+ fi; \
+ done
+
+DEPS_MAGIC := $(shell mkdir .deps > /dev/null 2>&1 || :)
+
+-include $(DEP_FILES)
+
+mostlyclean-depend:
+
+clean-depend:
+
+distclean-depend:
+ -rm -rf .deps
+
+maintainer-clean-depend:
+
+%.o: %.c
+ @echo '$(COMPILE) -c $<'; \
+ $(COMPILE) -Wp,-MD,.deps/$(*F).pp -c $<
+ @-cp .deps/$(*F).pp .deps/$(*F).P; \
+ tr ' ' '\012' < .deps/$(*F).pp \
+ | sed -e 's/^\\$$//' -e '/^$$/ d' -e '/:$$/ d' -e 's/$$/ :/' \
+ >> .deps/$(*F).P; \
+ rm .deps/$(*F).pp
+
+%.lo: %.c
+ @echo '$(LTCOMPILE) -c $<'; \
+ $(LTCOMPILE) -Wp,-MD,.deps/$(*F).pp -c $<
+ @-sed -e 's/^\([^:]*\)\.o[ ]*:/\1.lo \1.o :/' \
+ < .deps/$(*F).pp > .deps/$(*F).P; \
+ tr ' ' '\012' < .deps/$(*F).pp \
+ | sed -e 's/^\\$$//' -e '/^$$/ d' -e '/:$$/ d' -e 's/$$/ :/' \
+ >> .deps/$(*F).P; \
+ rm -f .deps/$(*F).pp
+info-am:
+info: info-am
+dvi-am:
+dvi: dvi-am
+check-am: all-am
+check: check-am
+installcheck-am:
+installcheck: installcheck-am
+install-exec-am:
+install-exec: install-exec-am
+
+install-data-am:
+install-data: install-data-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+install: install-am
+uninstall-am:
+uninstall: uninstall-am
+all-am: Makefile $(LIBRARIES)
+all-redirect: all-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) AM_INSTALL_PROGRAM_FLAGS=-s install
+installdirs:
+
+
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -rm -f Makefile $(CONFIG_CLEAN_FILES)
+ -rm -f config.cache config.log stamp-h stamp-h[0-9]*
+
+maintainer-clean-generic:
+mostlyclean-am: mostlyclean-noinstLIBRARIES mostlyclean-compile \
+ mostlyclean-tags mostlyclean-depend mostlyclean-generic
+
+mostlyclean: mostlyclean-am
+
+clean-am: clean-noinstLIBRARIES clean-compile clean-tags clean-depend \
+ clean-generic mostlyclean-am
+
+clean: clean-am
+
+distclean-am: distclean-noinstLIBRARIES distclean-compile \
+ distclean-tags distclean-depend distclean-generic \
+ clean-am
+
+distclean: distclean-am
+
+maintainer-clean-am: maintainer-clean-noinstLIBRARIES \
+ maintainer-clean-compile maintainer-clean-tags \
+ maintainer-clean-depend maintainer-clean-generic \
+ distclean-am
+ @echo "This command is intended for maintainers to use;"
+ @echo "it deletes files that may require special tools to rebuild."
+
+maintainer-clean: maintainer-clean-am
+
+.PHONY: mostlyclean-noinstLIBRARIES distclean-noinstLIBRARIES \
+clean-noinstLIBRARIES maintainer-clean-noinstLIBRARIES \
+mostlyclean-compile distclean-compile clean-compile \
+maintainer-clean-compile tags mostlyclean-tags distclean-tags \
+clean-tags maintainer-clean-tags distdir mostlyclean-depend \
+distclean-depend clean-depend maintainer-clean-depend info-am info \
+dvi-am dvi check check-am installcheck-am installcheck install-exec-am \
+install-exec install-data-am install-data install-am install \
+uninstall-am uninstall all-redirect all-am all installdirs \
+mostlyclean-generic distclean-generic clean-generic \
+maintainer-clean-generic clean mostlyclean distclean maintainer-clean
+
+
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
Index: support/Makefile.am
===================================================================
--- support/Makefile.am (nonexistent)
+++ support/Makefile.am (revision 1765)
@@ -0,0 +1,29 @@
+# Makefile -- Makefile for cpu architecture independent simulation
+# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+
+##if OR1K_EXCEPT
+##OR1K_SUPPORT_S = except.S
+##else
+##OR1K_SUPPORT_S =
+##endif
+
+noinst_LIBRARIES = libsupport.a
+libsupport_a_SOURCES = support.c support.h int.c int.h
+## EXTRA_libsupport_a_SOURCES = except.S
support/Makefile.am
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: support
===================================================================
--- support (nonexistent)
+++ support (revision 1765)
support
Property changes :
Added: svn:ignore
## -0,0 +1 ##
+Makefile
Index: acv_gpio.cfg
===================================================================
--- acv_gpio.cfg (nonexistent)
+++ acv_gpio.cfg (revision 1765)
@@ -0,0 +1,59 @@
+section memory
+ /*random_seed = 12345
+ type = random*/
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 2
+ device 0
+ name = "RAM"
+ ce = 0
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 10
+ delayw = -1
+ enddevice
+
+ device 1
+ name = "FLASH"
+ ce = 1
+ baseaddr = 0x40000000
+ size = 0x00200000
+ delayr = 2
+ delayw = 4
+ enddevice
+end
+
+section cpu
+ ver = 0x1200
+ rev = 0x0001
+ /* upr = */
+ superscalar = 0
+ hazards = 0
+ dependstats = 0
+end
+
+section sim
+ debug = 3
+ verbose = 1
+ exe_log = 1
+ exe_log_fn = "executed.log"
+end
+
+section gpio
+ ngpios = 1
+
+ device 0
+ baseaddr = 0xB0000000
+ irq = 23
+ base_vapi_id = 0x0200 /* GPIO uses 8 VAPI IDs */
+ enddevice
+end
+
+section VAPI
+ enabled = 1
+ log_enabled = 1
+ log_device_id = 0
+ vapi_log_fn = "vapi.log"
+ server_port = 9100
+end
Index: cache.cfg
===================================================================
--- cache.cfg (nonexistent)
+++ cache.cfg (revision 1765)
@@ -0,0 +1,64 @@
+section memory
+ /*random_seed = 12345
+ type = random*/
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 1
+ device 0
+ name = "RAM"
+ ce = 0
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 1
+ delayw = 2
+ enddevice
+end
+
+section sim
+ /* verbose = 1 */
+ debug = 0
+ history = 1
+ exe_log = 0
+ exe_log_fn = "executed.log"
+ clkcycle = 4ns
+end
+
+section immu
+ enabled = 0
+ nsets = 32
+ nways = 1
+ pagesize = 8192
+end
+
+section dmmu
+ enabled = 0
+ nsets = 32
+ nways = 1
+ pagesize = 8192
+end
+
+section ic
+ enabled = 1
+ nsets = 256
+ nways = 1
+ blocksize = 16
+ ustates = 2
+end
+
+section dc
+ enabled = 1
+ nsets = 256
+ nways = 1
+ blocksize = 16
+ ustates = 2
+end
+
+section cpu
+ ver = 0x1200
+ rev = 0x0001
+ /* upr = */
+ superscalar = 0
+ hazards = 0
+ dependstats = 0
+end
Index: acv_uart.cfg
===================================================================
--- acv_uart.cfg (nonexistent)
+++ acv_uart.cfg (revision 1765)
@@ -0,0 +1,62 @@
+section memory
+ /*random_seed = 12345
+ type = random*/
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 2
+ device 0
+ name = "RAM"
+ ce = 0
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 10
+ delayw = -1
+ enddevice
+
+ device 1
+ name = "FLASH"
+ ce = 1
+ baseaddr = 0x40000000
+ size = 0x00200000
+ delayr = 2
+ delayw = 4
+ enddevice
+end
+
+section cpu
+ ver = 0x1200
+ rev = 0x0001
+ /* upr = */
+ superscalar = 0
+ hazards = 0
+ dependstats = 0
+end
+
+section sim
+ debug = 4
+ verbose = 1
+ exe_log = 1
+ exe_log_fn = "executed.log"
+end
+
+section uart
+ enabled = 1
+ nuarts = 1
+
+ device 0
+ baseaddr = 0x9c000000
+ jitter = -1 /* async behaviour */
+ 16550 = 1
+ irq = 15
+ vapi_id = 0x100
+ enddevice
+end
+
+section VAPI
+ enabled = 1
+ log_enabled = 1
+ hide_device_id = 1
+ vapi_log_fn = "vapi.log"
+ server_port = 9100
+end
acv_uart.cfg
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: mmu.cfg
===================================================================
--- mmu.cfg (nonexistent)
+++ mmu.cfg (revision 1765)
@@ -0,0 +1,70 @@
+section memory
+ /*random_seed = 12345
+ type = random*/
+ pattern = 0x00
+ type = unknown /* Fastest */
+
+ nmemories = 2
+ device 0
+ name = "RAM"
+ ce = 0
+ baseaddr = 0x40000000
+ size = 0x00200000
+ delayr = 1
+ delayw = 2
+ enddevice
+
+ device 1
+ name = "FLASH"
+ ce = 1
+ baseaddr = 0x00000000
+ size = 0x00200000
+ delayr = 10
+ delayw = -1
+ enddevice
+end
+
+section immu
+ enabled = 1
+ nsets = 64
+ nways = 1
+ ustates = 2
+ pagesize = 8192
+end
+
+section dmmu
+ enabled = 1
+ nsets = 64
+ nways = 1
+ ustates = 2
+ pagesize = 8192
+end
+
+section ic
+ enabled = 1
+ nsets = 256
+ nways = 1
+ ustates = 2
+ blocksize = 16
+end
+
+section dc
+ enabled = 1
+ nsets = 256
+ nways = 1
+ ustates = 2
+ blocksize = 16
+end
+
+section sim
+ /* verbose = 1 */
+ debug = 0
+ profile = 0
+ prof_fn = "sim.profile"
+
+ history = 1
+ /* iprompt = 0 */
+ exe_log = 0
+ exe_log_fn = "executed.log"
+end
+
Index: kbdtest.c
===================================================================
--- kbdtest.c (nonexistent)
+++ kbdtest.c (revision 1765)
@@ -0,0 +1,93 @@
+/* Simple keyboard test. Outputs scan codes. */
+#include "support.h"
+#include "spr_defs.h"
+#include "support.h"
+
+/* Whether this test should be run in interactive mode; scan codes are not check against real ones */
+#define INTERACTIVE 0
+
+#define BASEADDR 0xb1000000
+
+#define KBD_INT_LINE 21 /* To which interrupt is uart connected */
+
+/* fails if x is false */
+#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__))
+/* Waits a few cycles that uart can prepare its data */
+#define WAIT() {asm ("l.nop");asm ("l.nop");asm ("l.nop");asm ("l.nop");}
+#define MARK() printf ("Passed line %i\n", __LINE__)
+
+#ifndef __LINE__
+#define __LINE__ 0
+#endif
+
+#if !INTERACTIVE
+static const unsigned char incoming_scan[] = {
+ 0x2a, 0x14, 0x94, 0xaa, 0x12, 0x92, 0x1f, 0x9f, 0x14, 0x94, 0x02, 0x82, 0x03, 0x83, 0x04, 0x84,
+ 0x2a, 0x0d, 0x8d, 0xaa, 0x0b, 0x8b, 0x0d, 0x8d, 0x0c, 0x8c, 0x2a, 0x33, 0xb3, 0xaa, 0x35, 0xb5,
+ 0x33, 0xb3, 0x2a, 0x34, 0xb4, 0xaa, 0x34, 0xb4, 0x2b, 0xab, 0x2a, 0x2b, 0xab, 0xaa, 0x2a, 0x28,
+ 0xa8, 0xaa, 0x28, 0xa8, 0x29, 0xa9, 0x2a, 0x1b, 0x9b, 0xaa, 0x2a, 0x1a, 0x9a, 0xaa, 0x1a, 0x9a,
+ 0x1b, 0x9b, 0x0f, 0x8f, 0x39, 0xb9, 0x1c, 0x9c, 0x2a, 0x02, 0x82, 0xaa, 0x2a, 0x03, 0x83, 0xaa,
+ 0x2a, 0x04, 0x84, 0xaa, 0x2a, 0x05, 0x85, 0xaa, 0x2a, 0x06, 0x86, 0xaa, 0x2a, 0x07, 0x87, 0xaa,
+ 0x2a, 0x08, 0x88, 0xaa, 0x2a, 0x09, 0x89, 0xaa, 0x2a, 0x0a, 0x8a, 0xaa, 0x2a, 0x0b, 0x8b, 0xaa,
+ 0x1c, 0x9c, 0x2a, 0x09, 0x89, 0xaa, 0x1c, 0x9c, 0x39, 0xb9, 0x00};
+static int current_scan = 0;
+#endif
+
+static volatile int done;
+
+void fail (char *func, int line)
+{
+#ifndef __FUNCTION__
+#define __FUNCTION__ "?"
+#endif
+ printf ("Test failed in %s:%i\n", func, line);
+ report(0xeeeeeeee);
+ exit (1);
+}
+
+inline void setreg (unsigned long addr, unsigned char value)
+{
+ *((volatile unsigned char *)addr) = value;
+}
+
+inline unsigned long getreg (unsigned long addr)
+{
+ return *((volatile unsigned char *)addr);
+}
+
+void interrupt_handler ()
+{
+ unsigned x;
+ printf ("Int\n");
+ do {
+ x = getreg (BASEADDR);
+ if (x) printf ("0x%02x, ", x);
+ report(x);
+ if (x == 1) done = 1;
+#if !INTERACTIVE
+ printf ("expecting (0x%02x), ", incoming_scan[current_scan]);
+ ASSERT (incoming_scan[current_scan++] == x);
+ if (x == 0) done = 1;
+#endif
+ } while (x);
+ printf ("%i", done);
+ mtspr(SPR_PICSR, 0);
+}
+
+int main ()
+{
+ /* Use our low priority interrupt handler */
+ excpt_int = (unsigned long)interrupt_handler;
+
+ printf ("Reading from keyboard.\n");
+ printf ("Enabling interrupts.\n");
+ done = 0;
+
+ /* Enable interrupts */
+ mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
+ mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << KBD_INT_LINE));
+
+ while (!done) printf ("[%i]", done);
+ report (0xdeaddead);
+ return 0;
+}
kbdtest.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: kbdtest.cfg
===================================================================
--- kbdtest.cfg (nonexistent)
+++ kbdtest.cfg (revision 1765)
@@ -0,0 +1,8 @@
+include "default.cfg"
+
+section kbd
+ enabled = 1
+ irq = 21
+ baseaddr = 0xb1000000
+ rxfile = "./kbdtest.rx"
+end
kbdtest.cfg
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: kbdtest.rx
===================================================================
--- kbdtest.rx (nonexistent)
+++ kbdtest.rx (revision 1765)
@@ -0,0 +1,4 @@
+Test123+0=-.\|"'`}{[]ª
+!@#$%^&*()
+ *
+
\ No newline at end of file
kbdtest.rx
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: fbtest.cfg
===================================================================
--- fbtest.cfg (nonexistent)
+++ fbtest.cfg (revision 1765)
@@ -0,0 +1,9 @@
+include "default.cfg"
+
+section fb
+ enabled = 1
+ baseaddr = 0xb8000000
+ refresh_rate = 10000
+ filename = "primary"
+end
+
fbtest.cfg
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: fbtest.c
===================================================================
--- fbtest.c (nonexistent)
+++ fbtest.c (revision 1765)
@@ -0,0 +1,40 @@
+/* Simple frame buffer test. Draws some horizontal with different colors. */
+#include "support.h"
+
+#define BUFADDR 0x40100000
+#define BASEADDR 0xb8000000
+#define BUF_PTR ((unsigned char *)BUFADDR)
+#define PAL_PTR ((unsigned long *)(BASEADDR + 0x400))
+#define SIZEX 640
+#define SIZEY 480
+
+#define putxy(x,y) *(BUF_PTR + (x) + (y) * SIZEX)
+#define setpal(i,r,g,b) *(PAL_PTR + (i)) = (((unsigned long)(r) & 0xff) << 16) | (((unsigned long)(g) & 0xff) << 8) | (((unsigned long)(b) & 0xff) << 0)
+
+void hline (int y, int x1, int x2, unsigned char c)
+{
+ int x;
+ for (x = x1; x < x2; x++)
+ putxy(x, y) = c;
+}
+
+int main(void)
+{
+ unsigned i;
+
+ /* Set address of buffer at predefined location */
+ *((unsigned long *)(BASEADDR) + 0x1) = BUFADDR;
+ for (i = 0; i < 256; i++)
+ setpal (i, 256 - i, i, 128 ^ i);
+
+ /* Turn display on */
+ *((unsigned long *)(BASEADDR) + 0x0) = 0xffffffff;
+
+ for (i = 0; i < 256; i++) {
+ hline (i, 0, i, i);
+ hline (256 - i, 256 - i, 256 + i, i);
+ }
+
+ report (0xdeaddead);
+ return 0;
+}
fbtest.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: mmu.c
===================================================================
--- mmu.c (nonexistent)
+++ mmu.c (revision 1765)
@@ -0,0 +1,1291 @@
+/* This is MMU test for OpenRISC 1200 */
+
+#include "spr_defs.h"
+#include "support.h"
+
+/* For shorter simulation run */
+#define RTL_SIM 1
+
+/* Define RAM physical location and size
+ Bottom half will be used for this program, the rest
+ will be used for testing */
+#define FLASH_START 0x00000000
+#define FLASH_SIZE 0x00200000
+#define RAM_START 0x40000000
+#define RAM_SIZE 0x00200000
+
+/* What is the last address in ram that is used by this program */
+#define TEXT_END_ADD (FLASH_START + (FLASH_SIZE / 2))
+#define DATA_END_ADD (RAM_START + (RAM_SIZE / 2))
+
+#define TLB_TEXT_SET_NB 8
+#define TLB_DATA_SET_NB 4
+
+/* MMU page size */
+#define PAGE_SIZE 8192
+
+/* Number of DTLB sets used (power of 2, max is 256) */
+#define DTLB_SETS 64
+
+/* Number of DTLB ways (1, 2, 3 etc., max is 4). */
+#define DTLB_WAYS 1
+
+/* Number of ITLB sets used (power of 2, max is 256) */
+#define ITLB_SETS 64
+
+/* Number of ITLB ways (1, 2, 3 etc., max is 4). */
+#define ITLB_WAYS 1
+
+/* TLB mode codes */
+#define TLB_CODE_ONE_TO_ONE 0x00000000
+#define TLB_CODE_PLUS_ONE_PAGE 0x10000000
+#define TLB_CODE_MINUS_ONE_PAGE 0x20000000
+
+#define TLB_CODE_MASK 0xfffff000
+#define TLB_PR_MASK 0x00000fff
+#define DTLB_PR_NOLIMIT ( SPR_DTLBTR_CI | \
+ SPR_DTLBTR_URE | \
+ SPR_DTLBTR_UWE | \
+ SPR_DTLBTR_SRE | \
+ SPR_DTLBTR_SWE )
+
+#define ITLB_PR_NOLIMIT ( SPR_ITLBTR_CI | \
+ SPR_ITLBTR_SXE | \
+ SPR_ITLBTR_UXE )
+
+#if 1
+#define debug printf
+#else
+#define debug
+#endif
+
+/* fails if x is false */
+#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__))
+
+//#define TEST_JUMP(x) testjump( ((x) & (RAM_SIZE/2 - 1)) + DATA_END_ADD, (x))
+#define TEST_JUMP(x) copy_jump (((x) & (RAM_SIZE/2 - 1)) + DATA_END_ADD); call (x)
+
+/* Extern functions */
+extern void lo_dmmu_en (void);
+extern void lo_immu_en (void);
+extern int lo_dtlb_ci_test (unsigned long, unsigned long);
+extern int lo_itlb_ci_test(unsigned long, unsigned long);
+extern void testjump(unsigned long phy_addr, unsigned long virt_addr);
+extern void (*jr)(void);
+
+/* Local functions prototypes */
+void dmmu_disable (void);
+void immu_disable (void);
+
+/* Global variables */
+extern unsigned long ram_end;
+
+/* DTLB mode status */
+volatile unsigned long dtlb_val;
+
+/* ITLB mode status */
+volatile unsigned long itlb_val;
+
+/* DTLB miss counter */
+volatile int dtlb_miss_count;
+
+/* Data page fault counter */
+volatile int dpage_fault_count;
+
+/* ITLB miss counter */
+volatile int itlb_miss_count;
+
+/* Instruction page fault counter */
+volatile int ipage_fault_count;
+
+/* EA of last DTLB miss exception */
+unsigned long dtlb_miss_ea;
+
+/* EA of last data page fault exception */
+unsigned long dpage_fault_ea;
+
+/* EA of last ITLB miss exception */
+unsigned long itlb_miss_ea;
+
+/* EA of last insn page fault exception */
+unsigned long ipage_fault_ea;
+
+void sys_call (void)
+{
+ asm("l.sys\t0");
+}
+
+void fail (char *func, int line)
+{
+#ifndef __FUNCTION__
+#define __FUNCTION__ "?"
+#endif
+
+ /* Trigger sys call exception to enable supervisor mode again */
+ sys_call ();
+
+ immu_disable ();
+ dmmu_disable ();
+
+ debug("Test failed in %s:%i\n", func, line);
+ report (0xeeeeeeee);
+ exit (1);
+}
+
+void call(unsigned long add)
+{
+ asm("l.jalr\t\t%0" : : "r" (add) : "r9", "r11");
+ asm("l.nop" : :);
+}
+
+void jump(void)
+{
+ asm("_jr:");
+ asm("l.jr\t\tr9") ;
+ asm("l.nop" : :);
+}
+
+void copy_jump(unsigned long phy_add)
+{
+ memcpy((void *)phy_add, (void *)&jr, 8);
+}
+
+/* Bus error exception handler */
+void bus_err_handler (void)
+{
+ /* This shouldn't happend */
+ debug("Test failed: Bus error\n");
+ report (0xeeeeeeee);
+ exit (1);
+}
+
+/* Illegal insn exception handler */
+void ill_insn_handler (void)
+{
+ /* This shouldn't happend */
+ debug("Test failed: Illegal insn\n");
+ report (0xeeeeeeee);
+ exit (1);
+}
+
+/* Sys call exception handler */
+void sys_call_handler (void)
+{
+ /* Set supervisor mode */
+ mtspr (SPR_ESR_BASE, mfspr (SPR_ESR_BASE) | SPR_SR_SM);
+}
+
+/* DTLB miss exception handler */
+void dtlb_miss_handler (void)
+{
+ unsigned long ea, ta, tlbtr;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and LRU way */
+ set = (ea / PAGE_SIZE) % DTLB_SETS;
+ for (i = 0; i < DTLB_WAYS; i++) {
+ if ((mfspr (SPR_DTLBMR_BASE(i) + set) & SPR_DTLBMR_LRU) == 0) {
+ way = i;
+ break;
+ }
+ }
+
+ debug("ea = %.8lx set = %d way = %d\n", ea, set, way);
+
+ if (((RAM_START <= ea) && (ea < DATA_END_ADD) ) || ((FLASH_START <= ea) && (ea < TEXT_END_ADD))) {
+ /* If this is acces to data of this program set one to one translation */
+ mtspr (SPR_DTLBMR_BASE(way) + set, (ea & SPR_DTLBMR_VPN) | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(way) + set, (ea & SPR_DTLBTR_PPN) | DTLB_PR_NOLIMIT);
+ return;
+ }
+
+ /* Update DTLB miss counter and EA */
+ dtlb_miss_count++;
+ dtlb_miss_ea = ea;
+
+ /* Whatever access is in progress, translated address have to point to physical RAM */
+ ta = (ea & ((RAM_SIZE/2) - 1)) + RAM_START + (RAM_SIZE/2);
+ tlbtr = (ta & SPR_DTLBTR_PPN) | (dtlb_val & TLB_PR_MASK);
+ debug("tlbtr = %.8lx dtlb_val = %.8lx\n", tlbtr, dtlb_val);
+
+ /* Set DTLB entry */
+ mtspr (SPR_DTLBMR_BASE(way) + set, (ea & SPR_DTLBMR_VPN) | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(way) + set, tlbtr);
+}
+
+/* Data page fault exception handler */
+void dpage_fault_handler (void)
+{
+ unsigned long ea;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and way */
+ set = (ea / PAGE_SIZE) % DTLB_SETS;
+ for (i = 0; i < DTLB_WAYS; i++) {
+ if ((mfspr (SPR_DTLBMR_BASE(i) + set) & SPR_DTLBMR_VPN) == (ea & SPR_DTLBMR_VPN)) {
+ way = i;
+ break;
+ }
+ }
+
+ debug("ea = %.8lx set = %d way = %d\n", ea, set, way);
+
+ if (((RAM_START <= ea) && (ea < DATA_END_ADD) ) || ((FLASH_START <= ea) && (ea < TEXT_END_ADD))) {
+ /* If this is acces to data of this program set one to one translation */
+ mtspr (SPR_DTLBTR_BASE(way) + set, (ea & SPR_DTLBTR_PPN) | DTLB_PR_NOLIMIT);
+ return;
+ }
+
+ /* Update data page fault counter and EA */
+ dpage_fault_count++;
+ dpage_fault_ea = ea;
+
+ /* Give permission */
+ mtspr (SPR_DTLBTR_BASE(way) + set, (mfspr (SPR_DTLBTR_BASE(way) + set) & ~DTLB_PR_NOLIMIT) | dtlb_val);
+}
+
+
+/* ITLB miss exception handler */
+void itlb_miss_handler (void)
+{
+ unsigned long ea, ta, tlbtr;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and LRU way */
+ set = (ea / PAGE_SIZE) % ITLB_SETS;
+ for (i = 0; i < ITLB_WAYS; i++) {
+ if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_LRU) == 0) {
+ way = i;
+ break;
+ }
+ }
+
+ debug("ea = %.8lx set = %d way = %d\n", ea, set, way);
+
+ if ((FLASH_START <= ea) && (ea < TEXT_END_ADD)) {
+ /* If this is acces to data of this program set one to one translation */
+ mtspr (SPR_ITLBMR_BASE(way) + set, (ea & SPR_ITLBMR_VPN) | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(way) + set, (ea & SPR_ITLBTR_PPN) | ITLB_PR_NOLIMIT);
+ return;
+ }
+
+ /* Update ITLB miss counter and EA */
+ itlb_miss_count++;
+ itlb_miss_ea = ea;
+
+ /* Whatever access is in progress, translated address have to point to physical RAM */
+ ta = (ea & ((RAM_SIZE/2) - 1)) + DATA_END_ADD;
+ tlbtr = (ta & SPR_ITLBTR_PPN) | (itlb_val & TLB_PR_MASK);
+
+ debug("ta = %.8lx\n", ta);
+
+ /* Set ITLB entry */
+ mtspr (SPR_ITLBMR_BASE(way) + set, (ea & SPR_ITLBMR_VPN) | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(way) + set, tlbtr);
+}
+
+/* Intstruction page fault exception handler */
+void ipage_fault_handler (void)
+{
+ unsigned long ea;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and way */
+ set = (ea / PAGE_SIZE) % ITLB_SETS;
+ for (i = 0; i < ITLB_WAYS; i++) {
+ if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_VPN) == (ea & SPR_ITLBMR_VPN)) {
+ way = i;
+ break;
+ }
+ }
+
+ debug("ea = %.8lx set = %d way = %d\n", ea, set, way);
+
+ if ((FLASH_START <= ea) && (ea < TEXT_END_ADD)) {
+ /* If this is acces to data of this program set one to one translation */
+ mtspr (SPR_DTLBTR_BASE(way) + set, (ea & SPR_DTLBTR_PPN) | ITLB_PR_NOLIMIT);
+ return;
+ }
+
+ /* Update instruction page fault counter and EA */
+ ipage_fault_count++;
+ ipage_fault_ea = ea;
+
+ /* Give permission */
+ mtspr (SPR_ITLBTR_BASE(way) + set, (mfspr (SPR_ITLBTR_BASE(way) + set) & ~ITLB_PR_NOLIMIT) | itlb_val);
+}
+
+/* Invalidate all entries in DTLB and enable DMMU */
+void dmmu_enable (void)
+{
+ /* Register DTLB miss handler */
+ excpt_dtlbmiss = (unsigned long)dtlb_miss_handler;
+
+ /* Register data page fault handler */
+ excpt_dpfault = (unsigned long)dpage_fault_handler;
+
+ /* Enable DMMU */
+ lo_dmmu_en ();
+}
+
+/* Disable DMMU */
+void dmmu_disable (void)
+{
+ mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_DME);
+}
+
+/* Invalidate all entries in ITLB and enable IMMU */
+void immu_enable (void)
+{
+ /* Register ITLB miss handler */
+ excpt_itlbmiss = (unsigned long)itlb_miss_handler;
+
+ /* Register instruction page fault handler */
+ excpt_ipfault = (unsigned long)ipage_fault_handler;
+
+ /* Enable IMMU */
+ lo_immu_en ();
+}
+
+/* Disable IMMU */
+void immu_disable (void)
+{
+ mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_IME);
+}
+
+void write_pattern(unsigned long start, unsigned long end)
+{
+ unsigned long add;
+
+ add = start;
+ while (add < end) {
+ REG32(add) = add;
+ add += PAGE_SIZE;
+ }
+
+}
+
+/* Translation address register test
+ Set various translation and check the pattern */
+int dtlb_translation_test (void)
+{
+ int i, j;
+ unsigned long ea, ta;
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Set dtlb permisions */
+ dtlb_val = DTLB_PR_NOLIMIT;
+
+ /* Write test pattern */
+ for (i = 0; i < DTLB_SETS; i++) {
+ REG32(RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE)) = i;
+ REG32(RAM_START + (RAM_SIZE/2) + ((i + 1)*PAGE_SIZE) - 4) = 0xffffffff - i;
+ }
+
+ /* Set one to one translation of the last way of DTLB */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ ea = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ ta = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(DTLB_WAYS - 1) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Enable DMMU */
+ dmmu_enable();
+
+ /* Check the pattern */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ ea = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ ASSERT(REG32(ea) == i);
+ ea = RAM_START + (RAM_SIZE/2) + ((i + 1)*PAGE_SIZE) - 4;
+ ASSERT(REG32(ea) == (0xffffffff - i));
+ }
+
+ /* Write new pattern */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ REG32(RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE)) = 0xffffffff - i;
+ REG32(RAM_START + (RAM_SIZE/2) + ((i + 1)*PAGE_SIZE) - 4) = i;
+ }
+
+ /* Set 0 -> RAM_START + (RAM_SIZE/2) translation */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ ea = i*PAGE_SIZE;
+ ta = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(DTLB_WAYS - 1) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Check the pattern */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ ea = i*PAGE_SIZE;
+ ASSERT(REG32(ea) == (0xffffffff - i));
+ ea = ((i + 1)*PAGE_SIZE) - 4;
+ ASSERT(REG32(ea) == i);
+ }
+
+ /* Write new pattern */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ REG32(i*PAGE_SIZE) = i;
+ REG32(((i + 1)*PAGE_SIZE) - 4) = 0xffffffff - i;
+ }
+
+ /* Set hi -> lo, lo -> hi translation */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ ea = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ ta = RAM_START + (RAM_SIZE/2) + ((DTLB_SETS - i - 1 + TLB_DATA_SET_NB)*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(DTLB_WAYS - 1) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Check the pattern */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ ea = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ ASSERT(REG32(ea) == (DTLB_SETS - i - 1 + TLB_DATA_SET_NB));
+ ea = RAM_START + (RAM_SIZE/2) + ((i + 1)*PAGE_SIZE) - 4;
+ ASSERT(REG32(ea) == (0xffffffff - DTLB_SETS + i + 1 - TLB_DATA_SET_NB));
+ }
+
+ /* Write new pattern */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ REG32(RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE)) = 0xffffffff - i;
+ REG32(RAM_START + (RAM_SIZE/2) + ((i + 1)*PAGE_SIZE) - 4) = i;
+ }
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ /* Check the pattern */
+ for (i = TLB_DATA_SET_NB; i < DTLB_SETS; i++) {
+ ea = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ ASSERT(REG32(ea) == (0xffffffff - DTLB_SETS + i + 1 - TLB_DATA_SET_NB));
+ ea = RAM_START + (RAM_SIZE/2) + ((i + 1)*PAGE_SIZE) - 4;
+ ASSERT(REG32(ea) == (DTLB_SETS - i - 1 + TLB_DATA_SET_NB));
+ }
+
+ return 0;
+}
+
+/* EA match register test
+ Shifting one in DTLBMR and performing accesses to boundaries
+ of the page, checking the triggering of exceptions */
+int dtlb_match_test (int way, int set)
+{
+ int i, j, tmp;
+ unsigned long add, t_add;
+ unsigned long ea, ta;
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Set dtlb permisions */
+ dtlb_val = DTLB_PR_NOLIMIT;
+
+ /* Set pattern */
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) - 4) = 0x00112233;
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE)) = 0x44556677;
+ REG32(RAM_START + (RAM_SIZE/2) + (set + 1)*PAGE_SIZE - 4) = 0x8899aabb;
+ REG32(RAM_START + (RAM_SIZE/2) + (set + 1)*PAGE_SIZE) = 0xccddeeff;
+
+ /* Enable DMMU */
+ dmmu_enable();
+
+ /* Shifting one in DTLBMR */
+ i = 0;
+ add = (PAGE_SIZE*DTLB_SETS);
+ t_add = add + (set*PAGE_SIZE);
+ while (add != 0x00000000) {
+ mtspr (SPR_DTLBMR_BASE(way) + set, t_add | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(way) + set, (RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE)) | DTLB_PR_NOLIMIT);
+
+ /* Reset DTLB miss counter and EA */
+ dtlb_miss_count = 0;
+ dtlb_miss_ea = 0;
+
+ if (((t_add < RAM_START) || (t_add >= DATA_END_ADD)) && ((t_add < FLASH_START) || (t_add >= TEXT_END_ADD))) {
+
+ /* Read last address of previous page */
+ tmp = REG32(t_add - 4);
+ ASSERT(tmp == 0x00112233);
+ ASSERT(dtlb_miss_count == 1);
+
+ /* Read first address of the page */
+ tmp = REG32(t_add);
+ ASSERT(tmp == 0x44556677);
+ ASSERT(dtlb_miss_count == 1);
+
+ /* Read last address of the page */
+ tmp = REG32(t_add + PAGE_SIZE - 4);
+ ASSERT(tmp == 0x8899aabb);
+ ASSERT(dtlb_miss_count == 1);
+
+ /* Read first address of next page */
+ tmp = REG32(t_add + PAGE_SIZE);
+ ASSERT(tmp == 0xccddeeff);
+ ASSERT(dtlb_miss_count == 2);
+ }
+
+ i++;
+ add = (PAGE_SIZE*DTLB_SETS) << i;
+ t_add = add + (set*PAGE_SIZE);
+
+ for (j = 0; j < DTLB_WAYS; j++) {
+ mtspr (SPR_DTLBMR_BASE(j) + ((set - 1) & (DTLB_SETS - 1)), 0);
+ mtspr (SPR_DTLBMR_BASE(j) + ((set + 1) & (DTLB_SETS - 1)), 0);
+ }
+ }
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ return 0;
+}
+
+/* Valid bit test
+ Set all ways of one set to be invalid, perform
+ access so miss handler will set them to valid,
+ try access again - there should be no miss exceptions */
+int dtlb_valid_bit_test (int set)
+{
+ int i, j;
+ unsigned long ea, ta;
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Reset DTLB miss counter and EA */
+ dtlb_miss_count = 0;
+ dtlb_miss_ea = 0;
+
+ /* Set dtlb permisions */
+ dtlb_val = DTLB_PR_NOLIMIT;
+
+ /* Resetv DTLBMR for every way */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ mtspr (SPR_DTLBMR_BASE(i) + set, 0);
+ }
+
+ /* Enable DMMU */
+ dmmu_enable();
+
+ /* Perform writes to address, that is not in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ REG32(RAM_START + RAM_SIZE + (i*DTLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)) = i;
+
+ /* Check if there was DTLB miss */
+ ASSERT(dtlb_miss_count == (i + 1));
+ ASSERT(dtlb_miss_ea == (RAM_START + RAM_SIZE + (i*DTLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)));
+ }
+
+ /* Reset DTLB miss counter and EA */
+ dtlb_miss_count = 0;
+ dtlb_miss_ea = 0;
+
+ /* Perform reads to address, that is now in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ ASSERT(REG32(RAM_START + RAM_SIZE + (i*DTLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)) == i);
+
+ /* Check if there was DTLB miss */
+ ASSERT(dtlb_miss_count == 0);
+ }
+
+ /* Reset valid bits */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ mtspr (SPR_DTLBMR_BASE(i) + set, mfspr (SPR_DTLBMR_BASE(i) + set) & ~SPR_DTLBMR_V);
+ }
+
+ /* Perform reads to address, that is now in DTLB but is invalid */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ ASSERT(REG32(RAM_START + RAM_SIZE + (i*DTLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)) == i);
+
+ /* Check if there was DTLB miss */
+ ASSERT(dtlb_miss_count == (i + 1));
+ ASSERT(dtlb_miss_ea == (RAM_START + RAM_SIZE + (i*DTLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)));
+ }
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ return 0;
+}
+
+/* Permission test
+ Set various permissions, perform r/w access
+ in user and supervisor mode and chack triggering
+ of page fault exceptions */
+int dtlb_premission_test (int set)
+{
+ int i, j;
+ unsigned long ea, ta, tmp;
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Testing page */
+ ea = RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE);
+
+ /* Set match register */
+ mtspr (SPR_DTLBMR_BASE(DTLB_WAYS - 1) + set, ea | SPR_DTLBMR_V);
+
+ /* Reset page fault counter and EA */
+ dpage_fault_count = 0;
+ dpage_fault_ea = 0;
+
+ /* Enable DMMU */
+ dmmu_enable();
+
+ /* Write supervisor */
+ dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_SWE;
+ mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_SWE));
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0) = 0x00112233;
+ ASSERT(dpage_fault_count == 1);
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4) = 0x44556677;
+ ASSERT(dpage_fault_count == 1);
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 8) = 0x8899aabb;
+ ASSERT(dpage_fault_count == 1);
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 12) = 0xccddeeff;
+ ASSERT(dpage_fault_count == 1);
+
+ /* Read supervisor */
+ dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_SRE;
+ mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_SRE));
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0);
+ ASSERT(dpage_fault_count == 2);
+ ASSERT(tmp == 0x00112233);
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4);
+ ASSERT(dpage_fault_count == 2);
+ ASSERT(tmp == 0x44556677);
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 8);
+ ASSERT(dpage_fault_count == 2);
+ ASSERT(tmp == 0x8899aabb);
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 12);
+ ASSERT(dpage_fault_count == 2);
+ ASSERT(tmp == 0xccddeeff);
+
+ /* Write user */
+ dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_UWE;
+ mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_UWE));
+
+ /* Set user mode */
+ mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SM);
+
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0) = 0xffeeddcc;
+ ASSERT(dpage_fault_count == 3);
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4) = 0xbbaa9988;
+ ASSERT(dpage_fault_count == 3);
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 8) = 0x77665544;
+ ASSERT(dpage_fault_count == 3);
+ REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 12) = 0x33221100;
+ ASSERT(dpage_fault_count == 3);
+
+ /* Trigger sys call exception to enable supervisor mode again */
+ sys_call ();
+
+ /* Read user mode */
+ dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_URE;
+ mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_URE));
+
+ /* Set user mode */
+ mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SM);
+
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0);
+ ASSERT(dpage_fault_count == 4);
+ ASSERT(tmp == 0xffeeddcc);
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4);
+ ASSERT(dpage_fault_count == 4);
+ ASSERT(tmp == 0xbbaa9988);
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 8);
+ ASSERT(dpage_fault_count == 4);
+ ASSERT(tmp == 0x77665544);
+ tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 12);
+ ASSERT(dpage_fault_count == 4);
+ ASSERT(tmp == 0x33221100);
+
+ /* Trigger sys call exception to enable supervisor mode again */
+ sys_call ();
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ return 0;
+}
+
+/* Data cache inhibit bit test
+ Set and clear CI bit and check the pattern. */
+int dtlb_ci_test (void)
+{
+ int i, j;
+ unsigned long ea, ta, ret;
+
+ /* Disable DMMU */
+ dmmu_disable();
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT | SPR_DTLBTR_CI);
+ }
+
+ /* Testing page */
+ ea = RAM_START + (RAM_SIZE/2) + (TLB_DATA_SET_NB*PAGE_SIZE);
+ ta = RAM_START + (RAM_SIZE/2) + (TLB_DATA_SET_NB*PAGE_SIZE);
+
+ /* Write test pattern */
+ REG32(ea) = 0x01234567;
+ REG32(ea + PAGE_SIZE - 4) = 0x9abcdef;
+
+ /* Set one to one translation with CI bit for testing area */
+ mtspr (SPR_DTLBMR_BASE(0) + TLB_DATA_SET_NB, ea | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + TLB_DATA_SET_NB, ta | DTLB_PR_NOLIMIT | SPR_DTLBTR_CI);
+
+ ret = lo_dtlb_ci_test(ea, TLB_DATA_SET_NB);
+ ASSERT(ret == 0);
+
+ return 0;
+}
+
+/* Translation address register test
+ Set various translation and check the pattern */
+int itlb_translation_test (void)
+{
+ int i, j;
+ unsigned long ea, ta;
+
+ /* Disable IMMU */
+ immu_disable();
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Set dtlb permisions */
+ itlb_val = ITLB_PR_NOLIMIT;
+
+ /* Write test program */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ copy_jump (RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE) + (i*0x10));
+ }
+
+ /* Set one to one translation of the last way of ITLB */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ ea = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ ta = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(ITLB_WAYS - 1) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(ITLB_WAYS - 1) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Enable IMMU */
+ immu_enable();
+
+ /* Check the pattern */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ call (RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE) + (i*0x10));
+ }
+
+ /* Set FLASH_END -> RAM_START + (RAM_SIZE/2) translation */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ ea = FLASH_START + FLASH_SIZE + i*PAGE_SIZE;
+ ta = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(ITLB_WAYS - 1) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(ITLB_WAYS - 1) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Check the pattern */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ call (FLASH_START + FLASH_SIZE + (i*PAGE_SIZE) + (i*0x10));
+ }
+
+ /* Set hi -> lo, lo -> hi translation */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ ea = RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE);
+ ta = RAM_START + (RAM_SIZE/2) + ((ITLB_SETS - i - 1 + TLB_TEXT_SET_NB)*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(ITLB_WAYS - 1) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(ITLB_WAYS - 1) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Check the pattern */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ call (RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE) + ((ITLB_SETS - i - 1 + TLB_TEXT_SET_NB)*0x10));
+ }
+
+ /* Disable IMMU */
+ immu_disable ();
+
+ /* Check the pattern */
+ for (i = TLB_TEXT_SET_NB; i < ITLB_SETS; i++) {
+ call (RAM_START + (RAM_SIZE/2) + (i*PAGE_SIZE) + (i*0x10));
+ }
+
+ return 0;
+}
+
+/* EA match register test
+ Shifting one in ITLBMR and performing accesses to boundaries
+ of the page, checking the triggering of exceptions */
+int itlb_match_test (int way, int set)
+{
+ int i, j;
+ unsigned long add, t_add;
+ unsigned long ea, ta;
+
+ /* Disable IMMU */
+ immu_disable();
+
+ /* Invalidate all entries in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Set dtlb permisions */
+ itlb_val = ITLB_PR_NOLIMIT;
+
+ /* Set pattern */
+ copy_jump (RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) - 8);
+ copy_jump (RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE));
+ copy_jump (RAM_START + (RAM_SIZE/2) + (set + 1)*PAGE_SIZE - 8);
+ copy_jump (RAM_START + (RAM_SIZE/2) + (set + 1)*PAGE_SIZE);
+
+ /* Enable IMMU */
+ immu_enable();
+
+ /* Shifting one in ITLBMR */
+ i = 0;
+ add = (PAGE_SIZE*ITLB_SETS);
+ t_add = add + (set*PAGE_SIZE);
+ while (add != 0x00000000) {
+ mtspr (SPR_ITLBMR_BASE(way) + set, t_add | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(way) + set, (RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE)) | ITLB_PR_NOLIMIT);
+
+ /* Reset ITLB miss counter and EA */
+ itlb_miss_count = 0;
+ itlb_miss_ea = 0;
+
+ if (((t_add < RAM_START) || (t_add >= DATA_END_ADD)) && ((t_add < FLASH_START) || (t_add >= TEXT_END_ADD))) {
+
+ /* Jump on last address of previous page */
+ call (t_add - 8);
+ ASSERT(itlb_miss_count == 1);
+
+ /* Jump on first address of the page */
+ call (t_add);
+ ASSERT(itlb_miss_count == 1);
+
+ /* Jump on last address of the page */
+ call (t_add + PAGE_SIZE - 8);
+ ASSERT(itlb_miss_count == 1);
+
+ /* Jump on first address of next page */
+ call (t_add + PAGE_SIZE);
+ ASSERT(itlb_miss_count == 2);
+ }
+
+ i++;
+ add = (PAGE_SIZE*ITLB_SETS) << i;
+ t_add = add + (set*PAGE_SIZE);
+
+ for (j = 0; j < ITLB_WAYS; j++) {
+ mtspr (SPR_ITLBMR_BASE(j) + ((set - 1) & (ITLB_SETS - 1)), 0);
+ mtspr (SPR_ITLBMR_BASE(j) + ((set + 1) & (ITLB_SETS - 1)), 0);
+ }
+ }
+
+ /* Disable IMMU */
+ immu_disable();
+
+ return 0;
+}
+
+/* Valid bit test
+ Set all ways of one set to be invalid, perform
+ access so miss handler will set them to valid,
+ try access again - there should be no miss exceptions */
+int itlb_valid_bit_test (int set)
+{
+ int i, j;
+ unsigned long ea, ta;
+
+ /* Disable IMMU */
+ immu_disable();
+
+ /* Invalidate all entries in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Reset ITLB miss counter and EA */
+ itlb_miss_count = 0;
+ itlb_miss_ea = 0;
+
+ /* Set itlb permisions */
+ itlb_val = ITLB_PR_NOLIMIT;
+
+ /* Resetv ITLBMR for every way */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ mtspr (SPR_ITLBMR_BASE(i) + set, 0);
+ }
+
+ /* Enable IMMU */
+ immu_enable();
+
+ /* Perform jumps to address, that is not in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ TEST_JUMP(RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE));
+
+ /* Check if there was ITLB miss */
+ ASSERT(itlb_miss_count == (i + 1));
+ ASSERT(itlb_miss_ea == (RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)));
+ }
+
+ /* Reset ITLB miss counter and EA */
+ itlb_miss_count = 0;
+ itlb_miss_ea = 0;
+
+ /* Perform jumps to address, that is now in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ TEST_JUMP(RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE));
+
+ /* Check if there was ITLB miss */
+ ASSERT(itlb_miss_count == 0);
+ }
+
+ /* Reset valid bits */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ mtspr (SPR_ITLBMR_BASE(i) + set, mfspr (SPR_ITLBMR_BASE(i) + set) & ~SPR_ITLBMR_V);
+ }
+
+ /* Perform jumps to address, that is now in ITLB but is invalid */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ TEST_JUMP(RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE));
+
+ /* Check if there was ITLB miss */
+ ASSERT(itlb_miss_count == (i + 1));
+ ASSERT(itlb_miss_ea == (RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)));
+ }
+
+ /* Disable IMMU */
+ immu_disable ();
+
+ return 0;
+}
+
+/* Permission test
+ Set various permissions, perform r/w access
+ in user and supervisor mode and chack triggering
+ of page fault exceptions */
+int itlb_premission_test (int set)
+{
+ int i, j;
+ unsigned long ea, ta;
+
+ /* Disable IMMU */
+ immu_disable();
+
+ /* Invalidate all entries in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Testing page */
+ ea = RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE);
+
+ /* Set match register */
+ mtspr (SPR_ITLBMR_BASE(ITLB_WAYS - 1) + set, ea | SPR_ITLBMR_V);
+
+ /* Reset page fault counter and EA */
+ ipage_fault_count = 0;
+ ipage_fault_ea = 0;
+
+ /* Copy the code */
+ copy_jump (ea);
+ copy_jump (ea + 8);
+
+ /* Enable IMMU */
+ immu_enable ();
+
+ /* Execute supervisor */
+ itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_SXE;
+ mtspr (SPR_ITLBTR_BASE(ITLB_WAYS - 1) + set, ea | (ITLB_PR_NOLIMIT & ~SPR_ITLBTR_SXE));
+
+ call (ea);
+ ASSERT(ipage_fault_count == 1);
+ call (ea + 8);
+ ASSERT(ipage_fault_count == 1);
+
+ /* Execute user */
+ itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_UXE;
+ mtspr (SPR_ITLBTR_BASE(ITLB_WAYS - 1) + set, ea | (ITLB_PR_NOLIMIT & ~SPR_ITLBTR_UXE));
+
+ /* Set user mode */
+ mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SM);
+
+ call (ea);
+ ASSERT(ipage_fault_count == 2);
+ call (ea + 8);
+ ASSERT(ipage_fault_count == 2);
+
+ /* Trigger sys call exception to enable supervisor mode again */
+ sys_call ();
+
+ /* Disable IMMU */
+ immu_disable ();
+
+ return 0;
+}
+
+/* Instruction cache inhibit bit test
+ Set and clear CI bit and check the pattern. */
+int itlb_ci_test(void)
+{
+ int i, j;
+ unsigned long ea, ta, ret;
+
+ /* Disable IMMU */
+ immu_disable();
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Testing page */
+ ea = RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE);
+
+ ret = lo_itlb_ci_test (ea, TLB_TEXT_SET_NB);
+ ASSERT(ret == 0);
+
+ return 0;
+}
+
+int main (void)
+{
+ int i, j;
+
+ i = j = 0; /* Get rid of warnings */
+
+ /* Register bus error handler */
+ excpt_buserr = (unsigned long)bus_err_handler;
+
+ /* Register illegal insn handler */
+ excpt_illinsn = (unsigned long)ill_insn_handler;
+
+ /* Register illegal insn handler */
+ excpt_syscall = (unsigned long)sys_call_handler;
+
+#if 1
+ /* Translation test */
+ dtlb_translation_test ();
+
+ /* Virtual address match test */
+#ifndef RTL_SIM
+ for (j = 0; j < DTLB_WAYS; j++) {
+ for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
+ dtlb_match_test (j, i);
+ }
+#else
+ dtlb_match_test (0, DTLB_SETS - 2);
+#endif
+
+ /* Valid bit testing */
+#ifndef RTL_SIM
+ for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
+ dtlb_valid_bit_test (i);
+#else
+ dtlb_valid_bit_test (DTLB_SETS - 2);
+#endif
+
+ /* Permission test */
+#ifndef RTL_SIM
+ for (i = TLB_DATA_SET_NB; i < (DTLB_SETS - 1); i++)
+ dtlb_premission_test (i);
+#else
+ dtlb_premission_test (DTLB_SETS - 2);
+#endif
+
+ dtlb_ci_test();
+#endif
+
+#if 1
+ /* Translation test */
+ itlb_translation_test ();
+
+ /* Virtual address match test */
+#ifndef RTL_SIM
+ for (j = 0; j < DTLB_WAYS; j++) {
+ for (i = TLB_TEXT_SET_NB + 1; i < (DTLB_SETS - 1); i++)
+ itlb_match_test (j, i);
+ }
+#else
+ itlb_match_test (0, DTLB_SETS - 2);
+#endif
+
+ /* Valid bit testing */
+#ifndef RTL_SIM
+ for (i = TLB_TEXT_SET_NB; i < (ITLB_SETS); i++)
+ itlb_valid_bit_test (i);
+#else
+ itlb_valid_bit_test (ITLB_SETS-1);
+#endif
+
+ /* Permission test */
+#ifndef RTL_SIM
+ for (i = TLB_TEXT_SET_NB; i < (ITLB_SETS - 1); i++)
+ itlb_premission_test (i);
+#else
+ itlb_premission_test (ITLB_SETS - 2);
+#endif
+
+ itlb_ci_test();
+#endif
+
+ report (0xdeaddead);
+ exit (0);
+ return 0;
+}
+
Index: mmu_asm.S
===================================================================
--- mmu_asm.S (nonexistent)
+++ mmu_asm.S (revision 1765)
@@ -0,0 +1,511 @@
+#include "spr_defs.h"
+
+#define PAGE_SIZE 8192
+#define DTLB_PR_NOLIMIT (SPR_DTLBTR_URE | \
+ SPR_DTLBTR_UWE | \
+ SPR_DTLBTR_SRE | \
+ SPR_DTLBTR_SWE )
+#define ITLB_PR_NOLIMIT (SPR_ITLBTR_SXE | \
+ SPR_ITLBTR_UXE )
+ .global _lo_dmmu_en
+ .global _lo_immu_en
+ .global _lo_dtlb_ci_test
+ .global _lo_itlb_ci_test
+ .global _testjump
+ .global _ic_enable
+ .global _ic_disable
+ .global _dc_enable
+ .global _dc_disable
+
+_lo_dmmu_en:
+ l.mfspr r11,r0,SPR_SR
+ l.ori r11,r11,SPR_SR_DME
+ l.mtspr r0,r11,SPR_ESR_BASE
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+_lo_dmmu_dis:
+ l.addi r13,r0,-1
+ l.xori r13,r13,SPR_SR_DME
+ l.mfspr r11,r0,SPR_SR
+ l.and r11,r11,r13
+ l.mtspr r0,r11,SPR_SR
+ l.jr r9
+ l.nop
+
+_lo_immu_en:
+ l.mfspr r11,r0,SPR_SR
+ l.ori r11,r11,SPR_SR_IME
+ l.mtspr r0,r11,SPR_ESR_BASE
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+_lo_immu_dis:
+ l.addi r13,r0,-1
+ l.xori r13,r13,SPR_SR_IME
+ l.mfspr r11,r0,SPR_SR
+ l.and r11,r11,r13
+ l.mtspr r0,r11,SPR_SR
+ l.jr r9
+ l.nop
+
+_testjump:
+ l.movhi r5,0x4800
+ l.ori r5,r5,0x4800
+ l.sw 0x0(r3),r5
+ l.movhi r5,0x1500
+ l.ori r5,r5,0x0000
+ l.sw 0x4(r3),r5
+ l.or r5,r0,r9
+ l.jalr r4
+ l.nop
+ l.or r9,r0,r5
+ l.jr r9
+ l.nop
+
+_ic_enable:
+ /* Disable IC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_ICE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ /* Invalidate IC */
+ l.addi r13,r0,0
+ l.addi r11,r0,8192
+1:
+ l.mtspr r0,r13,SPR_ICBIR
+ l.sfne r13,r11
+ l.bf 1b
+ l.addi r13,r13,16
+
+ /* Enable IC */
+ l.mfspr r13,r0,SPR_SR
+ l.ori r13,r13,SPR_SR_ICE
+ l.mtspr r0,r13,SPR_SR
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+ l.jr r9
+ l.nop
+
+_ic_disable:
+ /* Disable IC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_ICE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ l.jr r9
+ l.nop
+
+_dc_enable:
+ /* Disable DC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_DCE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ /* Flush DC */
+ l.addi r13,r0,0
+ l.addi r11,r0,8192
+1:
+ l.mtspr r0,r13,SPR_DCBIR
+ l.sfne r13,r11
+ l.bf 1b
+ l.addi r13,r13,16
+
+ /* Enable DC */
+ l.mfspr r13,r0,SPR_SR
+ l.ori r13,r13,SPR_SR_DCE
+ l.mtspr r0,r13,SPR_SR
+
+ l.jr r9
+ l.nop
+
+_dc_disable:
+ /* Disable DC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_DCE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ l.jr r9
+ l.nop
+
+ /* dtlb_ic_test(unsigned long add, unsigned long set) */
+_lo_dtlb_ci_test:
+ l.addi r1,r1,-4
+ l.sw 0(r1),r9
+
+ l.addi r8,r0,0
+
+ l.movhi r5,hi(0x01234567)
+ l.ori r5,r5,lo(0x01234567)
+ l.sw 0(r3),r5
+ l.movhi r5,hi(0x89abcdef)
+ l.ori r5,r5,lo(0x89abcdef)
+ l.sw (PAGE_SIZE - 4)(r3),r5
+
+ l.ori r5,r3,SPR_DTLBMR_V
+ l.mtspr r4,r5,SPR_DTLBMR_BASE(0)
+
+ l.ori r5,r3,(DTLB_PR_NOLIMIT | SPR_DTLBTR_CI)
+ l.mtspr r4,r5,SPR_DTLBTR_BASE(0)
+
+ l.addi r5,r3,PAGE_SIZE
+ l.ori r5,r5,SPR_DTLBMR_V
+ l.addi r6,r4,1
+ l.mtspr r6,r5,SPR_DTLBMR_BASE(0)
+
+ l.addi r5,r3,PAGE_SIZE
+ l.ori r5,r5,(DTLB_PR_NOLIMIT | SPR_DTLBTR_CI)
+ l.addi r6,r4,1
+ l.mtspr r6,r5,SPR_DTLBTR_BASE(0)
+
+ l.jal _lo_dmmu_en
+ l.nop
+ l.jal _dc_enable
+ l.nop
+
+ l.movhi r6,hi(0x01234567)
+ l.ori r6,r6,lo(0x01234567)
+ l.lwz r5,0(r3)
+ l.sfeq r6,r5
+ l.bnf 11f
+ l.nop
+ l.movhi r6,hi(0x89abcdef)
+ l.ori r6,r6,lo(0x89abcdef)
+ l.lwz r5,(PAGE_SIZE - 4)(r3)
+ l.sfeq r6,r5
+ l.bnf 12f
+ l.nop
+
+ l.movhi r5,hi(0x76543210)
+ l.ori r5,r5,lo(0x76543210)
+ l.sw 0(r3),r5
+ l.movhi r5,hi(0xfedcba9)
+ l.ori r5,r5,lo(0xfedcba9)
+ l.sw (PAGE_SIZE - 4)(r3),r5
+
+ l.jal _lo_dmmu_dis
+ l.nop
+ l.ori r5,r3,(DTLB_PR_NOLIMIT)
+ l.mtspr r4,r5,SPR_DTLBTR_BASE(0)
+ l.jal _lo_dmmu_en
+ l.nop
+
+ l.movhi r6,hi(0x76543210)
+ l.ori r6,r6,lo(0x76543210)
+ l.lwz r5,0(r3)
+ l.sfeq r6,r5
+ l.bnf 13f
+ l.nop
+ l.movhi r6,hi(0xfedcba9)
+ l.ori r6,r6,lo(0xfedcba9)
+ l.lwz r5,(PAGE_SIZE - 4)(r3)
+ l.sfeq r6,r5
+ l.bnf 14f
+ l.nop
+
+ l.jal _lo_dmmu_dis
+ l.nop
+ l.ori r5,r3,(DTLB_PR_NOLIMIT | SPR_DTLBTR_CI)
+ l.mtspr r4,r5,SPR_DTLBTR_BASE(0)
+ l.jal _lo_dmmu_en
+ l.nop
+
+ l.movhi r5,hi(0x00112233)
+ l.ori r5,r5,lo(0x00112233)
+ l.sw 0(r3),r5
+#if 1
+ l.movhi r5,hi(0x44556677)
+ l.ori r5,r5,lo(0x44556677)
+ l.sw 4(r3),r5
+ l.movhi r5,hi(0x8899aabb)
+ l.ori r5,r5,lo(0x8899aabb)
+ l.sw 8(r3),r5
+ l.movhi r5,hi(0xccddeeff)
+ l.ori r5,r5,lo(0xccddeeff)
+ l.sw 12(r3),r5
+#endif
+ l.movhi r5,hi(0x44556677)
+ l.ori r5,r5,lo(0x44556677)
+ l.sw (PAGE_SIZE - 4)(r3),r5
+
+ l.movhi r6,hi(0x00112233)
+ l.ori r6,r6,lo(0x00112233)
+ l.lwz r5,0(r3)
+ l.sfeq r6,r5
+ l.bnf 15f
+ l.nop
+ l.movhi r6,hi(0x44556677)
+ l.ori r6,r6,lo(0x44556677)
+ l.lwz r5,(PAGE_SIZE - 4)(r3)
+ l.sfeq r6,r5
+ l.bnf 16f
+ l.nop
+
+ l.jal _lo_dmmu_dis
+ l.nop
+ l.ori r5,r3,(DTLB_PR_NOLIMIT)
+ l.mtspr r4,r5,SPR_DTLBTR_BASE(0)
+ l.jal _lo_dmmu_en
+ l.nop
+
+ l.movhi r6,hi(0x76543210)
+ l.ori r6,r6,lo(0x76543210)
+ l.lwz r5,0(r3)
+ l.sfeq r6,r5
+ l.bnf 17f
+ l.nop
+
+ l.movhi r6,hi(0xfedcba9)
+ l.ori r6,r6,lo(0xfedcba9)
+ l.lwz r5,(PAGE_SIZE - 4)(r3)
+ l.sfeq r6,r5
+ l.bnf 18f
+ l.nop
+
+ /* Invalidate cache */
+ l.jal _dc_disable
+ l.nop
+
+ l.movhi r5,hi(0x00112233)
+ l.ori r5,r5,lo(0x00112233)
+ l.sw 12(r3),r5
+ l.movhi r5,hi(0x44556677)
+ l.ori r5,r5,lo(0x44556677)
+ l.sw 8(r3),r5
+ l.movhi r5,hi(0x8899aabb)
+ l.ori r5,r5,lo(0x8899aabb)
+ l.sw 4(r3),r5
+ l.movhi r5,hi(0xccddeeff)
+ l.ori r5,r5,lo(0xccddeeff)
+ l.sw 0(r3),r5
+ l.movhi r5,hi(0x44556677)
+ l.ori r5,r5,lo(0x44556677)
+ l.sw (PAGE_SIZE - 4)(r3),r5
+
+ l.jal _dc_enable
+ l.nop
+
+ /* I want this part to execute as fast as possible */
+ l.jal _ic_enable
+ l.nop
+
+ l.addi r5,r3,PAGE_SIZE
+
+ /* This jump is just to be shure that the following
+ instructions will get into IC */
+ l.j 1f
+ l.nop
+ /* This shuld trigger cahe line refill */
+2: l.lwz r6,0(r3)
+ l.j 2f
+ /* This load is from non cached area and may cause some problems
+ in previuos refill, which is probably still in progress */
+ l.lwz r6,0(r5)
+1: l.j 2b
+ l.nop
+2:
+ /* Check the line that was previosly refilled */
+ l.movhi r6,hi(0x00112233)
+ l.ori r6,r6,lo(0x00112233)
+ l.lwz r5,12(r3)
+ l.sfeq r6,r5
+ l.bnf 19f
+ l.nop
+ l.movhi r6,hi(0x44556677)
+ l.ori r6,r6,lo(0x44556677)
+ l.lwz r5,8(r3)
+ l.sfeq r6,r5
+ l.bnf 19f
+ l.nop
+ l.movhi r6,hi(0x8899aabb)
+ l.ori r6,r6,lo(0x8899aabb)
+ l.lwz r5,4(r3)
+ l.sfeq r6,r5
+ l.bnf 19f
+ l.nop
+ l.movhi r6,hi(0xccddeeff)
+ l.ori r6,r6,lo(0xccddeeff)
+ l.lwz r5,0(r3)
+ l.sfeq r6,r5
+ l.bnf 19f
+ l.nop
+
+ l.jal _dc_disable
+ l.nop
+
+ l.jal _lo_dmmu_dis
+ l.nop
+
+ l.j 10f
+ l.nop
+
+19: l.addi r8,r8,1
+18: l.addi r8,r8,1
+17: l.addi r8,r8,1
+16: l.addi r8,r8,1
+15: l.addi r8,r8,1
+14: l.addi r8,r8,1
+13: l.addi r8,r8,1
+12: l.addi r8,r8,1
+11: l.addi r8,r8,1
+
+10: l.jal _dc_disable
+ l.nop
+
+ l.jal _ic_disable
+ l.nop
+
+ l.jal _lo_dmmu_dis
+ l.nop
+
+ l.addi r11,r8,0
+ l.sw 0(r0),r8
+ l.sw 4(r0),r5
+
+ l.lwz r9,0(r1)
+ l.jr r9
+ l.addi r1,r1,4
+
+ /* itlb_ic_test(unsigned long add, unsigned long set) */
+_lo_itlb_ci_test:
+ l.addi r1,r1,-4
+ l.sw 0(r1),r9
+
+ l.addi r8,r0,0
+
+ /* Copy the code to the prepeared location */
+ l.addi r7,r0,88
+ l.movhi r5,hi(_ci_test)
+ l.ori r5,r5,lo(_ci_test)
+ l.addi r6,r3,0
+1: l.lwz r11,0(r5)
+ l.sw 0(r6),r11
+ l.addi r5,r5,4
+ l.addi r6,r6,4
+ l.addi r7,r7,-4
+ l.sfeqi r7,0
+ l.bnf 1b
+ l.nop
+
+ l.ori r5,r3,SPR_ITLBMR_V
+ l.mtspr r4,r5,SPR_ITLBMR_BASE(0)
+
+ l.ori r5,r3,ITLB_PR_NOLIMIT
+ l.mtspr r4,r5,SPR_ITLBTR_BASE(0)
+
+ l.jal _lo_immu_en
+ l.nop
+ l.jal _ic_enable
+ l.nop
+
+ l.addi r5,r0,0
+ l.addi r6,r0,0
+ l.jalr r3
+ l.nop
+
+ l.sfeqi r5,5
+ l.bnf 11f
+ l.nop
+
+ /* Copy the code to the prepeared location */
+ l.addi r7,r0,20
+ l.movhi r5,hi(_ic_refill_test)
+ l.ori r5,r5,lo(_ic_refill_test)
+ l.addi r6,r3,12
+1: l.lwz r11,0(r5)
+ l.sw 0(r6),r11
+ l.addi r5,r5,4
+ l.addi r6,r6,4
+ l.addi r7,r7,-4
+ l.sfeqi r7,0
+ l.bnf 1b
+ l.nop
+
+ l.jal _ic_disable
+ l.nop
+ l.jal _ic_enable
+ l.nop
+
+ l.addi r5,r0,0
+ l.addi r6,r3,12
+ l.jalr r6
+ l.nop
+ l.addi r6,r3,16
+ l.jalr r6
+ l.nop
+
+ l.sfeqi r5,4
+ l.bnf 12f
+ l.nop
+
+ l.j 10f
+ l.nop
+
+12: l.addi r8,r8,1
+11: l.addi r8,r8,1
+
+10: l.jal _ic_disable
+ l.nop
+
+ l.jal _lo_dmmu_dis
+ l.nop
+
+ l.addi r11,r8,0
+ l.sw 0(r0),r11
+ l.sw 4(r0),r5
+
+ l.lwz r9,0(r1)
+ l.jr r9
+ l.addi r1,r1,4
+
+_ci_test:
+3: l.addi r5,r5,1
+
+ l.sfeqi r6,0x01
+ l.bnf 1f
+ l.nop
+
+ l.addi r13,r0,-1
+ l.xori r13,r13,SPR_SR_IME
+ l.mfspr r11,r0,SPR_SR
+ l.and r13,r11,r13
+ l.mtspr r0,r13,SPR_SR
+
+ l.ori r7,r3,(ITLB_PR_NOLIMIT | SPR_ITLBTR_CI)
+ l.mtspr r4,r7,SPR_ITLBTR_BASE(0)
+
+ l.mtspr r0,r11,SPR_SR
+
+1: l.lwz r7,0(r3)
+ l.addi r7,r7,1
+ l.sw 0(r3),r7
+
+2: l.addi r6,r6,1
+ l.sfeqi r6,3
+ l.bnf 3b
+ l.nop
+
+ l.jr r9
+ l.nop
+
+
+_ic_refill_test:
+ l.jr r9
+ l.addi r5,r5,1
+ l.addi r5,r5,1
+ l.jr r9
+ l.addi r5,r5,1
Index: cache.c
===================================================================
--- cache.c (nonexistent)
+++ cache.c (revision 1765)
@@ -0,0 +1,411 @@
+/* Cache test */
+#include "support.h"
+#include "spr_defs.h"
+
+
+#undef UART
+
+#define MEM_RAM 0x00100000
+
+/* Number of IC sets (power of 2) */
+#define IC_SETS 256
+#define DC_SETS 256
+
+/* Block size in bytes (1, 2, 4, 8, 16, 32 etc.) */
+#define IC_BLOCK_SIZE 16
+#define DC_BLOCK_SIZE 16
+
+/* Number of IC ways (1, 2, 3 etc.). */
+#define IC_WAYS 1
+#define DC_WAYS 1
+
+/* Cache size */
+#define IC_SIZE (IC_WAYS*IC_SETS*IC_BLOCK_SIZE)
+#define DC_SIZE (DC_WAYS*DC_SETS*DC_BLOCK_SIZE)
+
+/* Memory access macros */
+#define REG8(add) *((volatile unsigned char *)(add))
+#define REG16(add) *((volatile unsigned short *)(add))
+#define REG32(add) *((volatile unsigned long *)(add))
+
+#if UART
+#include "uart.h"
+#define IN_CLK 20000000
+#define UART_BASE 0x9c000000
+#define UART_BAUD_RATE 9600
+
+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+
+#define WAIT_FOR_XMITR \
+ do { \
+ lsr = REG8(UART_BASE + UART_LSR); \
+ } while ((lsr & BOTH_EMPTY) != BOTH_EMPTY)
+
+#define WAIT_FOR_THRE \
+ do { \
+ lsr = REG8(UART_BASE + UART_LSR); \
+ } while ((lsr & UART_LSR_THRE) != UART_LSR_THRE)
+
+#define CHECK_FOR_CHAR \
+ (REG8(UART_BASE + UART_LSR) & UART_LSR_DR)
+
+#define WAIT_FOR_CHAR \
+ do { \
+ lsr = REG8(UART_BASE + UART_LSR); \
+ } while ((lsr & UART_LSR_DR) != UART_LSR_DR)
+
+#define UART_TX_BUFF_LEN 32
+#define UART_TX_BUFF_MASK (UART_TX_BUFF_LEN -1)
+
+#define print_n(x) \
+ { \
+ uart_putc(s[((x) >> 28) & 0x0f]); \
+ uart_putc(s[((x) >> 24) & 0x0f]); \
+ uart_putc(s[((x) >> 20) & 0x0f]); \
+ uart_putc(s[((x) >> 16) & 0x0f]); \
+ uart_putc(s[((x) >> 12) & 0x0f]); \
+ uart_putc(s[((x) >> 8) & 0x0f]); \
+ uart_putc(s[((x) >> 4) & 0x0f]); \
+ uart_putc(s[((x) >> 0) & 0x0f]); \
+ }
+
+const char s[] = "0123456789abcdef";
+
+void uart_init(void)
+{
+ int devisor;
+
+ /* Reset receiver and transmiter */
+ REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14;
+
+ /* Disable all interrupts */
+ REG8(UART_BASE + UART_IER) = 0x00;
+
+ /* Set 8 bit char, 1 stop bit, no parity */
+ REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);
+
+ /* Set baud rate */
+ devisor = IN_CLK/(16 * UART_BAUD_RATE);
+ REG8(UART_BASE + UART_LCR) |= UART_LCR_DLAB;
+ REG8(UART_BASE + UART_DLL) = devisor & 0x000000ff;
+ REG8(UART_BASE + UART_DLM) = (devisor >> 8) & 0x000000ff;
+ REG8(UART_BASE + UART_LCR) &= ~(UART_LCR_DLAB);
+
+ return;
+}
+
+static inline void uart_putc(char c)
+{
+ unsigned char lsr;
+
+ WAIT_FOR_THRE;
+ REG8(UART_BASE + UART_TX) = c;
+ if(c == '\n') {
+ WAIT_FOR_THRE;
+ REG8(UART_BASE + UART_TX) = '\r';
+ }
+ WAIT_FOR_XMITR;
+}
+
+static inline void print_str(char *str)
+{
+ while(*str != 0) {
+ uart_putc(*str);
+ str++;
+ }
+}
+
+static inline char uart_getc()
+{
+ unsigned char lsr;
+ char c;
+
+ WAIT_FOR_CHAR;
+ c = REG8(UART_BASE + UART_RX);
+ return c;
+}
+#endif
+
+extern void ic_enable(void);
+extern void ic_disable(void);
+extern void dc_enable(void);
+extern void dc_disable(void);
+extern void dc_inv(void);
+extern unsigned long ic_inv_test(void);
+extern unsigned long dc_inv_test(unsigned long);
+
+extern void (*jalr)(void);
+extern void (*jr)(void);
+
+/* Index on jump table */
+unsigned long jump_indx;
+
+/* Jump address table */
+unsigned long jump_add[15*IC_WAYS];
+
+void dummy();
+
+void jump_and_link(void)
+{
+ asm("_jalr:");
+ asm("l.jr\tr9");
+ asm("l.nop");
+}
+
+void jump(void)
+{
+ asm("_jr:");
+ /* Read and increment index */
+ asm("l.lwz\t\tr3,0(r11)");
+ asm("l.addi\t\tr3,r3,4");
+ asm("l.sw\t\t0(r11),r3");
+ /* Load next executin address from table */
+ asm("l.lwz\t\tr3,0(r3)");
+ /* Jump to that address */
+ asm("l.jr\t\tr3") ;
+ /* Report that we succeeded */
+ asm("l.nop\t0");
+}
+
+void copy_jr(unsigned long add)
+{
+ memcpy((void *)add, (void *)&jr, 24);
+}
+
+void call(unsigned long add)
+{
+ asm("l.movhi\tr11,hi(_jump_indx)" : :);
+ asm("l.ori\tr11,r11,lo(_jump_indx)" : :);
+ asm("l.jalr\t\t%0" : : "r" (add) : "r11", "r9");
+ asm("l.nop" : :);
+}
+
+int dc_test(void)
+{
+ int i;
+ unsigned long base, add, ul;
+
+ base = (((unsigned long)MEM_RAM / (IC_SETS*IC_BLOCK_SIZE)) * IC_SETS*IC_BLOCK_SIZE) + IC_SETS*IC_BLOCK_SIZE;
+
+ dc_enable();
+
+ /* Cache miss r */
+ add = base;
+ for(i = 0; i < DC_WAYS; i++) {
+ ul = REG32(add);
+ ul = REG32(add + DC_BLOCK_SIZE + 4);
+ ul = REG32(add + 2*DC_BLOCK_SIZE + 8);
+ ul = REG32(add + 3*DC_BLOCK_SIZE + 12);
+ add += DC_SETS*DC_BLOCK_SIZE;
+ }
+
+ /* Cache hit w */
+ add = base;
+ for(i = 0; i < DC_WAYS; i++) {
+ REG32(add + 0) = 0x00000001;
+ REG32(add + 4) = 0x00000000;
+ REG32(add + 8) = 0x00000000;
+ REG32(add + 12) = 0x00000000;
+ REG32(add + DC_BLOCK_SIZE + 0) = 0x00000000;
+ REG32(add + DC_BLOCK_SIZE + 4) = 0x00000002;
+ REG32(add + DC_BLOCK_SIZE + 8) = 0x00000000;
+ REG32(add + DC_BLOCK_SIZE + 12) = 0x00000000;
+ REG32(add + 2*DC_BLOCK_SIZE + 0) = 0x00000000;
+ REG32(add + 2*DC_BLOCK_SIZE + 4) = 0x00000000;
+ REG32(add + 2*DC_BLOCK_SIZE + 8) = 0x00000003;
+ REG32(add + 2*DC_BLOCK_SIZE + 12) = 0x00000000;
+ REG32(add + 3*DC_BLOCK_SIZE + 0) = 0x00000000;
+ REG32(add + 3*DC_BLOCK_SIZE + 4) = 0x00000000;
+ REG32(add + 3*DC_BLOCK_SIZE + 8) = 0x00000000;
+ REG32(add + 3*DC_BLOCK_SIZE + 12) = 0x00000004;
+ add += DC_SETS*DC_BLOCK_SIZE;
+ }
+
+ /* Cache hit r/w */
+ add = base;
+ for(i = 0; i < DC_WAYS; i++) {
+ REG8(add + DC_BLOCK_SIZE - 4) = REG8(add + 3);
+ REG8(add + 2*DC_BLOCK_SIZE - 8) = REG8(add + DC_BLOCK_SIZE + 7);
+ REG8(add + 3*DC_BLOCK_SIZE - 12) = REG8(add + 2*DC_BLOCK_SIZE + 11);
+ REG8(add + 4*DC_BLOCK_SIZE - 16) = REG8(add + 3*DC_BLOCK_SIZE + 15);
+ add += DC_SETS*DC_BLOCK_SIZE;
+ }
+
+ /* Cache hit/miss r/w */
+ add = base;
+ for(i = 0; i < DC_WAYS; i++) {
+ REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE) = REG16(add + DC_BLOCK_SIZE - 4) + REG16(add + 2);
+ REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE + 2) = REG16(add + DC_BLOCK_SIZE - 8) + REG16(add + DC_BLOCK_SIZE + 6);
+ REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE + 4) = REG16(add + DC_BLOCK_SIZE - 12) + REG16(add + 2*DC_BLOCK_SIZE + 10);
+ REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE + 6) = REG16(add+ DC_BLOCK_SIZE - 16) + REG16(add + 2*DC_BLOCK_SIZE + 14);
+ add += DC_SETS*DC_BLOCK_SIZE;
+ }
+
+ /* Fill cache with unused data */
+ add = base + DC_WAYS*DC_SETS*DC_BLOCK_SIZE;
+ for(i = 0; i < DC_WAYS; i++) {
+ ul = REG32(add);
+ ul = REG32(add + DC_BLOCK_SIZE);
+ ul = REG32(add + 2*DC_BLOCK_SIZE);
+ ul = REG32(add + 3*DC_BLOCK_SIZE);
+ add += DC_SETS*DC_BLOCK_SIZE;
+ }
+
+ /* Cache hit/miss r */
+ ul = 0;
+ add = base;
+ for(i = 0; i < DC_WAYS; i++) {
+ ul += REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE) +
+ REG16(add + DC_BLOCK_SIZE - 4) +
+ REG16(add + 2);
+ ul += REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE + 2) +
+ REG16(add + DC_BLOCK_SIZE - 8) +
+ REG16(add + DC_BLOCK_SIZE + 6);
+ ul += REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE + 4) +
+ REG16(add + DC_BLOCK_SIZE - 12) +
+ REG16(add + 2*DC_BLOCK_SIZE + 10);
+ ul += REG16(add + (IC_SETS - 1)*IC_BLOCK_SIZE + 6) +
+ REG16(add+ DC_BLOCK_SIZE - 16) +
+ REG16(add + 2*DC_BLOCK_SIZE + 14);
+ add += DC_SETS*DC_BLOCK_SIZE;
+ }
+
+ dc_disable();
+
+ return ul;
+}
+
+int ic_test(void)
+{
+ int i;
+ unsigned long base, add;
+
+ base = (((unsigned long)MEM_RAM / (IC_SETS*IC_BLOCK_SIZE)) * IC_SETS*IC_BLOCK_SIZE) + IC_SETS*IC_BLOCK_SIZE;
+
+ /* Copy jr to various location */
+ add = base;
+ for(i = 0; i < IC_WAYS; i++) {
+ copy_jr(add);
+ copy_jr(add + 2*IC_BLOCK_SIZE + 4);
+ copy_jr(add + 4*IC_BLOCK_SIZE + 8);
+ copy_jr(add + 6*IC_BLOCK_SIZE + 12);
+
+ copy_jr(add + (IC_SETS - 2)*IC_BLOCK_SIZE + 0);
+ copy_jr(add + (IC_SETS - 4)*IC_BLOCK_SIZE + 4);
+ copy_jr(add + (IC_SETS - 6)*IC_BLOCK_SIZE + 8);
+ copy_jr(add + (IC_SETS - 8)*IC_BLOCK_SIZE + 12);
+ add += IC_SETS*IC_BLOCK_SIZE;
+ }
+
+ /* Load execution table which starts at address 4 (at address 0 is table index) */
+ add = base;
+ for(i = 0; i < IC_WAYS; i++) {
+ /* Cache miss */
+ jump_add[15*i + 0] = add + 2*IC_BLOCK_SIZE + 4;
+ jump_add[15*i + 1] = add + 4*IC_BLOCK_SIZE + 8;
+ jump_add[15*i + 2] = add + 6*IC_BLOCK_SIZE + 12;
+ /* Cache hit/miss */
+ jump_add[15*i + 3] = add;
+ jump_add[15*i + 4] = add + (IC_SETS - 2)*IC_BLOCK_SIZE + 0;
+ jump_add[15*i + 5] = add + 2*IC_BLOCK_SIZE + 4;
+ jump_add[15*i + 6] = add + (IC_SETS - 4)*IC_BLOCK_SIZE + 4;
+ jump_add[15*i + 7] = add + 4*IC_BLOCK_SIZE + 8;
+ jump_add[15*i + 8] = add + (IC_SETS - 6)*IC_BLOCK_SIZE + 8;
+ jump_add[15*i + 9] = add + 6*IC_BLOCK_SIZE + 12;
+ jump_add[15*i + 10] = add + (IC_SETS - 8)*IC_BLOCK_SIZE + 12;
+ /* Cache hit */
+ jump_add[15*i + 11] = add + (IC_SETS - 2)*IC_BLOCK_SIZE + 0;
+ jump_add[15*i + 12] = add + (IC_SETS - 4)*IC_BLOCK_SIZE + 4;
+ jump_add[15*i + 13] = add + (IC_SETS - 6)*IC_BLOCK_SIZE + 8;
+ jump_add[15*i + 14] = add + (IC_SETS - 8)*IC_BLOCK_SIZE + 12;
+
+ add += IC_SETS*IC_BLOCK_SIZE;
+ }
+
+ /* Go home */
+ jump_add[15*i] = (unsigned long)&jalr;
+
+ /* Initilalize table index */
+ jump_indx = (unsigned long)&jump_add[0];
+
+ ic_enable();
+
+ /* Go */
+ call(base);
+
+ ic_disable();
+
+ return 0;
+}
+
+int main(void)
+{
+ unsigned long rc, ret = 0;
+
+#ifdef UART
+ /* Initialize controller */
+ uart_init();
+#endif
+
+#ifdef UART
+ print_str("DC test : ");
+#endif
+ rc = dc_test();
+ ret += rc;
+#ifdef UART
+ print_n(rc+0xdeaddca1);
+ print_str("\n");
+#else
+ report(rc + 0xdeaddca1);
+#endif
+
+#ifdef UART
+ print_str("DC invalidate test : ");
+#endif
+ rc = dc_inv_test(MEM_RAM);
+ ret += rc;
+#ifdef UART
+ print_n(rc + 0x9e8daa91);
+ print_str("\n");
+#else
+ report(rc + 0x9e8daa91);
+#endif
+
+#ifdef UART
+ print_str("IC test : ");
+#endif
+ rc = ic_test();
+ ret += rc;
+#ifdef UART
+ print_n(rc + 0xdeaddead);
+ print_str("\n");
+#else
+ report(rc + 0xdeaddead);
+#endif
+
+
+#ifdef UART
+ print_str("IC invalidate test : ");
+#endif
+ ic_enable();
+ rc = ic_inv_test();
+ ret += rc;
+#ifdef UART
+ print_n(rc + 0xdeadde8f);
+ print_str("\n");
+ while(1);
+#else
+ report(rc + 0xdeadde8f);
+#endif
+
+
+ report(ret + 0x9e8da867);
+ exit(0);
+
+ return 0;
+}
+
+/* just for size calculation */
+void dummy()
+{
+}
cache.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: cache.ld
===================================================================
--- cache.ld (nonexistent)
+++ cache.ld (revision 1765)
@@ -0,0 +1,33 @@
+MEMORY
+ {
+ except : ORIGIN = 0x00000000, LENGTH = 0x00002000
+ ram : ORIGIN = 0x00002000, LENGTH = 0x00200000-0x2000
+ }
+
+SECTIONS
+{
+ .except :
+ {
+ *(.except)
+ } > except
+ .text :
+ {
+ *(.text)
+ _src_beg = .;
+ } > ram
+ .data :
+ {
+ *(.data)
+ _dst_beg = .;
+ _dst_end = .;
+ } > ram
+ .bss :
+ {
+ *(.bss)
+ } > ram
+ .stack ALIGN(0x10) (NOLOAD):
+ {
+ *(.stack)
+ _ram_end = .;
+ } > ram
+}
cache.ld
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: cache_asm.S
===================================================================
--- cache_asm.S (nonexistent)
+++ cache_asm.S (revision 1765)
@@ -0,0 +1,196 @@
+#include "spr_defs.h"
+
+#define IC_ENABLE 0
+#define DC_ENABLE 0
+
+ .global _ic_enable
+ .global _ic_disable
+ .global _dc_enable
+ .global _dc_disable
+ .global _dc_inv
+ .global _ic_inv_test
+ .global _dc_inv_test
+
+_ic_enable:
+ /* Disable IC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_ICE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ /* Invalidate IC */
+ l.addi r13,r0,0
+ l.addi r11,r0,8192
+1:
+ l.mtspr r0,r13,SPR_ICBIR
+ l.sfne r13,r11
+ l.bf 1b
+ l.addi r13,r13,16
+
+ /* Enable IC */
+ l.mfspr r13,r0,SPR_SR
+ l.ori r13,r13,SPR_SR_ICE
+ l.mtspr r0,r13,SPR_SR
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+ l.nop
+
+ l.jr r9
+ l.nop
+
+_ic_disable:
+ /* Disable IC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_ICE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ l.jr r9
+ l.nop
+
+_dc_enable:
+ /* Disable DC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_DCE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ /* Flush DC */
+ l.addi r13,r0,0
+ l.addi r11,r0,8192
+1:
+ l.mtspr r0,r13,SPR_DCBIR
+ l.sfne r13,r11
+ l.bf 1b
+ l.addi r13,r13,16
+
+ /* Enable DC */
+ l.mfspr r13,r0,SPR_SR
+ l.ori r13,r13,SPR_SR_DCE
+ l.mtspr r0,r13,SPR_SR
+
+ l.jr r9
+ l.nop
+
+_dc_disable:
+ /* Disable DC */
+ l.mfspr r13,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_DCE
+ l.and r11,r13,r11
+ l.mtspr r0,r11,SPR_SR
+
+ l.jr r9
+ l.nop
+
+_dc_inv:
+ l.mfspr r4,r0,SPR_SR
+ l.addi r5,r0,-1
+ l.xori r5,r5,SPR_SR_DCE
+ l.and r5,r4,r5
+ l.mtspr r0,r5,SPR_SR
+ l.mtspr r0,r3,SPR_DCBIR
+ l.mtspr r0,r4,SPR_SR
+ l.jr r9
+ l.nop
+
+ .align 0x10
+_ic_inv_test:
+ l.movhi r7,hi(_ic_test_1)
+ l.ori r7,r7,lo(_ic_test_1)
+ l.addi r3,r0,0
+ l.addi r4,r0,0
+ l.addi r5,r0,0
+ l.nop
+ l.nop
+ l.nop
+
+_ic_test_1:
+3: l.addi r3,r3,1
+
+ l.sfeqi r4,0x01
+ l.bnf 1f
+ l.nop
+
+ l.mfspr r8,r0,SPR_SR
+ l.addi r11,r0,-1
+ l.xori r11,r11,SPR_SR_ICE
+ l.and r11,r8,r11
+ l.mtspr r0,r11,SPR_SR
+ l.mtspr r0,r7,SPR_ICBIR
+ l.mtspr r0,r8,SPR_SR
+ l.bf 2f
+ l.nop
+
+1: l.lwz r6,0(r7)
+ l.addi r6,r6,1
+ l.sw 0(r7),r6
+
+2: l.addi r5,r5,1
+ l.sfeqi r5,10
+ l.bnf 3b
+ l.xori r4,r4,0x01
+
+ l.addi r11,r3,0
+ l.jr r9
+ l.nop
+
+_dc_inv_test:
+ l.movhi r4,hi(0x08040201)
+ l.ori r4,r4,lo(0x08040201)
+ l.sw 0x00(r3),r4
+ l.slli r4,r4,1
+ l.sw 0x14(r3),r4
+ l.slli r4,r4,1
+ l.sw 0x28(r3),r4
+
+ l.addi r8,r9,0
+ l.jal _dc_enable
+ l.nop
+ l.addi r9,r8,0
+
+ l.lbz r4,0x03(r3)
+ l.lhz r5,0x16(r3)
+ l.add r4,r4,r5
+ l.lwz r5,0x28(r3)
+ l.add r4,r4,r5
+
+ l.mfspr r6,r0,SPR_SR
+ l.addi r5,r0,-1
+ l.xori r5,r5,SPR_SR_DCE
+ l.and r5,r6,r5
+ l.mtspr r0,r5,SPR_SR
+ l.addi r7,r3,0x10
+ l.mtspr r0,r7,SPR_DCBIR
+
+ l.lwz r5,0(r3)
+ l.slli r5,r5,3
+ l.sw 0x00(r3),r5
+ l.slli r5,r5,1
+ l.sw 0x14(r3),r5
+ l.slli r5,r5,1
+ l.sw 0x28(r3),r5
+
+ l.mtspr r0,r6,SPR_SR
+
+ l.lbz r5,0x03(r3)
+ l.add r4,r4,r5
+ l.lhz r5,0x16(r3)
+ l.add r4,r4,r5
+ l.lwz r5,0x28(r3)
+ l.add r4,r4,r5
+
+ l.addi r5,r0,-1
+ l.xori r5,r5,SPR_SR_DCE
+ l.and r5,r6,r5
+ l.mtspr r0,r5,SPR_SR
+
+ l.addi r11,r4,0x0
+1:
+ l.jr r9
+ l.nop
Index: xess.ld
===================================================================
--- xess.ld (nonexistent)
+++ xess.ld (revision 1765)
@@ -0,0 +1,35 @@
+MEMORY
+ {
+ except : ORIGIN = 0x00000000, LENGTH = 0x00002000
+ flash : ORIGIN = 0x00002000, LENGTH = 0x001fe000
+ ram : ORIGIN = 0x40000000, LENGTH = 0x00200000
+ }
+
+SECTIONS
+{
+ .except :
+ {
+ *(.except)
+ } > except
+ .text :
+ {
+ *(.text)
+ _src_beg = .;
+ } > flash
+ .data :
+ AT ( ADDR (.text) + SIZEOF (.text) )
+ {
+ _dst_beg = .;
+ *(.data)
+ _dst_end = .;
+ } > ram
+ .bss :
+ {
+ *(.bss)
+ } > ram
+ .stack ALIGN(0x10) (NOLOAD):
+ {
+ *(.stack)
+ _ram_end = .;
+ } > ram
+}
xess.ld
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: except_test.c
===================================================================
--- except_test.c (nonexistent)
+++ except_test.c (revision 1765)
@@ -0,0 +1,1155 @@
+/* This is exception test for OpenRISC 1200 */
+
+#include "spr_defs.h"
+#include "support.h"
+#include "int.h"
+
+/* Define RAM physical location and size
+ Bottom half will be used for this program, the rest
+ will be used for testing */
+#define FLASH_START 0x00000000
+#define FLASH_SIZE 0x00200000
+#define RAM_START 0x40000000
+#define RAM_SIZE 0x00200000
+
+/* MMU page size */
+#define PAGE_SIZE 8192
+
+/* Number of DTLB sets used (power of 2, max is 256) */
+#define DTLB_SETS 32
+
+/* Number of DTLB ways (2, 2, 3 etc., max is 4). */
+#define DTLB_WAYS 1
+
+/* Number of ITLB sets used (power of 2, max is 256) */
+#define ITLB_SETS 32
+
+/* Number of ITLB ways (1, 2, 3 etc., max is 4). */
+#define ITLB_WAYS 1
+
+/* TLB mode codes */
+#define TLB_CODE_ONE_TO_ONE 0x00000000
+#define TLB_CODE_PLUS_ONE_PAGE 0x10000000
+#define TLB_CODE_MINUS_ONE_PAGE 0x20000000
+
+#define TLB_TEXT_SET_NB 6
+#define TLB_DATA_SET_NB 2
+
+#define TLB_CODE_MASK 0xfffff000
+#define TLB_PR_MASK 0x00000fff
+#define DTLB_PR_NOLIMIT ( SPR_DTLBTR_CI | \
+ SPR_DTLBTR_URE | \
+ SPR_DTLBTR_UWE | \
+ SPR_DTLBTR_SRE | \
+ SPR_DTLBTR_SWE )
+
+#define ITLB_PR_NOLIMIT ( SPR_ITLBTR_CI | \
+ SPR_ITLBTR_SXE | \
+ SPR_ITLBTR_UXE )
+
+/* fails if x is false */
+#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__))
+
+/* Exception vectors */
+#define V_RESET 1
+#define V_BERR 2
+#define V_DPF 3
+#define V_IPF 4
+#define V_TICK 5
+#define V_ALIGN 6
+#define V_ILLINSN 7
+#define V_INT 8
+#define V_DTLB_MISS 9
+#define V_ITLB_MISS 10
+#define V_RANGE 11
+#define V_SYS 12
+#define V_TRAP 14
+
+#if 1
+#define debug printf
+#else
+#define debug
+#endif
+
+/* Extern functions */
+extern void lo_dmmu_en (void);
+extern void lo_immu_en (void);
+extern unsigned long call (unsigned long add, unsigned long val);
+extern unsigned long call_with_int (unsigned long add, unsigned long val);
+extern void trap (void);
+extern void b_trap (void);
+extern void range (void);
+extern void b_range (void);
+extern int except_basic (void);
+extern void (*test)(void);
+extern int load_acc_32 (unsigned long add);
+extern int load_acc_16 (unsigned long add);
+extern int store_acc_32 (unsigned long add);
+extern int store_acc_16 (unsigned long add);
+extern int load_b_acc_32 (unsigned long add);
+extern int int_trigger (void);
+extern int int_loop (void);
+extern int jump_back (void);
+
+/* Local functions prototypes */
+void dmmu_disable (void);
+void immu_disable (void);
+
+/* DTLB mode status */
+volatile unsigned long dtlb_val;
+
+/* ITLB mode status */
+volatile unsigned long itlb_val;
+
+/* Exception counter */
+volatile int except_count;
+
+/* Exception mask */
+volatile unsigned long except_mask;
+
+/* Exception efective address */
+volatile unsigned long except_ea;
+
+/* Eception PC */
+volatile unsigned long except_pc;
+
+void fail (char *func, int line)
+{
+#ifndef __FUNCTION__
+#define __FUNCTION__ "?"
+#endif
+
+ immu_disable ();
+ dmmu_disable ();
+
+ debug("Test failed in %s:%i\n", func, line);
+ report (0xeeeeeeee);
+ exit (1);
+}
+
+void test_dummy (void)
+{
+ asm("_test:");
+ asm("l.addi\t\tr3,r3,1") ;
+ asm("l.nop" : :);
+}
+
+void copy_test (unsigned long phy_add)
+{
+ memcpy((void *)phy_add, (void *)&test, 8);
+}
+
+/* Bus error handler */
+void bus_err_handler (void)
+{
+
+ except_mask |= 1 << V_BERR;
+ except_count++;
+}
+
+/* Illegal insn handler */
+void ill_insn_handler (void)
+{
+
+ except_mask |= 1 << V_ILLINSN;
+ except_count++;
+}
+
+/* Low priority interrupt handler */
+void tick_handler (void)
+{
+
+ /* Disable interrupt recognition */
+ mtspr(SPR_ESR_BASE, mfspr(SPR_ESR_BASE) & ~SPR_SR_TEE);
+
+ except_mask |= 1 << V_TICK;
+ except_count++;
+}
+
+/* High priority interrupt handler */
+void int_handler (void)
+{
+
+ /* Disable interrupt recognition */
+ mtspr(SPR_ESR_BASE, mfspr(SPR_ESR_BASE) & ~SPR_SR_IEE);
+
+ except_mask |= 1 << V_INT;
+ except_count++;
+}
+
+/* Trap handler */
+void trap_handler (void)
+{
+
+ except_mask |= 1 << V_TRAP;
+ except_count++;
+}
+
+/* Align handler */
+void align_handler (void)
+{
+
+ except_mask |= 1 << V_ALIGN;
+ except_count++;
+}
+
+/* Range handler */
+void range_handler (void)
+{
+ /* Disable range exception */
+ mtspr (SPR_ESR_BASE, mfspr (SPR_ESR_BASE) & ~SPR_SR_OVE);
+
+ except_mask |= 1 << V_RANGE;
+ except_count++;
+}
+
+/* DTLB miss exception handler */
+void dtlb_miss_handler (void)
+{
+ unsigned long ea;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and LRU way */
+ set = (ea / PAGE_SIZE) % DTLB_SETS;
+ for (i = 0; i < DTLB_WAYS; i++) {
+ if ((mfspr (SPR_DTLBMR_BASE(i) + set) & SPR_DTLBMR_LRU) == 0) {
+ way = i;
+ break;
+ }
+ }
+
+ mtspr (SPR_DTLBMR_BASE(way) + set, (ea & SPR_DTLBMR_VPN) | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(way) + set, (ea & SPR_DTLBTR_PPN) | dtlb_val);
+
+ except_mask |= 1 << V_DTLB_MISS;
+ except_count++;
+}
+
+/* ITLB miss exception handler */
+void itlb_miss_handler (void)
+{
+ unsigned long ea;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and LRU way */
+ set = (ea / PAGE_SIZE) % ITLB_SETS;
+ for (i = 0; i < ITLB_WAYS; i++) {
+ if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_LRU) == 0) {
+ way = i;
+ break;
+ }
+ }
+
+ mtspr (SPR_ITLBMR_BASE(way) + set, (ea & SPR_ITLBMR_VPN) | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(way) + set, (ea & SPR_ITLBTR_PPN) | itlb_val);
+ except_mask |= 1 << V_ITLB_MISS;
+ except_count++;
+}
+
+/* Data page fault exception handler */
+void dpage_fault_handler (void)
+{
+ unsigned long ea;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and way */
+ set = (ea / PAGE_SIZE) % DTLB_SETS;
+ for (i = 0; i < DTLB_WAYS; i++) {
+ if ((mfspr (SPR_DTLBMR_BASE(i) + set) & SPR_DTLBMR_VPN) == (ea & SPR_DTLBMR_VPN)) {
+ way = i;
+ break;
+ }
+ }
+
+ /* Give permission */
+ mtspr (SPR_DTLBTR_BASE(way) + set, (mfspr (SPR_DTLBTR_BASE(way) + set) & ~DTLB_PR_NOLIMIT) | dtlb_val);
+
+ except_mask |= 1 << V_DPF;
+ except_count++;
+}
+
+/* Intstruction page fault exception handler */
+void ipage_fault_handler (void)
+{
+ unsigned long ea;
+ int set, way = 0;
+ int i;
+
+ /* Get EA that cause the exception */
+ ea = mfspr (SPR_EEAR_BASE);
+
+ /* Find TLB set and way */
+ set = (ea / PAGE_SIZE) % ITLB_SETS;
+ for (i = 0; i < ITLB_WAYS; i++) {
+ if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_VPN) == (ea & SPR_ITLBMR_VPN)) {
+ way = i;
+ break;
+ }
+ }
+
+ /* Give permission */
+ mtspr (SPR_ITLBTR_BASE(way) + set, (mfspr (SPR_ITLBTR_BASE(way) + set) & ~ITLB_PR_NOLIMIT) | itlb_val);
+
+ except_mask |= 1 << V_IPF;
+ except_count++;
+}
+
+/*Enable DMMU */
+void dmmu_enable (void)
+{
+ /* Enable DMMU */
+ lo_dmmu_en ();
+}
+
+/* Disable DMMU */
+void dmmu_disable (void)
+{
+ mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_DME);
+}
+
+/* Enable IMMU */
+void immu_enable (void)
+{
+ /* Enable IMMU */
+ lo_immu_en ();
+}
+
+/* Disable IMMU */
+void immu_disable (void)
+{
+ mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_IME);
+}
+
+/* Tick timer init */
+void tick_init (int period, int hp_int)
+{
+ /* Disable tick timer exception recognition */
+ mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_TEE);
+
+ /* Set period of one cycle, restartable mode */
+ mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
+
+ /* Reset counter */
+ mtspr(SPR_TTCR, 0);
+}
+
+/* Interrupt test */
+int interrupt_test (void)
+{
+ unsigned long ret;
+ int i;
+
+ /* Init tick timer */
+ tick_init (1, 1);
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Test normal high priority interrupt trigger */
+ ret = call ((unsigned long)&int_trigger, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_TICK));
+ ASSERT(ret == 0);
+ ASSERT(except_pc == (unsigned long)int_trigger + 16);
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Test inetrrupt in delay slot */
+ tick_init (100, 1);
+
+ /* Hopefully we will have interrupt recognition between branch insn and delay slot */
+ except_pc = (unsigned long)&int_loop;
+ for (i = 0; i < 10; i++) {
+ call_with_int (except_pc, RAM_START);
+ ASSERT(except_pc == (unsigned long)&int_loop);
+ }
+
+ return 0;
+}
+
+/* ITLB miss test */
+int itlb_test (void)
+{
+ int i, j, ret;
+ unsigned long ea, ta;
+
+ /* Invalidate all entries in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Set dtlb no permisions */
+ itlb_val = SPR_ITLBTR_CI;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Enable IMMU */
+ immu_enable ();
+
+ /* Copy jump instruction to last location of a page */
+ ea = RAM_START + (RAM_SIZE/2) + ((TLB_TEXT_SET_NB + 1)*PAGE_SIZE) - 8;
+ memcpy((void *)ea, (void *)&jump_back, 12);
+
+ /* Check if there was ITLB miss exception */
+ ret = call (ea, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ITLB_MISS));
+ ASSERT(except_pc == ea);
+ ASSERT(ret == 0);
+
+ /* Set dtlb no permisions */
+ itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_SXE;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was IPF miss exception */
+ ret = call (ea, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_IPF));
+ ASSERT(except_pc == ea);
+ ASSERT(ret == 0);
+
+ /* Set dtlb no permisions */
+ itlb_val = SPR_ITLBTR_CI;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was ITLB miss exception */
+ ret = call (ea, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ITLB_MISS));
+ ASSERT(except_pc == ea + 4);
+ ASSERT(ret == 0);
+
+ /* Set dtlb no permisions */
+ itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_SXE;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was IPF exception */
+ ret = call (ea, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_IPF));
+ ASSERT(except_pc == ea + 4);
+ ASSERT(ret == 0);
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ ret = call (ea, 0);
+ ASSERT(except_count == 0);
+ ASSERT(ret == 1);
+
+ /* Disable IMMU */
+ immu_disable ();
+
+ return 0;
+}
+
+/* DTLB miss test */
+int dtlb_test (void)
+{
+ int i, j, ret;
+ unsigned long ea, ta;
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Set dtlb no permisions */
+ dtlb_val = SPR_DTLBTR_CI;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Set pattern */
+ ea = RAM_START + (RAM_SIZE/2) + ((TLB_DATA_SET_NB)*PAGE_SIZE);
+ REG32(ea) = 0x87654321;
+
+ /* Enable DMMU */
+ dmmu_enable ();
+
+ /* Check if there was DTLB miss exception */
+ ret = call ((unsigned long)&load_b_acc_32, ea);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_DTLB_MISS));
+ ASSERT(except_pc == (unsigned long)load_b_acc_32 + 8);
+ ASSERT(except_ea == ea);
+ ASSERT(ret == 0x12345678);
+
+ /* Set dtlb no permisions */
+ dtlb_val = SPR_DTLBTR_CI | SPR_DTLBTR_SRE;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was DPF miss exception */
+ ret = call ((unsigned long)&load_b_acc_32, ea);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_DPF));
+ ASSERT(except_pc == (unsigned long)load_b_acc_32 + 8);
+ ASSERT(except_ea == ea);
+ ASSERT(ret == 0x12345678);
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ ret = call ((unsigned long)&load_b_acc_32, ea);
+ ASSERT(except_count == 0);
+ ASSERT(ret == 0x87654321);
+
+ /* Disable DMMU */
+ dmmu_disable ();
+
+ return 0;
+}
+
+/* Bus error test */
+int buserr_test (void)
+{
+ int i, j, ret;
+ unsigned long ea, ta;
+
+ /* Invalidate all entries in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Set IMMU translation */
+ ea = RAM_START + (RAM_SIZE) + ((TLB_TEXT_SET_NB)*PAGE_SIZE);
+ itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_SXE;
+ mtspr (SPR_ITLBMR_BASE(0) + TLB_TEXT_SET_NB, (ea & SPR_ITLBMR_VPN) | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + TLB_TEXT_SET_NB, ((ea + PAGE_SIZE) & SPR_ITLBTR_PPN) | itlb_val);
+
+ /* Enable IMMU */
+ immu_enable ();
+
+ /* Check if there was bus error exception */
+ ret = call (ea, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_BERR));
+ ASSERT(except_pc == ea);
+ ASSERT(except_ea == ea);
+
+ /* Disable IMMU */
+ immu_disable ();
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Copy jump instruction to last location of RAM */
+ ea = RAM_START + RAM_SIZE - 8;
+ memcpy((void *)ea, (void *)&jump_back, 8);
+
+ /* Check if there was bus error exception */
+ ret = call (ea, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_BERR));
+ ASSERT(except_pc == ea + 4);
+ ASSERT(except_ea == ea + 8);
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Set DMMU translation */
+ ea = RAM_START + (RAM_SIZE) + ((TLB_DATA_SET_NB)*PAGE_SIZE);
+ dtlb_val = SPR_DTLBTR_CI | SPR_DTLBTR_SRE;
+ mtspr (SPR_DTLBMR_BASE(0) + TLB_DATA_SET_NB, (ea & SPR_DTLBMR_VPN) | SPR_DTLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + TLB_DATA_SET_NB, ((ea + PAGE_SIZE) & SPR_DTLBTR_PPN) | dtlb_val);
+
+ /* Enable DMMU */
+ dmmu_enable ();
+
+ /* Check if there was bus error exception */
+ ret = call ((unsigned long)&load_acc_32, ea );
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_BERR));
+ ASSERT(except_pc == (unsigned long)load_acc_32 + 8);
+ ASSERT(except_ea == ea);
+ ASSERT(ret == 0x12345678);
+
+ /* Disable DMMU */
+ dmmu_disable ();
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was bus error exception */
+ ret = call ((unsigned long)&load_b_acc_32, ea );
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_BERR));
+ ASSERT(except_pc == (unsigned long)load_b_acc_32 + 8);
+ ASSERT(except_ea == ea);
+ ASSERT(ret == 0x12345678);
+
+ return 0;
+}
+
+/* Illegal instruction test */
+int illegal_insn_test (void)
+{
+ int ret;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Set illegal insn */
+ REG32(RAM_START + 0) = REG32((unsigned long)jump_back + 4);
+ REG32(RAM_START + 4) = 0xffffffff;
+
+ /* Check if there was illegal insn exception */
+ ret = call (RAM_START + 4, 0 );
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ILLINSN));
+ ASSERT(except_pc == RAM_START + 4);
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was illegal insn exception */
+ ret = call (RAM_START, 0 );
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ILLINSN));
+ ASSERT(except_pc == RAM_START);
+
+ return 0;
+}
+
+/* Align test */
+int align_test (void)
+{
+ int ret;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was alignment exception on read insn */
+ ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1)));
+
+ ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 2);
+ ASSERT(except_count == 2);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 2)));
+
+ ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 3);
+ ASSERT(except_count == 3);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 3)));
+
+ ret = call ((unsigned long)&load_acc_16, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1);
+ ASSERT(except_count == 4);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_16) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1)));
+
+ /* Check alignment exception on write insn */
+ call ((unsigned long)&store_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1);
+ ASSERT(except_count == 5);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(except_pc == ((unsigned long)(store_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1)));
+
+ call ((unsigned long)&store_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 2);
+ ASSERT(except_count == 6);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(except_pc == ((unsigned long)(store_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 2)));
+
+ call ((unsigned long)&store_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 3);
+ ASSERT(except_count == 7);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(except_pc == ((unsigned long)(store_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 3)));
+
+ call ((unsigned long)&store_acc_16, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1);
+ ASSERT(except_count == 8);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(except_pc == ((unsigned long)(store_acc_16) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1)));
+
+
+ ret = call ((unsigned long)&load_b_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1);
+ ASSERT(except_count == 9);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_b_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1)));
+
+
+ return 0;
+}
+
+/* Trap test */
+int trap_test (void)
+{
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was trap exception */
+ call ((unsigned long)&trap, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_TRAP));
+ ASSERT(except_pc == (unsigned long)(trap));
+
+ /* Check if there was trap exception */
+ call ((unsigned long)&b_trap, 0);
+ ASSERT(except_count == 2);
+ ASSERT(except_mask == (1 << V_TRAP));
+ ASSERT(except_pc == (unsigned long)(b_trap));
+
+ return 0;
+}
+
+/* Range test */
+int range_test (void)
+{
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was range exception */
+ mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_OVE);
+ call ((unsigned long)&range, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_RANGE));
+ ASSERT(except_pc == (unsigned long)(range));
+ ASSERT(except_ea == 0);
+
+ /* Check if there was range exception */
+ mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_OVE);
+ call ((unsigned long)&b_range, 0);
+ ASSERT(except_count == 2);
+ ASSERT(except_mask == (1 << V_RANGE));
+ ASSERT(except_pc == (unsigned long)(b_range));
+
+ return 0;
+}
+
+/* Exception priority test */
+void except_priority_test (void)
+{
+ int i, j;
+ unsigned long ea, ta, ret;
+
+ /* Invalidate all entries in ITLB */
+ for (i = 0; i < ITLB_WAYS; i++) {
+ for (j = 0; j < ITLB_SETS; j++) {
+ mtspr (SPR_ITLBMR_BASE(i) + j, 0);
+ mtspr (SPR_ITLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_TEXT_SET_NB; i++) {
+ ea = FLASH_START + (i*PAGE_SIZE);
+ ta = FLASH_START + (i*PAGE_SIZE);
+ mtspr (SPR_ITLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_ITLBTR_BASE(0) + i, ta | ITLB_PR_NOLIMIT);
+ }
+
+ /* Set dtlb no permisions */
+ itlb_val = SPR_ITLBTR_CI;
+
+ /* Invalidate all entries in DTLB */
+ for (i = 0; i < DTLB_WAYS; i++) {
+ for (j = 0; j < DTLB_SETS; j++) {
+ mtspr (SPR_DTLBMR_BASE(i) + j, 0);
+ mtspr (SPR_DTLBTR_BASE(i) + j, 0);
+ }
+ }
+
+ /* Set one to one translation for the use of this program */
+ for (i = 0; i < TLB_DATA_SET_NB; i++) {
+ ea = RAM_START + (i*PAGE_SIZE);
+ ta = RAM_START + (i*PAGE_SIZE);
+ mtspr (SPR_DTLBMR_BASE(0) + i, ea | SPR_ITLBMR_V);
+ mtspr (SPR_DTLBTR_BASE(0) + i, ta | DTLB_PR_NOLIMIT);
+ }
+
+ /* Init tick timer */
+ tick_init (1, 1);
+
+ /* Set dtlb no permisions */
+ dtlb_val = SPR_DTLBTR_CI;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Enable IMMU */
+ immu_enable ();
+
+ /* Check if there was INT exception */
+ call_with_int (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_TICK));
+ ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was ITLB exception */
+ call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ITLB_MISS));
+ ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
+
+ /* Set dtlb permisions */
+ itlb_val |= SPR_ITLBTR_SXE;
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was IPF exception */
+ call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_IPF));
+ ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was bus error exception */
+ call (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE), 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_BERR));
+ ASSERT(except_pc == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_TEXT_SET_NB*PAGE_SIZE)));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Disable MMU */
+ immu_disable ();
+
+ /* Set illegal instruction */
+ REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 0) = 0x00000000;
+ REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4) = 0xffffffff;
+ REG32(RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 8) = 0x00000000;
+
+ /* Check if there was illegal insn exception */
+ call (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ILLINSN));
+ ASSERT(except_pc == (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE/2) + (TLB_TEXT_SET_NB*PAGE_SIZE) + 4 ));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Enable DMMU */
+ dmmu_enable ();
+
+ /* Check if there was alignment exception on read insn */
+ ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE) + 1);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_ALIGN));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE + 1)));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was DTLB exception */
+ ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE));
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_DTLB_MISS));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Set dtlb permisions */
+ dtlb_val |= SPR_DTLBTR_SRE;
+
+ /* Check if there was DPF exception */
+ ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE));
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_DPF));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was bus error exception */
+ ret = call ((unsigned long)&load_acc_32, RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE));
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_BERR));
+ ASSERT(ret == 0x12345678);
+ ASSERT(except_pc == ((unsigned long)(load_acc_32) + 8));
+ ASSERT(except_ea == (RAM_START + (RAM_SIZE) + (TLB_DATA_SET_NB*PAGE_SIZE)));
+
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was trap exception */
+ call ((unsigned long)&trap, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_TRAP));
+ ASSERT(except_pc == (unsigned long)(trap));
+
+#if 0
+ /* Reset except counter */
+ except_count = 0;
+ except_mask = 0;
+ except_pc = 0;
+ except_ea = 0;
+
+ /* Check if there was range exception */
+ mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_OVE);
+ call ((unsigned long)&range, 0);
+ ASSERT(except_count == 1);
+ ASSERT(except_mask == (1 << V_RANGE));
+ ASSERT(except_pc == (unsigned long)(range));
+ ASSERT(except_ea == 0);
+#endif
+}
+
+int main (void)
+{
+ int ret;
+
+ printf("except_test\n");
+
+ /* Register bus error handler */
+ excpt_buserr = (unsigned long)bus_err_handler;
+
+ /* Register illegal insn handler */
+ excpt_illinsn = (unsigned long)ill_insn_handler;
+
+ /* Register tick timer exception handler */
+ excpt_tick = (unsigned long)tick_handler;
+
+ /* Register external interrupt handler */
+ excpt_int = (unsigned long)int_handler;
+
+ /* Register ITLB miss handler */
+ excpt_itlbmiss = (unsigned long)itlb_miss_handler;
+
+ /* Register instruction page fault handler */
+ excpt_ipfault = (unsigned long)ipage_fault_handler;
+
+ /* Register DTLB miss handler */
+ excpt_dtlbmiss = (unsigned long)dtlb_miss_handler;
+
+ /* Register data page fault handler */
+ excpt_dpfault = (unsigned long)dpage_fault_handler;
+
+ /* Register trap handler */
+ excpt_trap = (unsigned long)trap_handler;
+
+ /* Register align handler */
+ excpt_align = (unsigned long)align_handler;
+
+ /* Register range handler */
+ excpt_range = (unsigned long)range_handler;
+
+ /* Exception basic test */
+ ret = except_basic ();
+ ASSERT(ret == 0);
+
+ /* Interrupt exception test */
+ interrupt_test ();
+
+ /* ITLB exception test */
+ itlb_test ();
+
+ /* DTLB exception test */
+ dtlb_test ();
+
+ /* Bus error exception test */
+ buserr_test ();
+
+ /* Illegal insn test */
+ illegal_insn_test ();
+
+ /* Alignment test */
+ align_test ();
+
+ /* Trap test */
+ trap_test ();
+
+ /* Range test */
+// range_test ();
+
+ /* Exception priority test */
+ except_priority_test ();
+
+ report (0xdeaddead);
+ exit (0);
+
+ return 0;
+}
+
Index: flag.S
===================================================================
--- flag.S (nonexistent)
+++ flag.S (revision 1765)
@@ -0,0 +1,96 @@
+/* Basic SR flag test */
+#include "spr_defs.h"
+
+#define MEM_RAM 0x40000000
+
+ .section .except
+ .org 0x100
+_reset:
+ l.nop
+
+ l.movhi r10,0x8000
+ l.addi r11,r0,-1
+ l.addi r12,r0,2
+ l.addi r13,r0,0x5678
+ l.movhi r14,0xdead
+ l.ori r14,r14,0xdead
+ l.addi r15,r0,0xdead
+
+ /* Test start */
+
+ /* Simple zero test */
+ l.addi r1,r0,1 /* f = 0 */
+ l.addi r1, r0, 0
+ l.bnf _err
+ l.addi r1,r0,1 /* f = 0 */
+ l.add r1, r0, r0
+ l.bnf _err
+ l.addi r1,r0,1 /* f = 0 */
+ l.andi r1, r0, 0
+ l.bnf _err
+ l.addi r1,r0,1 /* f = 0 */
+ l.and r1, r0, r0
+ l.bnf _err
+
+ l.addi r1,r0,1 /* f = 0 */
+ l.sub r1, r0, r0
+ l.bf _err
+ l.or r1, r0, r0
+ l.bf _err
+ l.ori r1, r0, 0
+ l.bf _err
+ l.xor r1, r0, r0
+ l.bf _err
+ l.xori r1, r0, 0
+ l.bf _err
+
+ l.addi r1,r0,0 /* f = 1 */
+ l.sub r1, r0, r0
+ l.bnf _err
+ l.or r1, r0, r0
+ l.bnf _err
+ l.ori r1, r0, 0
+ l.bnf _err
+ l.xor r1, r0, r0
+ l.bnf _err
+ l.xori r1, r0, 0
+ l.bnf _err
+
+ l.addi r1,r0,0 /* f = 1 */
+ l.addi r1, r0, 0xdead
+ l.bf _err
+ l.addi r1,r0,0 /* f = 1 */
+ l.add r1, r0, r15
+ l.bf _err
+ l.addi r1,r0,0 /* f = 1 */
+ l.andi r1, r11, 0xdead
+ l.bf _err
+ l.addi r1,r0,0 /* f = 1 */
+ l.and r1, r11, r15
+ l.bf _err
+
+ l.addi r1,r0,0 /* f = 1 */
+ l.addi r1, r11, 0
+ l.bf _err
+ l.addi r1,r0,0 /* f = 1 */
+ l.add r1, r11, r0
+ l.bf _err
+ l.addi r1,r0,0 /* f = 1 */
+ l.andi r1, r11, 0x1234
+ l.bf _err
+ l.addi r1,r0,0 /* f = 1 */
+ l.and r1, r11, r10
+ l.bf _err
+
+ l.movhi r3,0xdead
+ l.ori r3,r3,0xdead
+ l.nop NOP_REPORT
+ l.ori r3,r0,0
+ l.nop NOP_EXIT
+
+_err:
+ l.ori r3,r1,0
+ l.nop NOP_REPORT
+ l.mfspr r3,r0,SPR_SR
+ l.nop NOP_REPORT
+ l.nop NOP_EXIT
flag.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: except_test_s.S
===================================================================
--- except_test_s.S (nonexistent)
+++ except_test_s.S (revision 1765)
@@ -0,0 +1,640 @@
+/* Support file for c based tests */
+
+#include "spr_defs.h"
+
+#define reset _main
+
+ .global _except_basic
+ .global _lo_dmmu_en
+ .global _lo_immu_en
+ .global _call
+ .global _call_with_int
+ .global _load_acc_32
+ .global _load_acc_16
+ .global _store_acc_32
+ .global _store_acc_16
+ .global _load_b_acc_32
+ .global _trap
+ .global _b_trap
+ .global _range
+ .global _b_range
+ .global _int_trigger
+ .global _int_loop
+ .global _jump_back
+
+ .section .stack
+ .space 0x1000
+_stack:
+
+ .section .except
+ .extern _reset_support
+ .extern _c_reset
+ .extern _excpt_buserr
+ .extern _excpt_dpfault
+ .extern _excpt_ipfault
+ .extern _excpt_tick
+ .extern _excpt_align
+ .extern _excpt_illinsn
+ .extern _excpt_int
+ .extern _excpt_dtlbmiss
+ .extern _excpt_itlbmiss
+ .extern _excpt_range
+ .extern _excpt_syscall
+ .extern _excpt_break
+ .extern _excpt_trap
+
+
+ .org 0x100
+_reset_vector:
+ l.nop
+ l.nop
+ l.addi r2,r0,0x0
+ l.addi r3,r0,0x0
+ l.addi r4,r0,0x0
+ l.addi r5,r0,0x0
+ l.addi r6,r0,0x0
+ l.addi r7,r0,0x0
+ l.addi r8,r0,0x0
+ l.addi r9,r0,0x0
+ l.addi r10,r0,0x0
+ l.addi r11,r0,0x0
+ l.addi r12,r0,0x0
+ l.addi r13,r0,0x0
+ l.addi r14,r0,0x0
+ l.addi r15,r0,0x0
+ l.addi r16,r0,0x0
+ l.addi r17,r0,0x0
+ l.addi r18,r0,0x0
+ l.addi r19,r0,0x0
+ l.addi r20,r0,0x0
+ l.addi r21,r0,0x0
+ l.addi r22,r0,0x0
+ l.addi r23,r0,0x0
+ l.addi r24,r0,0x0
+ l.addi r25,r0,0x0
+ l.addi r26,r0,0x0
+ l.addi r27,r0,0x0
+ l.addi r28,r0,0x0
+ l.addi r29,r0,0x0
+ l.addi r30,r0,0x0
+ l.addi r31,r0,0x0
+
+ l.movhi r1,hi(_stack)
+ l.ori r1,r1,lo(_stack)
+
+ /* Check if this is RTL version */
+ l.lbz r3,0(r0)
+ l.sfeqi r3,0xff
+ l.bf 2f
+ l.nop
+ l.movhi r3,hi(_src_beg)
+ l.ori r3,r3,lo(_src_beg)
+ l.movhi r4,hi(_dst_beg)
+ l.ori r4,r4,lo(_dst_beg)
+ l.movhi r5,hi(_dst_end)
+ l.ori r5,r5,lo(_dst_end)
+ l.sub r5,r5,r4
+ l.sfeqi r5,0
+ l.bf 2f
+ l.nop
+1: l.lwz r6,0(r3)
+ l.sw 0(r4),r6
+ l.addi r3,r3,4
+ l.addi r4,r4,4
+ l.addi r5,r5,-4
+ l.sfgtsi r5,0
+ l.bf 1b
+ l.nop
+
+2:
+
+ l.movhi r2,hi(reset)
+ l.ori r2,r2,lo(reset)
+ l.jr r2
+ l.nop
+
+ .org 0x200
+_buserr_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_buserr)
+ l.ori r10,r10,lo(_excpt_buserr)
+ l.lwz r10,0x0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x300
+_dpfault_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_dpfault)
+ l.ori r10,r10,lo(_excpt_dpfault)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x400
+_ipfault_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_ipfault)
+ l.ori r10,r10,lo(_excpt_ipfault)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x500
+_tick_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_tick)
+ l.ori r10,r10,lo(_excpt_tick)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x600
+_align_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_align)
+ l.ori r10,r10,lo(_excpt_align)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x700
+_illinsn_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_illinsn)
+ l.ori r10,r10,lo(_excpt_illinsn)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x800
+_int_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_int)
+ l.ori r10,r10,lo(_excpt_int)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x900
+_dtlbmiss_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_dtlbmiss)
+ l.ori r10,r10,lo(_excpt_dtlbmiss)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xa00
+_itlbmiss_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_itlbmiss)
+ l.ori r10,r10,lo(_excpt_itlbmiss)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xb00
+_range_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_range)
+ l.ori r10,r10,lo(_excpt_range)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xc00
+_syscall_vector:
+ l.addi r3,r3,4
+
+ l.mfspr r4,r0,SPR_SR
+ l.andi r4,r4,7
+ l.add r6,r0,r4
+
+ l.mfspr r4,r0,SPR_EPCR_BASE
+ l.movhi r5,hi(_sys1)
+ l.ori r5,r5,lo(_sys1)
+ l.sub r5,r4,r5
+
+ l.mfspr r4,r0,SPR_ESR_BASE /* ESR - set supvisor mode */
+ l.ori r4,r4,SPR_SR_SM
+ l.mtspr r0,r4,SPR_ESR_BASE
+
+ l.movhi r4,hi(_sys2)
+ l.ori r4,r4,lo(_sys2)
+ l.mtspr r0,r4,SPR_EPCR_BASE
+
+ l.rfe
+ l.addi r3,r3,8
+
+ .org 0xd00
+_break_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_break)
+ l.ori r10,r10,lo(_excpt_break)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xe00
+_trap_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.movhi r4,hi(_except_pc)
+ l.ori r4,r4,lo(_except_pc)
+ l.sw 0(r4),r3
+
+ l.mfspr r3,r0,SPR_EEAR_BASE
+ l.movhi r4,hi(_except_ea)
+ l.ori r4,r4,lo(_except_ea)
+ l.sw 0(r4),r3
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_trap)
+ l.ori r10,r10,lo(_excpt_trap)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+store_regs:
+ l.sw 0x00(r1),r3
+ l.sw 0x04(r1),r4
+ l.sw 0x08(r1),r5
+ l.sw 0x0c(r1),r6
+ l.sw 0x10(r1),r7
+ l.sw 0x14(r1),r8
+ l.sw 0x1c(r1),r10
+ l.sw 0x20(r1),r11
+ l.sw 0x24(r1),r12
+ l.sw 0x28(r1),r13
+ l.sw 0x2c(r1),r14
+ l.sw 0x30(r1),r15
+ l.sw 0x34(r1),r16
+ l.sw 0x38(r1),r17
+ l.sw 0x3c(r1),r18
+ l.sw 0x40(r1),r19
+ l.sw 0x44(r1),r20
+ l.sw 0x48(r1),r21
+ l.sw 0x4c(r1),r22
+ l.sw 0x50(r1),r23
+ l.sw 0x54(r1),r24
+ l.sw 0x58(r1),r25
+ l.sw 0x5c(r1),r26
+ l.sw 0x60(r1),r27
+ l.sw 0x64(r1),r28
+ l.sw 0x68(r1),r29
+ l.sw 0x6c(r1),r30
+ l.sw 0x70(r1),r31
+ l.jr r9
+ l.nop
+
+end_except:
+ l.lwz r3,0x00(r1)
+ l.lwz r4,0x04(r1)
+ l.lwz r5,0x08(r1)
+ l.lwz r6,0x0c(r1)
+ l.lwz r7,0x10(r1)
+ l.lwz r8,0x14(r1)
+ l.lwz r9,0x18(r1)
+ l.lwz r10,0x1c(r1)
+ l.lwz r11,0x20(r1)
+ l.lwz r12,0x24(r1)
+ l.lwz r13,0x28(r1)
+ l.lwz r14,0x2c(r1)
+ l.lwz r15,0x30(r1)
+ l.lwz r16,0x34(r1)
+ l.lwz r17,0x38(r1)
+ l.lwz r18,0x3c(r1)
+ l.lwz r19,0x40(r1)
+ l.lwz r20,0x44(r1)
+ l.lwz r21,0x48(r1)
+ l.lwz r22,0x4c(r1)
+ l.lwz r23,0x50(r1)
+ l.lwz r24,0x54(r1)
+ l.lwz r25,0x58(r1)
+ l.lwz r26,0x5c(r1)
+ l.lwz r27,0x60(r1)
+ l.lwz r28,0x64(r1)
+ l.lwz r29,0x68(r1)
+ l.lwz r30,0x6c(r1)
+ l.lwz r31,0x70(r1)
+ l.addi r1,r1,116
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+ .section .text
+
+_except_basic:
+_sys1:
+ l.addi r3,r0,-2 /* Enable exceptiom recognition and external interrupt,set user mode */
+ l.mfspr r4,r0,SPR_SR
+ l.and r4,r4,r3
+ l.ori r4,r4,(SPR_SR_IEE|SPR_SR_TEE)
+ l.mtspr r0,r4,SPR_SR
+
+ l.addi r3,r0,0
+ l.sys 1
+ l.addi r3,r3,2
+
+_sys2:
+ l.addi r11,r0,0
+
+ l.mfspr r4,r0,SPR_SR /* Check SR */
+ l.andi r4,r4,(SPR_SR_IEE|SPR_SR_TEE|SPR_SR_SM)
+ l.sfeqi r4,(SPR_SR_IEE|SPR_SR_TEE|SPR_SR_SM)
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,1
+1:
+ l.sfeqi r3,4 /* Check if l.sys or l.rfe has delay slot */
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,2
+1:
+ l.sfeqi r5,0x1c /* Check the EPCR */
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,4
+1:
+ l.sfeqi r6,SPR_SR_SM /* Check the SR when exception is taken */
+ l.bf 1f
+ l.nop
+ l.addi r11,r11,8
+1:
+ l.jr r9
+ l.nop
+
+_lo_dmmu_en:
+ l.mfspr r3,r0,SPR_SR
+ l.ori r3,r3,SPR_SR_DME
+ l.mtspr r0,r3,SPR_ESR_BASE
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+_lo_immu_en:
+ l.mfspr r3,r0,SPR_SR
+ l.ori r3,r3,SPR_SR_IME
+ l.mtspr r0,r3,SPR_ESR_BASE
+ l.mtspr r0,r9,SPR_EPCR_BASE
+ l.rfe
+ l.nop
+
+_call:
+ l.addi r11,r0,0
+ l.jr r3
+ l.nop
+
+_call_with_int:
+ l.mfspr r8,r0,SPR_SR
+ l.ori r8,r8,SPR_SR_TEE
+ l.mtspr r0,r8,SPR_ESR_BASE
+ l.mtspr r0,r3,SPR_EPCR_BASE
+ l.rfe
+
+_load_acc_32:
+ l.movhi r11,hi(0x12345678)
+ l.ori r11,r11,lo(0x12345678)
+ l.lwz r11,0(r4)
+ l.jr r9
+ l.nop
+
+_load_acc_16:
+ l.movhi r11,hi(0x12345678)
+ l.ori r11,r11,lo(0x12345678)
+ l.lhz r11,0(r4)
+ l.jr r9
+ l.nop
+
+_store_acc_32:
+ l.movhi r3,hi(0x12345678)
+ l.ori r3,r3,lo(0x12345678)
+ l.sw 0(r4),r3
+ l.jr r9
+ l.nop
+
+_store_acc_16:
+ l.movhi r3,hi(0x12345678)
+ l.ori r3,r3,lo(0x12345678)
+ l.sh 0(r4),r3
+ l.jr r9
+ l.nop
+
+_load_b_acc_32:
+ l.movhi r11,hi(0x12345678)
+ l.ori r11,r11,lo(0x12345678)
+ l.jr r9
+ l.lwz r11,0(r4)
+
+_b_trap:
+ l.jr r9
+_trap:
+ l.trap 1
+ l.jr r9
+ l.nop
+
+_b_range:
+ l.jr r9
+_range:
+ l.addi r3,r0,-1
+ l.jr r9
+ l.nop
+
+_int_trigger:
+ l.addi r11,r0,0
+ l.mfspr r3,r0,SPR_SR
+ l.ori r3,r3,SPR_SR_TEE
+ l.mtspr r0,r3,SPR_SR
+ l.addi r11,r11,1
+
+_int_loop:
+ l.j _int_loop
+ l.lwz r5,0(r4);
+
+_jump_back:
+ l.addi r11,r0,0
+ l.jr r9
+ l.addi r11,r11,1
+
except_test_s.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: mul.c
===================================================================
--- mul.c (nonexistent)
+++ mul.c (revision 1765)
@@ -0,0 +1,115 @@
+/* Test l.mul, l.mac and l.macrc instructions */
+#include "support.h"
+
+#define T1 0xa6312f33
+#define T2 0x0d4de375
+#define T3 0x61ab48dc
+
+#ifndef OR1K
+
+#include
+#define LONGEST long long
+
+LONGEST acc = 0;
+#define MAC(x,y) {\
+ printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));\
+ acc += (LONGEST)(x) * (LONGEST)(y);\
+ printf ("(%08x,%08x)\n", (unsigned long)(acc >> 32), (unsigned long)(acc & 0xffffffff));\
+}
+#define MACRC (macrc())
+static inline long macrc() {
+ long result = acc >> 28;
+ //printf ("<%08x>\n", (unsigned long)result);
+ acc = 0;
+ return result;
+}
+#else /* OR1K */
+
+#define MAC(x,y) asm volatile ("l.mac\t%0,%1" : : "r" (x), "r" (y))
+#define MACRC macrc()
+static inline long macrc() {
+ long x;
+ asm volatile ("l.macrc\t%0" : "=r" (x));
+ return x;
+}
+
+#endif /* SIM */
+
+long test_mul (long a, long b) {
+ long t;
+ int i;
+ for (i = 0; i < 100; i++) {
+ t = a * b;
+ t += 153;
+ a = t - a * 17;
+ b = t + b * 13333;
+
+ /*printf ("(%08x,%08x)", a, b);*/
+ }
+ return a;
+}
+
+long test_mac (long a, long b) {
+ long t = 1234567;
+ int i;
+ for (i = 0; i < 100; i++) {
+ MAC (a, b);
+ if (i & 3) {
+ a = t - a;
+ b = t + a;
+ } else {
+ a = MACRC;
+ }
+ MAC (a, 3);
+ MAC (a, 5);
+ MAC (a, 7);
+ //printf ("(%08x,%08x)", a, b);
+ }
+ return a;
+}
+
+long test_mul_mac (long a, long b) {
+ long t = 1;
+ int i;
+ for (i = 0; i < 100; i++) {
+ a = a * 119;
+ MAC (a, b);
+ MAC (b, 423490431);
+ MAC (b, 113);
+ MAC (a, 997);
+ b = 87 * a * t;
+ if (i & 3) {
+ t = a * b;
+ a = t - a;
+ b = t + a;
+ } else {
+ a = MACRC;
+ }
+ // printf ("(%08x,%08x)", a, b);
+ }
+ return a;
+}
+
+int main () {
+ unsigned t1;
+ unsigned t2;
+ unsigned t3;
+ printf ("%08x\n", MACRC);
+ t1 = test_mul (888888887, 0x87654321);
+ t2 = test_mac (888888887, 0x87654321);
+ t3 = test_mul_mac (888888887, 0x87654321);
+ printf ("%08x, expected %08x\n", t1, T1);
+ printf ("%08x, expected %08x\n", t2, T2);
+ printf ("%08x, expected %08x\n", t3, T3);
+ report (t1 ^ t2 ^ t3 ^ T1 ^ T2 ^ T3 ^ 0xdeaddead);
+ if (t1 != T1 || t2 != T2 || t3 != T3) {
+ printf ("Test failed!\n");
+ if (t1 != T1) exit (1);
+ if (t2 != T2) exit (2);
+ if (t3 != T3) exit (3);
+ } else {
+ printf ("Test succesful.\n");
+ exit (0);
+ }
+ exit (0);
+}
mul.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: except.S
===================================================================
--- except.S (nonexistent)
+++ except.S (revision 1765)
@@ -0,0 +1,353 @@
+/* Support file for c based tests */
+#include "spr_defs.h"
+
+#define reset _reset
+
+ .section .stack
+ .space 0x1000
+_stack:
+
+ .section .except
+ .extern _reset_support
+ .extern _c_reset
+ .extern _excpt_buserr
+ .extern _excpt_dpfault
+ .extern _excpt_ipfault
+ .extern _excpt_tick
+ .extern _excpt_align
+ .extern _excpt_illinsn
+ .extern _excpt_int
+ .extern _excpt_dtlbmiss
+ .extern _excpt_itlbmiss
+ .extern _excpt_range
+ .extern _excpt_syscall
+ .extern _excpt_break
+ .extern _excpt_trap
+
+
+ .org 0x100
+_reset_vector:
+ l.nop
+ l.nop
+ l.addi r2,r0,0x0
+ l.addi r3,r0,0x0
+ l.addi r4,r0,0x0
+ l.addi r5,r0,0x0
+ l.addi r6,r0,0x0
+ l.addi r7,r0,0x0
+ l.addi r8,r0,0x0
+ l.addi r9,r0,0x0
+ l.addi r10,r0,0x0
+ l.addi r11,r0,0x0
+ l.addi r12,r0,0x0
+ l.addi r13,r0,0x0
+ l.addi r14,r0,0x0
+ l.addi r15,r0,0x0
+ l.addi r16,r0,0x0
+ l.addi r17,r0,0x0
+ l.addi r18,r0,0x0
+ l.addi r19,r0,0x0
+ l.addi r20,r0,0x0
+ l.addi r21,r0,0x0
+ l.addi r22,r0,0x0
+ l.addi r23,r0,0x0
+ l.addi r24,r0,0x0
+ l.addi r25,r0,0x0
+ l.addi r26,r0,0x0
+ l.addi r27,r0,0x0
+ l.addi r28,r0,0x0
+ l.addi r29,r0,0x0
+ l.addi r30,r0,0x0
+ l.addi r31,r0,0x0
+
+ l.movhi r1,hi(_stack)
+ l.ori r1,r1,lo(_stack)
+
+ /* Check if this is RTL version */
+ l.lbz r3,0(r0)
+ l.sfeqi r3,0xff
+ l.bf 2f
+ l.nop
+ l.movhi r3,hi(_src_beg)
+ l.ori r3,r3,lo(_src_beg)
+ l.movhi r4,hi(_dst_beg)
+ l.ori r4,r4,lo(_dst_beg)
+ l.movhi r5,hi(_dst_end)
+ l.ori r5,r5,lo(_dst_end)
+ l.sub r5,r5,r4
+ l.sfeqi r5,0
+ l.bf 2f
+ l.nop
+1: l.lwz r6,0(r3)
+ l.sw 0(r4),r6
+ l.addi r3,r3,4
+ l.addi r4,r4,4
+ l.addi r5,r5,-4
+ l.sfgtsi r5,0
+ l.bf 1b
+ l.nop
+
+2:
+
+ l.movhi r2,hi(reset)
+ l.ori r2,r2,lo(reset)
+ l.jr r2
+ l.nop
+
+ .org 0x200
+_buserr_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_buserr)
+ l.ori r10,r10,lo(_excpt_buserr)
+ l.lwz r10,0x0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x300
+_dpfault_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+/*
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.addi r3,r3,-4
+ l.mtspr r0,r3,SPR_EPCR_BASE
+*/
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_dpfault)
+ l.ori r10,r10,lo(_excpt_dpfault)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x400
+_ipfault_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_ipfault)
+ l.ori r10,r10,lo(_excpt_ipfault)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x500
+_lpint_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_tick)
+ l.ori r10,r10,lo(_excpt_tick)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x600
+_align_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_align)
+ l.ori r10,r10,lo(_excpt_align)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x700
+_illinsn_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_illinsn)
+ l.ori r10,r10,lo(_excpt_illinsn)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x800
+_hpint_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_int)
+ l.ori r10,r10,lo(_excpt_int)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x900
+_dtlbmiss_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+/*
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.addi r3,r3,-4
+ l.mtspr r0,r3,SPR_EPCR_BASE
+*/
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_dtlbmiss)
+ l.ori r10,r10,lo(_excpt_dtlbmiss)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xa00
+_itlbmiss_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_itlbmiss)
+ l.ori r10,r10,lo(_excpt_itlbmiss)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xb00
+_range_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_range)
+ l.ori r10,r10,lo(_excpt_range)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xc00
+_syscall_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_syscall)
+ l.ori r10,r10,lo(_excpt_syscall)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xd00
+_break_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_break)
+ l.ori r10,r10,lo(_excpt_break)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xe00
+_trap_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_trap)
+ l.ori r10,r10,lo(_excpt_trap)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+store_regs:
+ l.sw 0x00(r1),r3
+ l.sw 0x04(r1),r4
+ l.sw 0x08(r1),r5
+ l.sw 0x0c(r1),r6
+ l.sw 0x10(r1),r7
+ l.sw 0x14(r1),r8
+ l.sw 0x1c(r1),r10
+ l.sw 0x20(r1),r11
+ l.sw 0x24(r1),r12
+ l.sw 0x28(r1),r13
+ l.sw 0x2c(r1),r14
+ l.sw 0x30(r1),r15
+ l.sw 0x34(r1),r16
+ l.sw 0x38(r1),r17
+ l.sw 0x3c(r1),r18
+ l.sw 0x40(r1),r19
+ l.sw 0x44(r1),r20
+ l.sw 0x48(r1),r21
+ l.sw 0x4c(r1),r22
+ l.sw 0x50(r1),r23
+ l.sw 0x54(r1),r24
+ l.sw 0x58(r1),r25
+ l.sw 0x5c(r1),r26
+ l.sw 0x60(r1),r27
+ l.sw 0x64(r1),r28
+ l.sw 0x68(r1),r29
+ l.sw 0x6c(r1),r30
+ l.sw 0x70(r1),r31
+ l.jr r9
+ l.nop
+
+end_except:
+ l.lwz r3,0x00(r1)
+ l.lwz r4,0x04(r1)
+ l.lwz r5,0x08(r1)
+ l.lwz r6,0x0c(r1)
+ l.lwz r7,0x10(r1)
+ l.lwz r8,0x14(r1)
+ l.lwz r9,0x18(r1)
+ l.lwz r10,0x1c(r1)
+ l.lwz r11,0x20(r1)
+ l.lwz r12,0x24(r1)
+ l.lwz r13,0x28(r1)
+ l.lwz r14,0x2c(r1)
+ l.lwz r15,0x30(r1)
+ l.lwz r16,0x34(r1)
+ l.lwz r17,0x38(r1)
+ l.lwz r18,0x3c(r1)
+ l.lwz r19,0x40(r1)
+ l.lwz r20,0x44(r1)
+ l.lwz r21,0x48(r1)
+ l.lwz r22,0x4c(r1)
+ l.lwz r23,0x50(r1)
+ l.lwz r24,0x54(r1)
+ l.lwz r25,0x58(r1)
+ l.lwz r26,0x5c(r1)
+ l.lwz r27,0x60(r1)
+ l.lwz r28,0x64(r1)
+ l.lwz r29,0x68(r1)
+ l.lwz r30,0x6c(r1)
+ l.lwz r31,0x70(r1)
+ l.addi r1,r1,116
+ l.rfe
+ l.nop
except.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: acv_uart.c
===================================================================
--- acv_uart.c (nonexistent)
+++ acv_uart.c (revision 1765)
@@ -0,0 +1,819 @@
+/* UART test using ACV */
+
+#include "spr_defs.h"
+#include "support.h"
+
+/* use this macro to comment out nonworking parts */
+#define COMPLETE 0
+
+/* Whether to do test in more detail */
+#define DETAILED 0
+
+#define UART_ADDR (0x9c000000)
+#define UART_RBR (UART_ADDR + 0)
+#define UART_THR (UART_ADDR + 0)
+#define UART_IER (UART_ADDR + 1)
+#define UART_IIR (UART_ADDR + 2)
+#define UART_FCR (UART_ADDR + 2)
+#define UART_LCR (UART_ADDR + 3)
+#define UART_MCR (UART_ADDR + 4)
+#define UART_LSR (UART_ADDR + 5)
+#define UART_MSR (UART_ADDR + 6)
+#define UART_SCR (UART_ADDR + 7)
+
+#define UART_DLL (UART_ADDR + 0)
+#define UART_DLH (UART_ADDR + 1)
+
+#define LCR_DIVL (0x80)
+#define LCR_BREAK (0x40)
+#define LCR_STICK (0x20)
+#define LCR_EVENP (0x10)
+#define LCR_PAREN (0x08)
+#define LCR_NSTOP (0x04)
+#define LCR_NBITS (0x03)
+
+#define LSR_DR (0x01)
+#define LSR_OE (0x02)
+#define LSR_PE (0x04)
+#define LSR_FE (0x08)
+#define LSR_BREAK (0x10)
+#define LSR_TXFE (0x20)
+#define LSR_TXE (0x40)
+#define LSR_ERR (0x80)
+
+#define UART_INT_LINE 15 /* To which interrupt is uart connected */
+
+/* fails if x is false */
+#define ASSERT(x) ((x)?1: fail (__FUNCTION__, __LINE__))
+/* Waits a few cycles that uart can prepare its data */
+#define WAIT() {asm ("l.nop");asm ("l.nop");asm ("l.nop");asm ("l.nop");}
+/* fails if there is an error */
+#define NO_ERROR() { unsigned x = getreg (UART_LSR); if ((x & (LSR_BREAK|LSR_FE|LSR_PE|LSR_OE)) && !(x & LSR_ERR)) \
+printf ("LSR7 (0x%02x) ERR @ %i\n", x, __LINE__); ASSERT(!(x & LSR_ERR) && ((x & 0x60) != 0x40));}
+#define MARK() printf ("Passed line %i\n", __LINE__)
+
+#ifndef __LINE__
+#define __LINE__ 0
+#endif
+
+void fail (char *func, int line)
+{
+#ifndef __FUNCTION__
+#define __FUNCTION__ "?"
+#endif
+ printf ("Test failed in %s:%i\n", func, line);
+ report(0xeeeeeeee);
+ exit (1);
+}
+
+inline void setreg (unsigned long addr, unsigned char value)
+{
+ *((volatile unsigned char *)addr) = value;
+}
+
+inline unsigned long getreg (unsigned long addr)
+{
+ return *((volatile unsigned char *)addr);
+}
+
+static volatile int int_cnt = 0;
+static volatile unsigned int_iir = 0;
+static volatile unsigned int_lsr = 0;
+static int int_rbr = 0;
+
+void interrupt_handler ()
+{
+ unsigned x;
+ printf ("Int\n");
+ report(0xdeaddead);
+ report(int_iir = getreg (UART_IIR));
+ report(int_lsr = getreg (UART_LSR));
+ int_cnt++;
+ ASSERT (int_iir != 1);
+ switch (int_iir & 0xf) {
+ case 0x6: printf ("Receiver LS int.\n"); break;
+ case 0x4: printf ("Received Data available. Expecting %02x, received %02x\n",
+ int_rbr, x = getreg(UART_RBR));
+ ASSERT (x == int_rbr);
+ report (x);
+ report (int_rbr);
+ break;
+ case 0xc: printf ("Character timeout. Expecting %02x, received %02x\n",
+ int_rbr, x = getreg(UART_RBR));
+ ASSERT (x == int_rbr);
+ report (x);
+ report (int_rbr);
+ break;
+ case 0x2: printf ("THR empty.\n"); break;
+ case 0x0: printf ("Modem Status.\n"); break;
+ default:
+ printf ("Invalid iir @ %i\n", __LINE__);
+ exit (1);
+ }
+ mtspr(SPR_PICSR, 0);
+}
+
+/* Receives a char and checks for errors */
+
+void recv_char (int ch)
+{
+ unsigned x;
+ char r;
+ report (ch);
+ /* Wait for rx fifo to be */
+ while (!((x = getreg (UART_LSR)) & LSR_DR));
+ if ((x & (LSR_BREAK|LSR_FE|LSR_PE|LSR_OE)) && !(x & LSR_ERR)) printf ("LSR7 (0x%02x) ERR @ recv_char\n", x);
+ ASSERT(!(x & LSR_ERR));
+
+ printf ("expected %02x, read %02x\n", ch, r = getreg (UART_RBR));
+ ASSERT (r == ch); /* compare character */
+}
+
+/* Sends a char and checks for errors */
+
+void send_char_no_wait (int ch)
+{
+ report (ch);
+ setreg (UART_THR, ch); /* send character */
+}
+
+void send_char (int ch)
+{
+ report (ch);
+ while (!(getreg (UART_LSR) & LSR_TXFE));
+ NO_ERROR();
+ setreg (UART_THR, ch); /* send character */
+ NO_ERROR();
+}
+
+void init_8n1 ()
+{
+ setreg (UART_IER, 0x00); /* disable interrupts */
+ WAIT();
+ ASSERT(getreg (UART_IIR) == 0xc1); /* nothing should be happening */
+ setreg (UART_FCR, 0x07); /* clear RX and TX FIFOs */
+ setreg (UART_LCR, LCR_DIVL);
+ setreg (UART_DLH, 2 >> 8);
+ setreg (UART_DLL, 2 & 0xff);
+ setreg (UART_LCR, 0x03); /* 8N1 @ 2 */
+ ASSERT(getreg (UART_LCR) == 0x03);
+ ASSERT (!(getreg (UART_LSR) & 0x1f));
+}
+
+/* Test reset values and r/w properties of some registers */
+
+void register_test ()
+{
+ printf ("register test\n");
+ MARK();
+ { /* test reset values */
+ ASSERT(getreg (UART_RBR) == 0x00); //0
+ ASSERT(getreg (UART_IER) == 0x00); //1
+ ASSERT(getreg (UART_IIR) == 0xc1); //2
+ ASSERT(getreg (UART_LCR) == 0x03); //3
+ ASSERT(getreg (UART_MCR) == 0x00); //4
+ ASSERT(getreg (UART_LSR) == 0x60); //5
+ ASSERT(getreg (UART_MSR) == 0x00); //6
+ ASSERT(getreg (UART_SCR) == 0x00); //7
+
+ setreg(UART_LCR, LCR_DIVL); //enable latches
+ ASSERT(getreg (UART_DLL) == 0x00); //0
+ ASSERT(getreg (UART_DLH) == 0x00); //1
+ setreg(UART_LCR, 0x00); //disable latches
+ }
+ setreg(UART_LCR, 0x00); //disable latches igor
+ setreg(UART_LCR, 0x00); //disable latches
+ setreg(UART_LCR, 0x00); //disable latches
+ setreg(UART_LCR, 0x00); //disable latches
+ setreg(UART_LCR, 0x00); //disable latches
+
+ MARK();
+ { /* test if status registers are read only */
+ unsigned long tmp;
+ int i;
+ tmp = getreg (UART_LSR);
+ setreg (UART_LSR, ~tmp);
+ ASSERT(getreg (UART_LSR) == tmp);
+
+ for (i = 0; i < 9; i++) {
+ setreg (UART_LSR, 1 << i);
+ ASSERT(getreg (UART_LSR) == tmp);
+ }
+
+ tmp = getreg (UART_MSR);
+ setreg (UART_MSR, ~tmp);
+ ASSERT(getreg (UART_MSR) == tmp);
+
+ for (i = 0; i < 9; i++) {
+ setreg (UART_MSR, 1 << i);
+ ASSERT(getreg (UART_MSR) == tmp);
+ }
+ }
+
+ MARK();
+ { /* test whether MCR is write only, be careful not to set the loopback bit */
+ ASSERT(getreg (UART_MCR) == 0x00);
+ setreg (UART_MCR, 0x45);
+ ASSERT(getreg (UART_MCR) == 0x00);
+ setreg (UART_MCR, 0xaa);
+ ASSERT(getreg (UART_MCR) == 0x00);
+ }
+ ASSERT (!(getreg (UART_LSR) & 0x1f));
+ MARK();
+ { /* Test if Divisor latch byte holds the data */
+ int i;
+ setreg(UART_LCR, LCR_DIVL); //enable latches
+ ASSERT(getreg (UART_LCR) == LCR_DIVL);
+ for (i = 0; i < 16; i++) {
+ unsigned short tmp = 0xdead << i;
+ setreg (UART_DLH, tmp >> 8);
+ setreg (UART_DLL, tmp & 0xff);
+ ASSERT(getreg (UART_DLL) == (tmp & 0xff)); //0
+ ASSERT(getreg (UART_DLH) == (tmp >> 8)); //1
+ }
+ setreg (UART_DLH, 0xa1); //igor
+ setreg (UART_DLH, 0xa1); //igor
+ setreg (UART_DLH, 0xa1); //igor
+ setreg (UART_DLH, 0xa1); //igor
+ setreg (UART_DLH, 0xa1); //igor
+
+ ASSERT (!(getreg (UART_LSR) & 0x1f));
+ for (i = 0; i < 16; i++) {
+ unsigned short tmp = 0xdead << i;
+ setreg (UART_DLL, tmp >> 8);
+ setreg (UART_DLH, tmp & 0xff);
+ ASSERT(getreg (UART_DLL) == (tmp >> 8)); //1
+ ASSERT(getreg (UART_DLH) == (tmp & 0xff)); //0
+ }
+ setreg (UART_DLH, 0xa2); //igor
+ setreg (UART_DLH, 0xa2); //igor
+ setreg (UART_DLH, 0xa2); //igor
+ setreg (UART_DLH, 0xa2); //igor
+ setreg (UART_DLH, 0xa2); //igor
+
+ setreg(UART_LCR, 0x00); //disable latches
+ ASSERT(getreg (UART_LCR) == 0x00);
+ ASSERT (!(getreg (UART_LSR) & 0x1f));
+ }
+ MARK();
+ { /* Test LCR, if it holds our data */
+ int i;
+ for (i = 0; i < 6; i++) {
+ unsigned short tmp = (0xde << i) & 0x3f;
+ setreg (UART_LCR, tmp);
+ ASSERT(getreg (UART_LCR) == tmp);
+ }
+ ASSERT (!(getreg (UART_LSR) & 0x1f));
+ }
+ setreg (UART_LCR, 0xa3); //igor
+ setreg (UART_LCR, 0xa3); //igor
+ setreg (UART_LCR, 0xa3); //igor
+ setreg (UART_LCR, 0xa3); //igor
+ setreg (UART_LCR, 0xa3); //igor
+
+ MARK ();
+
+ { /* SCR Test :))) */
+ int i;
+ setreg (UART_SCR, 0);
+ ASSERT (getreg (UART_SCR) == 0);
+ setreg (UART_SCR, 0xff);
+ ASSERT (getreg (UART_SCR) == 0xff);
+ for (i = 0; i < 16; i++) {
+ unsigned char tmp = 0xdead << i;
+ setreg (UART_SCR, tmp);
+ ASSERT (getreg (UART_SCR) == tmp);
+ }
+ }
+ setreg (UART_SCR, 0xa5);//igor
+ setreg (UART_SCR, 0xa5);//igor
+ setreg (UART_SCR, 0xa5);//igor
+ setreg (UART_SCR, 0xa5);//igor
+ setreg (UART_SCR, 0xa5);//igor
+
+ MARK();
+ /* Other registers will be tested later, if they function correctly,
+ since we cannot test them now, without destroying anything. */
+}
+
+/* Initializes uart and sends a few bytes to VAPI. It is then activated and send something back. */
+
+void send_recv_test ()
+{
+ char *s;
+ printf ("send_recv_test\n");
+ /* Init */
+ MARK();
+
+ //printf ("basic\n");
+ ASSERT (!(getreg (UART_LSR) & LSR_DR));
+ MARK();
+
+ /* Send a string */
+ s = "send_";
+ while (*s) {
+ /* Wait for tx fifo to be empty */
+ send_char (*s);
+ report((unsigned long)*s);
+ s++;
+ }
+ ASSERT (!(getreg (UART_LSR) & LSR_DR));
+ s = "test_";
+ while (*s) {
+ /* Wait for tx fifo and tx to be empty */
+ while (!(getreg (UART_LSR) & LSR_TXE));
+ NO_ERROR();
+ setreg (UART_THR, *s); /* send character */
+ NO_ERROR();
+ s++;
+ }
+ ASSERT (!(getreg (UART_LSR) & LSR_DR));
+ MARK();
+
+ /* Send characters with delay inbetween */
+ s = "is_running";
+ while (*s) {
+ int i;
+ send_char (*s);
+// igor for (i = 0; i < 1600; i++) /* wait at least ten chars before sending next one */
+ for (i = 0; i < 16; i++) /* wait at few chars before sending next one */
+ asm volatile ("l.nop");
+ s++;
+ }
+
+ send_char (0); /* send terminate char */
+ MARK();
+
+ /* Receives and compares the string */
+ s = "recv";
+ while (*s) recv_char (*s++);
+ MARK();
+ printf ("OK\n");
+}
+
+/* sends break in both directions */
+
+void break_test ()
+{
+ unsigned x;
+ char *s;
+ printf ("break_test\n");
+
+ MARK();
+ /* Send a break */
+ NO_ERROR();
+ MARK();
+ setreg (UART_LCR, 0x03 | LCR_BREAK); /* 8N1 */
+ MARK();
+ send_char ('b'); /* make sure it is recognised as a break */
+ MARK();
+ recv_char ('*');
+ setreg (UART_LCR, 0x03); /* deleting break bit, 8N1 */
+ MARK();
+
+ /* Receive a break */
+ send_char ('!');
+ MARK();
+ while (!((x = getreg (UART_LSR)) & LSR_DR));
+ /* we should receive zero character with broken frame and break bit should be set */
+ printf("[%x]\n", (LSR_DR | LSR_BREAK | LSR_ERR | LSR_TXFE | LSR_TXE));
+ ASSERT (x == (LSR_DR | LSR_BREAK | LSR_ERR | LSR_TXFE | LSR_TXE));
+ ASSERT (getreg (UART_RBR) == 0);
+ MARK();
+
+ /* Send a # to release break */
+ setreg (UART_THR, '#');
+ while (!(getreg (UART_LSR) & LSR_DR));
+ NO_ERROR(); /* BREAK bit should be cleared now */
+ ASSERT (getreg (UART_RBR) == '$');
+ MARK();
+
+ /* Break while sending characters */
+ s = "ns";
+ while (*s) send_char (*s++);
+ ASSERT (!(getreg (UART_LSR) & LSR_DR));
+ while (!(getreg (UART_LSR) & LSR_TXE)); /* Wait till we send everything */
+ /* this should break the * char, so it should not be received */
+ setreg (UART_THR, '*');
+ setreg (UART_LCR, 0x3 | LCR_BREAK);
+ MARK();
+
+ /* Drop the break, when we get acknowledge */
+ recv_char ('?');
+ setreg (UART_LCR, 0x3);
+ NO_ERROR();
+ MARK();
+
+ /* Receive a break */
+ send_char ('#');
+ while (!((x = getreg (UART_LSR)) & LSR_DR));
+ /* we should receive zero character with broken frame and break bit
+ should not be set, because we cleared it */
+ printf("[%x:%x]\n", x, (LSR_DR | LSR_BREAK |LSR_ERR | LSR_TXFE | LSR_TXE));
+ ASSERT (x == (LSR_DR | LSR_BREAK |LSR_ERR | LSR_TXFE | LSR_TXE));
+ ASSERT (getreg (UART_RBR) == 0);
+ MARK();
+ send_char ('?');
+ MARK();
+ while (!(getreg (UART_LSR) & LSR_DR));
+ recv_char ('!');
+ printf ("OK\n");
+}
+
+/* Tries to send data in different modes in both directions */
+
+/* Utility function, that tests current configuration */
+void test_mode (int nbits)
+{
+ unsigned mask = (1 << nbits) - 1;
+ send_char (0x55);
+#if DETAILED
+ send_char (0x55);
+ recv_char (0x55 & mask);
+#endif
+ recv_char (0x55 & mask);
+ send_char ('a'); // 0x61
+#if DETAILED
+ send_char ('a'); // 0x61
+ recv_char ('a' & mask);
+#endif
+ recv_char ('a' & mask);
+}
+
+void different_modes_test ()
+{
+ int speed, parity, length;
+ printf ("different modes test\n");
+ init_8n1();
+
+ /* Init */
+ MARK();
+ ASSERT(getreg (UART_IIR) == 0xc1); /* nothing should be happening */
+ MARK();
+
+ /* Test different speeds */
+ for (speed = 1; speed < 5; speed++) {
+ setreg (UART_LCR, LCR_DIVL);
+ setreg (UART_DLH, speed >> 8);
+ setreg (UART_DLL, speed & 0xff);
+ setreg (UART_LCR, 0x03); /* 8N1 @ 10 => 160 instructions for one cycle */
+ test_mode (8);
+ MARK();
+ }
+ MARK();
+
+ setreg (UART_LCR, LCR_DIVL);
+ setreg (UART_DLH, 1 >> 8);
+ setreg (UART_DLL, 1 & 0xff);
+ MARK();
+
+ /* Test all parity modes with different char lengths */
+ for (parity = 0; parity < 8; parity++)
+ for (length = 0; length < 4; length++) {
+ setreg (UART_LCR, length | (0 << 2) | (parity << 3));
+ test_mode (5 + length);
+ MARK();
+ }
+ MARK();
+
+ /* Test configuration, if we have >1 stop bits */
+ for (length = 0; length < 4; length++) {
+ setreg (UART_LCR, length | (1 << 2) | (0 << 3));
+ test_mode (5 + length);
+ MARK();
+ }
+ MARK();
+
+ /* Restore normal mode */
+ send_char ('T');
+ while (getreg (UART_LSR) != 0x60); /* Wait for THR to be empty */
+ setreg (UART_LCR, LCR_DIVL);
+ setreg (UART_DLH, 2 >> 8);
+ setreg (UART_DLL, 2 & 0xff);
+ setreg (UART_LCR, 0x03); /* 8N1 @ 2 */
+ MARK();
+ while (!(getreg (UART_LSR) & 1)); /* Receive 'x' char */
+ getreg (UART_RBR);
+ MARK();
+
+ send_char ('T');
+ while (getreg (UART_LSR) != 0x60); /* Wait for THR to be empty */
+ MARK();
+ printf ("OK\n");
+}
+
+/* Test various FIFO levels, break and framing error interrupt, etc */
+
+void interrupt_test ()
+{
+ int i;
+ printf ("interrupt_test\n");
+ /* Configure UART for interrupt mode */
+ ASSERT(getreg (UART_IIR) == 0xc1); /* nothing should be happening */
+ setreg (UART_LCR, LCR_DIVL);
+ setreg (UART_DLH, 6 >> 8); /* Set relatively slow speed, so we can hanlde interrupts properly */
+ setreg (UART_DLL, 6 & 0xff);
+ setreg (UART_LCR, 0x03); /* 8N1 @ 6 */
+
+ ASSERT (int_cnt == 0); /* We should not have got any interrupts before this test */
+ setreg (UART_FCR, 0x01); /* Set trigger level = 1 char, fifo should not be reset */
+ setreg (UART_IER, 0x07); /* Enable interrupts: line status, THR empty, data ready */
+
+ while (!int_cnt); /* Clear previous THR interrupt */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ /* I am configured - start interrupt test */
+ send_char ('I');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ int_rbr = '0';
+ while (!int_cnt); /* Wait for DR */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc4);
+ ASSERT (int_lsr == 0x61);
+ ASSERT (int_cnt == 0); /* no interrupts should be pending */
+ MARK();
+
+ setreg (UART_FCR, 0x41); /* Set trigger level = 4 chars, fifo should not be reset */
+
+ /* Everything ok here, send me 4 more */
+ send_char ('I');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ int_rbr = '1';
+ while (!int_cnt); /* Wait for DR */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc4);
+ ASSERT (int_lsr == 0x61);
+ MARK();
+
+ setreg (UART_FCR, 0x81); /* Set trigger level = 8 chars, fifo should not be reset */
+
+ /* Everything ok here, send me 5 more */
+ send_char ('I');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ int_rbr = '2';
+ while (!int_cnt); /* Wait for DR */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc4);
+ ASSERT (int_lsr == 0x61);
+ MARK();
+
+ setreg (UART_FCR, 0xc1); /* Set trigger level = 14 chars, fifo should not be reset */
+
+ /* Everything ok here, send me 7 more */
+ send_char ('I');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ int_rbr = '3';
+ while (!int_cnt); /* Wait for DR */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc4);
+ ASSERT (int_lsr == 0x61);
+ MARK();
+
+ /* Everything ok here, send me 4 more - fifo should be full OE should occur */
+ setreg (UART_IER, 0x06); /* Enable interrupts: line status, THR empty */
+ send_char ('I');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ while (!int_cnt); /* Wait for OE */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc6);
+ ASSERT (int_lsr == 0xe3); /* OE flag should be set */
+ ASSERT (getreg (UART_LSR) == 0x61); /* LSR should be cleared by previous read */
+ ASSERT (getreg (UART_IIR) == 0xc1); /* No interrupts should be pending */
+ MARK();
+
+ /* Check if we got everything */
+ ASSERT (int_cnt == 0); /* no interrupts should be pending */
+ for (i = 0; i < 3; i++) {
+ recv_char ("456"[i]); /* WARNING: read should not cause interrupt even if we step over trigger */
+ MARK ();
+ }
+ /* It is now safe to enable data ready interrupt */
+ setreg (UART_IER, 0x07); /* Enable interrupts: line status, THR empty, data ready */
+
+ /* Check if we got everything */
+ for (i = 0; i < 13; i++) {
+ recv_char ("789abcdefghij"[i]); /* WARNING: read should not cause interrupt even if we step over trigger */
+ MARK ();
+ }
+
+ ASSERT (int_cnt == 0); /* no interrupts should be pending */
+ ASSERT (getreg (UART_LSR) == 0x60); /* FIFO should be empty */
+
+ getreg (UART_RBR); /* check for FIFO counter overflow - fifo must still be empty */
+ ASSERT (getreg (UART_LSR) == 0x60); /* FIFO should be empty */
+
+ /* check for break interrupt */
+ send_char ('I');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ while (!int_cnt); /* Wait for break interrupt */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc6);
+ ASSERT (int_lsr == 0xf1); /* BE flag should be set */
+ ASSERT (getreg (UART_LSR) == 0x61); /* BE flag should be cleared by previous read */
+ MARK();
+ recv_char (0);
+ MARK();
+
+ send_char ('B'); /* Release break */
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+ /* Wait for acknowledge */
+ int_rbr = '$';
+ while (!int_cnt); /* Wait for timeout */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xcc);
+ ASSERT (int_lsr == 0x61);
+ MARK();
+
+ /* TODO: Check for parity error */
+ /* TODO: Check for frame error */
+
+ /* Check for timeout */
+ send_char ('I');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ int_rbr = 'T';
+ while (!int_cnt); /* Wait for timeout */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xcc); /* timeout interrupt occured */
+ ASSERT (int_lsr == 0x61); /* DR flag should be set */
+ ASSERT (getreg (UART_LSR) == 0x60); /* DR flag should be cleared - timeout occurred */
+ MARK();
+
+ send_char ('T');
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc2);
+ ASSERT ((int_lsr & 0xbe) == 0x20);
+ MARK();
+
+ setreg (UART_IER, 0x00); /* Disable interrupts */
+ ASSERT (int_cnt == 0); /* no interrupts should be pending */
+ NO_ERROR ();
+
+ while (getreg (UART_LSR) != 0x60); /* wait till we sent everynthing and then change mode */
+ setreg (UART_LCR, LCR_DIVL);
+ setreg (UART_DLH, 2 >> 8); /* Set relatively slow speed, so we can hanlde interrupts properly */
+ setreg (UART_DLL, 2 & 0xff);
+ setreg (UART_LCR, 0x03); /* 8N1 @ 2 */
+ send_char ('T');
+
+ MARK ();
+ printf ("OK\n");
+}
+
+/* Test if all control bits are set correctly. Lot of this was already tested
+ elsewhere and tests are not duplicated. */
+
+void control_register_test ()
+{
+ /* RBR already tested in send_recv_test() */
+ /* THR already tested in send_recv_test() */
+ /* IER already tested in interrupt_test() */
+ /* IIR already tested in interrupt_test() */
+ /* FCR0 - uart 16450 specific, not tested */
+
+ /* FCR1 - reset rx FIFO */
+ send_char ('*');
+ NO_ERROR ();
+ while (!(getreg (UART_LSR) & 0x01)); /* Wait for data ready */
+ setreg (UART_FCR, 2); /* Clears rx fifo */
+ ASSERT (getreg (UART_LSR) == 0x60); /* nothing happening */
+ send_char ('!');
+ recv_char ('!');
+ MARK ();
+
+ /* FCR2 - reset tx FIFO */
+send_char_no_wait ('1');
+send_char_no_wait ('2');
+// send_char ('1');
+// send_char ('2');
+ setreg (UART_FCR, 4); /* Should clear '2' from fifo, but '1' should be sent OK */
+ ASSERT (getreg (UART_LSR) == 0x00); /* we should still be sending '1' */
+ NO_ERROR();
+ send_char ('*');
+ recv_char ('*');
+ MARK ();
+
+ /* LCR already tested in different_modes_test () */
+ /* TODO: MSR */
+ /* LSR already tested in different_modes_test () and interrupt_test() */
+ /* SCR already tested in register_test () */
+
+ MARK ();
+ printf ("OK\n");
+}
+
+/* Tests parity error and frane error behaviour */
+
+void line_error_test ()
+{
+ printf ("line_error_test\n");
+
+ /* Test framing error if we change speed */
+ setreg (UART_LCR, LCR_DIVL);
+ setreg (UART_DLH, 2 >> 8);
+ setreg (UART_DLL, 2 & 0xff);
+ setreg (UART_LCR, 0x03); /* 8N1 @ 2 */
+ MARK();
+
+ send_char ('c');
+ ASSERT (int_cnt == 0);
+ setreg (UART_IER, 0x04); /* Enable interrupts: line status */
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc6);
+ ASSERT (int_lsr == 0xe9); /* Framing error and FIFO error */
+ getreg (UART_RBR); /* Ignore the data */
+ MARK ();
+ recv_char ('b');
+ MARK ();
+
+#if COMPLETE
+ /* Test framing error if we change stop bits */
+ send_char ('*');
+ while (getreg (UART_LSR)); /* wait till we sent everynthing and then change mode */
+ setreg (UART_LCR, 0x07); /* 8N2 */
+ send_char ('*');
+ MARK ();
+
+ ASSERT (int_cnt == 0);
+ setreg (UART_IER, 0x04); /* Enable interrupts: line status */
+ while (!int_cnt); /* Wait for THR to be empty */
+ ASSERT (--int_cnt == 0);
+ ASSERT (int_iir == 0xc6);
+ ASSERT (int_lsr == 0xe9); /* Framing error and FIFO error */
+ getreg (UART_RBR); /* Ignore the data */
+ recv_char ('b');
+ MARK();
+#endif
+
+ MARK ();
+ printf ("OK\n");
+}
+
+int main ()
+{
+ /* Use our low priority interrupt handler */
+ excpt_int = (unsigned long)interrupt_handler;
+
+ /* Enable interrupts */
+ mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE);
+ mtspr (SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << UART_INT_LINE));
+
+ register_test ();
+ init_8n1 ();
+ send_recv_test ();
+ break_test ();
+ different_modes_test ();
+ interrupt_test ();
+ control_register_test ();
+ line_error_test ();
+
+ /* loopback_test ();
+ modem_test ();
+ modem_error_test ();*/
+ recv_char ('@');
+ printf ("ALL TESTS PASSED\n");
+ return 0;
+}
acv_uart.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: uos/uos.c
===================================================================
--- uos/uos.c (nonexistent)
+++ uos/uos.c (revision 1765)
@@ -0,0 +1,314 @@
+/* This file is part of test microkernel for OpenRISC 1000. */
+/* (C) 2000 Damjan Lampret, lampret@opencores.org */
+
+#include "support.h"
+#include "spr_defs.h"
+#include "uos.h"
+#include "ipc.h"
+#include "int.h"
+
+/* External functions prototypes */
+int tick_init(unsigned long period, void (* inf)(void));
+
+/* Pointers to contexts used by except_or32.S routines */
+unsigned long *task_context;
+unsigned long *kernel_context;
+
+/* TCBs for all tasks in the system */
+struct tcb tasks[MAX_TASKS+1];
+
+/* Stacks for the tasks (stacks[0] is kernel stack) */
+unsigned char stacks[MAX_TASKS+1][STACK_SIZE];
+
+/* MCBs for IPC messages */
+struct mcb msgs[MAX_MSGS];
+
+/* Pointer to linked list of free MCBs. */
+struct mcb *free_mcbs;
+
+/* TID of the current user task */
+tid_t curtask = 0;
+
+/* Statistics */
+int kernel_sched_cnt = 0;
+int kernel_syscall_cnt = 0;
+
+/* Timestamp via or1ksim (CPU cycle number). */
+unsigned long timestamp()
+{
+ register unsigned long cycles asm("r3");
+ asm("l.sys 201");
+ return cycles;
+}
+
+/* Standard function for filling memory with a constant byte. */
+void *memset(void *dst, int c, size_t size)
+{
+ char *tmp = dst;
+
+ for(;tmp && (tmp < (char *)dst + size); tmp++)
+ *(char *)tmp = (char)c;
+
+ return dst;
+}
+
+/* Traverse linked list of MCBs and show individual messages. */
+void kernel_show_mcbs(struct mcb *mcb)
+{
+ for(;mcb; mcb = mcb->next) {
+ printf("MCB len=%u origintask=%u ", mcb->length, mcb->origin);
+ printf("msg:%s\n", mcb->msg);
+ }
+}
+
+/* Show all contexts. */
+void kernel_show_contexts()
+{
+ int i;
+ tid_t t;
+
+ for(t = 1; t <= MAX_TASKS; t++) {
+ printf("\ntask TID=%d: PC=0x%x ", t, (unsigned)tasks[t].regs.pc & ~0x3);
+ printf("SP(r1)=0x%x ", (unsigned)tasks[t].regs.sp);
+ printf("SR[IEE]=%d\n", (unsigned)tasks[t].regs.sr & SPR_SR_IEE);
+ printf("SR[TEE]=%d\n", (unsigned)tasks[t].regs.sr & SPR_SR_TEE);
+ printf("SR[SM]=%d\n", (unsigned)tasks[t].regs.sr & SPR_SR_SM);
+ for(i = 1; i < GPRS; i++) {
+ if (i % 4 == 0)
+ printf("\n");
+ printf("r%d=0x%.8x ", i, (unsigned)tasks[t].regs.gprs[i]);
+ }
+ printf("\n");
+ kernel_show_mcbs(tasks[t].waiting_msgs);
+ }
+ printf("\n");
+}
+
+/* Simple round-robin scheduler that directly calls dispatcher. It is
+ called by low level external interrupt exception handler or by
+ kernel_syscall if KERNEL_SYSCALL_SCHED is defined. */
+void kernel_sched()
+{
+ if ((++curtask > MAX_TASKS) || !(tasks[curtask].regs.pc & ~0x3))
+ curtask = 1;
+ task_context = (unsigned long *)&tasks[curtask].regs;
+
+#if KERNEL_OUTPUT
+ printf("kernel_sched(): entry number %d, ", ++kernel_sched_cnt);
+ printf("dispatching task TID=%d, time %u cycles", curtask, timestamp());
+
+ kernel_show_contexts();
+#endif
+
+ dispatch();
+}
+
+/* System call uos_msgsnd. */
+int uos_msgsnd(tid_t desttask, char *buf, int len)
+{
+ asm("l.sys 1");
+ asm("l.nop");
+}
+
+/* System call uos_msgrcv. */
+int uos_msgrcv(tid_t origintask, char *buf, int len)
+{
+ asm("l.sys 2");
+ asm("l.nop");
+}
+
+/* Handles system call uos_msgsnd. */
+void kernel_msgsnd(tid_t tid)
+{
+ struct mcb *mcb;
+ struct mcb **dstmq;
+ struct tcb *task;
+
+ task = &tasks[tid];
+
+ /* Sanity checks. */
+
+ /* Does destination task exist? */
+ if (!task->regs.gprs[1] || (task->regs.gprs[1] > MAX_TASKS)) {
+ task->regs.gprs[9] = IPC_ENOTASK;
+ return;
+ }
+
+ /* Are there any free MCBs? */
+ if (!free_mcbs) {
+ task->regs.gprs[9] = IPC_EOUTOFMCBS;
+ return;
+ }
+
+ /* Is message too big to fit into MCB's message buffer? */
+ if (task->regs.gprs[3] > MAX_MSGLEN) {
+ task->regs.gprs[9] = IPC_ETOOBIG;
+ return;
+ }
+
+ /* OK, send the message. */
+
+ /* First, allocate MCB. */
+ mcb = free_mcbs;
+ free_mcbs = mcb->next;
+
+ /* Second, copy message to the MCB. */
+ memcpy(mcb->msg, (void *)task->regs.gprs[2], task->regs.gprs[3]);
+ mcb->origin = tid;
+ mcb->length = task->regs.gprs[3];
+ mcb->next = NULL;
+
+ /* Insert MCB into destination task's message queue at
+ the end. */
+ dstmq = &tasks[task->regs.gprs[1]].waiting_msgs;
+ for(;*dstmq;)
+ dstmq = &((*dstmq)->next);
+ *dstmq = mcb;
+
+ task->regs.gprs[9] = IPC_NOERR;
+ return;
+}
+
+/* Handles system call uos_msgrcv. */
+void kernel_msgrcv(tid_t tid)
+{
+ struct mcb *mcb;
+ struct mcb *curmsg, **linkp;
+ struct tcb *task;
+
+ task = &tasks[tid];
+
+ /* Sanity checks. */
+
+ /* Does origin task exist? */
+ if (task->regs.gprs[1] > MAX_TASKS) {
+ task->regs.gprs[9] = IPC_ENOTASK;
+ return;
+ }
+
+ /* Are there any messages waiting for reception? */
+ if (!task->waiting_msgs) {
+ task->regs.gprs[9] = IPC_ENOMSGS;
+ return;
+ }
+
+ /* OK, receive the message. */
+
+ /* Search waiting messages for one coming from origintask. If
+ origintask is zero then grab the first message. */
+ curmsg = task->waiting_msgs;
+ linkp = &task->waiting_msgs;
+ for(;task->regs.gprs[1] && curmsg->next && curmsg->origin != task->regs.gprs[1];) {
+ linkp = &curmsg->next;
+ curmsg = curmsg->next;
+ }
+
+ /* Is receive buffer too small for receiving message? */
+ if (task->regs.gprs[3] < curmsg->length) {
+ task->regs.gprs[9] = IPC_ETOOBIG;
+ return;
+ }
+
+ /* Now copy the message from the MCB. */
+ memcpy((void *)task->regs.gprs[2], curmsg->msg, task->regs.gprs[3]);
+
+ /* Remove MCB from task's waiting queue and place it
+ back into free MCBs queue. */
+ *linkp = curmsg->next;
+ curmsg->next = free_mcbs;
+ free_mcbs = curmsg;
+
+ task->regs.gprs[9] = IPC_NOERR;
+ return;
+}
+
+/* Handles all uOS system calls. It is called by low level system call
+ exception handler. */
+void kernel_syscall()
+{
+ unsigned short syscall_num;
+
+#if KERNEL_OUTPUT
+ printf("kernel_syscall(): entry number %d, ", ++kernel_syscall_cnt);
+ printf("current TID=%d, time %u cycles", curtask, timestamp());
+
+ kernel_show_contexts();
+#endif
+ syscall_num = *(unsigned short *)((tasks[curtask].regs.pc & ~0x3) - 6);
+
+ switch(syscall_num) {
+ case IPC_MSGSND:
+ kernel_msgsnd(curtask);
+ break;
+ case IPC_MSGRCV:
+ kernel_msgrcv(curtask);
+ break;
+ default:
+ printf("kernel_syscall(): unknown syscall (%u)\n", syscall_num);
+ }
+
+#if KERNEL_SYSCALL_SCHED
+ kernel_sched();
+#endif
+ dispatch();
+}
+
+/* Called by reset exception handler to initialize the kernel and start
+ rolling first task. */
+int kernel_init()
+{
+ tid_t t;
+ int i;
+
+ printf("Initializing kernel:\n");
+
+ printf(" Clearing kernel structures...\n");
+ memset(tasks, 0, sizeof(tasks));
+ memset(stacks, 0, sizeof(stacks));
+ memset(msgs, 0, sizeof(msgs));
+
+ printf(" Initializing MCBs... %d MCB(s)\n", MAX_MSGS);
+ for(i = 0; i < (MAX_MSGS - 1); i++)
+ msgs[i].next = &msgs[i+1];
+ free_mcbs = &msgs[0];
+
+ printf(" Initializing TCBs... %d user task(s)\n", MAX_TASKS);
+
+ tasks_entries();
+
+ for(t = 0; t <= MAX_TASKS; t++) {
+ tasks[t].regs.sp = (unsigned long)stacks[t] + STACK_SIZE - 4;
+ /* Disable EXR for kernel context */
+ tasks[t].regs.sr |= (t == 0 ? SPR_SR_SM : SPR_SR_TEE | SPR_SR_IEE);
+ tasks[t].regs.gprs[1] = t;
+ }
+
+ /* First task runs in seprvisor mode */
+ tasks[1].regs.sr |= SPR_SR_SM;
+
+ /* TID=0 is reserved for kernel use */
+ kernel_context = (unsigned long *)&tasks[0].regs;
+
+ /* First task to be scheduled is task TID=1 */
+ task_context = (unsigned long *)&tasks[1].regs;
+
+ /* Initialize initrrupt controller */
+ int_init();
+
+ printf(" Exceptions will be enabled when first task is dispatched.\n");
+ printf("Kernel initalized. Starting first user task.\n");
+
+#if KERNEL_SYSCALL_SCHED
+ kernel_sched(); /* Lets schedule and dispatch our first task */
+#else
+ tick_init(TICK_PERIOD, kernel_sched);
+ kernel_sched(); /* Lets schedule and dispatch our first task */
+#endif
+ /* ... */ /* We never get here */
+}
+
+int main ()
+{
+ kernel_init();
+ return 0;
+}
Index: uos/spr_defs.h
===================================================================
--- uos/spr_defs.h (nonexistent)
+++ uos/spr_defs.h (revision 1765)
@@ -0,0 +1,428 @@
+/* spr_defs.h -- Defines OR1K architecture specific special-purpose registers
+ Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
+
+This file is part of OpenRISC 1000 Architectural Simulator.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* This file is also used by microkernel test bench. Among
+others it is also used in assembly file(s). */
+
+/* Definition of special-purpose registers (SPRs) */
+
+#define MAX_GRPS (32)
+#define MAX_SPRS_PER_GRP_BITS (11)
+#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS)
+#define MAX_SPRS (0x10000)
+
+/* Base addresses for the groups */
+#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS)
+#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS)
+
+/* System control and status group */
+#define SPR_VR (SPRGROUP_SYS + 0)
+#define SPR_UPR (SPRGROUP_SYS + 1)
+#define SPR_CPUCFGR (SPRGROUP_SYS + 2)
+#define SPR_DMMUCFGR (SPRGROUP_SYS + 3)
+#define SPR_IMMUCFGR (SPRGROUP_SYS + 4)
+#define SPR_DCCFGR (SPRGROUP_SYS + 5)
+#define SPR_ICCFGR (SPRGROUP_SYS + 6)
+#define SPR_DCFGR (SPRGROUP_SYS + 7)
+#define SPR_PCCFGR (SPRGROUP_SYS + 8)
+#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */
+#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */
+#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */
+#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */
+#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */
+#define SPR_EEAR_BASE (SPRGROUP_SYS + 48)
+#define SPR_EEAR_LAST (SPRGROUP_SYS + 63)
+#define SPR_ESR_BASE (SPRGROUP_SYS + 64)
+#define SPR_ESR_LAST (SPRGROUP_SYS + 79)
+
+/* Data MMU group */
+#define SPR_DMMUCR (SPRGROUP_DMMU + 0)
+#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x200)
+#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x200)
+#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x300 + (WAY) * 0x200)
+#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x3ff + (WAY) * 0x200)
+
+/* Instruction MMU group */
+#define SPR_IMMUCR (SPRGROUP_IMMU + 0)
+#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x200)
+#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x200)
+#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x300 + (WAY) * 0x200)
+#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x3ff + (WAY) * 0x200)
+
+/* Data cache group */
+#define SPR_DCCR (SPRGROUP_DC + 0)
+#define SPR_DCBPR (SPRGROUP_DC + 1)
+#define SPR_DCBFR (SPRGROUP_DC + 2)
+#define SPR_DCBIR (SPRGROUP_DC + 3)
+#define SPR_DCBWR (SPRGROUP_DC + 4)
+#define SPR_DCBLR (SPRGROUP_DC + 5)
+#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200)
+#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200)
+
+/* Instruction cache group */
+#define SPR_ICCR (SPRGROUP_IC + 0)
+#define SPR_ICBPR (SPRGROUP_IC + 1)
+#define SPR_ICBIR (SPRGROUP_IC + 2)
+#define SPR_ICBLR (SPRGROUP_IC + 3)
+#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200)
+#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200)
+
+/* MAC group */
+#define SPR_MACLO (SPRGROUP_MAC + 1)
+#define SPR_MACHI (SPRGROUP_MAC + 2)
+
+/* Debug group */
+#define SPR_DVR(N) (SPRGROUP_D + (N))
+#define SPR_DCR(N) (SPRGROUP_D + 8 + (N))
+#define SPR_DMR1 (SPRGROUP_D + 16)
+#define SPR_DMR2 (SPRGROUP_D + 17)
+#define SPR_DWCR0 (SPRGROUP_D + 18)
+#define SPR_DWCR1 (SPRGROUP_D + 19)
+#define SPR_DSR (SPRGROUP_D + 20)
+#define SPR_DRR (SPRGROUP_D + 21)
+
+/* Performance counters group */
+#define SPR_PCCR(N) (SPRGROUP_PC + (N))
+#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N))
+
+/* Power management group */
+#define SPR_PMR (SPRGROUP_PM + 0)
+
+/* PIC group */
+#define SPR_PICMR (SPRGROUP_PIC + 0)
+#define SPR_PICPR (SPRGROUP_PIC + 1)
+#define SPR_PICSR (SPRGROUP_PIC + 2)
+
+/* Tick Timer group */
+#define SPR_TTMR (SPRGROUP_TT + 0)
+#define SPR_TTCR (SPRGROUP_TT + 1)
+
+/*
+ * Bit definitions for the Version Register
+ *
+ */
+#define SPR_VR_VER 0xffff0000 /* Processor version */
+#define SPR_VR_REV 0x0000003f /* Processor revision */
+
+/*
+ * Bit definitions for the Unit Present Register
+ *
+ */
+#define SPR_UPR_UP 0x00000001 /* UPR present */
+#define SPR_UPR_DCP 0x00000002 /* Data cache present */
+#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */
+#define SPR_UPR_DMP 0x00000008 /* Data MMU present */
+#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */
+#define SPR_UPR_OB32P 0x00000020 /* ORBIS32 present */
+#define SPR_UPR_OB64P 0x00000040 /* ORBIS64 present */
+#define SPR_UPR_OF32P 0x00000080 /* ORFPX32 present */
+#define SPR_UPR_OF64P 0x00000100 /* ORFPX64 present */
+#define SPR_UPR_OV32P 0x00000200 /* ORVDX32 present */
+#define SPR_UPR_OV64P 0x00000400 /* ORVDX64 present */
+#define SPR_UPR_DUP 0x00000800 /* Debug unit present */
+#define SPR_UPR_PCUP 0x00001000 /* Performance counters unit present */
+#define SPR_UPR_PMP 0x00002000 /* Power management present */
+#define SPR_UPR_PICP 0x00004000 /* PIC present */
+#define SPR_UPR_TTP 0x00008000 /* Tick timer present */
+#define SPR_UPR_SRP 0x00010000 /* Shadow registers present */
+#define SPR_UPR_RES 0x00fe0000 /* ORVDX32 present */
+#define SPR_UPR_CUST 0xff000000 /* Custom units */
+
+/*
+ * Bit definitions for the Supervision Register
+ *
+ */
+#define SPR_SR_CID 0xf0000000 /* Context ID */
+#define SPR_SR_FO 0x00008000 /* Fixed one */
+#define SPR_SR_EPH 0x00004000 /* Exception Prefixi High */
+#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */
+#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */
+#define SPR_SR_OV 0x00000800 /* Overflow flag */
+#define SPR_SR_CY 0x00000400 /* Carry flag */
+#define SPR_SR_F 0x00000200 /* Condition Flag */
+#define SPR_SR_CE 0x00000100 /* CID Enable */
+#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */
+#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */
+#define SPR_SR_DME 0x00000020 /* Data MMU Enable */
+#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */
+#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */
+#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */
+#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */
+#define SPR_SR_SM 0x00000001 /* Supervisor Mode */
+
+/*
+ * Bit definitions for the Data MMU Control Register
+ *
+ */
+#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */
+#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */
+#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */
+#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */
+
+/*
+ * Bit definitions for the Instruction MMU Control Register
+ *
+ */
+#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */
+#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */
+#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */
+#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */
+
+/*
+ * Bit definitions for the Data TLB Match Register
+ *
+ */
+#define SPR_DTLBMR_V 0x00000001 /* Valid */
+#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */
+#define SPR_DTLBMR_CID 0x0000003c /* Context ID */
+#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */
+#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */
+
+/*
+ * Bit definitions for the Data TLB Translate Register
+ *
+ */
+#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */
+#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */
+#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */
+#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */
+#define SPR_DTLBTR_A 0x00000010 /* Accessed */
+#define SPR_DTLBTR_D 0x00000020 /* Dirty */
+#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */
+#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */
+#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */
+#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */
+#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */
+
+/*
+ * Bit definitions for the Instruction TLB Match Register
+ *
+ */
+#define SPR_ITLBMR_V 0x00000001 /* Valid */
+#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */
+#define SPR_ITLBMR_CID 0x0000003c /* Context ID */
+#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */
+#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */
+
+/*
+ * Bit definitions for the Instruction TLB Translate Register
+ *
+ */
+#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */
+#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */
+#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */
+#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */
+#define SPR_ITLBTR_A 0x00000010 /* Accessed */
+#define SPR_ITLBTR_D 0x00000020 /* Dirty */
+#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */
+#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */
+#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */
+
+/*
+ * Bit definitions for Data Cache Control register
+ *
+ */
+#define SPR_DCCR_EW 0x000000ff /* Enable ways */
+
+/*
+ * Bit definitions for Insn Cache Control register
+ *
+ */
+#define SPR_ICCR_EW 0x000000ff /* Enable ways */
+
+/*
+ * Bit definitions for Debug Control registers
+ *
+ */
+#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */
+#define SPR_DCR_CC 0x0000000e /* Compare condition */
+#define SPR_DCR_SC 0x00000010 /* Signed compare */
+#define SPR_DCR_CT 0x000000e0 /* Compare to */
+
+/* Bit results with SPR_DCR_CC mask */
+#define SPR_DCR_CC_MASKED 0x00000000
+#define SPR_DCR_CC_EQUAL 0x00000001
+#define SPR_DCR_CC_LESS 0x00000002
+#define SPR_DCR_CC_LESSE 0x00000003
+#define SPR_DCR_CC_GREAT 0x00000004
+#define SPR_DCR_CC_GREATE 0x00000005
+#define SPR_DCR_CC_NEQUAL 0x00000006
+
+/* Bit results with SPR_DCR_CT mask */
+#define SPR_DCR_CT_DISABLED 0x00000000
+#define SPR_DCR_CT_IFEA 0x00000020
+#define SPR_DCR_CT_LEA 0x00000040
+#define SPR_DCR_CT_SEA 0x00000060
+#define SPR_DCR_CT_LD 0x00000080
+#define SPR_DCR_CT_SD 0x000000a0
+#define SPR_DCR_CT_LSEA 0x000000c0
+
+/*
+ * Bit definitions for Debug Mode 1 register
+ *
+ */
+#define SPR_DMR1_CW0 0x00000003 /* Chain watchpoint 0 */
+#define SPR_DMR1_CW1 0x0000000c /* Chain watchpoint 1 */
+#define SPR_DMR1_CW2 0x00000030 /* Chain watchpoint 2 */
+#define SPR_DMR1_CW3 0x000000c0 /* Chain watchpoint 3 */
+#define SPR_DMR1_CW4 0x00000300 /* Chain watchpoint 4 */
+#define SPR_DMR1_CW5 0x00000c00 /* Chain watchpoint 5 */
+#define SPR_DMR1_CW6 0x00003000 /* Chain watchpoint 6 */
+#define SPR_DMR1_CW7 0x0000c000 /* Chain watchpoint 7 */
+#define SPR_DMR1_CW8 0x00030000 /* Chain watchpoint 8 */
+#define SPR_DMR1_CW9 0x000c0000 /* Chain watchpoint 9 */
+#define SPR_DMR1_CW10 0x00300000 /* Chain watchpoint 10 */
+#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/
+#define SPR_DMR1_BT 0x00800000 /* Branch trace */
+#define SPR_DMR1_DXFW 0x01000000 /* Disable external force watchpoint */
+
+/*
+ * Bit definitions for Debug Mode 2 register
+ *
+ */
+#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */
+#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */
+#define SPR_DMR2_AWTC 0x00001ffc /* Assign watchpoints to counters */
+#define SPR_DMR2_WGB 0x00ffe000 /* Watchpoints generating breakpoint */
+
+/*
+ * Bit definitions for Debug watchpoint counter registers
+ *
+ */
+#define SPR_DWCR_COUNT 0x0000ffff /* Count */
+#define SPR_DWCR_MATCH 0xffff0000 /* Match */
+
+/*
+ * Bit definitions for Debug stop register
+ *
+ */
+#define SPR_DSR_RSTE 0x00000001 /* Reset exception */
+#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */
+#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */
+#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */
+#define SPR_DSR_TTE 0x00000010 /* iTick Timer exception */
+#define SPR_DSR_AE 0x00000020 /* Alignment exception */
+#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */
+#define SPR_DSR_IE 0x00000080 /* Interrupt exception */
+#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */
+#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */
+#define SPR_DSR_RE 0x00000400 /* Range exception */
+#define SPR_DSR_SCE 0x00000800 /* System call exception */
+#define SPR_DSR_SSE 0x00001000 /* Single Step Exception */
+#define SPR_DSR_TE 0x00002000 /* Trap exception */
+
+/*
+ * Bit definitions for Debug reason register
+ *
+ */
+#define SPR_DRR_RSTE 0x00000001 /* Reset exception */
+#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */
+#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */
+#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */
+#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */
+#define SPR_DRR_AE 0x00000020 /* Alignment exception */
+#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */
+#define SPR_DRR_IE 0x00000080 /* Interrupt exception */
+#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */
+#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */
+#define SPR_DRR_RE 0x00000400 /* Range exception */
+#define SPR_DRR_SCE 0x00000800 /* System call exception */
+#define SPR_DRR_TE 0x00001000 /* Trap exception */
+
+/*
+ * Bit definitions for Performance counters mode registers
+ *
+ */
+#define SPR_PCMR_CP 0x00000001 /* Counter present */
+#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */
+#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */
+#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */
+#define SPR_PCMR_LA 0x00000010 /* Load access event */
+#define SPR_PCMR_SA 0x00000020 /* Store access event */
+#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/
+#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */
+#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */
+#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */
+#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */
+#define SPR_PCMR_BS 0x00000800 /* Branch stall event */
+#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */
+#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */
+#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */
+#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */
+
+/*
+ * Bit definitions for the Power management register
+ *
+ */
+#define SPR_PMR_SDF 0x0000000f /* Slow down factor */
+#define SPR_PMR_DME 0x00000010 /* Doze mode enable */
+#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */
+#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */
+#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */
+
+/*
+ * Bit definitions for PICMR
+ *
+ */
+#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */
+
+/*
+ * Bit definitions for PICPR
+ *
+ */
+#define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */
+
+/*
+ * Bit definitions for PICSR
+ *
+ */
+#define SPR_PICSR_IS 0xffffffff /* Interrupt status */
+
+/*
+ * Bit definitions for Tick Timer Control Register
+ *
+ */
+#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */
+#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD
+#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */
+#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */
+#define SPR_TTMR_RT 0x40000000 /* Restart tick */
+#define SPR_TTMR_SR 0x80000000 /* Single run */
+#define SPR_TTMR_CR 0xc0000000 /* Continuous run */
+#define SPR_TTMR_M 0xc0000000 /* Tick mode */
+
+/*
+ * l.nop constants
+ *
+ */
+#define NOP_NOP 0x0000 /* Normal nop instruction */
+#define NOP_EXIT 0x0001 /* End of simulation */
+#define NOP_REPORT 0x0002 /* Simple report */
+#define NOP_PRINTF 0x0003 /* Simprintf instruction */
+#define NOP_REPORT_FIRST 0x0400 /* Report with number */
+#define NOP_REPORT_LAST 0x03ff /* Report with number */
uos/spr_defs.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: uos/tick.c
===================================================================
--- uos/tick.c (nonexistent)
+++ uos/tick.c (revision 1765)
@@ -0,0 +1,34 @@
+/* This file is part of test microkernel for OpenRISC 1000. */
+/* (C) 2001 Simon Srot, srot@opencores.org */
+
+#include "spr_defs.h"
+#include "support.h"
+
+/* Tick timer period */
+unsigned long tick_period;
+
+/* Inform of tick interrupt */
+void (*tick_inf)();
+
+/* Tick interrupt routine */
+void tick_int()
+{
+ /* Call inf routine */
+ (*tick_inf)();
+
+ /* Set new counter period iand clear inet pending bit */
+ mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_PERIOD));
+}
+
+/* Initialize routine */
+int tick_init(unsigned long period, void (* inf)())
+{
+ /* Save tick timer period and inform routine */
+ tick_period = period;
+ tick_inf = inf;
+
+ /* Set counter period, enable timer and interrupt */
+ mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
+
+ return 0;
+}
Index: uos/except_or32.S
===================================================================
--- uos/except_or32.S (nonexistent)
+++ uos/except_or32.S (revision 1765)
@@ -0,0 +1,264 @@
+/* This file is part of test microkernel for OpenRISC 1000. */
+/* (C) 2000 Damjan Lampret, lampret@opencores.org */
+
+#include "spr_defs.h"
+
+/*
+ * Context is saved to area pointed by pointer in R3. Original
+ * R3 is at memory location 0 and task's PC is at memory location 4.
+ */
+#define SAVEREGS \
+ l.lwz r3,0(r3); \
+ l.sw 4(r3),r1; \
+ l.sw 8(r3),r2; \
+ l.lwz r2,0(r0); /* saving original r3*/ \
+ l.sw 12(r3),r2; \
+ l.sw 16(r3),r4; \
+ l.sw 20(r3),r5; \
+ l.sw 24(r3),r6; \
+ l.sw 28(r3),r7; \
+ l.sw 32(r3),r8; \
+ l.sw 36(r3),r9; \
+ l.sw 40(r3),r10; \
+ l.sw 44(r3),r11; \
+ l.sw 48(r3),r12; \
+ l.sw 52(r3),r13; \
+ l.sw 56(r3),r14; \
+ l.sw 60(r3),r15; \
+ l.sw 64(r3),r16; \
+ l.sw 68(r3),r17; \
+ l.sw 72(r3),r18; \
+ l.sw 76(r3),r19; \
+ l.sw 80(r3),r20; \
+ l.sw 84(r3),r21; \
+ l.sw 88(r3),r22; \
+ l.sw 92(r3),r23; \
+ l.sw 96(r3),r24; \
+ l.sw 100(r3),r25; \
+ l.sw 104(r3),r26; \
+ l.sw 108(r3),r27; \
+ l.sw 112(r3),r28; \
+ l.sw 116(r3),r29; \
+ l.sw 120(r3),r30; \
+ l.sw 124(r3),r31; \
+ l.lwz r2,4(r0); /* saving original PC*/ \
+ l.sw 0(r3),r2; \
+ \
+ l.mfspr r2,r0,SPR_ESR_BASE; \
+ l.sw 128(r3),r2 /* saving SR */
+
+/*
+ * Pointer to context is in R3. All registers are loaded and execution is
+ * transfered to the loaded context's task
+ */
+#define LOADREGS_N_GO \
+ l.lwz r3,0(r3); \
+ l.lwz r2,0(r3); /* prepare PC*/ \
+ l.mtspr r0,r2,SPR_EPCR_BASE; \
+ \
+ l.lwz r2,128(r3); /* prepare SR*/ \
+ l.mtspr r0,r2,SPR_ESR_BASE; \
+ \
+ l.lwz r1,4(r3); \
+ l.lwz r2,8(r3); \
+ l.lwz r4,16(r3); \
+ l.lwz r5,20(r3); \
+ l.lwz r6,24(r3); \
+ l.lwz r7,28(r3); \
+ l.lwz r8,32(r3); \
+ l.lwz r9,36(r3); \
+ l.lwz r10,40(r3); \
+ l.lwz r11,44(r3); \
+ l.lwz r12,48(r3); \
+ l.lwz r13,52(r3); \
+ l.lwz r14,56(r3); \
+ l.lwz r15,60(r3); \
+ l.lwz r16,64(r3); \
+ l.lwz r17,68(r3); \
+ l.lwz r18,72(r3); \
+ l.lwz r19,76(r3); \
+ l.lwz r20,80(r3); \
+ l.lwz r21,84(r3); \
+ l.lwz r22,88(r3); \
+ l.lwz r23,92(r3); \
+ l.lwz r24,96(r3); \
+ l.lwz r25,100(r3); \
+ l.lwz r26,104(r3); \
+ l.lwz r27,108(r3); \
+ l.lwz r28,112(r3); \
+ l.lwz r29,116(r3); \
+ l.lwz r30,120(r3); \
+ l.lwz r31,124(r3); \
+ \
+ l.lwz r3,12(r3); /* prepare r3*/ \
+ \
+ l.rfe; /* Call task */ \
+ l.nop
+
+/*
+ * All registers are loaded from save area.
+ */
+#define LOADREGS \
+ l.lwz r3,0(r3); \
+ l.lwz r2,0(r3); /* prepare PC*/ \
+ l.mtspr r0,r2,SPR_EPCR_BASE; \
+ \
+ l.lwz r2,128(r3); /* prepare SR*/ \
+ l.mtspr r0,r2,SPR_ESR_BASE; \
+ \
+ l.lwz r1,4(r3); \
+ l.lwz r2,8(r3); \
+ l.lwz r4,16(r3); \
+ l.lwz r5,20(r3); \
+ l.lwz r6,24(r3); \
+ l.lwz r7,28(r3); \
+ l.lwz r8,32(r3); \
+ l.lwz r9,36(r3); \
+ l.lwz r10,40(r3); \
+ l.lwz r11,44(r3); \
+ l.lwz r12,48(r3); \
+ l.lwz r13,52(r3); \
+ l.lwz r14,56(r3); \
+ l.lwz r15,60(r3); \
+ l.lwz r16,64(r3); \
+ l.lwz r17,68(r3); \
+ l.lwz r18,72(r3); \
+ l.lwz r19,76(r3); \
+ l.lwz r20,80(r3); \
+ l.lwz r21,84(r3); \
+ l.lwz r22,88(r3); \
+ l.lwz r23,92(r3); \
+ l.lwz r24,96(r3); \
+ l.lwz r25,100(r3); \
+ l.lwz r26,104(r3); \
+ l.lwz r27,108(r3); \
+ l.lwz r28,112(r3); \
+ l.lwz r29,116(r3); \
+ l.lwz r30,120(r3); \
+ l.lwz r31,124(r3); \
+ \
+ l.lwz r3,12(r3); /* prepare r3*/
+
+/*
+ * Set new PC in saved context
+ */
+#define SET_CONTEXTPC(AREA,SUBROUTINE,TMPREG) \
+ l.lwz AREA,0(AREA); \
+ l.movhi TMPREG,hi(SUBROUTINE); \
+ l.addi TMPREG,r0,lo(SUBROUTINE); \
+ l.sw 0(AREA),TMPREG;
+
+/*
+ * Printf via or1ksim hook
+ */
+#if KERNEL_OUTPUT
+#define PRINTF(REG,STR) \
+ l.movhi REG,hi(STR); \
+ l.addi REG,r0,lo(STR); \
+ l.nop NOP_PRINTF
+#else
+#define PRINTF(REG,STR)
+#endif
+
+/*
+ * Reset Exception handler
+ */
+.org 0x100
+_reset_vector:
+ l.nop
+ l.movhi r2,hi(_reset)
+ l.ori r2,r2,lo(_reset)
+ l.jr r2
+ l.nop
+
+/*
+ * Bus Error Exception handler
+ */
+.org 0x0200
+_buserr:
+ l.nop
+ l.sw 0(r0),r3 /* Save r3 */
+ PRINTF(r3, _buserr_str)
+_hang:
+ l.j _hang
+ l.nop
+
+_buserr_str:
+ .ascii "Bus error exception.\n\000"
+
+/*
+ * External Interrupt Exception handler
+ */
+.org 0x800
+_extint:
+ l.nop
+ l.sw 0(r0),r3 /* Save r3 */
+ PRINTF(r3,_extint_str)
+ l.mfspr r3,r0,SPR_EPCR_BASE /* Get EPCR */
+/* l.addi r3,r3,4 /* increment because EPCR instruction was already executed */
+ l.sw 4(r0),r3 /* and save it */
+
+ /* now save user task context */
+ l.movhi r3,hi(_task_context)
+ l.addi r3,r0,lo(_task_context)
+ SAVEREGS
+
+ /* set kernel context's PC to kernel's scheduler */
+ l.movhi r3,hi(_kernel_context)
+ l.addi r3,r0,lo(_kernel_context)
+ SET_CONTEXTPC(r3,_int_main,r4)
+
+ /* load kernel context */
+ l.movhi r3,hi(_kernel_context)
+ l.addi r3,r0,lo(_kernel_context)
+ LOADREGS
+
+ l.movhi r3,hi(_int_main)
+ l.addi r3,r0,lo(_int_main)
+ l.jr r3
+ l.nop
+
+_extint_str:
+ .ascii "External interrupt exception.\n\000"
+
+/*
+ * System Call Exception handler
+ */
+.org 0x0c00
+_syscall:
+ l.nop
+ l.sw 0(r0),r3 /* Save r3 */
+ PRINTF(r3,_syscall_str)
+ l.mfspr r3,r0,SPR_EPCR_BASE /* Get EPCR */
+ l.addi r3,r3,4 /* increment because EPCR instruction was already executed */
+ l.sw 4(r0),r3 /* and save it */
+
+ /* now save user task context */
+ l.movhi r3,hi(_task_context)
+ l.addi r3,r0,lo(_task_context)
+ SAVEREGS
+
+ /* set kernel context's PC to kernel's syscall entry */
+ l.movhi r3,hi(_kernel_context)
+ l.addi r3,r0,lo(_kernel_context)
+ SET_CONTEXTPC(r3,_kernel_syscall,r4)
+
+ /* load kernel context */
+ l.movhi r3,hi(_kernel_context)
+ l.addi r3,r0,lo(_kernel_context)
+ LOADREGS_N_GO
+
+_syscall_str:
+ .ascii "System call exception.\n\000"
+
+/*
+ * Switch to a new context pointed by _task_context
+ */
+.global _dispatch
+.align 4
+_dispatch:
+ /* load user task GPRs and PC */
+ l.movhi r3,hi(_task_context)
+ l.addi r3,r0,lo(_task_context)
+ LOADREGS_N_GO
+
Index: uos/Makefile.in
===================================================================
--- uos/Makefile.in (nonexistent)
+++ uos/Makefile.in (revision 1765)
@@ -0,0 +1,338 @@
+# Makefile.in generated automatically by automake 1.4 from Makefile.am
+
+# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+
+
+SHELL = @SHELL@
+
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+VPATH = @srcdir@
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+
+bindir = @bindir@
+sbindir = @sbindir@
+libexecdir = @libexecdir@
+datadir = @datadir@
+sysconfdir = @sysconfdir@
+sharedstatedir = @sharedstatedir@
+localstatedir = @localstatedir@
+libdir = @libdir@
+infodir = @infodir@
+mandir = @mandir@
+includedir = @includedir@
+oldincludedir = /usr/include
+
+DESTDIR =
+
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+
+top_builddir = ..
+
+ACLOCAL = @ACLOCAL@
+AUTOCONF = @AUTOCONF@
+AUTOMAKE = @AUTOMAKE@
+AUTOHEADER = @AUTOHEADER@
+
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@ $(AM_INSTALL_PROGRAM_FLAGS)
+INSTALL_DATA = @INSTALL_DATA@
+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+transform = @program_transform_name@
+
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+host_alias = @host_alias@
+host_triplet = @host@
+CC = @CC@
+INCLUDES = @INCLUDES@
+LD = @LD@
+MAKEINFO = @MAKEINFO@
+MAKE_SHELL = @MAKE_SHELL@
+OR1K_SRCDIR = @OR1K_SRCDIR@
+PACKAGE = @PACKAGE@
+RANLIB = @RANLIB@
+SIM = @SIM@
+TESTS_ENV = @TESTS_ENV@
+VERSION = @VERSION@
+
+LDADD = ../support/libsupport.a
+LDFLAGS = -T${top_srcdir}/default.ld
+
+bin_PROGRAMS = uos
+uos_SOURCES = except_or32.S support.h spr_defs.h task.c int.h ipc.h tick.c uos.h uos.c
+mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
+CONFIG_CLEAN_FILES =
+PROGRAMS = $(bin_PROGRAMS)
+
+
+DEFS = @DEFS@ -I. -I$(srcdir)
+CPPFLAGS = @CPPFLAGS@
+LIBS = @LIBS@
+uos_OBJECTS = except_or32.o task.o tick.o uos.o
+uos_LDADD = $(LDADD)
+uos_DEPENDENCIES = ../support/libsupport.a
+uos_LDFLAGS =
+CFLAGS = @CFLAGS@
+COMPILE = $(CC) $(DEFS) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(LDFLAGS) -o $@
+DIST_COMMON = README Makefile.am Makefile.in
+
+
+DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
+
+TAR = gtar
+GZIP_ENV = --best
+DEP_FILES = .deps/except_or32.P .deps/task.P .deps/tick.P .deps/uos.P
+SOURCES = $(uos_SOURCES)
+OBJECTS = $(uos_OBJECTS)
+
+all: all-redirect
+.SUFFIXES:
+.SUFFIXES: .S .c .o .s
+$(srcdir)/Makefile.in: Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4)
+ cd $(top_srcdir) && $(AUTOMAKE) --gnu uos/Makefile
+
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status $(BUILT_SOURCES)
+ cd $(top_builddir) \
+ && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status
+
+
+mostlyclean-binPROGRAMS:
+
+clean-binPROGRAMS:
+ -test -z "$(bin_PROGRAMS)" || rm -f $(bin_PROGRAMS)
+
+distclean-binPROGRAMS:
+
+maintainer-clean-binPROGRAMS:
+
+install-binPROGRAMS: $(bin_PROGRAMS)
+ @$(NORMAL_INSTALL)
+ $(mkinstalldirs) $(DESTDIR)$(bindir)
+ @list='$(bin_PROGRAMS)'; for p in $$list; do \
+ if test -f $$p; then \
+ echo " $(INSTALL_PROGRAM) $$p $(DESTDIR)$(bindir)/`echo $$p|sed 's/$(EXEEXT)$$//'|sed '$(transform)'|sed 's/$$/$(EXEEXT)/'`"; \
+ $(INSTALL_PROGRAM) $$p $(DESTDIR)$(bindir)/`echo $$p|sed 's/$(EXEEXT)$$//'|sed '$(transform)'|sed 's/$$/$(EXEEXT)/'`; \
+ else :; fi; \
+ done
+
+uninstall-binPROGRAMS:
+ @$(NORMAL_UNINSTALL)
+ list='$(bin_PROGRAMS)'; for p in $$list; do \
+ rm -f $(DESTDIR)$(bindir)/`echo $$p|sed 's/$(EXEEXT)$$//'|sed '$(transform)'|sed 's/$$/$(EXEEXT)/'`; \
+ done
+
+.s.o:
+ $(COMPILE) -c $<
+
+.S.o:
+ $(COMPILE) -c $<
+
+mostlyclean-compile:
+ -rm -f *.o core *.core
+
+clean-compile:
+
+distclean-compile:
+ -rm -f *.tab.c
+
+maintainer-clean-compile:
+
+uos: $(uos_OBJECTS) $(uos_DEPENDENCIES)
+ @rm -f uos
+ $(LINK) $(uos_LDFLAGS) $(uos_OBJECTS) $(uos_LDADD) $(LIBS)
+
+tags: TAGS
+
+ID: $(HEADERS) $(SOURCES) $(LISP)
+ list='$(SOURCES) $(HEADERS)'; \
+ unique=`for i in $$list; do echo $$i; done | \
+ awk ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ here=`pwd` && cd $(srcdir) \
+ && mkid -f$$here/ID $$unique $(LISP)
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS)'; \
+ unique=`for i in $$list; do echo $$i; done | \
+ awk ' { files[$$0] = 1; } \
+ END { for (i in files) print i; }'`; \
+ test -z "$(ETAGS_ARGS)$$unique$(LISP)$$tags" \
+ || (cd $(srcdir) && etags $(ETAGS_ARGS) $$tags $$unique $(LISP) -o $$here/TAGS)
+
+mostlyclean-tags:
+
+clean-tags:
+
+distclean-tags:
+ -rm -f TAGS ID
+
+maintainer-clean-tags:
+
+distdir = $(top_builddir)/$(PACKAGE)-$(VERSION)/$(subdir)
+
+subdir = uos
+
+distdir: $(DISTFILES)
+ here=`cd $(top_builddir) && pwd`; \
+ top_distdir=`cd $(top_distdir) && pwd`; \
+ distdir=`cd $(distdir) && pwd`; \
+ cd $(top_srcdir) \
+ && $(AUTOMAKE) --include-deps --build-dir=$$here --srcdir-name=$(top_srcdir) --output-dir=$$top_distdir --gnu uos/Makefile
+ @for file in $(DISTFILES); do \
+ d=$(srcdir); \
+ if test -d $$d/$$file; then \
+ cp -pr $$d/$$file $(distdir)/$$file; \
+ else \
+ test -f $(distdir)/$$file \
+ || ln $$d/$$file $(distdir)/$$file 2> /dev/null \
+ || cp -p $$d/$$file $(distdir)/$$file || :; \
+ fi; \
+ done
+
+DEPS_MAGIC := $(shell mkdir .deps > /dev/null 2>&1 || :)
+
+-include $(DEP_FILES)
+
+mostlyclean-depend:
+
+clean-depend:
+
+distclean-depend:
+ -rm -rf .deps
+
+maintainer-clean-depend:
+
+%.o: %.c
+ @echo '$(COMPILE) -c $<'; \
+ $(COMPILE) -Wp,-MD,.deps/$(*F).pp -c $<
+ @-cp .deps/$(*F).pp .deps/$(*F).P; \
+ tr ' ' '\012' < .deps/$(*F).pp \
+ | sed -e 's/^\\$$//' -e '/^$$/ d' -e '/:$$/ d' -e 's/$$/ :/' \
+ >> .deps/$(*F).P; \
+ rm .deps/$(*F).pp
+
+%.lo: %.c
+ @echo '$(LTCOMPILE) -c $<'; \
+ $(LTCOMPILE) -Wp,-MD,.deps/$(*F).pp -c $<
+ @-sed -e 's/^\([^:]*\)\.o[ ]*:/\1.lo \1.o :/' \
+ < .deps/$(*F).pp > .deps/$(*F).P; \
+ tr ' ' '\012' < .deps/$(*F).pp \
+ | sed -e 's/^\\$$//' -e '/^$$/ d' -e '/:$$/ d' -e 's/$$/ :/' \
+ >> .deps/$(*F).P; \
+ rm -f .deps/$(*F).pp
+info-am:
+info: info-am
+dvi-am:
+dvi: dvi-am
+check-am: all-am
+check: check-am
+installcheck-am:
+installcheck: installcheck-am
+install-exec-am: install-binPROGRAMS
+install-exec: install-exec-am
+
+install-data-am:
+install-data: install-data-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+install: install-am
+uninstall-am: uninstall-binPROGRAMS
+uninstall: uninstall-am
+all-am: Makefile $(PROGRAMS)
+all-redirect: all-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) AM_INSTALL_PROGRAM_FLAGS=-s install
+installdirs:
+ $(mkinstalldirs) $(DESTDIR)$(bindir)
+
+
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -rm -f Makefile $(CONFIG_CLEAN_FILES)
+ -rm -f config.cache config.log stamp-h stamp-h[0-9]*
+
+maintainer-clean-generic:
+mostlyclean-am: mostlyclean-binPROGRAMS mostlyclean-compile \
+ mostlyclean-tags mostlyclean-depend mostlyclean-generic
+
+mostlyclean: mostlyclean-am
+
+clean-am: clean-binPROGRAMS clean-compile clean-tags clean-depend \
+ clean-generic mostlyclean-am
+
+clean: clean-am
+
+distclean-am: distclean-binPROGRAMS distclean-compile distclean-tags \
+ distclean-depend distclean-generic clean-am
+
+distclean: distclean-am
+
+maintainer-clean-am: maintainer-clean-binPROGRAMS \
+ maintainer-clean-compile maintainer-clean-tags \
+ maintainer-clean-depend maintainer-clean-generic \
+ distclean-am
+ @echo "This command is intended for maintainers to use;"
+ @echo "it deletes files that may require special tools to rebuild."
+
+maintainer-clean: maintainer-clean-am
+
+.PHONY: mostlyclean-binPROGRAMS distclean-binPROGRAMS clean-binPROGRAMS \
+maintainer-clean-binPROGRAMS uninstall-binPROGRAMS install-binPROGRAMS \
+mostlyclean-compile distclean-compile clean-compile \
+maintainer-clean-compile tags mostlyclean-tags distclean-tags \
+clean-tags maintainer-clean-tags distdir mostlyclean-depend \
+distclean-depend clean-depend maintainer-clean-depend info-am info \
+dvi-am dvi check check-am installcheck-am installcheck install-exec-am \
+install-exec install-data-am install-data install-am install \
+uninstall-am uninstall all-redirect all-am all installdirs \
+mostlyclean-generic distclean-generic clean-generic \
+maintainer-clean-generic clean mostlyclean distclean maintainer-clean
+
+
+again: clean all
+
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
Index: uos/Makefile.am
===================================================================
--- uos/Makefile.am (nonexistent)
+++ uos/Makefile.am (revision 1765)
@@ -0,0 +1,28 @@
+## Makefile for or1ksim subdirectory test
+## (c) Marko Mlinar, 2001
+## To add new test, edit between marked areas only
+#
+# This file is part of OpenRISC 1000 Architectural Simulator.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+
+LDADD = ../support/libsupport.a
+LDFLAGS = -T${top_srcdir}/default.ld
+
+bin_PROGRAMS = uos
+uos_SOURCES = except_or32.S support.h spr_defs.h task.c int.h ipc.h tick.c uos.h uos.c
+
+again: clean all
uos/Makefile.am
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: uos/ipc.h
===================================================================
--- uos/ipc.h (nonexistent)
+++ uos/ipc.h (revision 1765)
@@ -0,0 +1,27 @@
+/* This file is part of test microkernel for OpenRISC 1000. */
+/* (C) 2000 Damjan Lampret, lampret@opencores.org */
+
+/* Operation completed sucessfully. */
+#define IPC_NOERR 0
+
+/* Can't send any messages due to lack of free MCBs. */
+#define IPC_EOUTOFMCBS 1
+
+/* Sending message: No such destination task.
+ Receiving message: No such origin task. */
+#define IPC_ENOTASK 2
+
+/* Message to big to be sent or receive buffer is to small for
+ receiving message. If receiving then try again with bigger buffer. */
+#define IPC_ETOOBIG 3
+
+/* No messages waiting to be received. */
+#define IPC_ENOMSGS 4
+
+/* Send message in buffer buf of size len to task desttask. */
+int uos_msgsnd(tid_t desttask, char *buf, int len);
+
+/* Receive message of max size len from task origintask and put it
+ into buffer buf. If origintask is zero then get the first message
+ from the message queue. */
+int uos_msgrcv(tid_t origintask, char *buf, int len);
Index: uos/task.c
===================================================================
--- uos/task.c (nonexistent)
+++ uos/task.c (revision 1765)
@@ -0,0 +1,54 @@
+/* This file is part of test microkernel for OpenRISC 1000. */
+/* (C) 2000 Damjan Lampret, lampret@opencores.org */
+
+#include "support.h"
+#include "uos.h"
+#include "ipc.h"
+#include "int.h"
+
+extern struct tcb tasks[MAX_TASKS+1];
+
+int task(int id)
+{
+ int rc;
+ struct _msg {
+ char id;
+ unsigned long count;
+ } msg;
+
+ printf("Task %d started\n", id);
+
+ if(id == 1) {
+ msg.id = 1;
+ msg.count = 0;
+ uos_msgsnd(2, (char *)&msg, sizeof(msg));
+ }
+
+ for(;;) {
+ rc = uos_msgrcv(0, (char *)&msg, sizeof(msg));
+
+ if(rc != 0) {
+ printf("Task %d: Waiting for massage\n", id);
+ } else {
+ printf("Task %d: Got massage from task %d: 0x%.8x. Sending message to task %d: 0x%.8x \n", id, msg.id, (int)msg.count, (id == 3 ? 1 : (id + 1)), (int)(msg.count + 1));
+ msg.id = id;
+
+ if((id == 1) && (msg.count > 15)) {
+ report(msg.count + 0xdeadde9c);
+ exit(0);
+ }
+
+ msg.count += 1;
+ uos_msgsnd((id == 3 ? 1 : (id + 1)), (char *)&msg, sizeof(msg));
+ }
+ }
+}
+
+/* Called by kernel_init to collect all tasks entries. */
+void tasks_entries()
+{
+ tasks[1].regs.pc = (unsigned long)task;
+ tasks[2].regs.pc = (unsigned long)task;
+ tasks[3].regs.pc = (unsigned long)task;
+}
+
Index: uos/uos.h
===================================================================
--- uos/uos.h (nonexistent)
+++ uos/uos.h (revision 1765)
@@ -0,0 +1,58 @@
+/* This file is part of test microkernel for OpenRISC 1000. */
+/* (C) 2000 Damjan Lampret, lampret@opencores.org */
+
+/* Length of the IPC message's useful data. */
+#define MAX_MSGLEN 100
+
+/* Number of user tasks in the system. */
+#define MAX_TASKS 8
+
+/* Number of IPC messages in the system. */
+#define MAX_MSGS 16
+
+/* Number of general purpose registers (not counting r0 and r1). */
+#define GPRS 30
+
+/* Size of kernel and user task stacks. Size for individual task. */
+#define STACK_SIZE 2048
+
+/* Define this if you want kernel debug output. Note that you must
+ assemble except_or32.S with KERNEL_OUTPUT defined in Makefile. This
+ definition is only for main uos.c. */
+#define KERNEL_OUTPUT 0
+
+/* Define this if you want task switch at every system call. */
+#define KERNEL_SYSCALL_SCHED 0
+
+/* System tick timer period */
+#define TICK_PERIOD 0x500
+
+/* Task ID type (if we would have processes then we would call it PID) */
+typedef int tid_t;
+
+/* System call numbers */
+#define IPC_MSGSND 1
+#define IPC_MSGRCV 2
+
+/* Message Control Block structure */
+struct mcb {
+ char msg[MAX_MSGLEN]; /* Message's data */
+ int length; /* Message's length */
+ tid_t origin; /* TID of message's origin task */
+ struct mcb *next; /* Next message in linked list */
+};
+
+/* Task Control Block structure */
+struct tcb {
+ struct regs {
+ unsigned long pc; /* Task's PC */
+ unsigned long sp; /* Task's stack (r1)*/
+ unsigned long gprs[GPRS]; /* Task's GPRs r2-r15 */
+ unsigned long sr; /* Task's supervision register */
+ } regs;
+ struct mcb *waiting_msgs; /* Waiting messages */
+};
+
+extern void dispatch();
+/* Called by kernel_init to collect all tasks entries. */
+extern void tasks_entries();
Index: uos/README
===================================================================
--- uos/README (nonexistent)
+++ uos/README (revision 1765)
@@ -0,0 +1,18 @@
+
+This is the Micro OS (uOS) for testing operating system features of
+OpenRISC 1000 architecture. Specifically non reentrant, preemptive
+multitasking microkernel. Purpose of this code is not to be a true
+operating system but merely a testbench for testing the architecture,
+or1ksim and software development tools (GCC, Binutils, ...).
+
+This test OS has all necessary exception handlers to handle exceptions. There
+are two tasks: one task generates data and passes that data via IPC to the
+second task. Second task outputs the data via or1ksim syscall to the simulator.
+
+Currently only OR32 is supported (exception handlers are written in
+assembly). Tools required to compile sources are the latest
+or32-coff-gcc, or32-coff-as and or32-coff-ld. Also make sure you undefine
+VIRTUAL_MACHINE_ONLY when compiling or1ksim.
+
+--
+10/Jun/2000, Damjan Lampret, lampret@opencores.org
Index: uos
===================================================================
--- uos (nonexistent)
+++ uos (revision 1765)
uos
Property changes :
Added: svn:ignore
## -0,0 +1,2 ##
+Makefile
+uos
Index: except_mc.S
===================================================================
--- except_mc.S (nonexistent)
+++ except_mc.S (revision 1765)
@@ -0,0 +1,397 @@
+/* Support file for c based tests */
+#include "spr_defs.h"
+
+#define reset _reset
+
+ .section .stack
+ .space 0x1000
+_stack:
+
+ .section .except
+ .extern _reset_support
+ .extern _c_reset
+ .extern _excpt_buserr
+ .extern _excpt_dpfault
+ .extern _excpt_ipfault
+ .extern _excpt_tick
+ .extern _excpt_align
+ .extern _excpt_illinsn
+ .extern _excpt_int
+ .extern _excpt_dtlbmiss
+ .extern _excpt_itlbmiss
+ .extern _excpt_range
+ .extern _excpt_syscall
+ .extern _excpt_break
+ .extern _excpt_trap
+
+
+ .org 0x100
+_reset_vector:
+ l.nop
+ l.nop
+ l.addi r4,r0,0x0
+ l.addi r5,r0,0x0
+ l.addi r6,r0,0x0
+ l.addi r7,r0,0x0
+ l.addi r8,r0,0x0
+ l.addi r9,r0,0x0
+ l.addi r10,r0,0x0
+ l.addi r11,r0,0x0
+ l.addi r12,r0,0x0
+ l.addi r13,r0,0x0
+ l.addi r14,r0,0x0
+ l.addi r15,r0,0x0
+ l.addi r16,r0,0x0
+ l.addi r17,r0,0x0
+ l.addi r18,r0,0x0
+ l.addi r19,r0,0x0
+ l.addi r20,r0,0x0
+ l.addi r21,r0,0x0
+ l.addi r22,r0,0x0
+ l.addi r23,r0,0x0
+ l.addi r24,r0,0x0
+ l.addi r25,r0,0x0
+ l.addi r26,r0,0x0
+ l.addi r27,r0,0x0
+ l.addi r28,r0,0x0
+ l.addi r29,r0,0x0
+ l.addi r30,r0,0x0
+ l.addi r31,r0,0x0
+
+ l.j init_mc
+ l.nop
+
+start: l.movhi r1,hi(_stack)
+ l.ori r1,r1,lo(_stack)
+
+ /* Check if this is RTL version */
+ l.lbz r3,0(r0)
+ l.sfeqi r3,0xff
+ l.bf 2f
+ l.nop
+ l.movhi r3,hi(_src_beg)
+ l.ori r3,r3,lo(_src_beg)
+ l.movhi r4,hi(_dst_beg)
+ l.ori r4,r4,lo(_dst_beg)
+ l.movhi r5,hi(_dst_end)
+ l.ori r5,r5,lo(_dst_end)
+ l.sub r5,r5,r4
+ l.sfeqi r5,0
+ l.bf 2f
+ l.nop
+1: l.lwz r6,0(r3)
+ l.sw 0(r4),r6
+ l.addi r3,r3,4
+ l.addi r4,r4,4
+ l.addi r5,r5,-4
+ l.sfgtsi r5,0
+ l.bf 1b
+ l.nop
+
+2:
+
+ l.movhi r2,hi(reset)
+ l.ori r2,r2,lo(reset)
+ l.jr r2
+ l.nop
+
+ .org 0x200
+_buserr_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_buserr)
+ l.ori r10,r10,lo(_excpt_buserr)
+ l.lwz r10,0x0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x300
+_dpfault_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.addi r3,r3,-4
+ l.mtspr r0,r3,SPR_EPCR_BASE
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_dpfault)
+ l.ori r10,r10,lo(_excpt_dpfault)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x400
+_ipfault_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_ipfault)
+ l.ori r10,r10,lo(_excpt_ipfault)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x500
+_lpint_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_tick)
+ l.ori r10,r10,lo(_excpt_tick)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x600
+_align_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_align)
+ l.ori r10,r10,lo(_excpt_align)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x700
+_illinsn_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_illinsn)
+ l.ori r10,r10,lo(_excpt_illinsn)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x800
+_hpint_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_int)
+ l.ori r10,r10,lo(_excpt_int)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0x900
+_dtlbmiss_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+
+ l.mfspr r3,r0,SPR_EPCR_BASE
+ l.addi r3,r3,-4
+ l.mtspr r0,r3,SPR_EPCR_BASE
+
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_dtlbmiss)
+ l.ori r10,r10,lo(_excpt_dtlbmiss)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xa00
+_itlbmiss_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_itlbmiss)
+ l.ori r10,r10,lo(_excpt_itlbmiss)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xb00
+_range_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_range)
+ l.ori r10,r10,lo(_excpt_range)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xc00
+_syscall_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_syscall)
+ l.ori r10,r10,lo(_excpt_syscall)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xd00
+_break_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_break)
+ l.ori r10,r10,lo(_excpt_break)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+ .org 0xe00
+_trap_vector:
+ l.addi r1,r1,-116
+ l.sw 0x18(r1),r9
+ l.jal store_regs
+ l.nop
+ l.movhi r9,hi(end_except)
+ l.ori r9,r9,lo(end_except)
+ l.movhi r10,hi(_excpt_trap)
+ l.ori r10,r10,lo(_excpt_trap)
+ l.lwz r10,0(r10)
+ l.jr r10
+ l.nop
+
+store_regs:
+ l.sw 0x00(r1),r3
+ l.sw 0x04(r1),r4
+ l.sw 0x08(r1),r5
+ l.sw 0x0c(r1),r6
+ l.sw 0x10(r1),r7
+ l.sw 0x14(r1),r8
+ l.sw 0x1c(r1),r10
+ l.sw 0x20(r1),r11
+ l.sw 0x24(r1),r12
+ l.sw 0x28(r1),r13
+ l.sw 0x2c(r1),r14
+ l.sw 0x30(r1),r15
+ l.sw 0x34(r1),r16
+ l.sw 0x38(r1),r17
+ l.sw 0x3c(r1),r18
+ l.sw 0x40(r1),r19
+ l.sw 0x44(r1),r20
+ l.sw 0x48(r1),r21
+ l.sw 0x4c(r1),r22
+ l.sw 0x50(r1),r23
+ l.sw 0x54(r1),r24
+ l.sw 0x58(r1),r25
+ l.sw 0x5c(r1),r26
+ l.sw 0x60(r1),r27
+ l.sw 0x64(r1),r28
+ l.sw 0x68(r1),r29
+ l.sw 0x6c(r1),r30
+ l.sw 0x70(r1),r31
+ l.jr r9
+ l.nop
+
+end_except:
+ l.lwz r3,0x00(r1)
+ l.lwz r4,0x04(r1)
+ l.lwz r5,0x08(r1)
+ l.lwz r6,0x0c(r1)
+ l.lwz r7,0x10(r1)
+ l.lwz r8,0x14(r1)
+ l.lwz r9,0x18(r1)
+ l.lwz r10,0x1c(r1)
+ l.lwz r11,0x20(r1)
+ l.lwz r12,0x24(r1)
+ l.lwz r13,0x28(r1)
+ l.lwz r14,0x2c(r1)
+ l.lwz r15,0x30(r1)
+ l.lwz r16,0x34(r1)
+ l.lwz r17,0x38(r1)
+ l.lwz r18,0x3c(r1)
+ l.lwz r19,0x40(r1)
+ l.lwz r20,0x44(r1)
+ l.lwz r21,0x48(r1)
+ l.lwz r22,0x4c(r1)
+ l.lwz r23,0x50(r1)
+ l.lwz r24,0x54(r1)
+ l.lwz r25,0x58(r1)
+ l.lwz r26,0x5c(r1)
+ l.lwz r27,0x60(r1)
+ l.lwz r28,0x64(r1)
+ l.lwz r29,0x68(r1)
+ l.lwz r30,0x6c(r1)
+ l.lwz r31,0x70(r1)
+ l.addi r1,r1,116
+ l.rfe
+ l.nop
+
+init_mc:
+ l.movhi r0, 0x0
+ l.slli r0,r0,16
+
+/* Set speed of FLASH access */
+/* TMS[0] = 0x00000210 */
+/* TMS address = 0x60000014 */
+ l.ori r2,r0,0x020a
+ l.movhi r3, 0x6000
+ l.ori r1,r3,0x0014
+ l.sw 0(r1),r2
+
+/* Set SDRAM parameters for CS1 */
+/* old TMS[1] (*6000001c) = 0xfffff020 */
+/* old CSC[1] (*60000018) = 0x00200611 */
+/* CSR (*60000000) = 0x60300300 */
+/* BA_MASK (*60000008) = 0x000000f0 */
+
+/* TMS[1] (*6000001c) = 0xfffff023 */
+/* CSC[1] (*60000018) = 0x00200491 */
+ l.movhi r2,0x6030
+ l.ori r2,r2,0x0300
+ l.ori r1,r3,0x0000
+ l.sw 0(r1),r2
+ l.movhi r2,0x0000
+ l.ori r2,r2,0x00f0
+ l.ori r1,r3,0x0008
+ l.sw 0(r1),r2
+ l.movhi r2,0x0724
+ l.ori r2,r2,0x8230
+ l.ori r1,r3,0x001c
+ l.sw 0(r1),r2
+ l.movhi r2,0x0020
+ l.ori r2,r2,0x0411
+ l.ori r1,r3,0x0018
+ l.sw 0(r1),r2
+ l.xor r0,r0,r0
+ l.xor r1,r1,r1
+ l.xor r2,r2,r2
+ l.xor r3,r3,r3
+ l.j start
+ l.nop
except_mc.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: acv_gpio.c
===================================================================
--- acv_gpio.c (nonexistent)
+++ acv_gpio.c (revision 1765)
@@ -0,0 +1,230 @@
+/* GPIO test */
+
+#include "spr_defs.h"
+#include "support.h"
+#include "int.h"
+
+/* Relative Register Addresses */
+#define RGPIO_IN 0x00
+#define RGPIO_OUT 0x04
+#define RGPIO_OE 0x08
+#define RGPIO_INTE 0x0C
+#define RGPIO_PTRIG 0x10
+#define RGPIO_AUX 0x14
+#define RGPIO_CTRL 0x18
+#define RGPIO_INTS 0x1C
+
+/* Fields inside RGPIO_CTRL */
+#define RGPIO_CTRL_ECLK 0x00000001
+#define RGPIO_CTRL_NEC 0x00000002
+#define RGPIO_CTRL_INTE 0x00000004
+#define RGPIO_CTRL_INTS 0x00000008
+
+#define GPIO_BASE 0xB0000000LU
+
+#define GPIO_INT_LINE 23 /* To which interrupt is GPIO connected */
+
+typedef volatile unsigned long *GPIO_REG;
+
+GPIO_REG rgpio_in = (unsigned long *)(GPIO_BASE + RGPIO_IN),
+ rgpio_out = (unsigned long *)(GPIO_BASE + RGPIO_OUT),
+ rgpio_oe = (unsigned long *)(GPIO_BASE + RGPIO_OE),
+ rgpio_inte = (unsigned long *)(GPIO_BASE + RGPIO_INTE),
+ rgpio_ptrig = (unsigned long *)(GPIO_BASE + RGPIO_PTRIG),
+ rgpio_aux = (unsigned long *)(GPIO_BASE + RGPIO_AUX),
+ rgpio_ctrl = (unsigned long *)(GPIO_BASE + RGPIO_CTRL),
+ rgpio_ints = (unsigned long *)(GPIO_BASE + RGPIO_INTS);
+
+/* fails if x is false */
+#define ASSERT(x) ((x)?1: fail (__FILE__, __LINE__))
+
+static void fail (char *file, int line)
+{
+ printf( "Test failed in %s:%i\n", file, line );
+ report( 0xeeeeeeee );
+ exit( 1 );
+}
+
+
+static void wait_input( unsigned long value )
+{
+ unsigned long first = *rgpio_in;
+ if ( first == value )
+ return;
+ while ( 1 ) {
+ unsigned long curr = *rgpio_in;
+ if ( curr == value )
+ return;
+ if ( curr != first ) {
+ printf( "While waiting for 0x%08lX, input changed from 0x%08lX to 0x%08lX\n", value, first, curr );
+ ASSERT( 0 );
+ }
+ }
+}
+
+static volatile unsigned int_count = 0;
+
+
+static void gpio_interrupt( void *arg )
+{
+ ++ int_count;
+}
+
+static void init_interrupts( void )
+{
+ int_init();
+ int_add( GPIO_INT_LINE, gpio_interrupt, 0);
+
+ /* Enable interrupts */
+ mtspr( SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE );
+}
+
+
+
+static void test_registers( void )
+{
+ printf( "Testing initial values of all registers\n" );
+ ASSERT( *rgpio_oe == 0 );
+ ASSERT( *rgpio_inte == 0 );
+ ASSERT( *rgpio_ptrig == 0 );
+ ASSERT( *rgpio_ctrl == 0 );
+ ASSERT( *rgpio_ints == 0 );
+
+ printf( "Verifying that RGPIO_IN is read-only\n" );
+ {
+ unsigned long value = *rgpio_in;
+ unsigned i;
+ *rgpio_in = ~value;
+ ASSERT( *rgpio_in == value );
+
+ for ( i = 0; i < 32; ++ i ) {
+ *rgpio_in = 1LU << i;
+ ASSERT( *rgpio_in == value );
+ }
+ }
+}
+
+
+static void test_simple_io( void )
+{
+ unsigned i;
+ unsigned long oe;
+
+ printf( "Testing simple I/O\n" );
+ for ( i = 1, oe = 1; i < 31; ++ i, oe = (oe << 1) | 1 ) {
+ *rgpio_oe = oe;
+
+ *rgpio_out = 0xFFFFFFFF;
+ wait_input( 0xFFFFFFFF );
+
+ *rgpio_out = 0x00000000;
+ wait_input( 0x00000000 );
+ }
+}
+
+
+static void clear_interrupt_status( void )
+{
+ *rgpio_ctrl &= ~RGPIO_CTRL_INTS;
+ *rgpio_ints = 0;
+}
+
+static void assert_good_interrupt( unsigned expected_count, unsigned long expected_mask )
+{
+ ASSERT( int_count == expected_count );
+ ASSERT( (*rgpio_ctrl & RGPIO_CTRL_INTS) == RGPIO_CTRL_INTS );
+ ASSERT( (*rgpio_in & ~*rgpio_oe) == expected_mask );
+ ASSERT( (*rgpio_ints & ~*rgpio_oe) == expected_mask );
+}
+
+static void test_interrupts( void )
+{
+ unsigned i;
+
+ printf( "Testing interrupts\n" );
+
+ *rgpio_oe = 0x80000000;
+ int_count = 0;
+ *rgpio_inte = 0x7fffffff;
+ *rgpio_ptrig = 0x7fffffff;
+ *rgpio_ctrl = RGPIO_CTRL_INTE;
+
+ *rgpio_out = 0x80000000;
+ for ( i = 0; i < 31; ++ i ) {
+ /* Wait for interrupt */
+ while ( int_count <= i );
+ assert_good_interrupt( i + 1, 1LU << i );
+ clear_interrupt_status();
+ *rgpio_out = (i % 2) ? 0x80000000 : 0;
+ }
+
+ /* Return things to normal */
+ *rgpio_ctrl = 0;
+}
+
+static void test_external_clock( void )
+{
+ unsigned i;
+ printf( "Testing external clock\n" );
+
+ *rgpio_oe = 0x80000000;
+ *rgpio_inte = 0x7fffffff;
+ *rgpio_ptrig = 0x7fffffff;
+
+ /* Test positive edge */
+ int_count = 0;
+ *rgpio_ctrl = RGPIO_CTRL_INTE;
+ *rgpio_out = 0x80000000;
+ for ( i = 0; i < 31; ++ i ) {
+ while ( int_count <= i );
+ assert_good_interrupt( i + 1, 1LU << i );
+ clear_interrupt_status();
+ *rgpio_out = (i % 2) ? 0x80000000 : 0;
+ }
+
+ /* Test negative edge */
+ int_count = 0;
+ *rgpio_ctrl = RGPIO_CTRL_INTE | RGPIO_CTRL_NEC;
+ *rgpio_out = 0x80000000;
+ for ( i = 0; i < 31; ++ i ) {
+ while ( int_count <= i );
+ assert_good_interrupt( i + 1, 1LU << i );
+ clear_interrupt_status();
+ *rgpio_out = (i % 2) ? 0x80000000 : 0;
+ }
+
+ /* Return things to normal */
+ *rgpio_ctrl = 0;
+}
+
+
+static void endshake( void )
+{
+ printf( "Finishing simulation\n" );
+ *rgpio_oe = 0xffff0000;
+ *rgpio_out = 0x12340000;
+ wait_input( 0x12345678 );
+ *rgpio_oe = 0xffffffff;
+ *rgpio_out = 0xDeadDead;
+}
+
+
+int main()
+{
+ printf( "Starting GPIO test\n" );
+
+ init_interrupts();
+
+ test_registers();
+ test_simple_io();
+ test_interrupts();
+ test_external_clock();
+ endshake();
+
+ printf( "Ending GPIO test\n" );
+
+ report (0xdeaddead);
+ return 0;
+}
+
+
Index: inst_set_test.c
===================================================================
--- inst_set_test.c (nonexistent)
+++ inst_set_test.c (revision 1765)
@@ -0,0 +1,268 @@
+/* This is a complex instruction test for OR1200 */
+/* trap, movhi, mul, nop, rfe, sys instructions not tested*/
+
+#include "support.h"
+
+volatile unsigned long test = 0xdeaddead;
+
+#define TEST_32(c1,c2,val1,val2,op) \
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+ test ^= ((c1##(val1)) op (c2##(val2))); test ^= ((c1##(val2)) op (c2##(val1)));\
+
+#define TEST_CASTS(val1,val2,op)\
+ TEST_32((unsigned long), (unsigned long), val1, val2, op);\
+ TEST_32((unsigned long), (signed long), val1, val2, op);\
+ TEST_32((unsigned long), (unsigned short), val1, val2, op);\
+ TEST_32((unsigned long), (signed short), val1, val2, op);\
+ TEST_32((unsigned long), (unsigned char), val1, val2, op);\
+ TEST_32((unsigned long), (signed char), val1, val2, op);\
+ \
+ TEST_32((unsigned short), (unsigned long), val1, val2, op);\
+ TEST_32((unsigned short), (signed long), val1, val2, op);\
+ TEST_32((unsigned short), (unsigned short), val1, val2, op);\
+ TEST_32((unsigned short), (signed short), val1, val2, op);\
+ TEST_32((unsigned short), (unsigned char), val1, val2, op);\
+ TEST_32((unsigned short), (signed char), val1, val2, op);\
+ \
+ TEST_32((unsigned char), (unsigned long), val1, val2, op);\
+ TEST_32((unsigned char), (signed long), val1, val2, op);\
+ TEST_32((unsigned char), (unsigned short), val1, val2, op);\
+ TEST_32((unsigned char), (signed short), val1, val2, op)\
+ TEST_32((unsigned char), (unsigned char), val1, val2, op);\
+ TEST_32((unsigned char), (signed char), val1, val2, op);
+
+
+void add_test ()
+{
+ int i, j;
+ TEST_CASTS(0x12345678, 0x12345678, +);
+ TEST_CASTS(0x12345678, 0x87654321, +);
+ TEST_CASTS(0x87654321, 0x12345678, +);
+ TEST_CASTS(0x87654321, 0x87654321, +);
+
+ TEST_CASTS(0x1234, -0x1234, +);
+ TEST_CASTS(0x1234, -0x1234, +);
+ TEST_CASTS(-0x1234, 0x1234, +);
+ TEST_CASTS(-0x1234, -0x1234, +);
+
+ for (i = -1; i <= 1; i++)
+ for (j = -1; j <= 1; j++)
+ TEST_CASTS (i, j, +);
+ report (test);
+}
+
+void and_test ()
+{
+/* TEST_CASTS(0x12345678, 0x12345678, &);
+ TEST_CASTS(0x12345678, 0x87654321, &);
+ TEST_CASTS(0x87654321, 0x12345678, &);
+ TEST_CASTS(0x87654321, 0x87654321, &);
+
+ TEST_CASTS(0x12345678, 0x0, &);
+ TEST_CASTS(0x12345678, 0xffffffff, &);
+ TEST_CASTS(0x87654321, 0x80000000, &);
+ TEST_CASTS(0x87654321, 0x08000000, &);
+
+ TEST_CASTS(0x12345678, 0x12345678, &&);
+ TEST_CASTS(0x12345678, 0x87654321, &&);
+ TEST_CASTS(0x87654321, 0x12345678, &&);
+ TEST_CASTS(0x87654321, 0x87654321, &&);
+
+ TEST_CASTS(0x12345678, 0x0, &&);
+ TEST_CASTS(0x12345678, 0xffffffff, &&);
+ TEST_CASTS(0x87654321, 0x80000000, &&);
+ TEST_CASTS(0x87654321, 0x08000000, &&);
+ report (test);*/
+}
+
+void branch_test ()
+{
+ /* bf, bnf, j, jal, jalr, jr, sfeq, sfges, sfgeu, sfgts, sfgtu, sfles, sfleu, sflts, sfltu, sfne */
+ report (test);
+}
+
+void load_store_test ()
+{
+ volatile long a;
+ volatile short b;
+ volatile char c;
+ unsigned long *pa = (unsigned long *)&a;
+ unsigned short *pb = (unsigned short *)&b;
+ unsigned char *pc = (unsigned char *)&c;
+
+ test ^= a = 0xdeadbeef;
+ test ^= b = 0x12345678;
+ test ^= c = 0x87654321;
+ test ^= a = b;
+ test ^= b = c;
+ test ^= a;
+ test ^= (unsigned long)a;
+ test ^= (unsigned short)a;
+ test ^= (unsigned char)a;
+
+ test ^= (unsigned long)b;
+ test ^= (unsigned short)b;
+ test ^= (unsigned char)b;
+
+ test ^= (unsigned long)c;
+ test ^= (unsigned short)c;
+ test ^= (unsigned char)c;
+
+ test ^= *pa = 0xabcdef12;
+ test ^= *pb = 0x12345678;
+ test ^= *pc = 0xdeadbeef;
+
+ test ^= (signed long)c;
+ test ^= (signed short)c;
+ test ^= (signed char)c;
+
+ test ^= (signed long)a;
+ test ^= (signed short)a;
+ test ^= (signed char)a;
+
+ test ^= (signed long)b;
+ test ^= (signed short)b;
+ test ^= (signed char)b;
+
+ test ^= *pa = 0xaabbccdd;
+ test ^= *pb = 0x56789012;
+ test ^= *pc = 0xb055b055;
+
+ test ^= (unsigned long)b;
+ test ^= (signed long)c;
+ test ^= (unsigned long)a;
+ test ^= (unsigned short)c;
+ test ^= (unsigned short)a;
+ test ^= (unsigned char)c;
+ test ^= (unsigned short)b;
+ test ^= (unsigned char)b;
+ test ^= (unsigned char)a;
+ report (test);
+}
+
+void or_test ()
+{
+/* TEST_CASTS(0x12345678, 0x12345678, |);
+ TEST_CASTS(0x12345678, 0x87654321, |);
+ TEST_CASTS(0x87654321, 0x12345678, |);
+ TEST_CASTS(0x87654321, 0x87654321, |);
+
+ TEST_CASTS(0x12345678, 0x0, |);
+ TEST_CASTS(0x12345678, 0xffffffff, |);
+ TEST_CASTS(0x87654321, 0x80000000, |);
+ TEST_CASTS(0x87654321, 0x08000000, |);
+
+ TEST_CASTS(0x12345678, 0x12345678, ||);
+ TEST_CASTS(0x12345678, 0x87654321, ||);
+ TEST_CASTS(0x87654321, 0x12345678, ||);
+ TEST_CASTS(0x87654321, 0x87654321, ||);
+
+ TEST_CASTS(0x12345678, 0x0, ||);
+ TEST_CASTS(0x12345678, 0xffffffff, ||);
+ TEST_CASTS(0x87654321, 0x80000000, ||);
+ TEST_CASTS(0x87654321, 0x08000000, ||);*/
+ report (test);
+}
+
+void xor_test ()
+{
+/* TEST_CASTS(0x12345678, 0x12345678, ^);
+ TEST_CASTS(0x12345678, 0x87654321, ^);
+ TEST_CASTS(0x87654321, 0x12345678, ^);
+ TEST_CASTS(0x87654321, 0x87654321, ^);
+
+ TEST_CASTS(0x12345678, 0x0, ^);
+ TEST_CASTS(0x12345678, 0xffffffff, ^);
+ TEST_CASTS(0x87654321, 0x80000000, ^);
+ TEST_CASTS(0x87654321, 0x08000000, ^);*/
+ report (test);
+}
+
+void sll_test ()
+{
+ int i;
+ for (i = -1; i < 40; i++)
+ TEST_CASTS(0xdeaf1234, i, <<);
+ for (i = -1; i < 33; i++)
+ TEST_CASTS(0x12345678, i, <<);
+ for (i = -1; i < 33; i++)
+ TEST_CASTS(0xdea12345, i, <<);
+
+ test ^= (unsigned long)0xabcd4321 << test;
+ test ^= (signed long)0xabcd4321 << test;
+ test ^= (unsigned long)0xabcd << test;
+ test ^= (signed long)0xabcd << test;
+ report (test);
+}
+
+void srl_sra_test ()
+{
+ int i;
+ for (i = -1; i < 40; i++)
+ TEST_CASTS(0xdeaf1234, i, >>);
+ for (i = -1; i < 33; i++)
+ TEST_CASTS(0x12345678, i, >>);
+ for (i = -1; i < 33; i++)
+ TEST_CASTS(0xdea12345, i, >>);
+
+ test ^= (unsigned long)0xabcd4321 >> test;
+ test ^= (signed long)0xabcd4321 >> test;
+ test ^= (unsigned long)0xabcd >> test;
+ test ^= (signed long)0xabcd >> test;
+ report (test);
+}
+
+
+void ror_test ()
+{
+ unsigned long a;
+ int i;
+ for (i = -1; i < 40; i++) {
+ asm ("l.ror %0, %1, %2" : "=r" (a) : "r" (0x12345678), "r" (i));
+ test ^= a;
+ asm ("l.ror %0, %1, %2" : "=r" (a) : "r" (0xabcdef), "r" (i));
+ test ^= a;
+ }
+ asm ("l.ror %0, %1, %2" : "=r" (a) : "r" (0x12345678), "r" (0x12345678));
+ test ^= a;
+ report (test);
+}
+
+void sub_test ()
+{
+/* int i, j;
+ TEST_CASTS(0x12345678, 0x12345678, -);
+ TEST_CASTS(0x12345678, 0x87654321, -);
+ TEST_CASTS(0x87654321, 0x12345678, -);
+ TEST_CASTS(0x87654321, 0x87654321, -);
+
+ TEST_CASTS(0x1234, -0x1234, -);
+ TEST_CASTS(0x1234, -0x1234, -);
+ TEST_CASTS(-0x1234, 0x1234, -);
+ TEST_CASTS(-0x1234, -0x1234, -);
+
+ for (i = -1; i <= 1; i++)
+ for (j = -1; j <= 1; j++)
+ TEST_CASTS (i, j, -);
+ report (test);*/
+}
+
+int main ()
+{
+ add_test ();
+ and_test ();
+ branch_test ();
+ load_store_test ();
+ or_test ();
+ sll_test ();
+ srl_sra_test ();
+ xor_test ();
+ sub_test ();
+ return 0;
+}
inst_set_test.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: functest.c
===================================================================
--- functest.c (nonexistent)
+++ functest.c (revision 1765)
@@ -0,0 +1,37 @@
+/* Simple test, that test function parameters */
+#include "support.h"
+
+int gk = 0;
+int c = 0;
+int fun1 (int a, int b, int c, int d, int e, int f, int g)
+{
+ int j = 0;
+ volatile char x[50];
+ &x;
+
+ while(j < 2) {
+ a++;
+ j++;
+ }
+
+ return a;
+}
+
+int main(void)
+{
+ int i, j, k;
+ i = j = k = 0;
+
+ while (c++ < 10) {
+ j = fun1(gk, k + 1, k + 2, k + 3, k + 4, k + 5, k + 6);
+ printf ("%i\n", gk);
+ if(j > 40)
+ gk = j - 20;
+ else
+ gk = j;
+ }
+ report (gk);
+ if (gk == 20)
+ report(0xdeaddead);
+ return (gk != 20);
+}
functest.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: configure
===================================================================
--- configure (nonexistent)
+++ configure (revision 1765)
@@ -0,0 +1,2196 @@
+#! /bin/sh
+
+# From configure.in for or1ksim-1.2, version 2.14, from autoconf version 2.13
+
+
+
+
+# Do all the work for Automake. This macro actually does too much --
+# some checks are only needed if your package does certain things.
+# But this isn't really a big deal.
+
+# serial 1
+
+
+
+
+#
+# Check to make sure that the build environment is sane.
+#
+
+
+
+
+
+# Define a conditional.
+
+
+
+# Guess values for system-dependent variables and create Makefiles.
+# Generated automatically using autoconf version 2.13
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
+#
+# This configure script is free software; the Free Software Foundation
+# gives unlimited permission to copy, distribute and modify it.
+
+# Defaults:
+ac_help=
+ac_default_prefix=/usr/local
+# Any additions from configure.in:
+ac_help="$ac_help
+ --enable-opt enable optimizations
+ --enable-opt=level same as gcc -O switch "
+
+# Initialize some variables set by options.
+# The variables have the same names as the options, with
+# dashes changed to underlines.
+build=NONE
+cache_file=./config.cache
+exec_prefix=NONE
+host=NONE
+no_create=
+nonopt=NONE
+no_recursion=
+prefix=NONE
+program_prefix=NONE
+program_suffix=NONE
+program_transform_name=s,x,x,
+silent=
+site=
+srcdir=
+target=NONE
+verbose=
+x_includes=NONE
+x_libraries=NONE
+bindir='${exec_prefix}/bin'
+sbindir='${exec_prefix}/sbin'
+libexecdir='${exec_prefix}/libexec'
+datadir='${prefix}/share'
+sysconfdir='${prefix}/etc'
+sharedstatedir='${prefix}/com'
+localstatedir='${prefix}/var'
+libdir='${exec_prefix}/lib'
+includedir='${prefix}/include'
+oldincludedir='/usr/include'
+infodir='${prefix}/info'
+mandir='${prefix}/man'
+
+# Initialize some other variables.
+subdirs=
+MFLAGS= MAKEFLAGS=
+SHELL=${CONFIG_SHELL-/bin/sh}
+# Maximum number of lines to put in a shell here document.
+ac_max_here_lines=12
+
+ac_prev=
+for ac_option
+do
+
+ # If the previous option needs an argument, assign it.
+ if test -n "$ac_prev"; then
+ eval "$ac_prev=\$ac_option"
+ ac_prev=
+ continue
+ fi
+
+ case "$ac_option" in
+ -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
+ *) ac_optarg= ;;
+ esac
+
+ # Accept the important Cygnus configure options, so we can diagnose typos.
+
+ case "$ac_option" in
+
+ -bindir | --bindir | --bindi | --bind | --bin | --bi)
+ ac_prev=bindir ;;
+ -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
+ bindir="$ac_optarg" ;;
+
+ -build | --build | --buil | --bui | --bu)
+ ac_prev=build ;;
+ -build=* | --build=* | --buil=* | --bui=* | --bu=*)
+ build="$ac_optarg" ;;
+
+ -cache-file | --cache-file | --cache-fil | --cache-fi \
+ | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
+ ac_prev=cache_file ;;
+ -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
+ | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
+ cache_file="$ac_optarg" ;;
+
+ -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
+ ac_prev=datadir ;;
+ -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
+ | --da=*)
+ datadir="$ac_optarg" ;;
+
+ -disable-* | --disable-*)
+ ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+ fi
+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+ eval "enable_${ac_feature}=no" ;;
+
+ -enable-* | --enable-*)
+ ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+ fi
+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+ case "$ac_option" in
+ *=*) ;;
+ *) ac_optarg=yes ;;
+ esac
+ eval "enable_${ac_feature}='$ac_optarg'" ;;
+
+ -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
+ | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
+ | --exec | --exe | --ex)
+ ac_prev=exec_prefix ;;
+ -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
+ | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
+ | --exec=* | --exe=* | --ex=*)
+ exec_prefix="$ac_optarg" ;;
+
+ -gas | --gas | --ga | --g)
+ # Obsolete; use --with-gas.
+ with_gas=yes ;;
+
+ -help | --help | --hel | --he)
+ # Omit some internal or obsolete options to make the list less imposing.
+ # This message is too long to be a string in the A/UX 3.1 sh.
+ cat << EOF
+Usage: configure [options] [host]
+Options: [defaults in brackets after descriptions]
+Configuration:
+ --cache-file=FILE cache test results in FILE
+ --help print this message
+ --no-create do not create output files
+ --quiet, --silent do not print \`checking...' messages
+ --version print the version of autoconf that created configure
+Directory and file names:
+ --prefix=PREFIX install architecture-independent files in PREFIX
+ [$ac_default_prefix]
+ --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
+ [same as prefix]
+ --bindir=DIR user executables in DIR [EPREFIX/bin]
+ --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
+ --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
+ --datadir=DIR read-only architecture-independent data in DIR
+ [PREFIX/share]
+ --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
+ --sharedstatedir=DIR modifiable architecture-independent data in DIR
+ [PREFIX/com]
+ --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
+ --libdir=DIR object code libraries in DIR [EPREFIX/lib]
+ --includedir=DIR C header files in DIR [PREFIX/include]
+ --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
+ --infodir=DIR info documentation in DIR [PREFIX/info]
+ --mandir=DIR man documentation in DIR [PREFIX/man]
+ --srcdir=DIR find the sources in DIR [configure dir or ..]
+ --program-prefix=PREFIX prepend PREFIX to installed program names
+ --program-suffix=SUFFIX append SUFFIX to installed program names
+ --program-transform-name=PROGRAM
+ run sed PROGRAM on installed program names
+EOF
+ cat << EOF
+Host type:
+ --build=BUILD configure for building on BUILD [BUILD=HOST]
+ --host=HOST configure for HOST [guessed]
+ --target=TARGET configure for TARGET [TARGET=HOST]
+Features and packages:
+ --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
+ --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
+ --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
+ --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
+ --x-includes=DIR X include files are in DIR
+ --x-libraries=DIR X library files are in DIR
+EOF
+ if test -n "$ac_help"; then
+ echo "--enable and --with options recognized:$ac_help"
+ fi
+ exit 0 ;;
+
+ -host | --host | --hos | --ho)
+ ac_prev=host ;;
+ -host=* | --host=* | --hos=* | --ho=*)
+ host="$ac_optarg" ;;
+
+ -includedir | --includedir | --includedi | --included | --include \
+ | --includ | --inclu | --incl | --inc)
+ ac_prev=includedir ;;
+ -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
+ | --includ=* | --inclu=* | --incl=* | --inc=*)
+ includedir="$ac_optarg" ;;
+
+ -infodir | --infodir | --infodi | --infod | --info | --inf)
+ ac_prev=infodir ;;
+ -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
+ infodir="$ac_optarg" ;;
+
+ -libdir | --libdir | --libdi | --libd)
+ ac_prev=libdir ;;
+ -libdir=* | --libdir=* | --libdi=* | --libd=*)
+ libdir="$ac_optarg" ;;
+
+ -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
+ | --libexe | --libex | --libe)
+ ac_prev=libexecdir ;;
+ -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
+ | --libexe=* | --libex=* | --libe=*)
+ libexecdir="$ac_optarg" ;;
+
+ -localstatedir | --localstatedir | --localstatedi | --localstated \
+ | --localstate | --localstat | --localsta | --localst \
+ | --locals | --local | --loca | --loc | --lo)
+ ac_prev=localstatedir ;;
+ -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
+ | --localstate=* | --localstat=* | --localsta=* | --localst=* \
+ | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
+ localstatedir="$ac_optarg" ;;
+
+ -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
+ ac_prev=mandir ;;
+ -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
+ mandir="$ac_optarg" ;;
+
+ -nfp | --nfp | --nf)
+ # Obsolete; use --without-fp.
+ with_fp=no ;;
+
+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+ | --no-cr | --no-c)
+ no_create=yes ;;
+
+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+ | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
+ no_recursion=yes ;;
+
+ -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
+ | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
+ | --oldin | --oldi | --old | --ol | --o)
+ ac_prev=oldincludedir ;;
+ -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
+ | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
+ | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
+ oldincludedir="$ac_optarg" ;;
+
+ -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
+ ac_prev=prefix ;;
+ -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
+ prefix="$ac_optarg" ;;
+
+ -program-prefix | --program-prefix | --program-prefi | --program-pref \
+ | --program-pre | --program-pr | --program-p)
+ ac_prev=program_prefix ;;
+ -program-prefix=* | --program-prefix=* | --program-prefi=* \
+ | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
+ program_prefix="$ac_optarg" ;;
+
+ -program-suffix | --program-suffix | --program-suffi | --program-suff \
+ | --program-suf | --program-su | --program-s)
+ ac_prev=program_suffix ;;
+ -program-suffix=* | --program-suffix=* | --program-suffi=* \
+ | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
+ program_suffix="$ac_optarg" ;;
+
+ -program-transform-name | --program-transform-name \
+ | --program-transform-nam | --program-transform-na \
+ | --program-transform-n | --program-transform- \
+ | --program-transform | --program-transfor \
+ | --program-transfo | --program-transf \
+ | --program-trans | --program-tran \
+ | --progr-tra | --program-tr | --program-t)
+ ac_prev=program_transform_name ;;
+ -program-transform-name=* | --program-transform-name=* \
+ | --program-transform-nam=* | --program-transform-na=* \
+ | --program-transform-n=* | --program-transform-=* \
+ | --program-transform=* | --program-transfor=* \
+ | --program-transfo=* | --program-transf=* \
+ | --program-trans=* | --program-tran=* \
+ | --progr-tra=* | --program-tr=* | --program-t=*)
+ program_transform_name="$ac_optarg" ;;
+
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil)
+ silent=yes ;;
+
+ -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
+ ac_prev=sbindir ;;
+ -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
+ | --sbi=* | --sb=*)
+ sbindir="$ac_optarg" ;;
+
+ -sharedstatedir | --sharedstatedir | --sharedstatedi \
+ | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
+ | --sharedst | --shareds | --shared | --share | --shar \
+ | --sha | --sh)
+ ac_prev=sharedstatedir ;;
+ -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
+ | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
+ | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
+ | --sha=* | --sh=*)
+ sharedstatedir="$ac_optarg" ;;
+
+ -site | --site | --sit)
+ ac_prev=site ;;
+ -site=* | --site=* | --sit=*)
+ site="$ac_optarg" ;;
+
+ -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
+ ac_prev=srcdir ;;
+ -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
+ srcdir="$ac_optarg" ;;
+
+ -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
+ | --syscon | --sysco | --sysc | --sys | --sy)
+ ac_prev=sysconfdir ;;
+ -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
+ | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
+ sysconfdir="$ac_optarg" ;;
+
+ -target | --target | --targe | --targ | --tar | --ta | --t)
+ ac_prev=target ;;
+ -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
+ target="$ac_optarg" ;;
+
+ -v | -verbose | --verbose | --verbos | --verbo | --verb)
+ verbose=yes ;;
+
+ -version | --version | --versio | --versi | --vers)
+ echo "configure generated by autoconf version 2.13"
+ exit 0 ;;
+
+ -with-* | --with-*)
+ ac_package=`echo $ac_option|sed -e 's/-*with-//' -e 's/=.*//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_package| sed 's/[-_a-zA-Z0-9]//g'`"; then
+ { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+ fi
+ ac_package=`echo $ac_package| sed 's/-/_/g'`
+ case "$ac_option" in
+ *=*) ;;
+ *) ac_optarg=yes ;;
+ esac
+ eval "with_${ac_package}='$ac_optarg'" ;;
+
+ -without-* | --without-*)
+ ac_package=`echo $ac_option|sed -e 's/-*without-//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_package| sed 's/[-a-zA-Z0-9_]//g'`"; then
+ { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+ fi
+ ac_package=`echo $ac_package| sed 's/-/_/g'`
+ eval "with_${ac_package}=no" ;;
+
+ --x)
+ # Obsolete; use --with-x.
+ with_x=yes ;;
+
+ -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
+ | --x-incl | --x-inc | --x-in | --x-i)
+ ac_prev=x_includes ;;
+ -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
+ | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
+ x_includes="$ac_optarg" ;;
+
+ -x-libraries | --x-libraries | --x-librarie | --x-librari \
+ | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
+ ac_prev=x_libraries ;;
+ -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
+ | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
+ x_libraries="$ac_optarg" ;;
+
+ -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; }
+ ;;
+
+ *)
+ if test -n "`echo $ac_option| sed 's/[-a-z0-9.]//g'`"; then
+ echo "configure: warning: $ac_option: invalid host type" 1>&2
+ fi
+ if test "x$nonopt" != xNONE; then
+ { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; }
+ fi
+ nonopt="$ac_option"
+ ;;
+
+ esac
+done
+
+if test -n "$ac_prev"; then
+ { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; }
+fi
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+# File descriptor usage:
+# 0 standard input
+# 1 file creation
+# 2 errors and warnings
+# 3 some systems may open it to /dev/tty
+# 4 used on the Kubota Titan
+# 6 checking for... messages and results
+# 5 compiler messages saved in config.log
+if test "$silent" = yes; then
+ exec 6>/dev/null
+else
+ exec 6>&1
+fi
+exec 5>./config.log
+
+echo "\
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+" 1>&5
+
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Also quote any args containing shell metacharacters.
+ac_configure_args=
+for ac_arg
+do
+ case "$ac_arg" in
+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+ | --no-cr | --no-c) ;;
+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+ | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
+ *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
+ ac_configure_args="$ac_configure_args '$ac_arg'" ;;
+ *) ac_configure_args="$ac_configure_args $ac_arg" ;;
+ esac
+done
+
+# NLS nuisances.
+# Only set these to C if already set. These must not be set unconditionally
+# because not all systems understand e.g. LANG=C (notably SCO).
+# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
+# Non-C LC_CTYPE values break the ctype check.
+if test "${LANG+set}" = set; then LANG=C; export LANG; fi
+if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
+if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
+if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -rf conftest* confdefs.h
+# AIX cpp loses on an empty file, so make sure it contains at least a newline.
+echo > confdefs.h
+
+# A filename unique to this package, relative to the directory that
+# configure is in, which we can look for to find out if srcdir is correct.
+ac_unique_file=support/support.h
+
+# Find the source files, if location was not specified.
+if test -z "$srcdir"; then
+ ac_srcdir_defaulted=yes
+ # Try the directory containing this script, then its parent.
+ ac_prog=$0
+ ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
+ test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
+ srcdir=$ac_confdir
+ if test ! -r $srcdir/$ac_unique_file; then
+ srcdir=..
+ fi
+else
+ ac_srcdir_defaulted=no
+fi
+if test ! -r $srcdir/$ac_unique_file; then
+ if test "$ac_srcdir_defaulted" = yes; then
+ { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
+ else
+ { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
+ fi
+fi
+srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
+
+# Prefer explicitly selected file to automatically selected ones.
+if test -z "$CONFIG_SITE"; then
+ if test "x$prefix" != xNONE; then
+ CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
+ else
+ CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+ fi
+fi
+for ac_site_file in $CONFIG_SITE; do
+ if test -r "$ac_site_file"; then
+ echo "loading site script $ac_site_file"
+ . "$ac_site_file"
+ fi
+done
+
+if test -r "$cache_file"; then
+ echo "loading cache $cache_file"
+ . $cache_file
+else
+ echo "creating cache $cache_file"
+ > $cache_file
+fi
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+ac_exeext=
+ac_objext=o
+if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
+ # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
+ if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
+ ac_n= ac_c='
+' ac_t=' '
+ else
+ ac_n=-n ac_c= ac_t=
+ fi
+else
+ ac_n= ac_c='\c' ac_t=
+fi
+
+
+ac_aux_dir=
+for ac_dir in $srcdir $srcdir/.. $srcdir/../..; do
+ if test -f $ac_dir/install-sh; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/install-sh -c"
+ break
+ elif test -f $ac_dir/install.sh; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/install.sh -c"
+ break
+ fi
+done
+if test -z "$ac_aux_dir"; then
+ { echo "configure: error: can not find install-sh or install.sh in $srcdir $srcdir/.. $srcdir/../.." 1>&2; exit 1; }
+fi
+ac_config_guess=$ac_aux_dir/config.guess
+ac_config_sub=$ac_aux_dir/config.sub
+ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
+
+
+# Make sure we can run config.sub.
+if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
+else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
+fi
+
+echo $ac_n "checking host system type""... $ac_c" 1>&6
+echo "configure:580: checking host system type" >&5
+
+host_alias=$host
+case "$host_alias" in
+NONE)
+ case $nonopt in
+ NONE)
+ if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
+ else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
+ fi ;;
+ *) host_alias=$nonopt ;;
+ esac ;;
+esac
+
+host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
+host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$host" 1>&6
+
+# Find a good install program. We prefer a C program (faster),
+# so one script is as good as another. But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# ./install, which can be erroneously created by make from ./install.sh.
+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
+echo "configure:612: checking for a BSD compatible install" >&5
+if test -z "$INSTALL"; then
+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
+ for ac_dir in $PATH; do
+ # Account for people who put trailing slashes in PATH elements.
+ case "$ac_dir/" in
+ /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
+ *)
+ # OSF1 and SCO ODT 3.0 have their own names for install.
+ # Don't use installbsd from OSF since it installs stuff as root
+ # by default.
+ for ac_prog in ginstall scoinst install; do
+ if test -f $ac_dir/$ac_prog; then
+ if test $ac_prog = install &&
+ grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
+ # AIX install. It has an incompatible calling convention.
+ :
+ else
+ ac_cv_path_install="$ac_dir/$ac_prog -c"
+ break 2
+ fi
+ fi
+ done
+ ;;
+ esac
+ done
+ IFS="$ac_save_IFS"
+
+fi
+ if test "${ac_cv_path_install+set}" = set; then
+ INSTALL="$ac_cv_path_install"
+ else
+ # As a last resort, use the slow shell script. We don't cache a
+ # path for INSTALL within a source directory, because that will
+ # break other packages using the cache if that directory is
+ # removed, or if the path is relative.
+ INSTALL="$ac_install_sh"
+ fi
+fi
+echo "$ac_t""$INSTALL" 1>&6
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6
+echo "configure:665: checking whether build environment is sane" >&5
+# Just in case
+sleep 1
+echo timestamp > conftestfile
+# Do `set' in a subshell so we don't clobber the current shell's
+# arguments. Must try -L first in case configure is actually a
+# symlink; some systems play weird games with the mod time of symlinks
+# (eg FreeBSD returns the mod time of the symlink's containing
+# directory).
+if (
+ set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null`
+ if test "$*" = "X"; then
+ # -L didn't work.
+ set X `ls -t $srcdir/configure conftestfile`
+ fi
+ if test "$*" != "X $srcdir/configure conftestfile" \
+ && test "$*" != "X conftestfile $srcdir/configure"; then
+
+ # If neither matched, then we have a broken ls. This can happen
+ # if, for instance, CONFIG_SHELL is bash and it inherits a
+ # broken ls alias from the environment. This has actually
+ # happened. Such a system could not be considered "sane".
+ { echo "configure: error: ls -t appears to fail. Make sure there is not a broken
+alias in your environment" 1>&2; exit 1; }
+ fi
+
+ test "$2" = conftestfile
+ )
+then
+ # Ok.
+ :
+else
+ { echo "configure: error: newly created file is older than distributed files!
+Check your system clock" 1>&2; exit 1; }
+fi
+rm -f conftest*
+echo "$ac_t""yes" 1>&6
+if test "$program_transform_name" = s,x,x,; then
+ program_transform_name=
+else
+ # Double any \ or $. echo might interpret backslashes.
+ cat <<\EOF_SED > conftestsed
+s,\\,\\\\,g; s,\$,$$,g
+EOF_SED
+ program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
+ rm -f conftestsed
+fi
+test "$program_prefix" != NONE &&
+ program_transform_name="s,^,${program_prefix},; $program_transform_name"
+# Use a double $ so make ignores it.
+test "$program_suffix" != NONE &&
+ program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
+
+# sed with no file args requires a program.
+test "$program_transform_name" = "" && program_transform_name="s,x,x,"
+
+echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6
+echo "configure:722: checking whether ${MAKE-make} sets \${MAKE}" >&5
+set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftestmake <<\EOF
+all:
+ @echo 'ac_maketemp="${MAKE}"'
+EOF
+# GNU make sometimes prints "make[1]: Entering...", which would confuse us.
+eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=`
+if test -n "$ac_maketemp"; then
+ eval ac_cv_prog_make_${ac_make}_set=yes
+else
+ eval ac_cv_prog_make_${ac_make}_set=no
+fi
+rm -f conftestmake
+fi
+if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ SET_MAKE=
+else
+ echo "$ac_t""no" 1>&6
+ SET_MAKE="MAKE=${MAKE-make}"
+fi
+
+
+PACKAGE=or1ksimtest
+
+VERSION=1.3
+
+if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then
+ { echo "configure: error: source directory already configured; run "make distclean" there first" 1>&2; exit 1; }
+fi
+cat >> confdefs.h <> confdefs.h <&6
+echo "configure:768: checking for working aclocal" >&5
+# Run test in a subshell; some versions of sh will print an error if
+# an executable is not found, even if stderr is redirected.
+# Redirect stdin to placate older versions of autoconf. Sigh.
+if (aclocal --version) < /dev/null > /dev/null 2>&1; then
+ ACLOCAL=aclocal
+ echo "$ac_t""found" 1>&6
+else
+ ACLOCAL="$missing_dir/missing aclocal"
+ echo "$ac_t""missing" 1>&6
+fi
+
+echo $ac_n "checking for working autoconf""... $ac_c" 1>&6
+echo "configure:781: checking for working autoconf" >&5
+# Run test in a subshell; some versions of sh will print an error if
+# an executable is not found, even if stderr is redirected.
+# Redirect stdin to placate older versions of autoconf. Sigh.
+if (autoconf --version) < /dev/null > /dev/null 2>&1; then
+ AUTOCONF=autoconf
+ echo "$ac_t""found" 1>&6
+else
+ AUTOCONF="$missing_dir/missing autoconf"
+ echo "$ac_t""missing" 1>&6
+fi
+
+echo $ac_n "checking for working automake""... $ac_c" 1>&6
+echo "configure:794: checking for working automake" >&5
+# Run test in a subshell; some versions of sh will print an error if
+# an executable is not found, even if stderr is redirected.
+# Redirect stdin to placate older versions of autoconf. Sigh.
+if (automake --version) < /dev/null > /dev/null 2>&1; then
+ AUTOMAKE=automake
+ echo "$ac_t""found" 1>&6
+else
+ AUTOMAKE="$missing_dir/missing automake"
+ echo "$ac_t""missing" 1>&6
+fi
+
+echo $ac_n "checking for working autoheader""... $ac_c" 1>&6
+echo "configure:807: checking for working autoheader" >&5
+# Run test in a subshell; some versions of sh will print an error if
+# an executable is not found, even if stderr is redirected.
+# Redirect stdin to placate older versions of autoconf. Sigh.
+if (autoheader --version) < /dev/null > /dev/null 2>&1; then
+ AUTOHEADER=autoheader
+ echo "$ac_t""found" 1>&6
+else
+ AUTOHEADER="$missing_dir/missing autoheader"
+ echo "$ac_t""missing" 1>&6
+fi
+
+echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6
+echo "configure:820: checking for working makeinfo" >&5
+# Run test in a subshell; some versions of sh will print an error if
+# an executable is not found, even if stderr is redirected.
+# Redirect stdin to placate older versions of autoconf. Sigh.
+if (makeinfo --version) < /dev/null > /dev/null 2>&1; then
+ MAKEINFO=makeinfo
+ echo "$ac_t""found" 1>&6
+else
+ MAKEINFO="$missing_dir/missing makeinfo"
+ echo "$ac_t""missing" 1>&6
+fi
+
+
+
+echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6
+echo "configure:835: checking whether ${MAKE-make} sets \${MAKE}" >&5
+set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftestmake <<\EOF
+all:
+ @echo 'ac_maketemp="${MAKE}"'
+EOF
+# GNU make sometimes prints "make[1]: Entering...", which would confuse us.
+eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=`
+if test -n "$ac_maketemp"; then
+ eval ac_cv_prog_make_${ac_make}_set=yes
+else
+ eval ac_cv_prog_make_${ac_make}_set=no
+fi
+rm -f conftestmake
+fi
+if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ SET_MAKE=
+else
+ echo "$ac_t""no" 1>&6
+ SET_MAKE="MAKE=${MAKE-make}"
+fi
+
+# Find a good install program. We prefer a C program (faster),
+# so one script is as good as another. But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# ./install, which can be erroneously created by make from ./install.sh.
+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
+echo "configure:873: checking for a BSD compatible install" >&5
+if test -z "$INSTALL"; then
+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
+ for ac_dir in $PATH; do
+ # Account for people who put trailing slashes in PATH elements.
+ case "$ac_dir/" in
+ /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
+ *)
+ # OSF1 and SCO ODT 3.0 have their own names for install.
+ # Don't use installbsd from OSF since it installs stuff as root
+ # by default.
+ for ac_prog in ginstall scoinst install; do
+ if test -f $ac_dir/$ac_prog; then
+ if test $ac_prog = install &&
+ grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
+ # AIX install. It has an incompatible calling convention.
+ :
+ else
+ ac_cv_path_install="$ac_dir/$ac_prog -c"
+ break 2
+ fi
+ fi
+ done
+ ;;
+ esac
+ done
+ IFS="$ac_save_IFS"
+
+fi
+ if test "${ac_cv_path_install+set}" = set; then
+ INSTALL="$ac_cv_path_install"
+ else
+ # As a last resort, use the slow shell script. We don't cache a
+ # path for INSTALL within a source directory, because that will
+ # break other packages using the cache if that directory is
+ # removed, or if the path is relative.
+ INSTALL="$ac_install_sh"
+ fi
+fi
+echo "$ac_t""$INSTALL" 1>&6
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+echo $ac_n "checking build system type""... $ac_c" 1>&6
+echo "configure:926: checking build system type" >&5
+
+build_alias=$build
+case "$build_alias" in
+NONE)
+ case $nonopt in
+ NONE) build_alias=$host_alias ;;
+ *) build_alias=$nonopt ;;
+ esac ;;
+esac
+
+build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
+build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$build" 1>&6
+
+if test $host != $build; then
+ ac_tool_prefix=${host_alias}-
+else
+ ac_tool_prefix=
+fi
+
+# Extract the first word of "${ac_tool_prefix}$target-gcc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}$target-gcc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:952: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_CC="${ac_tool_prefix}$target-gcc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+
+if test -z "$ac_cv_prog_CC"; then
+if test -n "$ac_tool_prefix"; then
+ # Extract the first word of "$target-gcc", so it can be a program name with args.
+set dummy $target-gcc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:984: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_CC="$target-gcc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ test -z "$ac_cv_prog_CC" && ac_cv_prog_CC="cc"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+else
+ CC="cc"
+fi
+fi
+
+# Extract the first word of "${ac_tool_prefix}$target-ranlib", so it can be a program name with args.
+set dummy ${ac_tool_prefix}$target-ranlib; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1019: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$RANLIB"; then
+ ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_RANLIB="${ac_tool_prefix}$target-ranlib"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+RANLIB="$ac_cv_prog_RANLIB"
+if test -n "$RANLIB"; then
+ echo "$ac_t""$RANLIB" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+
+if test -z "$ac_cv_prog_RANLIB"; then
+if test -n "$ac_tool_prefix"; then
+ # Extract the first word of "$target-ranlib", so it can be a program name with args.
+set dummy $target-ranlib; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1051: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$RANLIB"; then
+ ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_RANLIB="$target-ranlib"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB="ranlib"
+fi
+fi
+RANLIB="$ac_cv_prog_RANLIB"
+if test -n "$RANLIB"; then
+ echo "$ac_t""$RANLIB" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+else
+ RANLIB="ranlib"
+fi
+fi
+
+# Extract the first word of "${ac_tool_prefix}$target-ld", so it can be a program name with args.
+set dummy ${ac_tool_prefix}$target-ld; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1086: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$LD"; then
+ ac_cv_prog_LD="$LD" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_LD="${ac_tool_prefix}$target-ld"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+LD="$ac_cv_prog_LD"
+if test -n "$LD"; then
+ echo "$ac_t""$LD" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+
+if test -z "$ac_cv_prog_LD"; then
+if test -n "$ac_tool_prefix"; then
+ # Extract the first word of "$target-ld", so it can be a program name with args.
+set dummy $target-ld; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1118: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$LD"; then
+ ac_cv_prog_LD="$LD" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_LD="$target-ld"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ test -z "$ac_cv_prog_LD" && ac_cv_prog_LD="ld"
+fi
+fi
+LD="$ac_cv_prog_LD"
+if test -n "$LD"; then
+ echo "$ac_t""$LD" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+else
+ LD="ld"
+fi
+fi
+
+# Extract the first word of "${ac_tool_prefix}$target-sim", so it can be a program name with args.
+set dummy ${ac_tool_prefix}$target-sim; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1153: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_SIM'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$SIM"; then
+ ac_cv_prog_SIM="$SIM" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_SIM="${ac_tool_prefix}$target-sim"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+SIM="$ac_cv_prog_SIM"
+if test -n "$SIM"; then
+ echo "$ac_t""$SIM" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+
+if test -z "$ac_cv_prog_SIM"; then
+if test -n "$ac_tool_prefix"; then
+ # Extract the first word of "$target-sim", so it can be a program name with args.
+set dummy $target-sim; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1185: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_SIM'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$SIM"; then
+ ac_cv_prog_SIM="$SIM" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_SIM="$target-sim"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ test -z "$ac_cv_prog_SIM" && ac_cv_prog_SIM="sim"
+fi
+fi
+SIM="$ac_cv_prog_SIM"
+if test -n "$SIM"; then
+ echo "$ac_t""$SIM" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+else
+ SIM="sim"
+fi
+fi
+
+# Extract the first word of "gcc", so it can be a program name with args.
+set dummy gcc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1220: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_CC="gcc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+if test -z "$CC"; then
+ # Extract the first word of "cc", so it can be a program name with args.
+set dummy cc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1250: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_prog_rejected=no
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
+ ac_prog_rejected=yes
+ continue
+ fi
+ ac_cv_prog_CC="cc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+if test $ac_prog_rejected = yes; then
+ # We found a bogon in the path, so make sure we never use it.
+ set dummy $ac_cv_prog_CC
+ shift
+ if test $# -gt 0; then
+ # We chose a different compiler from the bogus one.
+ # However, it has the same basename, so the bogon will be chosen
+ # first if we set CC to just the basename; use the full file name.
+ shift
+ set dummy "$ac_dir/$ac_word" "$@"
+ shift
+ ac_cv_prog_CC="$@"
+ fi
+fi
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+ if test -z "$CC"; then
+ case "`uname -s`" in
+ *win32* | *WIN32*)
+ # Extract the first word of "cl", so it can be a program name with args.
+set dummy cl; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1301: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_CC="cl"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+ ;;
+ esac
+ fi
+ test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
+fi
+
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
+echo "configure:1333: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+cat > conftest.$ac_ext << EOF
+
+#line 1344 "configure"
+#include "confdefs.h"
+
+main(){return(0);}
+EOF
+if { (eval echo configure:1349: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+ ac_cv_prog_cc_works=yes
+ # If we can't run a trivial program, we are probably using a cross compiler.
+ if (./conftest; exit) 2>/dev/null; then
+ ac_cv_prog_cc_cross=no
+ else
+ ac_cv_prog_cc_cross=yes
+ fi
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ ac_cv_prog_cc_works=no
+fi
+rm -fr conftest*
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
+if test $ac_cv_prog_cc_works = no; then
+ { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
+fi
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
+echo "configure:1375: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
+cross_compiling=$ac_cv_prog_cc_cross
+
+echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
+echo "configure:1380: checking whether we are using GNU C" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.c <&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+ ac_cv_prog_gcc=yes
+else
+ ac_cv_prog_gcc=no
+fi
+fi
+
+echo "$ac_t""$ac_cv_prog_gcc" 1>&6
+
+if test $ac_cv_prog_gcc = yes; then
+ GCC=yes
+else
+ GCC=
+fi
+
+ac_test_CFLAGS="${CFLAGS+set}"
+ac_save_CFLAGS="$CFLAGS"
+CFLAGS=
+echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
+echo "configure:1408: checking whether ${CC-cc} accepts -g" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ echo 'void f(){}' > conftest.c
+if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
+ ac_cv_prog_cc_g=yes
+else
+ ac_cv_prog_cc_g=no
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
+if test "$ac_test_CFLAGS" = set; then
+ CFLAGS="$ac_save_CFLAGS"
+elif test $ac_cv_prog_cc_g = yes; then
+ if test "$GCC" = yes; then
+ CFLAGS="-g -O2"
+ else
+ CFLAGS="-g"
+ fi
+else
+ if test "$GCC" = yes; then
+ CFLAGS="-O2"
+ else
+ CFLAGS=
+ fi
+fi
+
+echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
+echo "configure:1440: checking for POSIXized ISC" >&5
+if test -d /etc/conf/kconfig.d &&
+ grep _POSIX_VERSION /usr/include/sys/unistd.h >/dev/null 2>&1
+then
+ echo "$ac_t""yes" 1>&6
+ ISC=yes # If later tests want to check for ISC.
+ cat >> confdefs.h <<\EOF
+#define _POSIX_SOURCE 1
+EOF
+
+ if test "$GCC" = yes; then
+ CC="$CC -posix"
+ else
+ CC="$CC -Xp"
+ fi
+else
+ echo "$ac_t""no" 1>&6
+ ISC=
+fi
+
+echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
+echo "configure:1461: checking how to run the C preprocessor" >&5
+# On Suns, sometimes $CPP names a directory.
+if test -n "$CPP" && test -d "$CPP"; then
+ CPP=
+fi
+if test -z "$CPP"; then
+if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ # This must be in double quotes, not single quotes, because CPP may get
+ # substituted into the Makefile and "${CC-cc}" will confuse make.
+ CPP="${CC-cc} -E"
+ # On the NeXT, cc -E runs the code through the compiler's parser,
+ # not just through cpp.
+ cat > conftest.$ac_ext <
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1482: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP="${CC-cc} -E -traditional-cpp"
+ cat > conftest.$ac_ext <
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1499: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP="${CC-cc} -nologo -E"
+ cat > conftest.$ac_ext <
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1516: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP=/lib/cpp
+fi
+rm -f conftest*
+fi
+rm -f conftest*
+fi
+rm -f conftest*
+ ac_cv_prog_CPP="$CPP"
+fi
+ CPP="$ac_cv_prog_CPP"
+else
+ ac_cv_prog_CPP="$CPP"
+fi
+echo "$ac_t""$CPP" 1>&6
+
+echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
+echo "configure:1541: checking for ANSI C header files" >&5
+if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <
+#include
+#include
+#include
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1554: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ rm -rf conftest*
+ ac_cv_header_stdc=yes
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+if test $ac_cv_header_stdc = yes; then
+ # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
+cat > conftest.$ac_ext <
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ egrep "memchr" >/dev/null 2>&1; then
+ :
+else
+ rm -rf conftest*
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+ # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
+cat > conftest.$ac_ext <
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ egrep "free" >/dev/null 2>&1; then
+ :
+else
+ rm -rf conftest*
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+ # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
+if test "$cross_compiling" = yes; then
+ :
+else
+ cat > conftest.$ac_ext <
+#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
+#define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c))
+#define XOR(e, f) (((e) && !(f)) || (!(e) && (f)))
+int main () { int i; for (i = 0; i < 256; i++)
+if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2);
+exit (0); }
+
+EOF
+if { (eval echo configure:1621: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+then
+ :
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -fr conftest*
+ ac_cv_header_stdc=no
+fi
+rm -fr conftest*
+fi
+
+fi
+fi
+
+echo "$ac_t""$ac_cv_header_stdc" 1>&6
+if test $ac_cv_header_stdc = yes; then
+ cat >> confdefs.h <<\EOF
+#define STDC_HEADERS 1
+EOF
+
+fi
+
+
+MAKE_SHELL=/bin/sh
+
+
+if test $ac_cv_prog_gcc = yes; then
+ echo $ac_n "checking whether ${CC-cc} needs -traditional""... $ac_c" 1>&6
+echo "configure:1650: checking whether ${CC-cc} needs -traditional" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_gcc_traditional'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ ac_pattern="Autoconf.*'x'"
+ cat > conftest.$ac_ext <
+Autoconf TIOCGETP
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ egrep "$ac_pattern" >/dev/null 2>&1; then
+ rm -rf conftest*
+ ac_cv_prog_gcc_traditional=yes
+else
+ rm -rf conftest*
+ ac_cv_prog_gcc_traditional=no
+fi
+rm -f conftest*
+
+
+ if test $ac_cv_prog_gcc_traditional = no; then
+ cat > conftest.$ac_ext <
+Autoconf TCGETA
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ egrep "$ac_pattern" >/dev/null 2>&1; then
+ rm -rf conftest*
+ ac_cv_prog_gcc_traditional=yes
+fi
+rm -f conftest*
+
+ fi
+fi
+
+echo "$ac_t""$ac_cv_prog_gcc_traditional" 1>&6
+ if test $ac_cv_prog_gcc_traditional = yes; then
+ CC="$CC -traditional"
+ fi
+fi
+
+CFLAGS="-Wall -g"
+
+COMPILE_OR1K=unknown
+
+
+TESTS_ENV=
+
+OR1K_SRCDIR="./${top_srcdir}"
+case $target in
+ or1k*|or32*)
+ CFLAGS="$CFLAGS -nostdlib -mhard-div"
+ COMPILE=or1k
+ TESTS_ENV="$SIM"
+ ;;
+esac
+
+
+if test x$COMPILE = xor1k; then
+ OR1K_EXCEPT_TRUE=
+ OR1K_EXCEPT_FALSE='#'
+else
+ OR1K_EXCEPT_TRUE='#'
+ OR1K_EXCEPT_FALSE=
+fi
+
+
+echo $ac_n "checking whether to enable optimizations""... $ac_c" 1>&6
+echo "configure:1722: checking whether to enable optimizations" >&5
+# Check whether --enable-opt or --disable-opt was given.
+if test "${enable_opt+set}" = set; then
+ enableval="$enable_opt"
+
+ case "$enableval" in
+ yes)
+ CFLAGS="$CFLAGS -O"
+ ;;
+ *)
+ CFLAGS="$CFLAGS -O$enableval"
+ ;;
+ esac
+
+fi
+
+echo "$ac_t""${enable_opt-default}" 1>&6
+
+case "$enable_debugging" in
+ yes) echo $ac_n "checking for malloc in -lefence""... $ac_c" 1>&6
+echo "configure:1742: checking for malloc in -lefence" >&5
+ac_lib_var=`echo efence'_'malloc | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ ac_save_LIBS="$LIBS"
+LIBS="-lefence $LIBS"
+cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+ rm -rf conftest*
+ eval "ac_cv_lib_$ac_lib_var=yes"
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ eval "ac_cv_lib_$ac_lib_var=no"
+fi
+rm -f conftest*
+LIBS="$ac_save_LIBS"
+
+fi
+if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ ac_tr_lib=HAVE_LIB`echo efence | sed -e 's/[^a-zA-Z0-9_]/_/g' \
+ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
+ cat >> confdefs.h <&6
+fi
+ ;;
+esac
+
+
+INCLUDES="-I\${top_srcdir}/support"
+
+echo $ac_n "checking for working const""... $ac_c" 1>&6
+echo "configure:1794: checking for working const" >&5
+if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <j = 5;
+}
+{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
+ const int foo = 10;
+}
+
+; return 0; }
+EOF
+if { (eval echo configure:1848: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_c_const=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_c_const=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$ac_cv_c_const" 1>&6
+if test $ac_cv_c_const = no; then
+ cat >> confdefs.h <<\EOF
+#define const
+EOF
+
+fi
+
+echo $ac_n "checking for inline""... $ac_c" 1>&6
+echo "configure:1869: checking for inline" >&5
+if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ ac_cv_c_inline=no
+for ac_kw in inline __inline__ __inline; do
+ cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_c_inline=$ac_kw; break
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+fi
+rm -f conftest*
+done
+
+fi
+
+echo "$ac_t""$ac_cv_c_inline" 1>&6
+case "$ac_cv_c_inline" in
+ inline | yes) ;;
+ no) cat >> confdefs.h <<\EOF
+#define inline
+EOF
+ ;;
+ *) cat >> confdefs.h < confcache <<\EOF
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs. It is not useful on other systems.
+# If it contains results you don't want to keep, you may remove or edit it.
+#
+# By default, configure uses ./config.cache as the cache file,
+# creating it if it does not exist already. You can give configure
+# the --cache-file=FILE option to use a different cache file; that is
+# what configure does when it calls configure scripts in
+# subdirectories, so they share the cache.
+# Giving --cache-file=/dev/null disables caching, for debugging configure.
+# config.status only pays attention to the cache file if you give it the
+# --recheck option to rerun configure.
+#
+EOF
+# The following way of writing the cache mishandles newlines in values,
+# but we know of no workaround that is simple, portable, and efficient.
+# So, don't put newlines in cache variables' values.
+# Ultrix sh set writes to stderr and can't be redirected directly,
+# and sets the high bit in the cache file unless we assign to the vars.
+(set) 2>&1 |
+ case `(ac_space=' '; set | grep ac_space) 2>&1` in
+ *ac_space=\ *)
+ # `set' does not quote correctly, so add quotes (double-quote substitution
+ # turns \\\\ into \\, and sed turns \\ into \).
+ sed -n \
+ -e "s/'/'\\\\''/g" \
+ -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
+ ;;
+ *)
+ # `set' quotes correctly as required by POSIX, so do not add quotes.
+ sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
+ ;;
+ esac >> confcache
+if cmp -s $cache_file confcache; then
+ :
+else
+ if test -w $cache_file; then
+ echo "updating cache $cache_file"
+ cat confcache > $cache_file
+ else
+ echo "not updating unwritable cache $cache_file"
+ fi
+fi
+rm -f confcache
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+test "x$prefix" = xNONE && prefix=$ac_default_prefix
+# Let make expand exec_prefix.
+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
+
+# Any assignment to VPATH causes Sun make to only execute
+# the first set of double-colon rules, so remove it if not needed.
+# If there is a colon in the path, we need to keep it.
+if test "x$srcdir" = x.; then
+ ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
+fi
+
+trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
+
+# Transform confdefs.h into DEFS.
+# Protect against shell expansion while executing Makefile rules.
+# Protect against Makefile macro expansion.
+cat > conftest.defs <<\EOF
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
+s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
+s%\[%\\&%g
+s%\]%\\&%g
+s%\$%$$%g
+EOF
+DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
+rm -f conftest.defs
+
+
+# Without the "./", some shells look in PATH for config.status.
+: ${CONFIG_STATUS=./config.status}
+
+echo creating $CONFIG_STATUS
+rm -f $CONFIG_STATUS
+cat > $CONFIG_STATUS </dev/null | sed 1q`:
+#
+# $0 $ac_configure_args
+#
+# Compiler output produced by configure, useful for debugging
+# configure, is in ./config.log if it exists.
+
+ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
+for ac_option
+do
+ case "\$ac_option" in
+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+ echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
+ exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
+ -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
+ echo "$CONFIG_STATUS generated by autoconf version 2.13"
+ exit 0 ;;
+ -help | --help | --hel | --he | --h)
+ echo "\$ac_cs_usage"; exit 0 ;;
+ *) echo "\$ac_cs_usage"; exit 1 ;;
+ esac
+done
+
+ac_given_srcdir=$srcdir
+ac_given_INSTALL="$INSTALL"
+
+trap 'rm -fr `echo "Makefile support/Makefile uos/Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
+EOF
+cat >> $CONFIG_STATUS < conftest.subs <<\\CEOF
+$ac_vpsub
+$extrasub
+s%@SHELL@%$SHELL%g
+s%@CFLAGS@%$CFLAGS%g
+s%@CPPFLAGS@%$CPPFLAGS%g
+s%@CXXFLAGS@%$CXXFLAGS%g
+s%@FFLAGS@%$FFLAGS%g
+s%@DEFS@%$DEFS%g
+s%@LDFLAGS@%$LDFLAGS%g
+s%@LIBS@%$LIBS%g
+s%@exec_prefix@%$exec_prefix%g
+s%@prefix@%$prefix%g
+s%@program_transform_name@%$program_transform_name%g
+s%@bindir@%$bindir%g
+s%@sbindir@%$sbindir%g
+s%@libexecdir@%$libexecdir%g
+s%@datadir@%$datadir%g
+s%@sysconfdir@%$sysconfdir%g
+s%@sharedstatedir@%$sharedstatedir%g
+s%@localstatedir@%$localstatedir%g
+s%@libdir@%$libdir%g
+s%@includedir@%$includedir%g
+s%@oldincludedir@%$oldincludedir%g
+s%@infodir@%$infodir%g
+s%@mandir@%$mandir%g
+s%@host@%$host%g
+s%@host_alias@%$host_alias%g
+s%@host_cpu@%$host_cpu%g
+s%@host_vendor@%$host_vendor%g
+s%@host_os@%$host_os%g
+s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
+s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
+s%@INSTALL_DATA@%$INSTALL_DATA%g
+s%@PACKAGE@%$PACKAGE%g
+s%@VERSION@%$VERSION%g
+s%@ACLOCAL@%$ACLOCAL%g
+s%@AUTOCONF@%$AUTOCONF%g
+s%@AUTOMAKE@%$AUTOMAKE%g
+s%@AUTOHEADER@%$AUTOHEADER%g
+s%@MAKEINFO@%$MAKEINFO%g
+s%@SET_MAKE@%$SET_MAKE%g
+s%@build@%$build%g
+s%@build_alias@%$build_alias%g
+s%@build_cpu@%$build_cpu%g
+s%@build_vendor@%$build_vendor%g
+s%@build_os@%$build_os%g
+s%@CC@%$CC%g
+s%@RANLIB@%$RANLIB%g
+s%@LD@%$LD%g
+s%@SIM@%$SIM%g
+s%@CPP@%$CPP%g
+s%@MAKE_SHELL@%$MAKE_SHELL%g
+s%@TESTS_ENV@%$TESTS_ENV%g
+s%@OR1K_SRCDIR@%$OR1K_SRCDIR%g
+s%@OR1K_EXCEPT_TRUE@%$OR1K_EXCEPT_TRUE%g
+s%@OR1K_EXCEPT_FALSE@%$OR1K_EXCEPT_FALSE%g
+s%@INCLUDES@%$INCLUDES%g
+
+CEOF
+EOF
+
+cat >> $CONFIG_STATUS <<\EOF
+
+# Split the substitutions into bite-sized pieces for seds with
+# small command number limits, like on Digital OSF/1 and HP-UX.
+ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
+ac_file=1 # Number of current file.
+ac_beg=1 # First line for current file.
+ac_end=$ac_max_sed_cmds # Line after last line for current file.
+ac_more_lines=:
+ac_sed_cmds=""
+while $ac_more_lines; do
+ if test $ac_beg -gt 1; then
+ sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
+ else
+ sed "${ac_end}q" conftest.subs > conftest.s$ac_file
+ fi
+ if test ! -s conftest.s$ac_file; then
+ ac_more_lines=false
+ rm -f conftest.s$ac_file
+ else
+ if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds="sed -f conftest.s$ac_file"
+ else
+ ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
+ fi
+ ac_file=`expr $ac_file + 1`
+ ac_beg=$ac_end
+ ac_end=`expr $ac_end + $ac_max_sed_cmds`
+ fi
+done
+if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds=cat
+fi
+EOF
+
+cat >> $CONFIG_STATUS <> $CONFIG_STATUS <<\EOF
+for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case "$ac_file" in
+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+ *) ac_file_in="${ac_file}.in" ;;
+ esac
+
+ # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
+
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
+ # A "../" for each directory in $ac_dir_suffix.
+ ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
+ else
+ ac_dir_suffix= ac_dots=
+ fi
+
+ case "$ac_given_srcdir" in
+ .) srcdir=.
+ if test -z "$ac_dots"; then top_srcdir=.
+ else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
+ /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
+ *) # Relative path.
+ srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
+ top_srcdir="$ac_dots$ac_given_srcdir" ;;
+ esac
+
+ case "$ac_given_INSTALL" in
+ [/$]*) INSTALL="$ac_given_INSTALL" ;;
+ *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
+ esac
+
+ echo creating "$ac_file"
+ rm -f "$ac_file"
+ configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
+ case "$ac_file" in
+ *Makefile*) ac_comsub="1i\\
+# $configure_input" ;;
+ *) ac_comsub= ;;
+ esac
+
+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+ sed -e "$ac_comsub
+s%@configure_input@%$configure_input%g
+s%@srcdir@%$srcdir%g
+s%@top_srcdir@%$top_srcdir%g
+s%@INSTALL@%$INSTALL%g
+" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
+fi; done
+rm -f conftest.s*
+
+EOF
+cat >> $CONFIG_STATUS <> $CONFIG_STATUS <<\EOF
+
+exit 0
+EOF
+chmod +x $CONFIG_STATUS
+rm -fr confdefs* $ac_clean_files
+test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
+
configure
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: configure.in
===================================================================
--- configure.in (nonexistent)
+++ configure.in (revision 1765)
@@ -0,0 +1,96 @@
+dnl or32 test suite - top level
+dnl
+dnl Copyright (C) 2001 Marko Mlinar
+dnl
+dnl This file is part of OpenRISC 1000 Architectural Simulator.
+dnl
+dnl This program is free software; you can redistribute it and/or modify
+dnl it under the terms of the GNU General Public License as published by
+dnl the Free Software Foundation; either version 2 of the License, or
+dnl (at your option) any later version.
+dnl
+dnl This program is distributed in the hope that it will be useful,
+dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
+dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+dnl GNU General Public License for more details.
+dnl
+dnl You should have received a copy of the GNU General Public License
+dnl along with this program; if not, write to the Free Software
+dnl Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+dnl
+dnl Process this file with autoconf to produce a configure script.
+
+dnl disable cache, since it causes troubles when changing hosts
+dnl define([AC_CACHE_LOAD], )dnl
+dnl define([AC_CACHE_SAVE], )dnl
+
+AC_REVISION([for or1ksim-1.2, version 2.14, from autoconf version] AC_ACVERSION)
+AC_PREREQ(2.10)
+AC_INIT(support/support.h)
+AC_CANONICAL_HOST
+AM_INIT_AUTOMAKE(or1ksimtest, 1.3)
+
+dnl Checks for programs.
+AC_PROG_MAKE_SET
+AC_PROG_INSTALL
+AC_CHECK_TOOL(CC, $target-gcc, cc)
+AC_CHECK_TOOL(RANLIB, $target-ranlib, ranlib)
+AC_CHECK_TOOL(LD, $target-ld, ld)
+AC_CHECK_TOOL(SIM, $target-sim, sim)
+AC_ISC_POSIX
+AC_HEADER_STDC
+
+MAKE_SHELL=/bin/sh
+AC_SUBST(MAKE_SHELL)
+
+dnl Compiler options.
+AC_PROG_GCC_TRADITIONAL
+dnl set -- $CFLAGS
+CFLAGS="-Wall -g"
+
+COMPILE_OR1K=unknown
+
+AC_SUBST(TESTS_ENV)
+TESTS_ENV=
+AC_SUBST(OR1K_SRCDIR)
+OR1K_SRCDIR="./${top_srcdir}"
+case $target in
+ or1k*|or32*)
+ CFLAGS="$CFLAGS -nostdlib -mhard-div"
+ COMPILE=or1k
+ TESTS_ENV="$SIM"
+ ;;
+esac
+dnl echo $TESTS_ENV
+AM_CONDITIONAL(OR1K_EXCEPT, test x$COMPILE = xor1k)
+
+
+dnl optimizations level
+AC_MSG_CHECKING(whether to enable optimizations)
+AC_ARG_ENABLE(opt,
+ [ --enable-opt enable optimizations
+ --enable-opt=level same as gcc -O switch ], [
+ case "$enableval" in
+ yes)
+ CFLAGS="$CFLAGS -O"
+ ;;
+ *)
+ CFLAGS="$CFLAGS -O$enableval"
+ ;;
+ esac
+])
+AC_MSG_RESULT(${enable_opt-default})
+
+case "$enable_debugging" in
+ yes) AC_CHECK_LIB(efence, malloc) ;;
+esac
+
+AC_SUBST(INCLUDES)
+INCLUDES="-I\${top_srcdir}/support"
+
+dnl Checks for typedefs, structures, and compiler characteristics.
+AC_C_CONST
+AC_C_INLINE
+
+dnl Create output files.
+AC_OUTPUT([Makefile support/Makefile uos/Makefile])
configure.in
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: mc_sync.h
===================================================================
--- mc_sync.h (nonexistent)
+++ mc_sync.h (revision 1765)
@@ -0,0 +1,76 @@
+/* mc_sync.h - Memory Controller testbench SYNCdevices defines
+ Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+
+#ifndef __MC_SYNC_H
+#define __MC_SYNC_H
+
+/* should configuration be read from MC? */
+#define MC_READ_CONF
+
+/* TEMPLATE SELECTION */
+/* change #undef to #define */
+#define _MC_TEST_TEMPLATE1
+#undef _MC_TEST_TEMPLATE2
+#undef _MC_TEST_TEMPLATE3
+/* ------------------------ */
+
+/* memory configuration that must reflect mcmem.cfg */
+#define MC_SYNC_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */
+
+typedef struct MC_SYNC_CS
+{
+ unsigned long M;
+} MC_SYNC_CS;
+
+MC_SYNC_CS mc_sync_cs[8] = {
+ { 0x02 /* SELect mask */
+ },
+ { 0x04 },
+ { 0x06 },
+ { 0x08 },
+ { 0x0A },
+ { 0x0C },
+ { 0x0E },
+ { 0x10 } };
+
+
+#define MC_SYNC_TEST0 0x00000001LU /* no parity, bank after column, write enable */
+#define MC_SYNC_TEST1 0x00000002LU /* parity */
+#define MC_SYNC_TEST2 0x00000004LU /* bank after row */
+#define MC_SYNC_TEST3 0x00000008LU /* RO */
+#define MC_SYNC_TEST4 0x00000010LU /* - NOT DEFINED - */
+
+#ifdef _MC_TEST_TEMPLATE1
+ #define MC_SYNC_FLAGS 0x000002B4LU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_SYNC_TESTS 0x00000005LU
+#endif
+
+#ifdef _MC_TEST_TEMPLATE2
+ #define MC_SYNC_FLAGS 0x00000128LU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_SYNC_TESTS 0x00000008LU
+#endif
+
+#ifdef _MC_TEST_TEMPLATE3
+ #define MC_SYNC_FLAGS 0x000007FFLU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_SYNC_TESTS 0x0000000FLU
+#endif
+
+
+#endif
Index: mc_async.h
===================================================================
--- mc_async.h (nonexistent)
+++ mc_async.h (revision 1765)
@@ -0,0 +1,76 @@
+/* mc_async.h - Memory Controller testbench ASYNCdevices defines
+ Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+
+#ifndef __MC_ASYNC_H
+#define __MC_ASYNC_H
+
+/* should configuration be readm from MC? */
+#define MC_READ_CONF
+
+/* TEMPLATE SELECTION */
+/* change #undef to #define */
+#define _MC_TEST_TEMPLATE1
+#undef _MC_TEST_TEMPLATE2
+#undef _MC_TEST_TEMPLATE3
+/* ------------------------ */
+
+/* memory configuration that must reflect mcmem.cfg */
+#define MC_ASYNC_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */
+
+typedef struct MC_ASYNC_CS
+{
+ unsigned long BW;
+ unsigned long M;
+} MC_ASYNC_CS;
+
+MC_ASYNC_CS mc_async_cs[8] = {
+ { 2, /* Bus Width : 0 - 8bit, 1 - 16bit, 2 - 32bit */
+ 0x02 /* SELect mask */
+ },
+ { 2, 0x04 },
+ { 2, 0x06 },
+ { 2, 0x08 },
+ { 2, 0x0A },
+ { 2, 0x0C },
+ { 2, 0x0E },
+ { 2, 0x10 } };
+
+#define MC_ASYNC_TEST0 0x00000001LU /* no parity, bank after column, write enable */
+#define MC_ASYNC_TEST1 0x00000002LU /* parity */
+#define MC_ASYNC_TEST2 0x00000004LU /* bank after row */
+#define MC_ASYNC_TEST3 0x00000008LU /* RO */
+#define MC_ASYNC_TEST4 0x00000010LU /* - NOT DEFINED - */
+
+#ifdef _MC_TEST_TEMPLATE1
+ #define MC_ASYNC_FLAGS 0x000002B4LU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_ASYNC_TESTS 0x0000000FLU
+#endif
+
+#ifdef _MC_TEST_TEMPLATE2
+ #define MC_ASYNC_FLAGS 0x00000128LU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_ASYNC_TESTS 0x00000008LU
+#endif
+
+#ifdef _MC_TEST_TEMPLATE3
+ #define MC_ASYNC_FLAGS 0x000007FFLU /* MC_TEST_ flags... see mc_common.h */
+ #define MC_ASYNC_TESTS 0x0000000FLU
+#endif
+
+#endif
Index: mc_common.c
===================================================================
--- mc_common.c (nonexistent)
+++ mc_common.c (revision 1765)
@@ -0,0 +1,431 @@
+/* mc_common.c -- Memory Controller testbenck common routines
+ Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+
+#include "support.h"
+#include "mc_common.h"
+
+static int r_Xn;
+static int r_mod;
+
+void randomin(unsigned long seed)
+{
+ r_Xn = seed;
+ r_mod = 33554431; /* 2^25 - 1*/
+}
+
+unsigned long random(unsigned long max)
+{
+ r_Xn = ((r_Xn * (r_Xn + 1))%r_mod);
+ if (r_Xn == 0) r_Xn = 42+1;
+ return r_Xn%max;
+}
+
+void mc_clear_row(unsigned long nFrom, unsigned long nTo)
+{
+ MEMLOC32 mem32 = 0;
+ unsigned long i;
+
+ for(i=nFrom; i
mem_test.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: mc_common.h
===================================================================
--- mc_common.h (nonexistent)
+++ mc_common.h (revision 1765)
@@ -0,0 +1,70 @@
+/* mc_common.h - Memory Controller testbench common routines defines
+ Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
+
+ This file is part of OpenRISC 1000 Architectural Simulator.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+
+#ifndef __MC_COMMON_H
+#define __MC_COMMON_H
+
+#define GPIO_BASE 0xA0000000LU
+#define MC_BASE 0x60000000LU
+#define MC_MEM_BASE 0x04000000LU
+
+/* Row Test flags */
+#define MC_TEST_RUN0 0x00000001LU
+#define MC_TEST_RUN1 0x00000002LU
+#define MC_TEST_RUN01 0x00000004LU
+#define MC_TEST_RUN10 0x00000008LU
+#define MC_TEST_RUNINC 0x00000010LU
+#define MC_TEST_8 0x00000020LU
+#define MC_TEST_16 0x00000040LU
+#define MC_TEST_32 0x00000080LU
+#define MC_TEST_SEQ 0x00000100LU
+#define MC_TEST_SEQ1 0x00000200LU
+#define MC_TEST_RAND 0x00000400LU
+
+/* test pattern defines */
+#define MC_TEST_PAT1_8 0x00U
+#define MC_TEST_PAT2_8 0xFFU
+#define MC_TEST_PAT3_8 0x55U
+#define MC_TEST_PAT4_8 0xAAU
+#define MC_TEST_PAT1_16 0x0000U
+#define MC_TEST_PAT2_16 0xFFFFU
+#define MC_TEST_PAT3_16 0x5555U
+#define MC_TEST_PAT4_16 0xAAAAU
+#define MC_TEST_PAT1_32 0x00000000LU
+#define MC_TEST_PAT2_32 0xFFFFFFFFLU
+#define MC_TEST_PAT3_32 0x55555555LU
+#define MC_TEST_PAT4_32 0xAAAAAAAALU
+
+/* test device defines */
+#define MC_TEST_DEV_SDRAM 0
+#define MC_TEST_DEV_SSRAM 1
+#define MC_TEST_DEV_ASYNC 2
+#define MC_TEST_DEV_SYNC 3
+
+typedef volatile unsigned char *MEMLOC8;
+typedef volatile unsigned short *MEMLOC16;
+typedef volatile unsigned long *MEMLOC32;
+
+/* Prototypes */
+unsigned long mc_test_row(unsigned long nFrom, unsigned long nTo, unsigned long flags);
+void randomin(unsigned long seed);
+unsigned long random(unsigned long max);
+
+#endif
Index: basic.S
===================================================================
--- basic.S (nonexistent)
+++ basic.S (revision 1765)
@@ -0,0 +1,456 @@
+/* Basic instruction set test */
+#include "spr_defs.h"
+
+#define MEM_RAM 0x40000000
+
+ .section .except
+ .org 0x100
+_reset:
+ l.nop 0
+ l.movhi r1,hi(_regs)
+ l.ori r1,r1,lo(_regs)
+ l.jr r1
+ l.nop
+
+ .section .text
+_regs:
+ l.addi r1,r0,0x1
+ l.addi r2,r1,0x2
+ l.addi r3,r2,0x4
+ l.addi r4,r3,0x8
+ l.addi r5,r4,0x10
+ l.addi r6,r5,0x20
+ l.addi r7,r6,0x40
+ l.addi r8,r7,0x80
+ l.addi r9,r8,0x100
+ l.addi r10,r9,0x200
+ l.addi r11,r10,0x400
+ l.addi r12,r11,0x800
+ l.addi r13,r12,0x1000
+ l.addi r14,r13,0x2000
+ l.addi r15,r14,0x4000
+ l.addi r16,r15,0x8000
+
+ l.sub r31,r0,r1
+ l.sub r30,r31,r2
+ l.sub r29,r30,r3
+ l.sub r28,r29,r4
+ l.sub r27,r28,r5
+ l.sub r26,r27,r6
+ l.sub r25,r26,r7
+ l.sub r24,r25,r8
+ l.sub r23,r24,r9
+ l.sub r22,r23,r10
+ l.sub r21,r22,r11
+ l.sub r20,r21,r12
+ l.sub r19,r20,r13
+ l.sub r18,r19,r14
+ l.sub r17,r18,r15
+ l.sub r16,r17,r16
+
+ l.or r3,r0,r16
+ l.nop NOP_REPORT /* Should be 0xffff0012 */
+
+ l.movhi r31, hi(MEM_RAM)
+ l.ori r31,r31, lo(MEM_RAM)
+ l.sw 0(r31),r16
+
+_mem: l.movhi r3,0x1234
+ l.ori r3,r3,0x5678
+
+ l.sw 4(r31),r3
+
+ l.lbz r4,4(r31)
+ l.add r8,r8,r4
+ l.sb 11(r31),r4
+ l.lbz r4,5(r31)
+ l.add r8,r8,r4
+ l.sb 10(r31),r4
+ l.lbz r4,6(r31)
+ l.add r8,r8,r4
+ l.sb 9(r31),r4
+ l.lbz r4,7(r31)
+ l.add r8,r8,r4
+ l.sb 8(r31),r4
+
+ l.lbs r4,8(r31)
+ l.add r8,r8,r4
+ l.sb 7(r31),r4
+ l.lbs r4,9(r31)
+ l.add r8,r8,r4
+ l.sb 6(r31),r4
+ l.lbs r4,10(r31)
+ l.add r8,r8,r4
+ l.sb 5(r31),r4
+ l.lbs r4,11(r31)
+ l.add r8,r8,r4
+ l.sb 4(r31),r4
+
+ l.lhz r4,4(r31)
+ l.add r8,r8,r4
+ l.sh 10(r31),r4
+ l.lhz r4,6(r31)
+ l.add r8,r8,r4
+ l.sh 8(r31),r4
+
+ l.lhs r4,8(r31)
+ l.add r8,r8,r4
+ l.sh 6(r31),r4
+ l.lhs r4,10(r31)
+ l.add r8,r8,r4
+ l.sh 4(r31),r4
+
+ l.lwz r4,4(r31)
+ l.add r8,r8,r4
+
+ l.or r3,r0,r8
+ l.nop NOP_REPORT /* Should be 0x12352af7 */
+
+ l.lwz r9,0(r31)
+ l.add r8,r9,r8
+ l.sw 0(r31),r8
+
+_arith:
+ l.addi r3,r0,1
+ l.addi r4,r0,2
+ l.addi r5,r0,-1
+ l.addi r6,r0,-1
+ l.addi r8,r0,0
+
+ l.sub r7,r5,r3
+ l.sub r8,r3,r5
+ l.add r8,r8,r7
+
+ l.div r7,r7,r4
+ l.add r9,r3,r4
+ l.mul r7,r9,r7
+ l.divu r7,r7,r4
+ l.add r8,r8,r7
+
+ l.or r3,r0,r8
+ l.nop NOP_REPORT /* Should be 0x7ffffffe */
+
+ l.lwz r9,0(r31)
+ l.add r8,r9,r8
+ l.sw 0(r31),r8
+
+_log:
+ l.addi r3,r0,1
+ l.addi r4,r0,2
+ l.addi r5,r0,-1
+ l.addi r6,r0,-1
+ l.addi r8,r0,0
+
+ l.andi r8,r8,1
+ l.and r8,r8,r3
+
+ l.xori r8,r5,0xa5a5
+ l.xor r8,r8,r5
+
+ l.ori r8,r8,2
+ l.or r8,r8,r4
+
+ l.or r3,r0,r8
+ l.nop NOP_REPORT /* Should be 0xffffa5a7 */
+
+ l.lwz r9,0(r31)
+ l.add r8,r9,r8
+ l.sw 0(r31),r8
+
+_shift:
+ l.addi r3,r0,1
+ l.addi r4,r0,2
+ l.addi r5,r0,-1
+ l.addi r6,r0,-1
+ l.addi r8,r0,0
+
+ l.slli r8,r5,6
+ l.sll r8,r8,r4
+
+ l.srli r8,r8,6
+ l.srl r8,r8,r4
+
+ l.srai r8,r8,2
+ l.sra r8,r8,r4
+
+ l.or r3,r0,r8
+ l.nop NOP_REPORT /* Should be 0x000fffff */
+
+ l.lwz r9,0(r31)
+ l.add r8,r9,r8
+ l.sw 0(r31),r8
+
+_flag:
+ l.addi r3,r0,1
+ l.addi r4,r0,-2
+ l.addi r8,r0,0
+
+ l.sfeq r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfeq r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfeqi r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfeqi r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfne r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfne r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfnei r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfnei r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgtu r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgtu r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgtui r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgtui r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgeu r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgeu r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgeui r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgeui r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfltu r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfltu r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfltui r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfltui r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfleu r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfleu r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfleui r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfleui r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgts r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgts r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgtsi r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgtsi r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfges r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfges r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgesi r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfgesi r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sflts r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sflts r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfltsi r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfltsi r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfles r3,r3
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sfles r3,r4
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sflesi r3,1
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.sflesi r3,-2
+ l.mfspr r5,r0,17
+ l.andi r4,r5,0x200
+ l.add r8,r8,r4
+
+ l.or r3,r0,r8
+ l.nop NOP_REPORT /* Should be 0x00002800 */
+
+ l.lwz r9,0(r31)
+ l.add r8,r9,r8
+ l.sw 0(r31),r8
+
+_jump:
+ l.addi r8,r0,0
+
+ l.j _T1
+ l.addi r8,r8,1
+
+_T2: l.jr r9
+ l.addi r8,r8,1
+
+_T1: l.jal _T2
+ l.addi r8,r8,1
+
+ l.sfeqi r0,0
+ l.bf _T3
+ l.addi r8,r8,1
+
+_T3: l.sfeqi r0,1
+ l.bf _T4
+ l.addi r8,r8,1
+
+ l.addi r8,r8,1
+
+_T4: l.sfeqi r0,0
+ l.bnf _T5
+ l.addi r8,r8,1
+
+ l.addi r8,r8,1
+
+_T5: l.sfeqi r0,1
+ l.bnf _T6
+ l.addi r8,r8,1
+
+ l.addi r8,r8,1
+
+_T6: l.movhi r3,hi(_T7)
+ l.ori r3,r0,lo(_T7)
+ l.mtspr r0,r3,32
+ l.mfspr r5,r0,17
+ l.mtspr r0,r5,64
+ l.rfe
+ l.addi r8,r8,1 /* l.rfe should not have a delay slot */
+
+ l.addi r8,r8,1
+
+_T7: l.or r3,r0,r8
+ l.nop NOP_REPORT /* Should be 0x000000009 */
+
+ l.lwz r9,0(r31)
+ l.add r8,r9,r8
+ l.sw 0(r31),r8
+
+ l.lwz r9,0(r31)
+ l.movhi r3,0x4c69
+ l.ori r3,r3,0xe5f7
+ l.add r8,r8,r3
+
+ l.or r3,r0,r8
+ l.nop NOP_REPORT /* Should be 0xdeaddead */
+
+ l.addi r3,r0,0
+ l.nop NOP_EXIT
+
basic.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: test
===================================================================
--- test (nonexistent)
+++ test (revision 1765)
@@ -0,0 +1,59 @@
+#! /bin/sh
+#
+# Usage:
+# test simulator_binary file_to_test
+echo -n "Testing $2... "
+
+# clean . and / characters
+fn=`echo $2 | sed 's/[\/\.]//g'`
+default_cfg_fn="default.cfg"
+temp1="/tmp/${fn}_output_ok"
+temp2="/tmp/${fn}_output"
+temp3="/tmp/${fn}_output_tail"
+temp4="/tmp/${fn}_error"
+
+# prepare simulator parameters
+sim_param=
+cfg_file="$2.cfg"
+test -f $cfg_file
+if test $? -eq 0; then
+ echo -n "(using $cfg_file) "
+ # load .cfg file
+ sim_param="-f $cfg_file";
+else
+ sim_param="-f $default_cfg_fn";
+fi
+
+#if simulator not specified, no flags needed
+if test -z $1; then
+ sim_param=;
+fi
+
+# Last two lines should look like:
+echo "report(0xdeaddead);" >$temp1
+echo "exit(0)" >>$temp1
+
+# run the simulator
+$1 $2 $sim_param 2>$temp4 >$temp2
+simerr=$?
+if test $simerr -eq 0; then
+ tail $temp2 -n 2 >$temp3
+ if cmp -s $temp1 $temp3; then
+ echo "OK";
+ rm $temp2
+ rm $temp4
+ else
+ simerr=$?
+ echo -e "FAILED\nSee: '$temp2' and '$temp4'";
+ fi;
+else
+ echo "Cannot run: '$1 $2 $sim_param 2>$temp4 >$temp2'"
+ cat $temp4;
+fi
+
+# cleanup
+rm $temp1
+rm $temp3
+
+# exit the test
+exit $simerr
test
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: cfg.S
===================================================================
--- cfg.S (nonexistent)
+++ cfg.S (revision 1765)
@@ -0,0 +1,81 @@
+/* Configuration tester */
+#include "spr_defs.h"
+
+ .section .except
+ .org 0x100
+_reset:
+ l.addi r1,r0,0x7f00
+ l.movhi r2,hi(_main)
+ l.ori r2,r2,lo(_main)
+ l.jr r2
+ l.nop
+
+
+ .section .text
+_main:
+ l.addi r2,r0,0
+
+ l.mfspr r3,r0,SPR_VR /* Version */
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r3,r0,SPR_UPR /* Unit Present */
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r4,r0,SPR_PMR /* Power Management */
+ l.addi r3,r0,0
+ l.mtspr r0,r3,SPR_PMR
+ l.mfspr r3,r0,SPR_PMR
+ l.andi r3,r3,0xff
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.addi r3,r0,5
+ l.mtspr r0,r3,SPR_PMR
+ l.mfspr r3,r0,SPR_PMR
+ l.andi r3,r3,0xff
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mtspr r0,r4,SPR_PMR
+
+ l.mfspr r3,r0,SPR_CPUCFGR
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r3,r0,SPR_DMMUCFGR
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r3,r0,SPR_IMMUCFGR
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r3,r0,SPR_DCCFGR
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r3,r0,SPR_ICCFGR
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r3,r0,SPR_DCFGR
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ l.mfspr r3,r0,SPR_PCCFGR
+ l.nop NOP_REPORT
+ l.add r2,r2,r3
+
+ /* Configurations may differ, so we will insert another report*/
+ l.movhi r3,hi(0xdeacf5cc)
+ l.ori r3,r3,lo(0xdeacf5cc)
+ l.add r3,r2,r3
+ l.nop NOP_REPORT
+
+ l.movhi r3,hi(0xdeaddead)
+ l.ori r3,r3,lo(0xdeaddead)
+ l.nop NOP_REPORT
+ l.addi r3,r0,0
+ l.nop NOP_EXIT
cfg.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: cbasic.c
===================================================================
--- cbasic.c (nonexistent)
+++ cbasic.c (revision 1765)
@@ -0,0 +1,238 @@
+/* Test basic c functionality. */
+
+#define DEBUG 0
+#define DBGFINE 0
+
+#include "support.h"
+
+signed long test_cond(int i)
+{
+ switch(i) {
+ case 1:
+ i += 1;
+ break;
+ case -1:
+ i -= 10;
+ break;
+ default:
+ return i;
+ }
+
+ if (i == 2) /* normaly i == 2 */
+ i += 1;
+ else
+ i -= 10;
+
+ if (i > 2) /* normaly i == 3 */
+ i += 1;
+ else
+ i -=10;
+
+ if (i >= 4) /* normaly i == 4 */
+ i += 1;
+ else
+ i -= 10;
+
+ if (i <= 5) /* normaly i == 5 */
+ i += 1;
+ else
+ i -= 10;
+
+ if (i < 7) /* normaly i == 6 */
+ i += 1;
+ else
+ i -= 10;
+
+ if (i != 666) /* normaly i == 7 */
+ i += 1;
+ else
+ i -= 10;
+
+ return i; /* with initial i == 1 return 8 */
+}
+
+signed long test_loops(int i)
+{
+ int j = 0;
+
+ for(; i < 10; i++)
+ j += 2;
+
+ do {
+ i -= 3;
+ } while (j--);
+
+ return i;
+}
+
+signed long test_arith(int i)
+{
+ int mul = 0, div = 0;
+ int j;
+
+ for(j = i; j < 40; j++) {
+
+ mul += j*j*i;
+#if 0
+ report(mul);
+#endif
+ div += mul / (j+5);
+#if 0
+ report(div);
+#endif
+ }
+
+ report (mul+div);
+ return (mul + div);
+}
+
+signed long test_bitop(int i)
+{
+ int shl = 0, shr = 0, bit = 0;
+ int j;
+
+ for(j = i; j < 35; j++) {
+ shl += 1 << j;
+#if 0
+ printf("%u. shl:%.8lx", j, shl);
+ report(shl);
+#endif
+ shr += 0x80000000 >> j;
+#if 0
+ printf(" shr:%.8lx", shr);
+ report(shr);
+#endif
+ bit += ((~j ^ 0x11223344) & 0x33557788) + (j | 0x11223344);
+#if 0
+ printf(" bit:%.8lx\n", bit);
+ report(bit);
+#endif
+ }
+
+ return (shl + shr + bit);
+}
+
+signed long test_types(int i)
+{
+ unsigned char uc;
+ signed char sc;
+ unsigned short us;
+ signed short ss;
+ unsigned long ul;
+ signed long sl;
+
+ int j;
+
+ i ^= 0x10203040;
+
+ for(j = 0; j < 10; j++) {
+ uc = i;
+ sc = i;
+ us = i;
+ ss = i;
+ ul = i;
+ sl = i;
+#if 0
+ printf("%u. i:%.8lx ", j, i);
+ printf("uc:%.8lx sc:%.8lx ", uc, sc);
+ report(uc);
+ report(sc);
+ printf("us:%.8lx ss:%.8lx ", us, ss);
+ report(us);
+ report(ss);
+ printf("ul:%.8lx sl:%.8lx\n", ul, sl);
+ report(ul);
+ report(sl);
+#endif
+ i = uc + sc + us + ss + ul + sl;
+ }
+
+ return i;
+}
+
+signed long test_array(int i)
+{
+ char a1[] = "This test string MUST NOT be modified...";
+ char a2[100];
+
+ report(a1[5]);
+ memcpy(a2, a1, 40);
+ report(a1[5]);
+ report(a2[5]);
+ report(i);
+ /* register reload test */
+ i += a2[0] + a2[1] + a2[2] + a2[3] + a2[4] + a2[5] + a2[6] + a2[7]
+ + a2[8] + a2[9] + a2[10] + a2[11] + a2[12] + a2[13] + a2[14] + a2[15]
+ + a2[16] + a2[17] + a2[18] + a2[19] + a2[20] + a2[21] + a2[22] + a2[23]
+ + a2[24] + a2[25] + a2[26] + a2[27] + a2[28] + a2[29] + a2[30] + a2[31]
+ + a2[32] + a2[33] + a2[34] + a2[35] + a2[36] + a2[37] + a2[38] + a2[39];
+ report(i);
+
+ return i;
+}
+
+int main()
+{
+ signed long result1 = 0;
+ signed long result2 = 0;
+ signed long result3 = 0;
+
+#if DEBUG
+ printf("Start...\n");
+#endif
+ result1 = test_cond(1);
+ result2 = test_cond(-1);
+ result3 -= result1 + result2;
+ report(result2);
+#if DEBUG
+ printf("After test_cond: 0x%.8lx 0x%.8lx\n", result1, result2);
+#endif
+
+ result1 = test_loops(1);
+ result2 = test_loops(-1);
+ result3 -= result1 + result2;
+ report(result2);
+#if DEBUG
+ printf("After test_loops: 0x%.8lx 0x%.8lx\n", result1, result2);
+#endif
+
+ result1 = test_arith(1);
+ result2 = test_arith(-1);
+ result3 -= result1 + result2;
+ report(result2);
+#if DEBUG
+ printf("After test_arith: 0x%.8lx 0x%.8lx\n", result1, result2);
+#endif
+
+ result1 = test_bitop(1);
+ result2 = test_bitop(-1);
+ result3 -= result1 + result2;
+ report(result2);
+#if DEBUG
+ printf("After test_bitop: 0x%.8lx 0x%.8lx\n", result1, result2);
+#endif
+
+ result1 = test_types(1);
+ result2 = test_types(-1);
+ result3 -= result1 + result2;
+ report(result2);
+#if DEBUG
+ printf("After test_types: 0x%.8lx 0x%.8lx\n", result1, result2);
+#endif
+ result1 = test_array(1);
+ result2 = test_array(-1);
+ result3 -= result1 + result2;
+ report(result2);
+#if DEBUG
+ printf("After test_array: 0x%.8lx 0x%.8lx\n", result1, result2);
+#endif
+
+#ifdef XXX
+#warning xxx
+#endif
+
+ printf("RESULT: %.8lx\n", result3 ^ 0x4bad2569 ^ 0xdeaddead);
+ report(result3 ^ 0x4bad2569 ^ 0xdeaddead);
+
+ exit(0);
+}
cbasic.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: default.ld
===================================================================
--- default.ld (nonexistent)
+++ default.ld (revision 1765)
@@ -0,0 +1,36 @@
+MEMORY
+ {
+ except : ORIGIN = 0x00000000, LENGTH = 0x00002000
+ flash : ORIGIN = 0x00002000, LENGTH = 0x001fe000
+ ram : ORIGIN = 0x40000000, LENGTH = 0x00200000
+ }
+
+SECTIONS
+{
+ .except :
+ {
+ *(.except)
+ _src_beg = .;
+ } > except
+ .text :
+ AT ( ADDR (.except) + SIZEOF (.except) )
+ {
+ _dst_beg = .;
+ *(.text)
+ } > ram
+ .data :
+ AT ( ADDR (.except) + SIZEOF (.except) + SIZEOF (.text))
+ {
+ *(.data)
+ _dst_end = .;
+ } > ram
+ .bss :
+ {
+ *(.bss)
+ } > ram
+ .stack ALIGN(0x10) (NOLOAD):
+ {
+ *(.stack)
+ _ram_end = .;
+ } > ram
+}
default.ld
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: except_mc.ld
===================================================================
--- except_mc.ld (nonexistent)
+++ except_mc.ld (revision 1765)
@@ -0,0 +1,36 @@
+MEMORY
+ {
+ except : ORIGIN = 0x00000000, LENGTH = 0x00002000
+ flash : ORIGIN = 0x00002000, LENGTH = 0x001fe000
+ ram : ORIGIN = 0x40000000, LENGTH = 0x00200000
+ }
+
+SECTIONS
+{
+ .except :
+ {
+ *(.except)
+ _src_beg = .;
+ } > except
+ .text :
+ AT ( ADDR (.except) + SIZEOF (.except) )
+ {
+ _dst_beg = .;
+ *(.text)
+ } > ram
+ .data :
+ AT ( ADDR (.except) + SIZEOF (.except) + SIZEOF (.text))
+ {
+ *(.data)
+ _dst_end = .;
+ } > ram
+ .bss :
+ {
+ *(.bss)
+ } > ram
+ .stack ALIGN(0x10) (NOLOAD):
+ {
+ *(.stack)
+ _ram_end = .;
+ } > ram
+}
Index: README
===================================================================
--- README (nonexistent)
+++ README (revision 1765)
@@ -0,0 +1,28 @@
+This directory includes some test case programs that should be used to verify correct operation
+of the or1ksim, OR32 GCC and OR32 GNU Binutils.
+
+All programs are built and checked by:
+
+./configure --target=or32-rtems
+make all check
+
+You need to have all GNU OR32 tools installed and in the path.
+
+!!! For all test cases, or1ksim should be built with ONLY_VIRTUAL_MACHINE undefined in
+cpu/or1k/except.h !!!
+
+All tests should exit with:
+MTSPR(0x1234, deaddead);
+syscall exit(0)
+
+If the test fails, it should print as much output as possible about the failure.
+
+dhry: Dhrystone 2.1: a benchmark modified to use simulator's timing facility.
+basic: a test for all instructions and all GPRs.
+test1: a test for "all" instructions and their combinations.
+pic: a test for PIC and TICK timer. All three modes of TICK timer are tested and interrupt is enabled and disabled in PIC.
+excpt: a test of l.sys instruction. Checks all the delay slot issues ind other things.
+cfg: a test of SPRs (SPR_VR, SPR_CPUCFGR, SPR_DMMUCFGR, SPR_IMMUCFGR, SPR_DCCFGR, SPR_ICCFGR, SPR_DCFGR, SPR_PCCFGR).
+dma: a test of DMA in normal (software) mode.
+compress: UNIX compressed modified not to use libc calls.
+mul: Test l.mul, l.mac and l.macrc instructions.
Index: dmatest.c
===================================================================
--- dmatest.c (nonexistent)
+++ dmatest.c (revision 1765)
@@ -0,0 +1,173 @@
+/* DMA test */
+
+#include "support.h"
+#include "../peripheral/fields.h"
+#include "../peripheral/dma.h"
+
+#define DMA_BASE 0x90000000LU
+
+typedef volatile unsigned long *DMA_REG;
+
+DMA_REG csr = (unsigned long *)(DMA_BASE + DMA_CSR),
+ int_msk_a = (unsigned long *)(DMA_BASE + DMA_INT_MSK_A),
+ int_msk_b = (unsigned long *)(DMA_BASE + DMA_INT_MSK_B),
+ int_src_a = (unsigned long *)(DMA_BASE + DMA_INT_SRC_A),
+ int_src_b = (unsigned long *)(DMA_BASE + DMA_INT_SRC_B),
+ ch0_csr = (unsigned long *)(DMA_BASE + DMA_CH_BASE + DMA_CH_CSR),
+ ch0_sz = (unsigned long *)(DMA_BASE + DMA_CH_BASE + DMA_CH_SZ),
+ ch0_a0 = (unsigned long *)(DMA_BASE + DMA_CH_BASE + DMA_CH_A0),
+ ch0_am0 = (unsigned long *)(DMA_BASE + DMA_CH_BASE + DMA_CH_AM0),
+ ch0_a1 = (unsigned long *)(DMA_BASE + DMA_CH_BASE + DMA_CH_A1),
+ ch0_am1 = (unsigned long *)(DMA_BASE + DMA_CH_BASE + DMA_CH_AM1),
+ ch0_desc = (unsigned long *)(DMA_BASE + DMA_CH_BASE + DMA_CH_DESC);
+
+struct DMA_DESCRIPTOR
+{
+ unsigned long csr;
+ unsigned long adr0;
+ unsigned long adr1;
+ unsigned long next;
+};
+
+
+/* Test simplest DMA operation */
+int simple( void )
+{
+ int ok;
+ unsigned long src[2], dst[2];
+
+ /* Set transfer Size */
+ *ch0_sz = 0x00000002;
+
+ /* Set addresses */
+ *ch0_a0 = (unsigned long)src;
+ *ch0_a1 = (unsigned long)dst;
+
+ /* Fill source */
+ src[0] = 0x01234567LU;
+ src[1] = 0x89ABCDEFLU;
+
+ /* Now set channel CSR */
+ *ch0_csr = FLAG_MASK( DMA_CH_CSR, CH_EN ) | FLAG_MASK( DMA_CH_CSR, INC_SRC ) | FLAG_MASK( DMA_CH_CSR, INC_DST );
+
+ /* Wait till the channel finishes */
+ while ( TEST_FLAG( *ch0_csr, DMA_CH_CSR, BUSY ) )
+ ;
+
+ /* Dump contents of memory */
+ ok = (dst[0] == src[0] && dst[1] == src[1]);
+ report( ok );
+
+ return ok;
+}
+
+
+/* Test simple transfer with chunks */
+int chunks( void )
+{
+ unsigned i, ok;
+ unsigned long src[6], dst[6];
+
+ /* Set transfer size */
+ *ch0_sz = 6LU | (3LU << DMA_CH_SZ_CHK_SZ_OFFSET);
+
+ /* Set addresses */
+ *ch0_a0 = (unsigned long)src;
+ *ch0_a1 = (unsigned long)dst;
+
+ /* Fill source */
+ for ( i = 0; i < 6; ++ i )
+ src[i] = 0xA63F879CLU + i;
+
+ /* Now set channel CSR */
+ *ch0_csr = FLAG_MASK( DMA_CH_CSR, CH_EN ) | FLAG_MASK( DMA_CH_CSR, INC_SRC ) | FLAG_MASK( DMA_CH_CSR, INC_DST );
+
+ /* Wait till the channel finishes */
+ while ( TEST_FLAG( *ch0_csr, DMA_CH_CSR, BUSY ) )
+ ;
+
+ /* Dump contents of memory */
+ ok = 1;
+ for ( i = 0; i < 6 && ok; ++ i )
+ if ( dst[i] != src[i] )
+ ok = 0;
+ report( i );
+
+ return ok;
+}
+
+/* Test transfer using linked list */
+int list( void )
+{
+ struct DMA_DESCRIPTOR desc[2];
+ unsigned long src[10], dst[10];
+ unsigned i, ok;
+
+ /* Set transfer size for each list element */
+ desc[0].csr = 6;
+ desc[1].csr = 4;
+
+ /* Set chunk size */
+ *ch0_sz = 2UL << DMA_CH_SZ_CHK_SZ_OFFSET;
+
+ /* Set addresses */
+ desc[0].adr0 = (unsigned long)src;
+ desc[0].adr1 = (unsigned long)dst;
+ desc[1].adr0 = (unsigned long)(src + 6);
+ desc[1].adr1 = (unsigned long)(dst + 6);
+
+ /* Fill source */
+ for ( i = 0; i < 10; ++ i )
+ src[i] = 0x110BD540FLU + i;
+
+ /* Set descriptor CSR */
+ desc[0].csr |= FLAG_MASK( DMA_DESC_CSR, INC_SRC ) | FLAG_MASK( DMA_DESC_CSR, INC_DST );
+ desc[1].csr |= FLAG_MASK( DMA_DESC_CSR, EOL ) | FLAG_MASK( DMA_DESC_CSR, INC_SRC ) | FLAG_MASK( DMA_DESC_CSR, INC_DST );
+
+ /* Point channel to descriptor */
+ *ch0_desc = (unsigned)desc;
+
+ /* Link the list */
+ desc[0].next = (unsigned)&(desc[1]);
+ desc[1].next = 0xDEADDEADUL;
+
+ /* Set channel CSR */
+ *ch0_csr = FLAG_MASK( DMA_CH_CSR, CH_EN ) | FLAG_MASK( DMA_CH_CSR, USE_ED );
+
+ /* Wait till the channel finishes */
+ while ( TEST_FLAG( *ch0_csr, DMA_CH_CSR, BUSY ) )
+ ;
+
+ ok = TEST_FLAG( *ch0_csr, DMA_CH_CSR, DONE );
+
+ /* Dump contents of memory */
+ for ( i = 0; i < 10 && ok; ++ i )
+ if ( dst[i] != src[i] )
+ ok = 0;
+ report( i );
+
+ return ok;
+}
+
+
+int main()
+{
+ int pass_simple, pass_chunks, pass_list;
+ printf( "Starting DMA test\n" );
+
+ printf( " Simple DMA: " );
+ printf( (pass_simple = simple()) ? "Passed\n" : "Failed\n" );
+ printf( " Chunks DMA: " );
+ printf( (pass_chunks = chunks()) ? "Passed\n" : "Failed\n" );
+ printf( " List DMA: " );
+ printf( (pass_list = list()) ? "Passed\n" : "Failed\n" );
+
+ printf( "Ending DMA test\n" );
+ if (pass_simple && pass_chunks && pass_list) {
+ report (0xdeaddead);
+ return 0;
+ } else
+ return 3 - pass_simple - pass_chunks - pass_list;
+}
+
+
Index: local_global.c
===================================================================
--- local_global.c (nonexistent)
+++ local_global.c (revision 1765)
@@ -0,0 +1,18 @@
+/* Test local and global variables */
+#include "support.h"
+
+int global = 5;
+
+int func (unsigned long a, char b) {
+ global = 2;
+ a = 3 + a;
+ b = 4 + b;
+ return a + b;
+}
+
+int main () {
+ int local = 7;
+ global += func (local, 14);
+ report (global ^ 0xdeaddead ^ 30);
+ return 0;
+}
local_global.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: aclocal.m4
===================================================================
--- aclocal.m4 (nonexistent)
+++ aclocal.m4 (revision 1765)
@@ -0,0 +1,117 @@
+dnl aclocal.m4 generated automatically by aclocal 1.4
+
+dnl Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
+dnl This file is free software; the Free Software Foundation
+dnl gives unlimited permission to copy and/or distribute it,
+dnl with or without modifications, as long as this notice is preserved.
+
+dnl This program is distributed in the hope that it will be useful,
+dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+dnl PARTICULAR PURPOSE.
+
+# Do all the work for Automake. This macro actually does too much --
+# some checks are only needed if your package does certain things.
+# But this isn't really a big deal.
+
+# serial 1
+
+dnl Usage:
+dnl AM_INIT_AUTOMAKE(package,version, [no-define])
+
+AC_DEFUN(AM_INIT_AUTOMAKE,
+[AC_REQUIRE([AC_PROG_INSTALL])
+PACKAGE=[$1]
+AC_SUBST(PACKAGE)
+VERSION=[$2]
+AC_SUBST(VERSION)
+dnl test to see if srcdir already configured
+if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then
+ AC_MSG_ERROR([source directory already configured; run "make distclean" there first])
+fi
+ifelse([$3],,
+AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", [Name of package])
+AC_DEFINE_UNQUOTED(VERSION, "$VERSION", [Version number of package]))
+AC_REQUIRE([AM_SANITY_CHECK])
+AC_REQUIRE([AC_ARG_PROGRAM])
+dnl FIXME This is truly gross.
+missing_dir=`cd $ac_aux_dir && pwd`
+AM_MISSING_PROG(ACLOCAL, aclocal, $missing_dir)
+AM_MISSING_PROG(AUTOCONF, autoconf, $missing_dir)
+AM_MISSING_PROG(AUTOMAKE, automake, $missing_dir)
+AM_MISSING_PROG(AUTOHEADER, autoheader, $missing_dir)
+AM_MISSING_PROG(MAKEINFO, makeinfo, $missing_dir)
+AC_REQUIRE([AC_PROG_MAKE_SET])])
+
+#
+# Check to make sure that the build environment is sane.
+#
+
+AC_DEFUN(AM_SANITY_CHECK,
+[AC_MSG_CHECKING([whether build environment is sane])
+# Just in case
+sleep 1
+echo timestamp > conftestfile
+# Do `set' in a subshell so we don't clobber the current shell's
+# arguments. Must try -L first in case configure is actually a
+# symlink; some systems play weird games with the mod time of symlinks
+# (eg FreeBSD returns the mod time of the symlink's containing
+# directory).
+if (
+ set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null`
+ if test "[$]*" = "X"; then
+ # -L didn't work.
+ set X `ls -t $srcdir/configure conftestfile`
+ fi
+ if test "[$]*" != "X $srcdir/configure conftestfile" \
+ && test "[$]*" != "X conftestfile $srcdir/configure"; then
+
+ # If neither matched, then we have a broken ls. This can happen
+ # if, for instance, CONFIG_SHELL is bash and it inherits a
+ # broken ls alias from the environment. This has actually
+ # happened. Such a system could not be considered "sane".
+ AC_MSG_ERROR([ls -t appears to fail. Make sure there is not a broken
+alias in your environment])
+ fi
+
+ test "[$]2" = conftestfile
+ )
+then
+ # Ok.
+ :
+else
+ AC_MSG_ERROR([newly created file is older than distributed files!
+Check your system clock])
+fi
+rm -f conftest*
+AC_MSG_RESULT(yes)])
+
+dnl AM_MISSING_PROG(NAME, PROGRAM, DIRECTORY)
+dnl The program must properly implement --version.
+AC_DEFUN(AM_MISSING_PROG,
+[AC_MSG_CHECKING(for working $2)
+# Run test in a subshell; some versions of sh will print an error if
+# an executable is not found, even if stderr is redirected.
+# Redirect stdin to placate older versions of autoconf. Sigh.
+if ($2 --version) < /dev/null > /dev/null 2>&1; then
+ $1=$2
+ AC_MSG_RESULT(found)
+else
+ $1="$3/missing $2"
+ AC_MSG_RESULT(missing)
+fi
+AC_SUBST($1)])
+
+# Define a conditional.
+
+AC_DEFUN(AM_CONDITIONAL,
+[AC_SUBST($1_TRUE)
+AC_SUBST($1_FALSE)
+if $2; then
+ $1_TRUE=
+ $1_FALSE='#'
+else
+ $1_TRUE='#'
+ $1_FALSE=
+fi])
+
aclocal.m4
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: mycompress.c
===================================================================
--- mycompress.c (nonexistent)
+++ mycompress.c (revision 1765)
@@ -0,0 +1,734 @@
+#include
+#include "support.h"
+
+#define BYTES_TO_COMPRESS 1000
+
+/*
+ * Compress - data compression program
+ */
+#define min(a,b) ((a>b) ? b : a)
+
+/*
+ * machine variants which require cc -Dmachine: pdp11, z8000, pcxt
+ */
+
+/*
+ * Set USERMEM to the maximum amount of physical user memory available
+ * in bytes. USERMEM is used to determine the maximum BITS that can be used
+ * for compression.
+ *
+ * SACREDMEM is the amount of physical memory saved for others; compress
+ * will hog the rest.
+ */
+#ifndef SACREDMEM
+#define SACREDMEM 0
+#endif
+
+/* #ifndef USERMEM */
+#define USERMEM 60000 /* default user memory */
+/* #endif */
+
+#ifdef interdata /* (Perkin-Elmer) */
+#define SIGNED_COMPARE_SLOW /* signed compare is slower than unsigned */
+#endif
+
+#ifdef USERMEM
+# if USERMEM >= (433484+SACREDMEM)
+# define PBITS 16
+# else
+# if USERMEM >= (229600+SACREDMEM)
+# define PBITS 15
+# else
+# if USERMEM >= (127536+SACREDMEM)
+# define PBITS 14
+# else
+# if USERMEM >= (73464+SACREDMEM)
+# define PBITS 13
+# else
+# define PBITS 12
+# endif
+# endif
+# endif
+# endif
+# undef USERMEM
+#endif /* USERMEM */
+
+#ifdef PBITS /* Preferred BITS for this memory size */
+# ifndef BITS
+# define BITS PBITS
+# endif /* BITS */
+#endif /* PBITS */
+
+#if BITS == 16
+# define HSIZE 69001 /* 95% occupancy */
+#endif
+#if BITS == 15
+# define HSIZE 35023 /* 94% occupancy */
+#endif
+#if BITS == 14
+# define HSIZE 18013 /* 91% occupancy */
+#endif
+#if BITS == 13
+# define HSIZE 9001 /* 91% occupancy */
+#endif
+#if BITS <= 12
+# define HSIZE 5003 /* 80% occupancy */
+#endif
+
+/*
+ * a code_int must be able to hold 2**BITS values of type int, and also -1
+ */
+#if BITS > 15
+typedef long int code_int;
+#else
+typedef int code_int;
+#endif
+
+#ifdef SIGNED_COMPARE_SLOW
+typedef unsigned long int count_int;
+typedef unsigned short int count_short;
+#else
+typedef long int count_int;
+#endif
+
+#ifdef NO_UCHAR
+ typedef char char_type;
+#else
+ typedef unsigned char char_type;
+#endif /* UCHAR */
+char_type magic_header[] = { "\037\235" }; /* 1F 9D */
+
+/* Defines for third byte of header */
+#define BIT_MASK 0x1f
+#define BLOCK_MASK 0x80
+/* Masks 0x40 and 0x20 are free. I think 0x20 should mean that there is
+ a fourth header byte (for expansion).
+*/
+#define INIT_BITS 9 /* initial number of bits/code */
+
+/*
+ * compress.c - File compression ala IEEE Computer, June 1984.
+ *
+ * Authors: Spencer W. Thomas (decvax!harpo!utah-cs!utah-gr!thomas)
+ * Jim McKie (decvax!mcvax!jim)
+ * Steve Davies (decvax!vax135!petsd!peora!srd)
+ * Ken Turkowski (decvax!decwrl!turtlevax!ken)
+ * James A. Woods (decvax!ihnp4!ames!jaw)
+ * Joe Orost (decvax!vax135!petsd!joe)
+ *
+ */
+
+#if i386
+#include
+#include
+#include
+#include
+#include
+#include
+#endif
+
+#define ARGVAL() (*++(*argv) || (--argc && *++argv))
+
+int n_bits; /* number of bits/code */
+int maxbits = BITS; /* user settable max # bits/code */
+code_int maxcode; /* maximum code, given n_bits */
+code_int maxmaxcode = 1L << BITS; /* should NEVER generate this code */
+#ifdef COMPATIBLE /* But wrong! */
+# define MAXCODE(n_bits) (1L << (n_bits) - 1)
+#else
+# define MAXCODE(n_bits) ((1L << (n_bits)) - 1)
+#endif /* COMPATIBLE */
+
+# ifdef sel
+/* support gould base register problems */
+/*NOBASE*/
+count_int htab [HSIZE];
+unsigned short codetab [HSIZE];
+/*NOBASE*/
+# else /* !gould */
+count_int htab [HSIZE];
+unsigned short codetab [HSIZE];
+# endif /* !gould */
+#define htabof(i) htab[i]
+#define codetabof(i) codetab[i]
+code_int hsize = HSIZE; /* for dynamic table sizing */
+count_int fsize;
+
+/*
+ * To save much memory, we overlay the table used by compress() with those
+ * used by decompress(). The tab_prefix table is the same size and type
+ * as the codetab. The tab_suffix table needs 2**BITS characters. We
+ * get this from the beginning of htab. The output stack uses the rest
+ * of htab, and contains characters. There is plenty of room for any
+ * possible stack (stack used to be 8000 characters).
+ */
+
+#define tab_prefixof(i) codetabof(i)
+#ifdef XENIX_16
+# define tab_suffixof(i) ((char_type *)htab[(i)>>15])[(i) & 0x7fff]
+# define de_stack ((char_type *)(htab2))
+#else /* Normal machine */
+# define tab_suffixof(i) ((char_type *)(htab))[i]
+# define de_stack ((char_type *)&tab_suffixof(1< 0 )
+ goto probe;
+nomatch:
+ output ( (code_int) ent );
+ out_count++;
+ ent = c;
+#ifdef SIGNED_COMPARE_SLOW
+ if ( (unsigned) free_ent < (unsigned) maxmaxcode) {
+#else
+ if ( free_ent < maxmaxcode ) {
+#endif
+ codetabof (i) = free_ent++; /* code -> hashtable */
+ htabof (i) = fcode;
+ }
+ else if ( (count_int)in_count >= checkpoint && block_compress )
+ cl_block ();
+ }
+ /*
+ * Put out the final code.
+ */
+ printf("main: output...\n");
+ output( (code_int)ent );
+ out_count++;
+ output( (code_int)-1 );
+
+ if(bytes_out > in_count) /* exit(2) if no savings */
+ exit_stat = 2;
+ printf("main: end...\n");
+ report (0xdeaddead);
+ return 0;
+}
+
+/*****************************************************************
+ * TAG( output )
+ *
+ * Output the given code.
+ * Inputs:
+ * code: A n_bits-bit integer. If == -1, then EOF. This assumes
+ * that n_bits =< (long)wordsize - 1.
+ * Outputs:
+ * Outputs code to the file.
+ * Assumptions:
+ * Chars are 8 bits long.
+ * Algorithm:
+ * Maintain a BITS character long buffer (so that 8 codes will
+ * fit in it exactly). Use the VAX insv instruction to insert each
+ * code in turn. When the buffer fills up empty it and start over.
+ */
+
+static char buf[BITS];
+
+#ifndef vax
+char_type lmask[9] = {0xff, 0xfe, 0xfc, 0xf8, 0xf0, 0xe0, 0xc0, 0x80, 0x00};
+char_type rmask[9] = {0x00, 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff};
+#endif /* vax */
+
+void output( code )
+code_int code;
+{
+
+ /*
+ * On the VAX, it is important to have the register declarations
+ * in exactly the order given, or the asm will break.
+ */
+ register int r_off = offset, bits= n_bits;
+ register char * bp = buf;
+
+ if ( code >= 0 ) {
+#ifdef vax
+ /* VAX DEPENDENT!! Implementation on other machines is below.
+ *
+ * Translation: Insert BITS bits from the argument starting at
+ * offset bits from the beginning of buf.
+ */
+ 0; /* Work around for pcc -O bug with asm and if stmt */
+ asm( "insv 4(ap),r11,r10,(r9)" );
+#else /* not a vax */
+/*
+ * byte/bit numbering on the VAX is simulated by the following code
+ */
+ /*
+ * Get to the first byte.
+ */
+ bp += (r_off >> 3);
+ r_off &= 7;
+ /*
+ * Since code is always >= 8 bits, only need to mask the first
+ * hunk on the left.
+ */
+ *bp = (*bp & rmask[r_off]) | ((code << r_off) & lmask[r_off]);
+ bp++;
+ bits -= (8 - r_off);
+ code >>= 8 - r_off;
+ /* Get any 8 bit parts in the middle (<=1 for up to 16 bits). */
+ if ( bits >= 8 ) {
+ *bp++ = code;
+ code >>= 8;
+ bits -= 8;
+ }
+ /* Last bits. */
+ if(bits)
+ *bp = code;
+#endif /* vax */
+ offset += n_bits;
+ if ( offset == (n_bits << 3) ) {
+ bp = buf;
+ bits = n_bits;
+ bytes_out += bits;
+ /* do
+ putchar(*bp++); */
+ while(--bits);
+ offset = 0;
+ }
+
+ /*
+ * If the next entry is going to be too big for the code size,
+ * then increase it, if possible.
+ */
+ if ( free_ent > maxcode || (clear_flg > 0))
+ {
+ /*
+ * Write the whole buffer, because the input side won't
+ * discover the size increase until after it has read it.
+ */
+ if ( offset > 0 ) {
+ /* if( fwrite( buf, 1, n_bits, stdout ) != n_bits)
+ writeerr(); */
+ bytes_out += n_bits;
+ }
+ offset = 0;
+
+ if ( clear_flg ) {
+ maxcode = MAXCODE (n_bits = INIT_BITS);
+ clear_flg = 0;
+ }
+ else {
+ n_bits++;
+ if ( n_bits == maxbits )
+ maxcode = maxmaxcode;
+ else
+ maxcode = MAXCODE(n_bits);
+ }
+ }
+ } else {
+ /*
+ * At EOF, write the rest of the buffer.
+ */
+ /* if ( offset > 0 )
+ fwrite( buf, 1, (offset + 7) / 8, stdout ); */
+ bytes_out += (offset + 7) / 8;
+ offset = 0;
+ /* fflush( stdout ); */
+ /* if( ferror( stdout ) )
+ writeerr(); */
+ }
+}
+
+/*
+ * Decompress stdin to stdout. This routine adapts to the codes in the
+ * file building the "string" table on-the-fly; requiring no table to
+ * be stored in the compressed file. The tables used herein are shared
+ * with those of the compress() routine. See the definitions above.
+ */
+
+void decompress() {
+ register char_type *stackp;
+ register int finchar;
+ register code_int code, oldcode, incode;
+
+ /*
+ * As above, initialize the first 256 entries in the table.
+ */
+ maxcode = MAXCODE(n_bits = INIT_BITS);
+ for ( code = 255; code >= 0; code-- ) {
+ tab_prefixof(code) = 0;
+ tab_suffixof(code) = (char_type)code;
+ }
+ free_ent = ((block_compress) ? FIRST : 256 );
+
+ finchar = oldcode = getcode();
+ if(oldcode == -1) /* EOF already? */
+ return; /* Get out of here */
+ /* putchar( (char)finchar ); */ /* first code must be 8 bits = char */
+ /* if(ferror(stdout))
+ writeerr(); */
+ stackp = de_stack;
+
+ while ( (code = getcode()) > -1 ) {
+
+ if ( (code == CLEAR) && block_compress ) {
+ for ( code = 255; code >= 0; code-- )
+ tab_prefixof(code) = 0;
+ clear_flg = 1;
+ free_ent = FIRST - 1;
+ if ( (code = getcode ()) == -1 ) /* O, untimely death! */
+ break;
+ }
+ incode = code;
+ /*
+ * Special case for KwKwK string.
+ */
+ if ( code >= free_ent ) {
+ *stackp++ = finchar;
+ code = oldcode;
+ }
+
+ /*
+ * Generate output characters in reverse order
+ */
+#ifdef SIGNED_COMPARE_SLOW
+ while ( ((unsigned long)code) >= ((unsigned long)256) ) {
+#else
+ while ( code >= 256 ) {
+#endif
+ *stackp++ = tab_suffixof(code);
+ code = tab_prefixof(code);
+ }
+ *stackp++ = finchar = tab_suffixof(code);
+
+ /*
+ * And put them out in forward order
+ */
+ /* do
+ putchar ( *--stackp );
+ while ( stackp > de_stack );*/
+
+ /*
+ * Generate the new entry.
+ */
+ if ( (code=free_ent) < maxmaxcode ) {
+ tab_prefixof(code) = (unsigned short)oldcode;
+ tab_suffixof(code) = finchar;
+ free_ent = code+1;
+ }
+ /*
+ * Remember previous code.
+ */
+ oldcode = incode;
+ }
+ /* fflush( stdout ); */
+ /* if(ferror(stdout))
+ writeerr(); */
+}
+
+/*****************************************************************
+ * TAG( getcode )
+ *
+ * Read one code from the standard input. If EOF, return -1.
+ * Inputs:
+ * stdin
+ * Outputs:
+ * code or -1 is returned.
+ */
+
+code_int
+getcode() {
+ /*
+ * On the VAX, it is important to have the register declarations
+ * in exactly the order given, or the asm will break.
+ */
+ register code_int code;
+ static int offset = 0, size = 0;
+ static char_type buf[BITS];
+ register int r_off, bits;
+ register char_type *bp = buf;
+
+ if ( clear_flg > 0 || offset >= size || free_ent > maxcode ) {
+ /*
+ * If the next entry will be too big for the current code
+ * size, then we must increase the size. This implies reading
+ * a new buffer full, too.
+ */
+ if ( free_ent > maxcode ) {
+ n_bits++;
+ if ( n_bits == maxbits )
+ maxcode = maxmaxcode; /* won't get any bigger now */
+ else
+ maxcode = MAXCODE(n_bits);
+ }
+ if ( clear_flg > 0) {
+ maxcode = MAXCODE (n_bits = INIT_BITS);
+ clear_flg = 0;
+ }
+ /* size = fread( buf, 1, n_bits, stdin ); */
+ if ( size <= 0 )
+ return -1; /* end of file */
+ offset = 0;
+ /* Round size down to integral number of codes */
+ size = (size << 3) - (n_bits - 1);
+ }
+ r_off = offset;
+ bits = n_bits;
+#ifdef vax
+ asm( "extzv r10,r9,(r8),r11" );
+#else /* not a vax */
+ /*
+ * Get to the first byte.
+ */
+ bp += (r_off >> 3);
+ r_off &= 7;
+ /* Get first part (low order bits) */
+#ifdef NO_UCHAR
+ code = ((*bp++ >> r_off) & rmask[8 - r_off]) & 0xff;
+#else
+ code = (*bp++ >> r_off);
+#endif /* NO_UCHAR */
+ bits -= (8 - r_off);
+ r_off = 8 - r_off; /* now, offset into code word */
+ /* Get any 8 bit parts in the middle (<=1 for up to 16 bits). */
+ if ( bits >= 8 ) {
+#ifdef NO_UCHAR
+ code |= (*bp++ & 0xff) << r_off;
+#else
+ code |= *bp++ << r_off;
+#endif /* NO_UCHAR */
+ r_off += 8;
+ bits -= 8;
+ }
+ /* high order bits. */
+ code |= (*bp & rmask[bits]) << r_off;
+#endif /* vax */
+ offset += n_bits;
+
+ return code;
+}
+
+char *
+rindex(s, c) /* For those who don't have it in libc.a */
+register char *s, c;
+{
+ char *p;
+ for (p = NULL; *s; s++)
+ if (*s == c)
+ p = s;
+ return(p);
+}
+
+/*
+writeerr()
+{
+ perror ( ofname );
+ unlink ( ofname );
+ exit ( 1 );
+}
+*/
+void cl_block () /* table clear for block compress */
+{
+ register long int rat;
+
+ checkpoint = in_count + CHECK_GAP;
+
+ if(in_count > 0x007fffff) { /* shift will overflow */
+ rat = bytes_out >> 8;
+ if(rat == 0) { /* Don't divide by zero */
+ rat = 0x7fffffff;
+ } else {
+ rat = in_count / rat;
+ }
+ } else {
+ rat = (in_count << 8) / bytes_out; /* 8 fractional bits */
+ }
+ if ( rat > ratio ) {
+ ratio = rat;
+ } else {
+ ratio = 0;
+ cl_hash ( (count_int) hsize );
+ free_ent = FIRST;
+ clear_flg = 1;
+ output ( (code_int) CLEAR );
+ }
+}
+
+void cl_hash(hsize) /* reset code table */
+ register count_int hsize;
+{
+#ifndef XENIX_16 /* Normal machine */
+ register count_int *htab_p = htab+hsize;
+#else
+ register j;
+ register long k = hsize;
+ register count_int *htab_p;
+#endif
+ register long i;
+ register long m1 = -1;
+
+#ifdef XENIX_16
+ for(j=0; j<=8 && k>=0; j++,k-=8192) {
+ i = 8192;
+ if(k < 8192) {
+ i = k;
+ }
+ htab_p = &(htab[j][i]);
+ i -= 16;
+ if(i > 0) {
+#else
+ i = hsize - 16;
+#endif
+ do { /* might use Sys V memset(3) here */
+ *(htab_p-16) = m1;
+ *(htab_p-15) = m1;
+ *(htab_p-14) = m1;
+ *(htab_p-13) = m1;
+ *(htab_p-12) = m1;
+ *(htab_p-11) = m1;
+ *(htab_p-10) = m1;
+ *(htab_p-9) = m1;
+ *(htab_p-8) = m1;
+ *(htab_p-7) = m1;
+ *(htab_p-6) = m1;
+ *(htab_p-5) = m1;
+ *(htab_p-4) = m1;
+ *(htab_p-3) = m1;
+ *(htab_p-2) = m1;
+ *(htab_p-1) = m1;
+ htab_p -= 16;
+ } while ((i -= 16) >= 0);
+#ifdef XENIX_16
+ }
+ }
+#endif
+ for ( i += 16; i > 0; i-- )
+ *--htab_p = m1;
+}
+
mycompress.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: exit.c
===================================================================
--- exit.c (nonexistent)
+++ exit.c (revision 1765)
@@ -0,0 +1,9 @@
+/* This test covers basic functionality, to show that framework works. */
+
+#include "support.h"
+
+int main ()
+{
+ report (0xdeaddead);
+ return 0;
+}
exit.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: dhry.h
===================================================================
--- dhry.h (nonexistent)
+++ dhry.h (revision 1765)
@@ -0,0 +1,412 @@
+/*
+ ****************************************************************************
+ *
+ * "DHRYSTONE" Benchmark Program
+ * -----------------------------
+ *
+ * Version: C, Version 2.1
+ *
+ * File: dhry.h (part 1 of 3)
+ *
+ * Date: May 25, 1988
+ *
+ * Author: Reinhold P. Weicker
+ * Siemens AG, AUT E 51
+ * Postfach 3220
+ * 8520 Erlangen
+ * Germany (West)
+ * Phone: [+49]-9131-7-20330
+ * (8-17 Central European Time)
+ * Usenet: ..!mcsun!unido!estevax!weicker
+ *
+ * Original Version (in Ada) published in
+ * "Communications of the ACM" vol. 27., no. 10 (Oct. 1984),
+ * pp. 1013 - 1030, together with the statistics
+ * on which the distribution of statements etc. is based.
+ *
+ * In this C version, the following C library functions are used:
+ * - strcpy, strcmp (inside the measurement loop)
+ * - printf, scanf (outside the measurement loop)
+ * In addition, Berkeley UNIX system calls "times ()" or "time ()"
+ * are used for execution time measurement. For measurements
+ * on other systems, these calls have to be changed.
+ *
+ * Updated January, 1997 Rick Cramer, Galileo(R) to work with
+ * the i960jx and Galileo-5 Reference Design.
+ *
+ *
+ * Collection of Results:
+ * Reinhold Weicker (address see above) and
+ *
+ * Rick Richardson
+ * PC Research. Inc.
+ * 94 Apple Orchard Drive
+ * Tinton Falls, NJ 07724
+ * Phone: (201) 389-8963 (9-17 EST)
+ * Usenet: ...!uunet!pcrat!rick
+ *
+ * Please send results to Rick Richardson and/or Reinhold Weicker.
+ * Complete information should be given on hardware and software used.
+ * Hardware information includes: Machine type, CPU, type and size
+ * of caches; for microprocessors: clock frequency, memory speed
+ * (number of wait states).
+ * Software information includes: Compiler (and runtime library)
+ * manufacturer and version, compilation switches, OS version.
+ * The Operating System version may give an indication about the
+ * compiler; Dhrystone itself performs no OS calls in the measurement loop.
+ *
+ * The complete output generated by the program should be mailed
+ * such that at least some checks for correctness can be made.
+ *
+ ***************************************************************************
+ *
+ * History: This version C/2.1 has been made for two reasons:
+ *
+ * 1) There is an obvious need for a common C version of
+ * Dhrystone, since C is at present the most popular system
+ * programming language for the class of processors
+ * (microcomputers, minicomputers) where Dhrystone is used most.
+ * There should be, as far as possible, only one C version of
+ * Dhrystone such that results can be compared without
+ * restrictions. In the past, the C versions distributed
+ * by Rick Richardson (Version 1.1) and by Reinhold Weicker
+ * had small (though not significant) differences.
+ *
+ * 2) As far as it is possible without changes to the Dhrystone
+ * statistics, optimizing compilers should be prevented from
+ * removing significant statements.
+ *
+ * This C version has been developed in cooperation with
+ * Rick Richardson (Tinton Falls, NJ), it incorporates many
+ * ideas from the "Version 1.1" distributed previously by
+ * him over the UNIX network Usenet.
+ * I also thank Chaim Benedelac (National Semiconductor),
+ * David Ditzel (SUN), Earl Killian and John Mashey (MIPS),
+ * Alan Smith and Rafael Saavedra-Barrera (UC at Berkeley)
+ * for their help with comments on earlier versions of the
+ * benchmark.
+ *
+ * Changes: In the initialization part, this version follows mostly
+ * Rick Richardson's version distributed via Usenet, not the
+ * version distributed earlier via floppy disk by Reinhold Weicker.
+ * As a concession to older compilers, names have been made
+ * unique within the first 8 characters.
+ * Inside the measurement loop, this version follows the
+ * version previously distributed by Reinhold Weicker.
+ *
+ * At several places in the benchmark, code has been added,
+ * but within the measurement loop only in branches that
+ * are not executed. The intention is that optimizing compilers
+ * should be prevented from moving code out of the measurement
+ * loop, or from removing code altogether. Since the statements
+ * that are executed within the measurement loop have NOT been
+ * changed, the numbers defining the "Dhrystone distribution"
+ * (distribution of statements, operand types and locality)
+ * still hold. Except for sophisticated optimizing compilers,
+ * execution times for this version should be the same as
+ * for previous versions.
+ *
+ * Since it has proven difficult to subtract the time for the
+ * measurement loop overhead in a correct way, the loop check
+ * has been made a part of the benchmark. This does have
+ * an impact - though a very minor one - on the distribution
+ * statistics which have been updated for this version.
+ *
+ * All changes within the measurement loop are described
+ * and discussed in the companion paper "Rationale for
+ * Dhrystone version 2".
+ *
+ * Because of the self-imposed limitation that the order and
+ * distribution of the executed statements should not be
+ * changed, there are still cases where optimizing compilers
+ * may not generate code for some statements. To a certain
+ * degree, this is unavoidable for small synthetic benchmarks.
+ * Users of the benchmark are advised to check code listings
+ * whether code is generated for all statements of Dhrystone.
+ *
+ * Version 2.1 is identical to version 2.0 distributed via
+ * the UNIX network Usenet in March 1988 except that it corrects
+ * some minor deficiencies that were found by users of version 2.0.
+ * The only change within the measurement loop is that a
+ * non-executed "else" part was added to the "if" statement in
+ * Func_3, and a non-executed "else" part removed from Proc_3.
+ *
+ ***************************************************************************
+ *
+ * Defines: The following "Defines" are possible:
+ * -DREG=register (default: Not defined)
+ * As an approximation to what an average C programmer
+ * might do, the "register" storage class is applied
+ * (if enabled by -DREG=register)
+ * - for local variables, if they are used (dynamically)
+ * five or more times
+ * - for parameters if they are used (dynamically)
+ * six or more times
+ * Note that an optimal "register" strategy is
+ * compiler-dependent, and that "register" declarations
+ * do not necessarily lead to faster execution.
+ * -DNOSTRUCTASSIGN (default: Not defined)
+ * Define if the C compiler does not support
+ * assignment of structures.
+ * -DNOENUMS (default: Not defined)
+ * Define if the C compiler does not support
+ * enumeration types.
+ * -DICACHEON (default: Not defined)
+ * Adjust performace by conditionally compiling
+ * these i960jx CACHE paramaters.
+ * -DICACHEOFF
+ * -DDCACHEON (default: Not defined)
+ * -DDCACHEOFF
+ *
+ * NOTE: Galileo-5 Board Frequency is set to 33Mhz in the
+ * file jx-timer.c. If the operating frequency is
+ * changed by replacing the crystal, then this #define
+ * must also be changed.
+ *
+ ***************************************************************************
+ *
+ * Compilation model and measurement (IMPORTANT):
+ *
+ * This C version of Dhrystone consists of four files:
+ * - dhry.h (this file, containing global definitions and comments)
+ * - dhry_1.c (containing the code corresponding to Ada package Pack_1)
+ * - dhry_2.c (containing the code corresponding to Ada package Pack_2)
+ * - jx-timer.c (containing the code to access the i960jx timer)
+ *
+ * The following "ground rules" apply for measurements:
+ * - No procedure merging
+ * - Otherwise, compiler optimizations are allowed but should be indicated
+ * - Default results are those without register declarations
+ * See the companion paper "Rationale for Dhrystone Version 2" for a more
+ * detailed discussion of these ground rules.
+ *
+ * For 16-Bit processors (e.g. 80186, 80286), times for all compilation
+ * models ("small", "medium", "large" etc.) should be given if possible,
+ * together with a definition of these models for the compiler system used.
+ *
+ * Example Intel 960jx compile syntax for Galileo-5.
+ *
+ * ic960 -AJA -Tgal5 -O2 -DREG=register dhry_1.c dhry_2.c jx-timer.c
+ *
+ **************************************************************************
+ *
+ * Dhrystone (C version) statistics:
+ *
+ * [Comment from the first distribution, updated for version 2.
+ * Note that because of language differences, the numbers are slightly
+ * different from the Ada version.]
+ *
+ * The following program contains statements of a high level programming
+ * language (here: C) in a distribution considered representative:
+ *
+ * assignments 52 (51.0 %)
+ * control statements 33 (32.4 %)
+ * procedure, function calls 17 (16.7 %)
+ *
+ * 103 statements are dynamically executed. The program is balanced with
+ * respect to the three aspects:
+ *
+ * - statement type
+ * - operand type
+ * - operand locality
+ * operand global, local, parameter, or constant.
+ *
+ * The combination of these three aspects is balanced only approximately.
+ *
+ * 1. Statement Type:
+ * ----------------- number
+ *
+ * V1 = V2 9
+ * (incl. V1 = F(..)
+ * V = Constant 12
+ * Assignment, 7
+ * with array element
+ * Assignment, 6
+ * with record component
+ * --
+ * 34 34
+ *
+ * X = Y +|-|"&&"|"|" Z 5
+ * X = Y +|-|"==" Constant 6
+ * X = X +|- 1 3
+ * X = Y *|/ Z 2
+ * X = Expression, 1
+ * two operators
+ * X = Expression, 1
+ * three operators
+ * --
+ * 18 18
+ *
+ * if .... 14
+ * with "else" 7
+ * without "else" 7
+ * executed 3
+ * not executed 4
+ * for ... 7 | counted every time
+ * while ... 4 | the loop condition
+ * do ... while 1 | is evaluated
+ * switch ... 1
+ * break 1
+ * declaration with 1
+ * initialization
+ * --
+ * 34 34
+ *
+ * P (...) procedure call 11
+ * user procedure 10
+ * library procedure 1
+ * X = F (...)
+ * function call 6
+ * user function 5
+ * library function 1
+ * --
+ * 17 17
+ * ---
+ * 103
+ *
+ * The average number of parameters in procedure or function calls
+ * is 1.82 (not counting the function values as implicit parameters).
+ *
+ *
+ * 2. Operators
+ * ------------
+ * number approximate
+ * percentage
+ *
+ * Arithmetic 32 50.8
+ *
+ * + 21 33.3
+ * - 7 11.1
+ * * 3 4.8
+ * / (int div) 1 1.6
+ *
+ * Comparison 27 42.8
+ *
+ * == 9 14.3
+ * /= 4 6.3
+ * > 1 1.6
+ * < 3 4.8
+ * >= 1 1.6
+ * <= 9 14.3
+ *
+ * Logic 4 6.3
+ *
+ * && (AND-THEN) 1 1.6
+ * | (OR) 1 1.6
+ * ! (NOT) 2 3.2
+ *
+ * -- -----
+ * 63 100.1
+ *
+ *
+ * 3. Operand Type (counted once per operand reference):
+ * ---------------
+ * number approximate
+ * percentage
+ *
+ * Integer 175 72.3 %
+ * Character 45 18.6 %
+ * Pointer 12 5.0 %
+ * String30 6 2.5 %
+ * Array 2 0.8 %
+ * Record 2 0.8 %
+ * --- -------
+ * 242 100.0 %
+ *
+ * When there is an access path leading to the final operand (e.g. a record
+ * component), only the final data type on the access path is counted.
+ *
+ *
+ * 4. Operand Locality:
+ * -------------------
+ * number approximate
+ * percentage
+ *
+ * local variable 114 47.1 %
+ * global variable 22 9.1 %
+ * parameter 45 18.6 %
+ * value 23 9.5 %
+ * reference 22 9.1 %
+ * function result 6 2.5 %
+ * constant 55 22.7 %
+ * --- -------
+ * 242 100.0 %
+ *
+ *
+ * The program does not compute anything meaningful, but it is syntactically
+ * and semantically correct. All variables have a value assigned to them
+ * before they are used as a source operand.
+ *
+ * There has been no explicit effort to account for the effects of a
+ * cache, or to balance the use of long or short displacements for code or
+ * data.
+ *
+ ***************************************************************************
+ */
+
+/* Compiler and system dependent definitions: */
+
+
+#define Mic_secs_Per_Second 1000000.0
+ /* Berkeley UNIX C returns process times in seconds/HZ */
+
+#ifdef NOSTRUCTASSIGN
+#define structassign(d, s) memcpy(&(d), &(s), sizeof(d))
+#else
+#define structassign(d, s) d = s
+#endif
+
+#ifdef NOENUM
+#define Ident_1 0
+#define Ident_2 1
+#define Ident_3 2
+#define Ident_4 3
+#define Ident_5 4
+ typedef int Enumeration;
+#else
+ typedef enum {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5}
+ Enumeration;
+#endif
+ /* for boolean and enumeration types in Ada, Pascal */
+
+/* General definitions: */
+
+/* #include
+ */
+ /* for strcpy, strcmp */
+
+#define Null 0
+ /* Value of a Null pointer */
+#define true 1
+#define false 0
+
+typedef int One_Thirty;
+typedef int One_Fifty;
+typedef char Capital_Letter;
+typedef int Boolean;
+typedef char Str_30 [31];
+typedef int Arr_1_Dim [50];
+typedef int Arr_2_Dim [50] [50];
+
+typedef struct record
+ {
+ struct record *Ptr_Comp;
+ Enumeration Discr;
+ union {
+ struct {
+ Enumeration Enum_Comp;
+ int Int_Comp;
+ char Str_Comp [31];
+ } var_1;
+ struct {
+ Enumeration E_Comp_2;
+ char Str_2_Comp [31];
+ } var_2;
+ struct {
+ char Ch_1_Comp;
+ char Ch_2_Comp;
+ } var_3;
+ } variant;
+ } Rec_Type, *Rec_Pointer;
+
+
dhry.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: TODO
===================================================================
--- TODO (nonexistent)
+++ TODO (revision 1765)
@@ -0,0 +1,2 @@
+ - add confugure time parameter for .ld files
+ - separate or1k specific and compareable tests
TODO
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: COPYING
===================================================================
--- COPYING (nonexistent)
+++ COPYING (revision 1765)
@@ -0,0 +1,340 @@
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+ 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
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+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
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+
+ For example, if you distribute copies of such a program, whether
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+
+ We protect your rights with two steps: (1) copyright the software, and
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+
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+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
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+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+
+ Copyright (C)
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ , 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Library General
+Public License instead of this License.
Index: .
===================================================================
--- . (nonexistent)
+++ . (revision 1765)
.
Property changes :
Added: svn:ignore
## -0,0 +1,27 ##
+Makefile
+acv_gpio
+acv_uart
+basic
+cache
+cbasic
+cfg
+dhry
+dmatest
+eth
+eth0.tx
+except
+excpt
+executed.log
+exit
+functest
+local_global
+mc_async
+mc_dram
+mc_ssram
+mc_sync
+mmu
+mul
+mycompress
+pic
+stdout.txt
+vapi.log