OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /or1k/trunk/ecos-2.0/packages/hal/h8300
    from Rev 1254 to Rev 1765
    Reverse comparison

Rev 1254 → Rev 1765

/sim/v2_0/cdl/hal_h8300_h8300h_sim.cdl
0,0 → 1,205
# ====================================================================
#
# hal_h8300_h8300h_sim.cdl
#
# H8/300H SIM HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): jskov
# Original data: bartv
# Contributors:
# Date: 1999-11-02
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_H8300_H8300H_SIM {
display "H8/300H simulator"
parent CYGPKG_HAL_H8300
requires CYGPKG_HAL_H8300_H8300H
implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
implements CYGINT_HAL_DEBUG_GDB_STUBS
implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
define_header hal_h8300_h8300h_sim.h
include_dir cyg/hal
description "
The minimal simulator HAL package is provided for use when
only a simple simulation of the processor architecture is
desired, as opposed to detailed simulation of any specific
board. In particular it is not possible to simulate any of
the I/O devices, so device drivers cannot be used."
 
compile hal_diag.c plf_misc.c delay_us.S
 
define_proc {
puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_h8300_h8300h.h>"
puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_h8300_h8300h_sim.h>"
 
puts $::cdl_header "#define CYG_HAL_H8300"
puts $::cdl_header "#define CYGNUM_HAL_H8300_SCI_PORTS 1"
puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0xfff000"
}
 
cdl_component CYG_HAL_STARTUP {
display "Startup type"
flavor data
legal_values {"RAM"}
default_value {"RAM"}
no_define
define -file system.h CYG_HAL_STARTUP
description "
Only supports RAM startup."
}
 
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
display "Number of communication channels on the board"
flavor data
calculated 1
}
 
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
display "Debug serial port"
flavor data
legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
default_value 0
description "
The CQ/7708 board has only one serial port. This option
chooses which port will be used to connect to a host
running GDB."
}
 
# Real-time clock/counter specifics
cdl_component CYGNUM_HAL_RTC_CONSTANTS {
display "Real-time clock constants."
flavor none
cdl_option CYGNUM_HAL_RTC_NUMERATOR {
display "Real-time clock numerator"
flavor data
calculated 1000000000
}
cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
display "Real-time clock denominator"
flavor data
calculated 100
}
cdl_option CYGNUM_HAL_H8300_RTC_PRESCALE {
display "Real-time clock base prescale"
flavor data
calculated 8192
}
# Isn't a nice way to handle freq requirement!
cdl_option CYGNUM_HAL_RTC_PERIOD {
display "Real-time clock period"
flavor data
calculated 10
}
}
 
cdl_option CYGHWR_HAL_H8300_CPG_INPUT {
display "OSC/Clock Freqency"
flavor data
default_value 8000000
}
 
cdl_component CYGBLD_GLOBAL_OPTIONS {
display "Global build options"
flavor none
parent CYGPKG_NONE
description "
Global build options including control over
compiler flags, linker flags and choice of toolchain."
 
 
cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
display "Global command prefix"
flavor data
no_define
default_value { "h8300-elf" }
description "
This option specifies the command prefix used when
invoking the build tools."
}
 
cdl_option CYGBLD_GLOBAL_CFLAGS {
display "Global compiler flags"
flavor data
no_define
default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -mh -mint32 -fsigned-char -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
description "
This option controls the global compiler flags which
are used to compile all packages by
default. Individual packages may define
options which override these global flags."
}
 
cdl_option CYGBLD_GLOBAL_LDFLAGS {
display "Global linker flags"
flavor data
no_define
default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh" }
description "
This option controls the global linker flags. Individual
packages may define options which override these global flags."
}
}
 
cdl_component CYGHWR_MEMORY_LAYOUT {
display "Memory layout"
flavor data
no_define
calculated { "h8300_h8300h_sim_ram" }
 
cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
display "Memory layout linker script fragment"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
calculated { "<pkgconf/mlt_h8300_h8300h_sim_ram.ldi>" }
}
 
cdl_option CYGHWR_MEMORY_LAYOUT_H {
display "Memory layout header file"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_H
calculated { "<pkgconf/mlt_h8300_h8300h_sim_ram.h>" }
}
}
}
/sim/v2_0/include/plf_intr.h
0,0 → 1,76
#ifndef CYGONCE_HAL_PLF_INTR_H
#define CYGONCE_HAL_PLF_INTR_H
 
//==========================================================================
//
// plf_intr.h
//
// H8/300H sim interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jlarmour
// Contributors: jlarmour
// Date: 1999-09-09
// Purpose: Define Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for the simulator. This file
// is empty since none are required!
//
// Usage:
// #include <cyg/hal/plf_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
 
//--------------------------------------------------------------------------
 
externC void h8300h_reset (void);
externC void hal_delay_us(int usecs);
 
#define HAL_PLATFORM_RESET(x)
#define HAL_PLATFORM_RESET_ENTRY &h8300h_reset
 
#define HAL_DELAY_US(n) hal_delay_us((n) /25)
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLF_INTR_H
// End of plf_intr.h
/sim/v2_0/include/plf_stub.h
0,0 → 1,90
#ifndef CYGONCE_HAL_PLF_STUB_H
#define CYGONCE_HAL_PLF_STUB_H
 
//=============================================================================
//
// plf_stub.h
//
// Platform header for GDB stub support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:jskov
// Date: 1999-05-18
// Purpose: Platform HAL stub support for H8/300H simulator
// Usage: #include <cyg/hal/plf_stub.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/system.h>
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM, externC
 
#include <cyg/hal/h8300_stub.h> // architecture stub support
 
#include <cyg/hal/hal_diag.h> // hal_diag_led_on
 
//----------------------------------------------------------------------------
// Define some platform specific communication details. This is mostly
// handled by hal_if now, but we need to make sure the comms tables are
// properly initialized.
 
externC void cyg_hal_plf_comms_init(void);
 
#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init()
 
#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud))
#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0
 
//----------------------------------------------------------------------------
// Stub initializer.
#ifdef CYGSEM_HAL_ROM_MONITOR
# define HAL_STUB_PLATFORM_INIT() hal_diag_led_on()
#else
# define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT
#endif
 
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_PLF_STUB_H
// End of plf_stub.h
/sim/v2_0/include/pkgconf/mlt_h8300_h8300h_sim_ram.h
0,0 → 1,18
// eCos memory layout - Wed Nov 24 13:10:23 1999
 
// This is a generated file - changes will be lost if ConfigTool(MLT) is run
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
 
#define CYGMEM_REGION_ram (0x200000)
#define CYGMEM_REGION_ram_SIZE (0x200000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x300000 - (size_t) CYG_LABEL_NAME (__heap1))
/sim/v2_0/include/pkgconf/mlt_h8300_h8300h_sim_ram.ldi
0,0 → 1,30
// eCos memory layout - Fri Oct 20 08:25:16 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
OUTPUT_FORMAT("elf32-h8300")
OUTPUT_ARCH(h8300h)
 
MEMORY
{
ram : ORIGIN = 0x000000, LENGTH = 0x200000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (ram, 0x000000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_int_fook_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
/sim/v2_0/include/pkgconf/mlt_h8300_h8300h_sim_ram.mlt
0,0 → 1,12
version 0
region ram 200000 200000 0 !
section rom_vectors 0 1 0 1 1 1 1 1 200000 200000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
section data 0 4 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/sim/v2_0/include/platform.inc
0,0 → 1,67
#ifndef CYGONCE_HAL_PLATFORM_INC
#define CYGONCE_HAL_PLATFORM_INC
##=============================================================================
##
## platform.inc
##
## AM31 simulator "board" assembler header file
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): jlarmour
## Contributors: jlarmour
## Date: 1999-09-09
## Purpose: AM31 Simulator "board" definitions.
## Description: This file contains various definitions and macros that are
## required for writing assembly code for the am31 simulator.
## Currently there are none
## Usage:
## #include <cyg/hal/platform.inc>
## ...
##
##
######DESCRIPTIONEND####
##
##=============================================================================
 
##-----------------------------------------------------------------------------
 
# Nothing required
 
#------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLATFORM_INC
# end of platform.inc
/sim/v2_0/include/hal_diag.h
0,0 → 1,75
#ifndef CYGONCE_HAL_HAL_DIAG_H
#define CYGONCE_HAL_HAL_DIAG_H
 
/*=============================================================================
//
// hal_diag.h
//
// HAL Support for Kernel Diagnostic Routines
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-14
// Purpose: HAL Support for Kernel Diagnostic Routines
// Description: Diagnostic routines for use during kernel development.
// Usage: #include <cyg/hal/hal_diag.h>
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
externC void hal_diag_init(void);
externC void hal_diag_write_char(cyg_uint8 c);
externC void hal_diag_read_char(cyg_uint8 *c);
 
/*---------------------------------------------------------------------------*/
 
#define HAL_DIAG_INIT() hal_diag_init()
 
#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_)
 
#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_)
 
/*---------------------------------------------------------------------------*/
/* end of hal_diag.h */
#endif /* CYGONCE_HAL_HAL_DIAG_H */
/sim/v2_0/doc/README
0,0 → 1,2
Please visit http://homepage2.nifty.com/ysato/eCos/index.en.html for up to date
information, particularly on which GNU tools to use and patches.
/sim/v2_0/src/delay_us.S
0,0 → 1,53
;;delay_us
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/arch.inc>
#include <cyg/hal/basetype.h>
#include <cyg/hal/mod_regs_tmr.h>
 
#define DELAY_COUNT (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/8*25
// .file "delay_us.S"
.h8300h
.text
 
.global CYG_LABEL_DEFN(hal_delay_us)
CYG_LABEL_DEFN(hal_delay_us):
mov.b #0,r1l
mov.b r1l,@CYGARC_8TCNT2:8
mov.b #1,r1l
mov.b r1l,@CYGARC_8TCR2:8
mov.b #0,r2h
sub.w e1,e1
1:
mov.l er0,er0
ble 6f
2:
cmp.w #DELAY_COUNT,e1
bgt 5f
mov.b #0,r1h
mov.b @CYGARC_8TCNT2:8,r2l
3:
mov.b @CYGARC_8TCNT2:8,r1l
cmp.b r1l,r2l
beq 3b
bcs 4f
inc.b r1h
4:
sub.w r2,r1
add.w r1,e1
bra 2b
5:
mov.w e1,r1
mov.b #DELAY_COUNT,r2l
divxs r2l,r1
sub.l er2,er2
mov.b r1l,r2l
sub.w r2,e1
dec.l #1,er0
bra 1b
6:
mov.b #0,r0l
mov.b r0l,@CYGARC_8TCR2
rts
/sim/v2_0/src/hal_diag.c
0,0 → 1,95
/*=============================================================================
//
// hal_diag.c
//
// HAL diagnostic output code
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): dsm
// Contributors: dsm
// Date: 1998-03-13
// Purpose: HAL diagnostic output
// Description: Implementations of HAL diagnostic output support.
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/hal_diag.h>
#include <cyg/hal/h8_sci.h>
#include <cyg/hal/var_intr.h>
 
#define SCI_BASE ((cyg_uint8*)0xffffb0)
 
static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0};
 
void
cyg_hal_plf_comms_init(void)
{
static int initialized = 0;
 
if (initialized)
return;
 
initialized = 1;
 
cyg_hal_plf_sci_init(0, 0, CYGNUM_HAL_INTERRUPT_RXI0, SCI_BASE);
}
 
void hal_diag_init(void)
{
cyg_hal_plf_sci_init_channel(&channel);
}
 
void
hal_diag_write_char( cyg_uint8 c )
{
cyg_hal_plf_sci_putc(&channel, c);
}
 
void
hal_diag_read_char(cyg_uint8 *c)
{
*c = (char) cyg_hal_plf_sci_getc(&channel);
}
 
/*===========================================================================*/
/* EOF hal_diag.c */
 
/sim/v2_0/src/plf_misc.c
0,0 → 1,125
//==========================================================================
//
// plf_misc.c
//
// HAL platform miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jlarmour
// Date: 1999-09-09
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // Base types
 
#include <cyg/hal/hal_arch.h> // architectural definitions
#include <cyg/hal/hal_io.h>
#include <cyg/hal/hal_if.h>
#include <cyg/hal/plf_intr.h>
#include <cyg/hal/var_arch.h>
 
/*------------------------------------------------------------------------*/
 
void hal_platform_init(void)
{
hal_if_init();
}
 
void h8300h_reset(void)
{
__asm__ ("jmp @@0\n\t");
}
 
/*------------------------------------------------------------------------*/
/* Control C ISR support */
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
 
struct Hal_SavedRegisters *hal_saved_interrupt_state;
 
#endif
 
/*------------------------------------------------------------------------*/
/* clock support */
 
void hal_clock_initialize(cyg_uint32 period)
{
CYG_BYTE prescale;
#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8
prescale = 0x01;
#else
#if CYGNUM_HAL_H8300_RTC_PRESCALE == 64
prescale = 0x02;
#else
#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8192
prescale = 0x03;
#else
#error illigal RTC prescale setting
#endif
#endif
#endif
HAL_WRITE_UINT8(CYGARC_TCORA3,period);
HAL_WRITE_UINT8(CYGARC_8TCNT3,0x00);
HAL_WRITE_UINT8(CYGARC_8TCR3,0x48 | prescale);
HAL_WRITE_UINT8(CYGARC_8TCSR3,0x00);
}
 
void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period)
{
HAL_WRITE_UINT8(CYGARC_8TCR3,0x00);
HAL_WRITE_UINT8(CYGARC_8TCSR3,0x00);
hal_clock_initialize(period);
}
 
void hal_clock_read(cyg_uint32 *pvalue)
{
CYG_BYTE val;
HAL_READ_UINT8(CYGARC_8TCNT3,val);
*pvalue = val;
}
 
/*------------------------------------------------------------------------*/
/* End of plf_misc.c */
/sim/v2_0/ChangeLog
0,0 → 1,45
2002-04-29 Jonathan Larmour <jlarmour@redhat.com>
 
* src/delay_us.S:
Don't use .file as it can confuse debugging since the .file
doesn't contain the path and therefore the debugger will never
know where it lives! This conflicts with using -Wa,--gstabs.
 
2002-04-24 Yoshinori Sato <qzb04471@nifty.ne.jp>
 
* New package.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
/h8300h/v2_0/cdl/hal_h8300_h8300h.cdl
0,0 → 1,119
# ====================================================================
#
# hal_h8300_h8300h.cdl
#
# H8/300H variant architectural HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): jskov
# Original data: nickg
# Contributors: dmoseley
# Date: 1999-11-02
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_H8300_H8300H {
display "H8/300H variant"
parent CYGPKG_HAL_H8300
implements CYGINT_HAL_H8300_VARIANT
hardware
include_dir cyg/hal
define_header hal_h8300_h8300h.h
description "
The H8/300H variant HAL package provides generic
support for this processor architecture. It is also
necessary to select a specific target platform HAL
package."
 
define_proc {
puts $::cdl_header "#include <pkgconf/hal_h8300.h>"
}
 
compile var_misc.c h8_sci.c
 
make {
<PREFIX>/lib/target.ld: <PACKAGE>/src/h8300_h8300h.ld
$(CC) -E -P -Wp,-MD,target.tmp -DEXTRAS=1 -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $<
@echo $@ ": \\" > $(notdir $@).deps
@tail +2 target.tmp >> $(notdir $@).deps
@echo >> $(notdir $@).deps
@rm target.tmp
}
 
cdl_option CYGBLD_LINKER_SCRIPT {
display "Linker script"
flavor data
no_define
calculated { "src/h8300_h8300h.ld" }
}
 
cdl_component CYGHWR_HAL_H8300H_CLOCK_SETTINGS {
display "H8/300H on-chip generic clock controls"
description "
The various clocks used by the system are controlled by
these options, some of which are derived from platform
settings."
flavor none
no_define
 
cdl_option CYGHWR_HAL_H8300_DIVIDER_RATE {
display "Divider Rate (1/n)"
flavor data
legal_values { 1 2 4 8 }
default_value 1
description "
The system clock divide rate setting"
}
cdl_option CYGHWR_HAL_H8300_PROCESSOR_SPEED {
display "Processor clock speed (MHz)"
flavor data
calculated { CYGHWR_HAL_H8300_CPG_INPUT / CYGHWR_HAL_H8300_DIVIDER_RATE }
description "
The core (CPU) speed is computed from
the input clock speed and the divider setting."
}
}
cdl_option CYGNUM_HAL_H8300_H8300H_SCI_BAUD_RATE {
display "SCI serial port default baud rate"
flavor data
legal_values { 4800 9600 14400 19200 38400 57600 115200 }
default_value { 38400 }
}
}
/h8300h/v2_0/include/mod_regs_intc.h
0,0 → 1,60
#ifndef CYGONCE_MOD_REGS_INTC_H
#define CYGONCE_MOD_REGS_INTC_H
 
//==========================================================================
//
// mod_regs_intc.h
//
// Interrupt Controler Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_ISCR 0xFEE014
#define CYGARC_IER 0xFEE015
#define CYGARC_ISR 0xFEE016
#define CYGARC_IPRA 0xFEE018
#define CYGARC_IPRB 0xFEE019
 
#endif
/h8300h/v2_0/include/h8_sci.h
0,0 → 1,80
//=============================================================================
//
// h8_sci.h
//
// Simple driver for the H8/300H Serial Communication Interface (SCI)
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:jskov
// Date: 1999-05-17
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
//--------------------------------------------------------------------------
// Exported functions
 
externC void cyg_hal_plf_sci_init_channel(void* __ch_data);
externC cyg_uint8 cyg_hal_plf_sci_getc(void* __ch_data);
externC void cyg_hal_plf_sci_putc(void* __ch_data, cyg_uint8 c);
externC void cyg_hal_plf_sci_init(int sci_index, int comm_index,
int rcv_vect, cyg_uint8* base);
 
//--------------------------------------------------------------------------
// SCI register offsets
#define _REG_SCSMR 0x0 // serial mode register
#define _REG_SCBRR 0x1 // bit rate register
#define _REG_SCSCR 0x2 // serial control register
#define _REG_SCTDR 0x3 // transmit data register
#define _REG_SCSSR 0x4 // serial status register
#define _REG_SCRDR 0x5 // receive data register
 
//--------------------------------------------------------------------------
 
typedef struct {
cyg_uint8* base;
cyg_int32 msec_timeout;
int isr_vector;
} channel_data_t;
 
//--------------------------------------------------------------------------
// end of h8_sci.h
/h8300h/v2_0/include/mod_regs_sci.h
0,0 → 1,144
#ifndef CYGONCE_MOD_REGS_SCI_H
#define CYGONCE_MOD_REGS_SCI_H
 
//==========================================================================
//
// mod_regs_sci.h
//
// Serial Communication Interface Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_SMR0 0xFFFFB0
#define CYGARC_BRR0 0xFFFFB1
#define CYGARC_SCR0 0xFFFFB2
#define CYGARC_TDR0 0xFFFFB3
#define CYGARC_SSR0 0xFFFFB4
#define CYGARC_RDR0 0xFFFFB5
#define CYGARC_SCMR0 0xFFFFB6
#define CYGARC_SMR1 0xFFFFB8
#define CYGARC_BRR1 0xFFFFB9
#define CYGARC_SCR1 0xFFFFBA
#define CYGARC_TDR1 0xFFFFBB
#define CYGARC_SSR1 0xFFFFBC
#define CYGARC_RDR1 0xFFFFBD
#define CYGARC_SCMR1 0xFFFFBE
#define CYGARC_SMR2 0xFFFFC0
#define CYGARC_BRR2 0xFFFFC1
#define CYGARC_SCR2 0xFFFFC2
#define CYGARC_TDR2 0xFFFFC3
#define CYGARC_SSR2 0xFFFFC4
#define CYGARC_RDR2 0xFFFFC5
#define CYGARC_SCMR2 0xFFFFC6
 
// Serial Mode Register
#define CYGARC_REG_SCSMR_CA 0x80 // communication mode
#define CYGARC_REG_SCSMR_CHR 0x40 // character length (7 if set)
#define CYGARC_REG_SCSMR_PE 0x20 // parity enable
#define CYGARC_REG_SCSMR_OE 0x10 // parity mode
#define CYGARC_REG_SCSMR_STOP 0x08 // stop bit length
#define CYGARC_REG_SCSMR_MP 0x04 // multiprocessor mode
#define CYGARC_REG_SCSMR_CKS1 0x02 // clock select 1
#define CYGARC_REG_SCSMR_CKS0 0x01 // clock select 0
#define CYGARC_REG_SCSMR_CKSx_MASK 0x03 // mask
 
// Serial Control Register
#define CYGARC_REG_SCSCR_TIE 0x80 // transmit interrupt enable
#define CYGARC_REG_SCSCR_RIE 0x40 // receive interrupt enable
#define CYGARC_REG_SCSCR_TE 0x20 // transmit enable
#define CYGARC_REG_SCSCR_RE 0x10 // receive enable
#define CYGARC_REG_SCSCR_MPIE 0x08 // multiprocessor interrupt enable
#define CYGARC_REG_SCSCR_TEIE 0x04 // transmit-end interrupt enable
#define CYGARC_REG_SCSCR_CKE1 0x02 // clock enable 1
#define CYGARC_REG_SCSCR_CKE0 0x01 // clock enable 0
 
// Serial Status Register
#define CYGARC_REG_SCSSR_TDRE 0x80 // transmit data register empty
#define CYGARC_REG_SCSSR_RDRF 0x40 // receive data register full
#define CYGARC_REG_SCSSR_ORER 0x20 // overrun error
#define CYGARC_REG_SCSSR_FER 0x10 // framing error
#define CYGARC_REG_SCSSR_PER 0x08 // parity error
#define CYGARC_REG_SCSSR_TEND 0x04 // transmit end
#define CYGARC_REG_SCSSR_MPB 0x02 // multiprocessor bit
#define CYGARC_REG_SCSSR_MPBT 0x01 // multiprocessor bit transfer
 
// When clearing the status register, always write the value:
// CYGARC_REG_SCSSR_CLEARMASK & ~bit
// to prevent other bits than the one of interest to be cleared.
#define CYGARC_REG_SCSSR_CLEARMASK 0xf8
 
// Baud rate values calculation, depending on peripheral clock (Pf)
// n is CKS setting (0-3)
// N = (Pf/(64*2^(2n-1)*B))-1
// With CYGARC_SCBRR_CKSx providing the values 1, 4, 16, 64 we get
// N = (Pf/(32*_CKS*B))-1
//
// The CYGARC_SCBRR_OPTIMAL_CKS macro should compute the minimal CKS
// setting for the given baud rate and peripheral clock.
//
// The error of the CKS+count value can be computed by:
// E(%) = ((Pf/((N+1)*B*(64^(n-1)))-1)*100
//
#define CYGARC_SCBRR_PRESCALE(_b_) \
((((CYGHWR_HAL_H8300_PROCESSOR_SPEED/32/1/(_b_))-1)<256) ? 1 : \
(((CYGHWR_HAL_H8300_PROCESSOR_SPEED/32/4/(_b_))-1)<256) ? 4 : \
(((CYGHWR_HAL_H8300_PROCESSOR_SPEED/32/16/(_b_))-1)<256) ? 16 : 64)
 
// Add half the divisor to reduce rounding errors to .5
#define CYGARC_SCBRR_ROUNDING(_b_) \
16*CYGARC_SCBRR_PRESCALE(_b_)*(_b_)
 
// These two macros provide the static values we need to stuff into the
// registers.
#define CYGARC_SCBRR_CKSx(_b_) \
((1 == CYGARC_SCBRR_PRESCALE(_b_)) ? 0 : \
(4 == CYGARC_SCBRR_PRESCALE(_b_)) ? 1 : \
(16 == CYGARC_SCBRR_PRESCALE(_b_)) ? 2 : 3)
#define CYGARC_SCBRR_N(_b_) \
(((_b_) < 4800) ? 0 : \
((_b_) > 115200) ? 0 : \
(((CYGHWR_HAL_H8300_PROCESSOR_SPEED+CYGARC_SCBRR_ROUNDING(_b_))/32/CYGARC_SCBRR_PRESCALE(_b_)/(_b_))-1))
 
#endif
/h8300h/v2_0/include/mod_regs_sys.h
0,0 → 1,65
#ifndef CYGONCE_MOD_REGS_SYS_H
#define CYGONCE_MOD_REGS_SYS_H
 
//==========================================================================
//
// mod_regs_sys.h
//
// System Controler Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_MDCR 0xFEE000
#define CYGARC_SYSCR 0xFEE001
#define CYGARC_DIVCR 0xFEE01B
#define CYGARC_MSTCRH 0xFEE01C
#define CYGARC_MSTCRL 0xFEE01D
#define CYGARC_FLMCR1 0xFEE030
#define CYGARC_FLMCR2 0xFEE031
#define CYGARC_EBR1 0xFEE032
#define CYGARC_EBR2 0xFEE033
#define CYGARC_RAMCR 0xFEE077
 
#endif
/h8300h/v2_0/include/mod_regs_wdt.h
0,0 → 1,75
#ifndef CYGONCE_MOD_REGS_WDT_H
#define CYGONCE_MOD_REGS_WDT_H
 
//==========================================================================
//
// mod_regs_wdt.h
//
// Watchdog Timer Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_TCSR 0xFFFF8C
#define CYGARC_TCNT 0xFFFF8D
#define CYGARC_RSTCSRW 0xFFFF8E
#define CYGARC_RSTCSRR 0xFFFF8F
 
#define CYGARC_TCNT_MAGIC 0x5A00
#define CYGARC_TCSR_MAGIC 0xA500
 
#define CYGARC_WDT_OVF 0x80
#define CYGARC_WDT_WT 0x40
#define CYGARC_WDT_TME 0x20
#define CYGARC_WDT_CKS2 0x04
#define CYGARC_WDT_CKS1 0x02
#define CYGARC_WDT_CKS0 0x01
 
#define CYGARC_WDT_CKS 0x07 //Max Delay
 
#define CYGARC_WDT_PERIOD ((1000000000/(CYGHWR_HAL_H8300_PROCESSOR_SPEED/4096))*256)
 
#endif
 
// EOF mod_regs_wdt.h
/h8300h/v2_0/include/mod_regs_tmr.h
0,0 → 1,112
#ifndef CYGONCE_MOD_REGS_TMR_H
#define CYGONCE_MOD_REGS_TMR_H
 
//==========================================================================
//
// mod_regs_tmr.h
//
// 16bit/8bit/WatchDog Timer Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_TSTR 0xFFFF60
#define CYGARC_TSNC 0XFFFF61
#define CYGARC_TMDR 0xFFFF62
#define CYGARC_TOLR 0xFFFF63
#define CYGARC_TISRA 0xFFFF64
#define CYGARC_TISRB 0xFFFF65
#define CYGARC_TISRC 0xFFFF66
#define CYGARC_TCR0 0xFFFF68
#define CYGARC_TIOR0 0xFFFF69
#define CYGARC_TCNT0H 0xFFFF6A
#define CYGARC_TCNT0L 0xFFFF6B
#define CYGARC_GRA0H 0xFFFF6C
#define CYGARC_GRA0L 0xFFFF6D
#define CYGARC_GRB0H 0xFFFF6E
#define CYGARC_GRB0L 0xFFFF6F
#define CYGARC_TCR1 0xFFFF70
#define CYGARC_TIOR1 0xFFFF71
#define CYGARC_TCNT1H 0xFFFF72
#define CYGARC_TCNT1L 0xFFFF73
#define CYGARC_GRA1H 0xFFFF74
#define CYGARC_GRA1L 0xFFFF75
#define CYGARC_GRB1H 0xFFFF76
#define CYGARC_GRB1L 0xFFFF77
#define CYGARC_TCR3 0xFFFF78
#define CYGARC_TIOR3 0xFFFF79
#define CYGARC_TCNT3H 0xFFFF7A
#define CYGARC_TCNT3L 0xFFFF7B
#define CYGARC_GRA3H 0xFFFF7C
#define CYGARC_GRA3L 0xFFFF7D
#define CYGARC_GRB3H 0xFFFF7E
#define CYGARC_GRB3L 0xFFFF7F
 
#define CYGARC_8TCR0 0xFFFF80
#define CYGARC_8TCR1 0xFFFF81
#define CYGARC_8TCSR0 0xFFFF82
#define CYGARC_8TCSR1 0xFFFF83
#define CYGARC_TCORA0 0xFFFF84
#define CYGARC_TCORA1 0xFFFF85
#define CYGARC_TCORB0 0xFFFF86
#define CYGARC_TCORB1 0xFFFF87
#define CYGARC_8TCNT0 0xFFFF88
#define CYGARC_8TCNT1 0xFFFF89
 
#define CYGARC_8TCR2 0xFFFF90
#define CYGARC_8TCR3 0xFFFF91
#define CYGARC_8TCSR2 0xFFFF92
#define CYGARC_8TCSR3 0xFFFF93
#define CYGARC_TCORA2 0xFFFF94
#define CYGARC_TCORA3 0xFFFF95
#define CYGARC_TCORB2 0xFFFF96
#define CYGARC_TCORB3 0xFFFF97
#define CYGARC_8TCNT2 0xFFFF98
#define CYGARC_8TCNT3 0xFFFF99
 
#define CYGARC_TCSR 0xFFFF8C
#define CYGARC_TCNT 0xFFFF8D
#define CYGARC_RSTCSR 0xFFFF8F
 
#endif
/h8300h/v2_0/include/mod_regs_dmac.h
0,0 → 1,87
#ifndef CYGONCE_MOD_REGS_DMAC_H
#define CYGONCE_MOD_REGS_DMAC_H
 
//==========================================================================
//
// mod_regs_dmac.h
//
// DMA Controler Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_MAR0AR 0xFFFF20
#define CYGARC_MAR0AE 0xFFFF21
#define CYGARC_MAR0AH 0xFFFF22
#define CYGARC_MAR0AL 0xFFFF23
#define CYGARC_ETCR0AL 0xFFFF24
#define CYGARC_ETCR0AH 0xFFFF25
#define CYGARC_IOAR0A 0xFFFF26
#define CYGARC_DTCR0A 0xFFFF27
#define CYGARC_MAR0BR 0xFFFF28
#define CYGARC_MAR0BE 0xFFFF29
#define CYGARC_MAR0BH 0xFFFF2A
#define CYGARC_MAR0BL 0xFFFF2B
#define CYGARC_ETCR0BL 0xFFFF2C
#define CYGARC_ETCR0BH 0xFFFF2D
#define CYGARC_IOAR0B 0xFFFF2E
#define CYGARC_DTCR0B 0xFFFF2F
#define CYGARC_MAR1AR 0xFFFF30
#define CYGARC_MAR1AE 0xFFFF31
#define CYGARC_MAR1AH 0xFFFF32
#define CYGARC_MAR1AL 0xFFFF33
#define CYGARC_ETCR1AL 0xFFFF34
#define CYGARC_ETCR1AH 0xFFFF35
#define CYGARC_IOAR1A 0xFFFF36
#define CYGARC_DTCR1A 0xFFFF37
#define CYGARC_MAR1BR 0xFFFF38
#define CYGARC_MAR1BE 0xFFFF39
#define CYGARC_MAR1BH 0xFFFF3A
#define CYGARC_MAR1BL 0xFFFF3B
#define CYGARC_ETCR1BL 0xFFFF3C
#define CYGARC_ETCR1BH 0xFFFF3D
#define CYGARC_IOAR1B 0xFFFF3E
#define CYGARC_DTCR1B 0xFFFF3F
 
#endif
/h8300h/v2_0/include/var_intr.h
0,0 → 1,222
#ifndef CYGONCE_HAL_VAR_INTR_H
#define CYGONCE_HAL_VAR_INTR_H
 
//==========================================================================
//
// var_intr.h
//
// H8/300H Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-14
// Purpose: H8/300H Interrupt Support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for H8/300H variants of the H8/300
// architecture.
//
// Usage:
// #include <cyg/hal/var_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
#include <cyg/hal/plf_intr.h>
#include <cyg/hal/var_arch.h>
 
//--------------------------------------------------------------------------
// Interrupt vectors.
 
// The level-specific hardware vectors
// These correspond to VSRs and are the values to use for HAL_VSR_GET/SET
#define CYGNUM_HAL_VECTOR_RESET 0
#define CYGNUM_HAL_VECTOR_RSV1 1
#define CYGNUM_HAL_VECTOR_RSV2 2
#define CYGNUM_HAL_VECTOR_RSV3 3
#define CYGNUM_HAL_VECTOR_RSV4 4
#define CYGNUM_HAL_VECTOR_RSV5 5
#define CYGNUM_HAL_VECTOR_RSV6 6
#define CYGNUM_HAL_VECTOR_NMI 7
#define CYGNUM_HAL_VECTOR_TRAP0 8
#define CYGNUM_HAL_VECTOR_TRAP1 9
#define CYGNUM_HAL_VECTOR_TRAP2 10
#define CYGNUM_HAL_VECTOR_TRAP3 11
 
#define CYGNUM_HAL_VSR_MIN 0
#define CYGNUM_HAL_VSR_MAX 11
#define CYGNUM_HAL_VSR_COUNT 12
 
// Exception numbers. These are the values used when passed out to an
// external exception handler using cyg_hal_deliver_exception()
 
#define CYGNUM_HAL_EXCEPTION_NMI CYGNUM_HAL_VECTOR_NMI
 
#if 0
#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS 0
#endif
 
#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_VSR_MIN
#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_VSR_MAX
#define CYGNUM_HAL_EXCEPTION_COUNT CYGNUM_HAL_VSR_COUNT
 
// The decoded interrupts
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_0 12
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_1 13
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_2 14
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_3 15
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_4 16
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_5 17
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_6 18
#define CYGNUM_HAL_INTERRUPT_EXTERNAL_7 19
 
#define CYGNUM_HAL_INTERRUPT_WDT 20
#define CYGNUM_HAL_INTERRUPT_RFSHCMI 21
#define CYGNUM_HAL_INTERRUPT_RSV22 22
#define CYGNUM_HAL_INTERRUPT_ADI 23
 
#define CYGNUM_HAL_INTERRUPT_IMIA0 24
#define CYGNUM_HAL_INTERRUPT_IMIB0 25
#define CYGNUM_HAL_INTERRUPT_OVI0 26
#define CYGNUM_HAL_INTERRUPT_RSV27 27
 
#define CYGNUM_HAL_INTERRUPT_IMIA1 28
#define CYGNUM_HAL_INTERRUPT_IMIB1 29
#define CYGNUM_HAL_INTERRUPT_OVI1 30
#define CYGNUM_HAL_INTERRUPT_RSV31 31
 
#define CYGNUM_HAL_INTERRUPT_IMIA2 32
#define CYGNUM_HAL_INTERRUPT_IMIB2 33
#define CYGNUM_HAL_INTERRUPT_OVI2 34
#define CYGNUM_HAL_INTERRUPT_RSV35 35
 
#define CYGNUM_HAL_INTERRUPT_CMIA0 36
#define CYGNUM_HAL_INTERRUPT_CMIB0 37
#define CYGNUM_HAL_INTERRUPT_CMIAB1 38
#define CYGNUM_HAL_INTERRUPT_TOVI01 39
 
#define CYGNUM_HAL_INTERRUPT_CMIA2 40
#define CYGNUM_HAL_INTERRUPT_CMIB2 41
#define CYGNUM_HAL_INTERRUPT_CMIAB3 42
#define CYGNUM_HAL_INTERRUPT_TOVI23 43
 
#define CYGNUM_HAL_INTERRUPT_DEND0A 44
#define CYGNUM_HAL_INTERRUPT_DEND0B 45
#define CYGNUM_HAL_INTERRUPT_DEND1A 46
#define CYGNUM_HAL_INTERRUPT_DEND1B 47
 
#define CYGNUM_HAL_INTERRUPT_RSV48 48
#define CYGNUM_HAL_INTERRUPT_RSV49 49
#define CYGNUM_HAL_INTERRUPT_RSV50 50
#define CYGNUM_HAL_INTERRUPT_RSV51 51
 
#define CYGNUM_HAL_INTERRUPT_ERI0 52
#define CYGNUM_HAL_INTERRUPT_RXI0 53
#define CYGNUM_HAL_INTERRUPT_TXI0 54
#define CYGNUM_HAL_INTERRUPT_TEI0 55
 
#define CYGNUM_HAL_INTERRUPT_ERI1 56
#define CYGNUM_HAL_INTERRUPT_RXI1 57
#define CYGNUM_HAL_INTERRUPT_TXI1 58
#define CYGNUM_HAL_INTERRUPT_TEI1 59
 
#define CYGNUM_HAL_INTERRUPT_ERI2 60
#define CYGNUM_HAL_INTERRUPT_RXI2 61
#define CYGNUM_HAL_INTERRUPT_TXI2 62
#define CYGNUM_HAL_INTERRUPT_TEI2 63
 
#define CYGNUM_HAL_ISR_MIN 0
#define CYGNUM_HAL_ISR_MAX 63
 
#define CYGNUM_HAL_ISR_COUNT (3+((CYGNUM_HAL_ISR_MAX+1)/4))
 
// The vector used by the Real time clock
 
#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_CMIAB3
 
//--------------------------------------------------------------------------
// Interrupt vector translation.
 
#if !defined(HAL_TRANSLATE_VECTOR) && !defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN)
 
#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \
_index_ = (_vector_)
 
#endif
 
//--------------------------------------------------------------------------
// H8/300H specific version of HAL_INTERRUPT_CONFIGURE
 
#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \
hal_interrupt_configure( _vector_, _level_, _up_ )
 
externC void hal_interrupt_configure(int vector,int level,int up);
 
#define HAL_INTERRUPT_CONFIGURE_DEFINED
 
//--------------------------------------------------------------------------
// Clock control.
 
externC void hal_clock_initialize(cyg_uint32 period);
externC void hal_clock_reset(cyg_uint32 vector,cyg_uint32 period);
externC void hal_clock_read(cyg_uint32 *pvalue);
 
#define HAL_CLOCK_INITIALIZE( _period_ ) \
hal_clock_initialize( _period_ )
 
#define HAL_CLOCK_RESET( _vector_, _period_ ) \
hal_clock_reset( _vector_, _period_ )
 
#define HAL_CLOCK_READ( _pvalue_ ) \
hal_clock_read( _pvalue_ )
 
// FIXME: above line should not use CYGNUM_KERNEL_COUNTERS_RTC_PERIOD since
// this means the HAL gets configured by kernel options even when the
// kernel is disabled!
 
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_VAR_INTR_H
// End of var_intr.h
/h8300h/v2_0/include/mod_regs_tpc.h
0,0 → 1,63
#ifndef CYGONCE_MOD_REGS_TPC_H
#define CYGONCE_MOD_REGS_TPC_H
 
//==========================================================================
//
// mod_regs_tpc.h
//
// Timming Perttern Controler Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_TPMR 0xFFFFA0
#define CYGARC_TPCR 0xFFFFA1
#define CYGARC_NDERB 0xFFFFA2
#define CYGARC_NDERA 0xFFFFA3
#define CYGARC_NDRB1 0xFFFFA4
#define CYGARC_NDRA1 0xFFFFA5
#define CYGARC_NDRB2 0xFFFFA6
#define CYGARC_NDRA2 0xFFFFA7
 
#endif
/h8300h/v2_0/include/var_arch.h
0,0 → 1,99
#ifndef CYGONCE_HAL_VAR_ARCH_H
#define CYGONCE_HAL_VAR_ARCH_H
 
//==========================================================================
//
// var_arch.h
//
// Architecture specific abstractions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-14
// Purpose: Define architecture abstractions
// Description: This file contains any extra or modified definitions for
// this variant of the architecture.
// Usage: #include <cyg/hal/var_arch.h>
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
 
//--------------------------------------------------------------------------
// Processor saved states:
 
typedef struct HAL_SavedRegisters
{
// These are common to all saved states and are in the order
// stored and loaded by the movm instruction.
CYG_ADDRWORD er0;
CYG_ADDRWORD er1;
CYG_ADDRWORD er2;
CYG_ADDRWORD er3;
CYG_ADDRWORD er4;
CYG_ADDRWORD er5;
CYG_ADDRWORD er6;
/* On interrupts the PC and PSW are pushed automatically by the */
/* CPU and SP is pushed for debugging reasons. On a thread switch */
/* the saved context is made to look the same. */
 
CYG_ADDRWORD sp; /* Saved copy of SP in some states */
CYG_WORD32 ccr;
CYG_ADDRWORD pc; /* Program Counter */
} HAL_SavedRegisters;
 
// Internal peripheral registers
#include <cyg/hal/mod_regs_adc.h>
#include <cyg/hal/mod_regs_bsc.h>
#include <cyg/hal/mod_regs_dmac.h>
#include <cyg/hal/mod_regs_intc.h>
#include <cyg/hal/mod_regs_pio.h>
#include <cyg/hal/mod_regs_sci.h>
#include <cyg/hal/mod_regs_sys.h>
#include <cyg/hal/mod_regs_tmr.h>
#include <cyg/hal/mod_regs_tpc.h>
 
//--------------------------------------------------------------------------
#endif // CYGONCE_HAL_VAR_ARCH_H
// End of var_arch.h
/h8300h/v2_0/include/mod_regs_adc.h
0,0 → 1,70
#ifndef CYGONCE_MOD_REGS_ADC_H
#define CYGONCE_MOD_REGS_ADC_H
 
//==========================================================================
//
// mod_regs_adc.h
//
// A/D D/A Converter Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_DASTCR 0xFEE01A
#define CYGARC_DADR0 0xFEE09C
#define CYGARC_DADR1 0xFEE09D
#define CYGARC_DACR 0xFEE09E
 
#define CYGARC_ADDRAH 0xFFFFE0
#define CYGARC_ADDRAL 0xFFFFE1
#define CYGARC_ADDRBH 0xFFFFE2
#define CYGARC_ADDRBL 0xFFFFE3
#define CYGARC_ADDRCH 0xFFFFE4
#define CYGARC_ADDRCL 0xFFFFE5
#define CYGARC_ADDRDH 0xFFFFE6
#define CYGARC_ADDRDL 0xFFFFE7
#define CYGARC_ADCSR 0xFFFFE8
#define CYGARC_ADCR 0xFFFFE9
 
#endif
/h8300h/v2_0/include/mod_regs_bsc.h
0,0 → 1,68
#ifndef CYGONCE_MOD_REGS_BSC_H
#define CYGONCE_MOD_REGS_BSC_H
 
//==========================================================================
//
// mod_regs_bsc.h
//
// Bus Controler Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_BRCR 0xFEE013
#define CYGARC_ADRCR 0xFEE01E
#define CYGARC_CSCR 0xFEE01F
#define CYGARC_ABWCR 0xFEE020
#define CYGARC_ASTCR 0xFEE021
#define CYGARC_WCRH 0xFEE022
#define CYGARC_WCRL 0xFEE023
#define CYGARC_BCR 0xFEE024
#define CYGARC_DRCRA 0xFEE026
#define CYGARC_DRCRB 0xFEE027
#define CYGARC_RTMCSR 0xFEE028
#define CYGARC_RTCNT 0xFEE029
#define CYGARC_RTCOR 0xFEE02A
 
#endif
/h8300h/v2_0/include/mod_regs_pio.h
0,0 → 1,82
#ifndef CYGONCE_MOD_REGS_PIO_H
#define CYGONCE_MOD_REGS_PIO_H
 
//==========================================================================
//
// mod_regs_pio.h
//
// I/O Port Controler Register
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-19
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#define CYGARC_P1DDR 0xFEE000
#define CYGARC_P2DDR 0xFEE001
#define CYGARC_P3DDR 0xFEE002
#define CYGARC_P4DDR 0xFEE003
#define CYGARC_P5DDR 0xFEE004
#define CYGARC_P6DDR 0xFEE005
/*#define CYGARC_P7DDR 0xFEE006*/
#define CYGARC_P8DDR 0xFEE007
#define CYGARC_P9DDR 0xFEE008
#define CYGARC_PADDR 0xFEE009
#define CYGARC_PBDDR 0xFEE00A
 
#define CYGARC_P1DR 0xFFFFD0
#define CYGARC_P2DR 0xFFFFD1
#define CYGARC_P3DR 0xFFFFD2
#define CYGARC_P4DR 0xFFFFD3
#define CYGARC_P5DR 0xFFFFD4
#define CYGARC_P6DR 0xFFFFD5
/*#define CYGARC_P7DR 0xFFFFD6*/
#define CYGARC_P8DR 0xFFFFD7
#define CYGARC_P9DR 0xFFFFD8
#define CYGARC_PADR 0xFFFFD9
#define CYGARC_PBDR 0xFFFFDA
 
#define CYGARC_P2CR 0xFEE03C
#define CYGARC_P4CR 0xFEE03E
#define CYGARC_P5CR 0xFEE03F
 
#endif
/h8300h/v2_0/include/variant.inc
0,0 → 1,145
#ifndef CYGONCE_HAL_VARIANT_INC
#define CYGONCE_HAL_VARIANT_INC
##=============================================================================
##
## variant.inc
##
## H8/300H assembler header file
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): nickg
## Contributors: nickg
## Date: 1999-04-06
## Purpose: H8/300H definitions.
## Description: This file contains various definitions and macros that are
## useful for writing assembly code for the H8/300H CPU variant.
## Usage:
## #include <cyg/hal/variant.inc>
## ...
##
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/platform.inc>
 
 
#------------------------------------------------------------------------------
# Register definitions
 
#define SYSCR 0xfee012
 
#------------------------------------------------------------------------------
# CPU state save and restore macros
 
.macro hal_cpu_save_all
stc ccr,@-sp
subs #2,sp
subs #4,sp
mov.l er6,@-sp # push all registers
mov.l er5,@-sp
mov.l er4,@-sp
mov.l er3,@-sp
mov.l er2,@-sp
mov.l er1,@-sp
mov.l er0,@-sp
.endm
 
.macro hal_cpu_load_all
mov.l @sp+,er0 # pop regs
mov.l @sp+,er1
mov.l @sp+,er2
mov.l @sp+,er3
mov.l @sp+,er4
mov.l @sp+,er5
mov.l @sp+,er6
adds #4,sp
adds #2,sp
ldc @sp+,ccr
.endm
 
 
# Location of PC in saved register context (HAL_SavedRegisters)
#define SAVED_CONTEXT_PC_OFFSET 36
 
##-----------------------------------------------------------------------------
# Default interrupt decoding macros.
 
#ifndef CYGPKG_HAL_H8300_INTC_DEFINED
#define CYG_ISR_TABLE_SIZE 64
 
.macro hal_intc_init
mov.b @SYSCR,r0l
bclr #3,r0l
mov.b r0l,@SYSCR
.endm
 
#define CYGPKG_HAL_H8300_INTC_DEFINED
 
#endif
 
 
#ifndef CYGPKG_HAL_H8300_MON_DEFINED
 
.macro hal_mon_init
.endm
 
#if !(defined(CYG_HAL_STARTUP_ROM) || \
defined(CYGPKG_HAL_H8300_H8300H_SIM) || \
!defined(CYGSEM_HAL_USE_ROM_MONITOR))
 
#define CYG_HAL_H8300_VSR_TABLE_DEFINED
 
#endif
 
 
 
#define CYGPKG_HAL_H8300_MON_DEFINED
 
#endif
 
 
 
#------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_VARIANT_INC
# end of variant.inc
/h8300h/v2_0/doc/README
0,0 → 1,2
Please visit http://homepage2.nifty.com/ysato/eCos/index.en.html for up to date
information, particularly on which GNU tools to use and patches.
/h8300h/v2_0/ChangeLog
0,0 → 1,54
2003-04-10 Nick Garnett <nickg@balti.calivar.com>
 
* src/h8300_h8300h.ld:
Added .eh_frame to data section. This is a stopgap fix to allow
C++ programs that define exceptions to link and run. It does not
allow them to actually throw exceptions, since that depends on
compiler changes that have not been made. Further, more
far-reaching, linker script changes will also be needs when that
happens.
Added libsupc++.a to GROUP() directive for GCC versions later than
3.0.
 
2002-08-14 Yoshinori Sato <qzb04471@nifty.ne.jp>
 
* include/mod_regs_wdt.h: New file. Providing watchdog hardware data.
 
2002-04-24 Yoshinori Sato <qzb04471@nifty.ne.jp>
 
* New package.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
/h8300h/v2_0/src/var_misc.c
0,0 → 1,249
//==========================================================================
//
// var_misc.c
//
// HAL CPU variant miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jlarmour
// Date: 1999-01-21
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // Base types
#include <cyg/infra/cyg_trac.h> // tracing macros
#include <cyg/infra/cyg_ass.h> // assertion macros
#include <cyg/hal/var_arch.h>
#include <cyg/hal/var_intr.h>
#include <cyg/hal/hal_io.h>
 
/*------------------------------------------------------------------------*/
/* Variant specific initialization routine. */
 
void hal_variant_init(void)
{
}
 
struct int_regs {
CYG_BYTE *ier;
CYG_BYTE *isr;
CYG_BYTE mask;
CYG_BYTE status;
};
 
#define REGS_DEF(ier,isr,mask,status) \
{(CYG_BYTE *)ier,(CYG_BYTE *)isr,mask,status}
 
struct int_regs interrupt_registers[]= {
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x01,0x01),
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x02,0x02),
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x04,0x04),
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x08,0x08),
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x10,0x10),
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x20,0x20),
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x40,0x40),
REGS_DEF(CYGARC_IER,CYGARC_ISR,0x80,0x80),
REGS_DEF(CYGARC_TCSR,CYGARC_TCSR,0x20,0x80),
REGS_DEF(CYGARC_RTMCSR,CYGARC_RTMCSR,0x40,0x80),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(CYGARC_ADCSR,CYGARC_ADCSR,0x40,0x80),
REGS_DEF(CYGARC_TISRA,CYGARC_TISRA,0x10,0x01),
REGS_DEF(CYGARC_TISRB,CYGARC_TISRB,0x10,0x01),
REGS_DEF(CYGARC_TISRC,CYGARC_TISRC,0x10,0x01),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(CYGARC_TISRA,CYGARC_TISRA,0x20,0x02),
REGS_DEF(CYGARC_TISRB,CYGARC_TISRB,0x20,0x02),
REGS_DEF(CYGARC_TISRC,CYGARC_TISRC,0x20,0x02),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(CYGARC_TISRA,CYGARC_TISRA,0x40,0x04),
REGS_DEF(CYGARC_TISRB,CYGARC_TISRB,0x40,0x04),
REGS_DEF(CYGARC_TISRC,CYGARC_TISRC,0x40,0x04),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(CYGARC_8TCR0,CYGARC_8TCSR0,0x40,0x40),
REGS_DEF(CYGARC_8TCR0,CYGARC_8TCSR0,0x80,0x80),
REGS_DEF(CYGARC_8TCR1,CYGARC_8TCSR1,0xC0,0xC0),
REGS_DEF(CYGARC_8TCR0,CYGARC_8TCSR0,0x20,0x20),
REGS_DEF(CYGARC_8TCR2,CYGARC_8TCSR2,0x40,0x40),
REGS_DEF(CYGARC_8TCR2,CYGARC_8TCSR2,0x80,0x80),
REGS_DEF(CYGARC_8TCR3,CYGARC_8TCSR3,0xC0,0xC0),
REGS_DEF(CYGARC_8TCR2,CYGARC_8TCSR2,0x20,0x20),
REGS_DEF(CYGARC_DTCR0A,CYGARC_DTCR0A,0x08,0x80),
REGS_DEF(CYGARC_DTCR0B,CYGARC_DTCR0B,0x08,0x80),
REGS_DEF(CYGARC_DTCR1A,CYGARC_DTCR1A,0x08,0x80),
REGS_DEF(CYGARC_DTCR1B,CYGARC_DTCR1B,0x08,0x80),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(NULL,NULL,0,0),
REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x40,0x30),
REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x40,0x40),
REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x80,0x80),
REGS_DEF(CYGARC_SCR0,CYGARC_SSR0,0x04,0x04),
REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x40,0x30),
REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x40,0x40),
REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x80,0x80),
REGS_DEF(CYGARC_SCR1,CYGARC_SSR1,0x04,0x04),
REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x40,0x30),
REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x40,0x40),
REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x80,0x80),
REGS_DEF(CYGARC_SCR2,CYGARC_SSR2,0x04,0x04)
};
 
void
hal_interrupt_mask(int vector)
{
CYG_BYTE ier;
struct int_regs *regs=&interrupt_registers[vector-12];
if (vector == CYGNUM_HAL_INTERRUPT_WDT) {
HAL_READ_UINT8(CYGARC_TCSR,ier);
ier &= ~0x20;
HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | ier);
} else {
if ((vector > 12) && regs->ier) {
HAL_READ_UINT8(regs->ier,ier);
ier &= ~(regs->mask);
HAL_WRITE_UINT8(regs->ier,ier);
} else {
CYG_FAIL("Unknown interrupt vector");
}
}
}
 
void
hal_interrupt_unmask(int vector)
{
CYG_BYTE ier;
struct int_regs *regs=&interrupt_registers[vector-12];
if (vector == CYGNUM_HAL_INTERRUPT_WDT) {
HAL_READ_UINT8(CYGARC_TCSR,ier);
ier |= 0x20;
HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | ier);
} else {
if ((vector > 12) && regs->ier) {
HAL_READ_UINT8(regs->ier,ier);
ier |= regs->mask;
HAL_WRITE_UINT8(regs->ier,ier);
} else {
CYG_FAIL("Unknown interrupt vector");
}
}
}
 
void
hal_interrupt_acknowledge(int vector)
{
CYG_BYTE isr;
struct int_regs *regs=&interrupt_registers[vector-12];
if (vector >= CYGNUM_HAL_INTERRUPT_DEND0A &&
vector <= CYGNUM_HAL_INTERRUPT_DEND1B)
return;
if (vector == CYGNUM_HAL_INTERRUPT_WDT) {
HAL_READ_UINT8(CYGARC_TCSR,isr);
isr &= ~0x80;
HAL_WRITE_UINT16(CYGARC_TCSR,0xa500 | isr);
} else {
if ((vector > 12) && regs->isr) {
HAL_READ_UINT8(regs->isr,isr);
isr &= ~(regs->status);
HAL_WRITE_UINT8(regs->isr,isr);
} else {
CYG_FAIL("Unknown interrupt vector");
}
}
}
 
const short priority_table[]={
7, 6, 5, 5, 4, 4,-1,-1,
3, 3,-1, 3, 2, 2, 2, 2,
1, 1, 1, 1, 0, 0, 0, 0,
15,15,15,15,14,14,14,14,
13,13,13,13,-1,-1,-1,-1,
11,11,11,11,10,10,10,10,
9,9,9,9
};
 
void
hal_interrupt_set_level(int vector,int level)
{
CYG_BYTE *ipr;
CYG_BYTE ipr_mask;
int priority = priority_table[vector-12];
ipr = (CYG_BYTE *)CYGARC_IPRA + ((priority & 0xf8) >> 3);
if (priority>=0) {
ipr_mask = 1 << (priority & 0x07);
if (level == 0) {
*ipr &= ~ipr_mask;
} else {
*ipr |= ipr_mask;
}
} else {
CYG_FAIL("Unknown interrupt vector");
}
}
 
void
hal_interrupt_configure(int vector,int level,int up)
{
cyg_uint8 iscr,mask;
if (vector >= CYGNUM_HAL_INTERRUPT_EXTERNAL_0 &&
vector <= CYGNUM_HAL_INTERRUPT_EXTERNAL_7) {
mask = 1 << (vector - CYGNUM_HAL_INTERRUPT_EXTERNAL_0);
HAL_READ_UINT8(CYGARC_ISCR,iscr);
if (level) {
iscr &= ~mask;
}
if (up) {
iscr |= mask;
}
CYG_ASSERT(!(up && level), "Cannot trigger on high level!");
HAL_WRITE_UINT8(CYGARC_ISCR,iscr);
} else {
CYG_FAIL("Unhandled interrupt vector");
}
}
 
/*------------------------------------------------------------------------*/
/* End of var_misc.c */
/h8300h/v2_0/src/h8300_h8300h.ld
0,0 → 1,138
//===========================================================================
//
// MLT linker script for H8/300H
//
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
 
#include <pkgconf/system.h>
#include <cyg/hal/basetype.h>
STARTUP(vectors.o)
ENTRY(CYG_LABEL_DEFN(_start))
#ifdef EXTRAS
INPUT(extras.o)
#endif
#if (__GNUC__ >= 3)
GROUP(libtarget.a libgcc.a libsupc++.a)
#else
GROUP(libtarget.a libgcc.a)
#endif
 
#define ALIGN_LMA 4
#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))
#define LMA_EQ_VMA
#define FORCE_OUTPUT . = .
 
#define SECTIONS_BEGIN
 
#define SECTION_rom_vectors(_region_, _vma_, _lma_) \
.vectors _vma_ : _lma_ \
{ FORCE_OUTPUT; KEEP (*(.vectors)) } \
> _region_
 
#define SECTION_text(_region_, _vma_, _lma_) \
.text _vma_ : _lma_ \
{ CYG_LABEL_DEFN(__stext) = ABSOLUTE(.); \
*(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \
> _region_ \
CYG_LABEL_DEFN(__etext) = .; PROVIDE (etext = .);
 
#define SECTION_fini(_region_, _vma_, _lma_) \
.fini _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.fini) } \
> _region_
 
#define SECTION_rodata(_region_, _vma_, _lma_) \
.rodata _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.rodata*) } \
> _region_
 
#define SECTION_rodata1(_region_, _vma_, _lma_) \
.rodata1 _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.rodata1) } \
> _region_
 
#define SECTION_fixup(_region_, _vma_, _lma_) \
.fixup _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.fixup) } \
> _region_
 
#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \
.gcc_except_table _vma_ : _lma_ \
{ FORCE_OUTPUT; *(.gcc_except_table) } \
> _region_
 
#define SECTION_int_fook_table(_region_, _vma_, _lma_) \
.int_fook_table _vma_ : _lma_ \
{ CYG_LABEL_DEFN(__int_fook_start) = ABSOLUTE (.); \
FORCE_OUTPUT; *(.int_fook_table) } \
> _region_ \
CYG_LABEL_DEFN(__rom_int_fook_start) = LOADADDR (.int_fook_table); \
CYG_LABEL_DEFN(__int_fook_end) = .;
 
#define SECTION_data(_region_, _vma_, _lma_) \
.data _vma_ : _lma_ \
{ CYG_LABEL_DEFN(__ram_data_start) = ABSOLUTE (.); *(.data*) *(.data1) \
. = ALIGN(4); \
KEEP(*( SORT (.ecos.table.*))) ; \
. = ALIGN(4); \
CYG_LABEL_DEFN(_GOT1_START_) = ABSOLUTE (.); *(.got1) CYG_LABEL_DEFN(_GOT1_END_) = ABSOLUTE (.); \
CYG_LABEL_DEFN(_GOT2_START_) = ABSOLUTE (.); *(.got2) CYG_LABEL_DEFN(_GOT2_END_) = ABSOLUTE (.); \
. = ALIGN (4); \
CYG_LABEL_DEFN(__CTOR_LIST__) = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) CYG_LABEL_DEFN(__CTOR_END__) = ABSOLUTE (.); \
CYG_LABEL_DEFN(__DTOR_LIST__) = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) CYG_LABEL_DEFN(__DTOR_END__) = ABSOLUTE (.); \
CYG_LABEL_DEFN(_GOT_START) = ABSOLUTE (.); CYG_LABEL_DEFN(_GLOBAL_OFFSET_TABLE_) = ABSOLUTE (.) + 32768; CYG_LABEL_DEFN(_SDA_BASE_) = ABSOLUTE (.); \
*(.got.plt) *(.got) CYG_LABEL_DEFN(_GOT_END_) = ABSOLUTE (.); \
*(.eh_frame) \
*(.dynamic) *(.sdata*) *(.sbss*) } \
> _region_ \
CYG_LABEL_DEFN(__rom_data_start) = LOADADDR (.data); \
CYG_LABEL_DEFN(__ram_data_end) = .; PROVIDE (CYG_LABEL_DEFN(__ram_data_end) = .); CYG_LABEL_DEFN(_edata) = .; PROVIDE (edata = .);
 
#define SECTION_bss(_region_, _vma_, _lma_) \
.bss _vma_ : _lma_ \
{ CYG_LABEL_DEFN(__bss_start) = ABSOLUTE (.); \
*(.scommon) *(.dynbss) *(.bss) *(COMMON) \
CYG_LABEL_DEFN(__bss_end) = ABSOLUTE (.); } \
> _region_
 
#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .);
 
#include CYGHWR_MEMORY_LAYOUT_LDI
#include CYGBLD_HAL_PLATFORM_H
 
CYG_LABEL_DEFN(hal_virtual_vector_table) = CYGHWR_HAL_VECTOR_TABLE;
 
 
/h8300h/v2_0/src/h8_sci.c
0,0 → 1,321
//=============================================================================
//
// h8_sci.c
//
// Simple driver for the H8/300H Serial Communication Interface (SCI)
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): ysato
// Contributors:ysato
// Date: 2002-03-21
// Description: Simple driver for the H8/300H Serial Communication Interface
// Clients of this file can configure the behavior with:
// CYGNUM_SCI_PORTS: number of SCI ports
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGNUM_HAL_H8300_SCI_PORTS
 
#include <cyg/hal/hal_io.h> // IO macros
#include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
#include <cyg/hal/hal_misc.h> // Helper functions
#include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS
#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP
#include <cyg/hal/hal_if.h> // Calling-if API
#include <cyg/hal/mod_regs_sci.h> // serial register definitions
 
#include <cyg/hal/h8_sci.h> // our header
 
//--------------------------------------------------------------------------
 
void
cyg_hal_plf_sci_init_channel(void* chan)
{
cyg_uint8 tmp;
cyg_uint8* base = ((channel_data_t *)chan)->base;
 
// Disable Tx/Rx interrupts, but enable Tx/Rx
HAL_WRITE_UINT8(base+_REG_SCSCR,
CYGARC_REG_SCSCR_TE|CYGARC_REG_SCSCR_RE);
 
// 8-1-no parity.
HAL_WRITE_UINT8(base+_REG_SCSMR, 0);
 
// Set speed to CYGNUM_HAL_H8300_H8300H_SCI_DEFAULT_BAUD_RATE
HAL_READ_UINT8(base+_REG_SCSMR, tmp);
tmp &= ~CYGARC_REG_SCSMR_CKSx_MASK;
tmp |= CYGARC_SCBRR_CKSx(CYGNUM_HAL_H8300_H8300H_SCI_BAUD_RATE);
HAL_WRITE_UINT8(base+_REG_SCSMR, tmp);
HAL_WRITE_UINT8(base+_REG_SCBRR, CYGARC_SCBRR_N(CYGNUM_HAL_H8300_H8300H_SCI_BAUD_RATE));
}
 
static cyg_bool
cyg_hal_plf_sci_getc_nonblock(void* __ch_data, cyg_uint8* ch)
{
cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
cyg_uint8 sr;
 
HAL_READ_UINT8(base+_REG_SCSSR, sr);
if (sr & CYGARC_REG_SCSSR_ORER) {
// Serial RX overrun. Clear error and let caller try again.
HAL_WRITE_UINT8(base+_REG_SCSSR,
CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER);
return false;
}
 
if ((sr & CYGARC_REG_SCSSR_RDRF) == 0)
return false;
 
HAL_READ_UINT8(base+_REG_SCRDR, *ch);
 
// Clear buffer full flag.
HAL_WRITE_UINT8(base+_REG_SCSSR, sr & ~CYGARC_REG_SCSSR_RDRF);
 
return true;
}
 
cyg_uint8
cyg_hal_plf_sci_getc(void* __ch_data)
{
cyg_uint8 ch;
CYGARC_HAL_SAVE_GP();
 
while(!cyg_hal_plf_sci_getc_nonblock(__ch_data, &ch));
 
CYGARC_HAL_RESTORE_GP();
return ch;
}
 
void
cyg_hal_plf_sci_putc(void* __ch_data, cyg_uint8 c)
{
cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
cyg_uint8 sr;
CYGARC_HAL_SAVE_GP();
 
do {
HAL_READ_UINT8(base+_REG_SCSSR, sr);
} while ((sr & CYGARC_REG_SCSSR_TDRE) == 0);
 
HAL_WRITE_UINT8(base+_REG_SCTDR, c);
 
// Clear empty flag.
HAL_WRITE_UINT8(base+_REG_SCSSR, sr & ~CYGARC_REG_SCSSR_TDRE);
 
// Hang around until the character has been safely sent.
do {
HAL_READ_UINT8(base+_REG_SCSSR, sr);
} while ((sr & CYGARC_REG_SCSSR_TDRE) == 0);
 
CYGARC_HAL_RESTORE_GP();
}
 
 
static channel_data_t channels[CYGNUM_HAL_H8300_SCI_PORTS];
 
static void
cyg_hal_plf_sci_write(void* __ch_data, const cyg_uint8* __buf,
cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
 
while(__len-- > 0)
cyg_hal_plf_sci_putc(__ch_data, *__buf++);
 
CYGARC_HAL_RESTORE_GP();
}
 
static void
cyg_hal_plf_sci_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
 
while(__len-- > 0)
*__buf++ = cyg_hal_plf_sci_getc(__ch_data);
 
CYGARC_HAL_RESTORE_GP();
}
 
cyg_bool
cyg_hal_plf_sci_getc_timeout(void* __ch_data, cyg_uint8* ch)
{
channel_data_t* chan = (channel_data_t*)__ch_data;
int delay_count;
cyg_bool res;
CYGARC_HAL_SAVE_GP();
 
delay_count = chan->msec_timeout * 20; // delay in .1 ms steps
 
for(;;) {
res = cyg_hal_plf_sci_getc_nonblock(__ch_data, ch);
if (res || 0 == delay_count--)
break;
CYGACC_CALL_IF_DELAY_US(50);
}
 
CYGARC_HAL_RESTORE_GP();
return res;
}
 
static int
cyg_hal_plf_sci_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
static int irq_state = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
cyg_uint8 scr;
int ret = 0;
CYGARC_HAL_SAVE_GP();
 
switch (__func) {
case __COMMCTL_IRQ_ENABLE:
irq_state = 1;
HAL_INTERRUPT_UNMASK(chan->isr_vector);
HAL_READ_UINT8(chan->base+_REG_SCSCR, scr);
scr |= CYGARC_REG_SCSCR_RIE;
HAL_WRITE_UINT8(chan->base+_REG_SCSCR, scr);
break;
case __COMMCTL_IRQ_DISABLE:
ret = irq_state;
irq_state = 0;
HAL_INTERRUPT_UNMASK(chan->isr_vector);
HAL_READ_UINT8(chan->base+_REG_SCSCR, scr);
scr &= ~CYGARC_REG_SCSCR_RIE;
HAL_WRITE_UINT8(chan->base+_REG_SCSCR, scr);
break;
case __COMMCTL_DBG_ISR_VECTOR:
ret = chan->isr_vector;
break;
case __COMMCTL_SET_TIMEOUT:
{
va_list ap;
 
va_start(ap, __func);
 
ret = chan->msec_timeout;
chan->msec_timeout = va_arg(ap, cyg_uint32);
 
va_end(ap);
}
default:
break;
}
CYGARC_HAL_RESTORE_GP();
return ret;
}
 
static int
cyg_hal_plf_sci_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
cyg_uint8 c, sr;
cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
int res = 0;
CYGARC_HAL_SAVE_GP();
 
*__ctrlc = 0;
HAL_READ_UINT8(base+_REG_SCSSR, sr);
if (sr & CYGARC_REG_SCSSR_ORER) {
// Serial RX overrun. Clear error and hope protocol recovers.
HAL_WRITE_UINT8(base+_REG_SCSSR,
CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_ORER);
res = CYG_ISR_HANDLED;
} else if (sr & CYGARC_REG_SCSSR_RDRF) {
// Received character
HAL_READ_UINT8(base+_REG_SCRDR, c);
 
// Clear buffer full flag.
HAL_WRITE_UINT8(base+_REG_SCSSR,
CYGARC_REG_SCSSR_CLEARMASK & ~CYGARC_REG_SCSSR_RDRF);
 
if( cyg_hal_is_break( &c , 1 ) )
*__ctrlc = 1;
 
res = CYG_ISR_HANDLED;
}
 
CYGARC_HAL_RESTORE_GP();
return res;
}
 
void
cyg_hal_plf_sci_init(int sci_index, int comm_index,
int rcv_vect, cyg_uint8* base)
{
channel_data_t* chan = &channels[sci_index];
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
 
// Initialize channel table
chan->base = base;
chan->isr_vector = rcv_vect;
chan->msec_timeout = 1000;
 
// Disable interrupts.
HAL_INTERRUPT_MASK(chan->isr_vector);
 
// Init channel
cyg_hal_plf_sci_init_channel(chan);
 
// Setup procs in the vector table
 
// Initialize channel procs
CYGACC_CALL_IF_SET_CONSOLE_COMM(comm_index);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, chan);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_sci_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_sci_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_sci_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_sci_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_sci_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_sci_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_sci_getc_timeout);
 
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
 
#endif // CYGNUM_HAL_H8300_H8300H_SCI_PORTS
 
//-----------------------------------------------------------------------------
// end of sh_sci.c
/aki3068net/v2_0/cdl/hal_h8300_h8300h_aki3068net.cdl
0,0 → 1,245
# ====================================================================
#
# hal_h8300_h8300h_sim.cdl
#
# AKI3068NET board HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): jskov
# Original data: bartv
# Contributors:
# Date: 1999-11-02
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_H8300_H8300H_AKI3068NET {
display "AKI3068NET"
parent CYGPKG_HAL_H8300
requires CYGPKG_HAL_H8300_H8300H
implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
implements CYGINT_HAL_DEBUG_GDB_STUBS
implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
define_header hal_h8300_h8300h_aki3068net.h
include_dir cyg/hal
description "
The aki HAL package provides the support needed to run
eCos on a Akizuki H8/3068 Network micom board."
 
compile hal_diag.c plf_misc.c delay_us.S
 
define_proc {
puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_h8300_h8300h.h>"
puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_h8300_h8300h_aki3068net.h>"
 
puts $::cdl_header "#define CYG_HAL_H8300"
puts $::cdl_header "#define CYGNUM_HAL_H8300_SCI_PORTS 1"
puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0xfffe20"
puts $::cdl_header "#define HAL_PLATFORM_CPU \"H8/300H\""
puts $::cdl_header "#define HAL_PLATFORM_BOARD \"Akizuki H8/3068 Network micom\""
puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\""
}
 
cdl_component CYG_HAL_STARTUP {
display "Startup type"
flavor data
legal_values {"ROM" "RAM"}
default_value {"ROM"}
no_define
define -file system.h CYG_HAL_STARTUP
description "
When targetting the AKI3068NET board it is possible to
build the system for either RAM bootstrap or ROM bootstrap.
RAM bootstrap generally requires that the board
is equipped with ROMs containing a suitable ROM monitor or
equivalent software that allows GDB to download the eCos
application and extend Memory on to the board.
The ROM bootstrap typically
requires that the eCos application be blown into EPROMs or
equivalent technology."
}
 
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
display "Number of communication channels on the board"
flavor data
calculated 1
}
 
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
display "Debug serial port"
flavor data
legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
default_value 0
description "
The AKI3068NET board has only one serial port. This option
chooses which port will be used to connect to a host
running GDB."
}
 
cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
display "Diagnostic serial port"
flavor data
legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
default_value 0
description "
The CQ/7708 board has only one serial port. This option
chooses which port will be used for diagnostic output."
}
 
# Real-time clock/counter specifics
cdl_component CYGNUM_HAL_RTC_CONSTANTS {
display "Real-time clock constants."
flavor none
cdl_option CYGNUM_HAL_RTC_NUMERATOR {
display "Real-time clock numerator"
flavor data
calculated 1000000000
}
cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
display "Real-time clock denominator"
flavor data
calculated 100
}
cdl_option CYGNUM_HAL_H8300_RTC_PRESCALE {
display "Real-time clock base prescale"
flavor data
calculated 8192
}
# Isn't a nice way to handle freq requirement!
cdl_option CYGNUM_HAL_RTC_PERIOD {
display "Real-time clock period"
flavor data
calculated 10
}
}
 
cdl_option CYGHWR_HAL_H8300_CPG_INPUT {
display "OSC/Clock Freqency"
flavor data
default_value 20000000
}
 
cdl_option CYGHWR_HAL_AKI3068NET_EXTRAM {
display "Extend DRAM Using"
flavor bool
default_value 1
}
 
cdl_component CYGBLD_GLOBAL_OPTIONS {
display "Global build options"
flavor none
parent CYGPKG_NONE
description "
Global build options including control over
compiler flags, linker flags and choice of toolchain."
 
 
cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
display "Global command prefix"
flavor data
no_define
default_value { "h8300-elf" }
description "
This option specifies the command prefix used when
invoking the build tools."
}
 
cdl_option CYGBLD_GLOBAL_CFLAGS {
display "Global compiler flags"
flavor data
no_define
default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -mh -mint32 -fsigned-char -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
description "
This option controls the global compiler flags which
are used to compile all packages by
default. Individual packages may define
options which override these global flags."
}
 
cdl_option CYGBLD_GLOBAL_LDFLAGS {
display "Global linker flags"
flavor data
no_define
default_value { "-g -nostdlib -Wl,--gc-sections -Wl,-static -mh" }
description "
This option controls the global linker flags. Individual
packages may define options which override these global flags."
}
}
 
cdl_component CYGHWR_MEMORY_LAYOUT {
display "Memory layout"
flavor data
no_define
calculated { CYG_HAL_STARTUP == "RAM" ? "h8300_h8300h_aki3068net_ram" : \
"h8300_h8300h_aki3068net_rom" }
 
cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
display "Memory layout linker script fragment"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi>" : \
"<pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi>" }
}
 
cdl_option CYGHWR_MEMORY_LAYOUT_H {
display "Memory layout header file"
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_H
calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_h8300_h8300h_aki3068net_ram.h>" : \
"<pkgconf/mlt_h8300_h8300h_aki3068net_rom.h>" }
}
}
cdl_option CYGSEM_HAL_ROM_MONITOR {
display "Behave as a ROM monitor"
flavor bool
default_value 0
parent CYGPKG_HAL_ROM_MONITOR
requires { CYG_HAL_STARTUP == "ROM" }
description "
Enable this option if this program is to be used as a ROM monitor,
i.e. applications will be loaded into RAM on the board, and this
ROM monitor may process exceptions or interrupts generated from the
application. This enables features such as utilizing a separate
interrupt stack when exceptions are generated."
}
}
/aki3068net/v2_0/include/plf_intr.h
0,0 → 1,76
#ifndef CYGONCE_HAL_PLF_INTR_H
#define CYGONCE_HAL_PLF_INTR_H
 
//==========================================================================
//
// plf_intr.h
//
// AKI3068NET board interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jlarmour
// Contributors: jlarmour
// Date: 1999-09-09
// Purpose: Define Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock for the simulator. This file
// is empty since none are required!
//
// Usage:
// #include <cyg/hal/plf_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
 
//--------------------------------------------------------------------------
 
externC void h8300h_reset (void);
externC void hal_delay_us(int usecs);
 
#define HAL_PLATFORM_RESET(x)
#define HAL_PLATFORM_RESET_ENTRY &h8300h_reset
 
#define HAL_DELAY_US(n) hal_delay_us((n) / 16)
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLF_INTR_H
// End of plf_intr.h
/aki3068net/v2_0/include/plf_stub.h
0,0 → 1,90
#ifndef CYGONCE_HAL_PLF_STUB_H
#define CYGONCE_HAL_PLF_STUB_H
 
//=============================================================================
//
// plf_stub.h
//
// Platform header for GDB stub support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): jskov
// Contributors:jskov
// Date: 1999-05-18
// Purpose: Platform HAL stub support for H8/300H simulator
// Usage: #include <cyg/hal/plf_stub.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/system.h>
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/infra/cyg_type.h> // CYG_UNUSED_PARAM, externC
 
#include <cyg/hal/h8300_stub.h> // architecture stub support
 
#include <cyg/hal/hal_diag.h> // hal_diag_led_on
 
//----------------------------------------------------------------------------
// Define some platform specific communication details. This is mostly
// handled by hal_if now, but we need to make sure the comms tables are
// properly initialized.
 
externC void cyg_hal_plf_comms_init(void);
 
#define HAL_STUB_PLATFORM_INIT_SERIAL() cyg_hal_plf_comms_init()
 
#define HAL_STUB_PLATFORM_SET_BAUD_RATE(baud) CYG_UNUSED_PARAM(int, (baud))
#define HAL_STUB_PLATFORM_INTERRUPTIBLE 0
 
//----------------------------------------------------------------------------
// Stub initializer.
#ifdef CYGSEM_HAL_ROM_MONITOR
# define HAL_STUB_PLATFORM_INIT() hal_diag_led_on()
#else
# define HAL_STUB_PLATFORM_INIT() CYG_EMPTY_STATEMENT
#endif
 
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_PLF_STUB_H
// End of plf_stub.h
/aki3068net/v2_0/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.h
0,0 → 1,18
// eCos memory layout - Wed Nov 24 13:10:23 1999
 
// This is a generated file - changes will be lost if ConfigTool(MLT) is run
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
 
#define CYGMEM_REGION_ram (0x400000)
#if !defined(CYGPKG_IO_ETH_DRIVERS)
#define CYGMEM_REGION_ram_SIZE (0x200000)
#else
#define CYGMEM_REGION_ram_SIZE (0x200000-0xC000)
#endif
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
 
/aki3068net/v2_0/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.ldi
0,0 → 1,41
// eCos memory layout - Fri Oct 20 08:25:16 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
OUTPUT_FORMAT("elf32-h8300")
OUTPUT_ARCH(h8300h)
 
MEMORY
{
rom : ORIGIN = 0x000000, LENGTH = 0x60000
#if !defined(CYGPKG_IO_ETH_DRIVERS)
ram : ORIGIN = 0xffbf20, LENGTH = 0x4000-0x100
#else
ram : ORIGIN = 0x5F4000, LENGTH = 0xC000
iram : ORIGIN = 0xffbf20, LENGTH = 0x4000-0x100
#endif
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_rom_vectors (rom, 0x000000, LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (rom, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
#if !defined(CYGPKG_IO_ETH_DRIVERS)
SECTION_int_fook_table (ram, 0xffbf20,FOLLOWING (.gcc_except_table))
SECTION_data (ram, ALIGN (0x4),FOLLOWING (.int_fook_table))
SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA)
#else
SECTION_data (ram, 0x5F4000,FOLLOWING (.gcc_except_table))
SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA)
SECTION_int_fook_table (iram, 0xffbf20,FOLLOWING (.data))
#endif
SECTIONS_END
}
/aki3068net/v2_0/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.h
0,0 → 1,14
// eCos memory layout - Wed Nov 24 13:10:23 1999
 
// This is a generated file - changes will be lost if ConfigTool(MLT) is run
 
#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>
 
#endif
 
#define CYGMEM_REGION_ram (0x420000)
#define CYGMEM_REGION_ram_SIZE (0x1E0000)
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
 
/aki3068net/v2_0/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.ldi
0,0 → 1,30
// eCos memory layout - Fri Oct 20 08:25:16 2000
 
// This is a generated file - do not edit
 
#include <cyg/infra/cyg_type.inc>
 
OUTPUT_FORMAT("elf32-h8300")
OUTPUT_ARCH(h8300h)
 
MEMORY
{
ram : ORIGIN = 0x400000, LENGTH = 0x20000
}
 
SECTIONS
{
SECTIONS_BEGIN
SECTION_text (ram, 0x400000, LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_int_fook_table (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x4),LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x4),LMA_EQ_VMA)
SECTIONS_END
}
 
fook_table_address = 0xffbf20;
/aki3068net/v2_0/include/pkgconf/mlt_h8300_h8300h_aki3068net_rom.mlt
0,0 → 1,12
version 0
region ram ffbf20 ffff20 0 !
section rom_vectors 0 1 0 1 1 1 1 1 0 60000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
section data 0 4 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
/aki3068net/v2_0/include/pkgconf/mlt_h8300_h8300h_aki3068net_ram.mlt
0,0 → 1,12
version 0
region ram 400000 10000 0 !
section text 0 1 0 1 0 1 0 1 400000 400000 fini fini !
section fini 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 1 0 1 int_fook_table int_fook_table !
section int_fook_table 0 1 0 1 0 1 0 1 data data !
section data 0 4 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 0 !
 
/aki3068net/v2_0/include/platform.inc
0,0 → 1,127
#ifndef CYGONCE_HAL_PLATFORM_INC
#define CYGONCE_HAL_PLATFORM_INC
##=============================================================================
##
## platform.inc
##
## AKI3068NET "board" assembler header file
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): jlarmour
## Contributors: Yoshinori Sato
## Date: 1999-09-09
## Purpose: AKI3068NET "board" definitions.
## Description: This file contains various definitions and macros that are
## required for writing assembly code for the AKI3068NET board
## Currently there are none
## Usage:
## #include <cyg/hal/platform.inc>
## ...
##
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/mod_regs_bsc.h>
#include <cyg/hal/mod_regs_pio.h>
 
##-----------------------------------------------------------------------------
 
#define CYGPKG_HAL_H8300_MEMC_DEFINED
.macro hal_memc_init
#if defined(CYG_HAL_STARTUP_ROM)
mov.l #init_regs,er0
mov.w #8,e1
1:
mov.l @er0+,er2
mov.w @er0+,r1
mov.b r1l,@er2
dec.w #1,e1
bne 1b
bra 2f
 
init_regs:
.long CYGARC_RTCOR
.word 5 ; 1.5[ms] reflesh cycle
.long CYGARC_RTMCSR
.word 0x30 ; clk x 2048
.long CYGARC_DRCRB
.word 0x90
.long CYGARC_DRCRA
.word 0x22
.long CYGARC_P1DDR
.word 0xff
.long CYGARC_P2DDR
.word 0xff
.long CYGARC_P5DDR
.word 0x01
.long CYGARC_P8DDR
.word 0x0c
init_regs_end:
 
2:
#endif
.endm
 
#define CYGPKG_HAL_H8300_DIAG_DEFINED
 
.macro hal_diag_init
mov.b #0x83,r0l
mov.b r0l,@CYGARC_PADDR
mov.b #0,r0l
mov.b r0l,@CYGARC_PADR
.endm
 
.macro hal_diag_excpt_start
.endm
 
.macro hal_diag_intr_start
.endm
 
.macro hal_diag_restore
.endm
 
.macro hal_diag_data
.endm
 
#------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_PLATFORM_INC
# end of platform.inc
/aki3068net/v2_0/include/hal_diag.h
0,0 → 1,80
#ifndef CYGONCE_HAL_HAL_DIAG_H
#define CYGONCE_HAL_HAL_DIAG_H
 
/*=============================================================================
//
// hal_diag.h
//
// HAL Support for Kernel Diagnostic Routines
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-04-06
// Purpose: HAL Support for Kernel Diagnostic Routines
// Description: Diagnostic routines for use during kernel development.
// Usage: #include <cyg/hal/hal_diag.h>
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
 
externC void hal_diag_init(void);
externC void hal_diag_write_char(cyg_uint8 c);
externC void hal_diag_read_char(cyg_uint8 *c);
 
/*---------------------------------------------------------------------------*/
 
#define HAL_DIAG_INIT() hal_diag_init()
 
#define HAL_DIAG_WRITE_CHAR(_c_) hal_diag_write_char(_c_)
 
#define HAL_DIAG_READ_CHAR(_c_) hal_diag_read_char(&_c_)
 
//-----------------------------------------------------------------------------
// Simple LED control.
externC void hal_diag_led_on( void );
externC void hal_diag_led_off( void );
 
/*---------------------------------------------------------------------------*/
/* end of hal_diag.h */
#endif /* CYGONCE_HAL_HAL_DIAG_H */
/aki3068net/v2_0/doc/README
0,0 → 1,2
Please visit http://homepage2.nifty.com/ysato/eCos/index.en.html for up to date
information, particularly on which GNU tools to use and patches.
/aki3068net/v2_0/ChangeLog
0,0 → 1,45
2002-04-29 Jonathan Larmour <jlarmour@redhat.com>
 
* src/delay_us.S:
Don't use .file as it can confuse debugging since the .file
doesn't contain the path and therefore the debugger will never
know where it lives! This conflicts with using -Wa,--gstabs.
 
2002-04-24 Yoshinori Sato <qzb04471@nifty.ne.jp>
 
* New package.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
/aki3068net/v2_0/src/delay_us.S
0,0 → 1,39
;;delay_us
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/arch.inc>
#include <cyg/hal/basetype.h>
#include <cyg/hal/mod_regs_tmr.h>
#define DELAY_COUNT (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)*16/8
// .file "delay_us.S"
.h8300h
.text
 
.global CYG_LABEL_DEFN(hal_delay_us)
CYG_LABEL_DEFN(hal_delay_us):
mov.b #0,r1l
mov.b r1l,@CYGARC_8TCNT2:8
mov.b r1l,@CYGARC_8TCSR2:8
mov.b #DELAY_COUNT+1,r1l
mov.b r1l,@CYGARC_TCORA2:8
mov.b #0x09,r1l
mov.b r1l,@CYGARC_8TCR2:8
mov.b #0,r2h
sub.w e1,e1
1:
mov.l er0,er0
ble 3f
2:
btst #6,@CYGARC_8TCSR2:8
beq 2b
bclr #6,@CYGARC_8TCSR2:8
dec.l #1,er0
bra 1b
3:
mov.b #0,r0l
mov.b r0l,@CYGARC_8TCR2
rts
 
/aki3068net/v2_0/src/hal_diag.c
0,0 → 1,187
/*=============================================================================
//
// hal_diag.c
//
// HAL diagnostic output code
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): dsm
// Contributors: dsm
// Date: 1998-03-13
// Purpose: HAL diagnostic output
// Description: Implementations of HAL diagnostic output support.
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/hal_diag.h>
#include <cyg/hal/h8_sci.h>
#include <cyg/hal/var_intr.h>
#include <cyg/hal/hal_intr.h>
#include <cyg/hal/hal_misc.h>
 
#define SCI_BASE ((cyg_uint8*)0xffffb8)
 
static channel_data_t channel = { (cyg_uint8*)SCI_BASE, 0, 0};
 
void
cyg_hal_plf_comms_init(void)
{
static int initialized = 0;
 
if (initialized)
return;
 
initialized = 1;
 
cyg_hal_plf_sci_init(0, 0, CYGNUM_HAL_INTERRUPT_RXI1, SCI_BASE);
}
 
//=============================================================================
// Led control
//=============================================================================
#define LED CYGARC_PADR
 
void
hal_diag_led_on( void )
{
HAL_WRITE_UINT8(LED, 0x01);
}
 
void
hal_diag_led_off( void )
{
HAL_WRITE_UINT8(LED, 0);
}
 
//=============================================================================
// Compatibility with older stubs
//=============================================================================
 
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
#include <cyg/hal/hal_stub.h> // hal_output_gdb_string
#endif
 
void hal_diag_init(void)
{
cyg_hal_plf_sci_init_channel(&channel);
}
 
void
hal_diag_write_char( cyg_uint8 c )
{
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
static char line[100];
static int pos = 0;
 
// No need to send CRs
if( c == '\r' ) return;
 
line[pos++] = c;
 
if( c == '\n' || pos == sizeof(line) )
{
CYG_INTERRUPT_STATE old;
 
// Disable interrupts. This prevents GDB trying to interrupt us
// while we are in the middle of sending a packet. The serial
// receive interrupt will be seen when we re-enable interrupts
// later.
CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);
while(1)
{
char c1;
static char hex[] = "0123456789ABCDEF";
cyg_uint8 csum = 0;
int i;
cyg_hal_plf_sci_putc(&channel, '$');
cyg_hal_plf_sci_putc(&channel, 'O');
csum += 'O';
for( i = 0; i < pos; i++ )
{
char ch = line[i];
char h = hex[(ch>>4)&0xF];
char l = hex[ch&0xF];
cyg_hal_plf_sci_putc(&channel, h);
cyg_hal_plf_sci_putc(&channel, l);
csum += h;
csum += l;
}
cyg_hal_plf_sci_putc(&channel, '#');
cyg_hal_plf_sci_putc(&channel, hex[(csum>>4)&0xF]);
cyg_hal_plf_sci_putc(&channel, hex[csum&0xF]);
 
// Wait for the ACK character '+' from GDB here and handle
// receiving a ^C instead.
c1 = (char) cyg_hal_plf_sci_getc(&channel);
 
if( c1 == '+' )
break; // a good acknowledge
 
// Check for user break.
if( cyg_hal_is_break( &c1, 1 ) )
cyg_hal_user_break( NULL );
 
// otherwise, loop round again
}
pos = 0;
 
// And re-enable interrupts
CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);
}
#else // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
cyg_hal_plf_sci_putc(&channel, c);
#endif
}
 
void
hal_diag_read_char(cyg_uint8 *c)
{
*c = (char) cyg_hal_plf_sci_getc(&channel);
}
 
/*===========================================================================*/
/* EOF hal_diag.c */
 
/aki3068net/v2_0/src/plf_misc.c
0,0 → 1,161
//==========================================================================
//
// plf_misc.c
//
// HAL platform miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jlarmour
// Date: 1999-09-09
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h> // Base types
 
#include <cyg/hal/hal_arch.h> // architectural definitions
#include <cyg/hal/hal_io.h>
#include <cyg/hal/hal_if.h>
#include <cyg/hal/plf_intr.h>
#include <cyg/hal/var_arch.h>
 
/*------------------------------------------------------------------------*/
 
void hal_platform_init(void)
{
hal_if_init();
}
 
void h8300h_reset(void)
{
__asm__ ("ldc #0x80,ccr\n"
"jmp @@0\n\t");
}
 
/*------------------------------------------------------------------------*/
/* Control C ISR support */
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
 
struct Hal_SavedRegisters *hal_saved_interrupt_state;
 
#endif
 
/*------------------------------------------------------------------------*/
/* clock support */
 
void hal_clock_initialize(cyg_uint32 period)
{
CYG_BYTE prescale;
#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8
prescale = 0x01;
#else
#if CYGNUM_HAL_H8300_RTC_PRESCALE == 64
prescale = 0x02;
#else
#if CYGNUM_HAL_H8300_RTC_PRESCALE == 8192
prescale = 0x03;
#else
#error illigal RTC prescale setting
#endif
#endif
#endif
HAL_WRITE_UINT8(CYGARC_TCORA3,period);
HAL_WRITE_UINT8(CYGARC_8TCNT3,0x00);
HAL_WRITE_UINT8(CYGARC_8TCR3,0x48 | prescale);
HAL_WRITE_UINT8(CYGARC_8TCSR3,0x00);
}
 
void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period)
{
HAL_WRITE_UINT8(CYGARC_8TCR3,0x00);
HAL_WRITE_UINT8(CYGARC_8TCSR3,0x00);
hal_clock_initialize(period);
}
 
void hal_clock_read(cyg_uint32 *pvalue)
{
CYG_BYTE val;
HAL_READ_UINT8(CYGARC_8TCNT3,val);
*pvalue = val;
}
 
//---------------------------------------------------------------------------
// Low-level delay (in microseconds)
 
#if 0
void hal_delay_us(int usecs)
{
volatile CYG_BYTE *tcr = (CYG_BYTE *)CYGARC_8TCR2;
volatile CYG_BYTE *tcnt = (CYG_BYTE *)CYGARC_8TCNT2;
short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/8*25;
//short clocks_per_us = (CYGHWR_HAL_H8300_PROCESSOR_SPEED/1000000)/20;
unsigned char val1,val2;
short diff;
 
usecs /= 25;
 
*tcnt = 0x00;
*tcr = 0x01;
diff = 0;
while (usecs > 0) {
while (diff < clocks_per_us) {
val1 = *tcnt;
while ((val2 = *tcnt) == val1);
if (val2 < val1)
diff += val2 + 0x100 - val1;
else
diff += val2 - val1;
}
usecs -= diff / clocks_per_us;
diff -= clocks_per_us;
}
*tcr = 0x00;
}
#endif
 
/*------------------------------------------------------------------------*/
/* End of plf_misc.c */
/arch/v2_0/cdl/hal_h8300.cdl
0,0 → 1,89
# ====================================================================
#
# hal_h8300.cdl
#
# H8/300 architectural HAL package configuration data
#
# ====================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
# ====================================================================
######DESCRIPTIONBEGIN####
#
# Author(s): jskov
# Original data: bartv, nickg
# Contributors: dmoseley
# Date: 1999-11-02
#
#####DESCRIPTIONEND####
#
# ====================================================================
 
cdl_package CYGPKG_HAL_H8300 {
display "H8/300 architecture"
parent CYGPKG_HAL
hardware
include_dir cyg/hal
define_header hal_h8300.h
description "
The H8/300 architecture HAL package provides generic
support for this processor architecture. It is also
necessary to select a specific target platform HAL
package."
 
cdl_interface CYGINT_HAL_H8300_VARIANT {
display "Number of variant implementations in this configuration"
requires 1 == CYGINT_HAL_H8300_VARIANT
}
 
cdl_option CYGDBG_HAL_H8300_DEBUG_GDB_CTRLC_SUPPORT {
display "Architecture GDB CTRLC support"
calculated { CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT || CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT }
active_if { CYGINT_HAL_DEBUG_GDB_CTRLC_UNSUPPORTED == 0 }
description "
If either the CTRLC or BREAK support options in hal.h are set
then set our own option to turn on shared generic support for
control C handling."
}
 
compile hal_misc.c hal_syscall.c context.S h8300_stub.c
 
make {
<PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.S
$(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $<
@echo $@ ": \\" > $(notdir $@).deps
@tail +2 vectors.tmp >> $(notdir $@).deps
@echo >> $(notdir $@).deps
@rm vectors.tmp
}
}
/arch/v2_0/include/hal_io.h
0,0 → 1,145
#ifndef CYGONCE_HAL_HAL_IO_H
#define CYGONCE_HAL_HAL_IO_H
 
//=============================================================================
//
// hal_io.h
//
// HAL device IO register support.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-13
// Purpose: Define IO register support
// Description: The macros defined here provide the HAL APIs for handling
// device IO control registers.
//
// Usage:
// #include <cyg/hal/hal_io.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <cyg/infra/cyg_type.h>
 
//-----------------------------------------------------------------------------
// IO Register address.
// This type is for recording the address of an IO register.
 
typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
 
//-----------------------------------------------------------------------------
// BYTE Register access.
// Individual and vectorized access to 8 bit registers.
 
#define HAL_READ_UINT8( _register_, _value_ ) \
((_value_) = *((volatile CYG_BYTE *)(_register_)))
 
#define HAL_WRITE_UINT8( _register_, _value_ ) \
(*((volatile CYG_BYTE *)(_register_)) = (_value_))
 
#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
}
 
#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
}
 
 
//-----------------------------------------------------------------------------
// 16 bit access.
// Individual and vectorized access to 16 bit registers.
#define HAL_READ_UINT16( _register_, _value_ ) \
((_value_) = *((volatile CYG_WORD16 *)(_register_)))
 
#define HAL_WRITE_UINT16( _register_, _value_ ) \
(*((volatile CYG_WORD16 *)(_register_)) = (_value_))
 
#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
}
 
#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
}
 
//-----------------------------------------------------------------------------
// 32 bit access.
// Individual and vectorized access to 32 bit registers.
#define HAL_READ_UINT32( _register_, _value_ ) \
((_value_) = *((volatile CYG_WORD32 *)(_register_)))
 
#define HAL_WRITE_UINT32( _register_, _value_ ) \
(*((volatile CYG_WORD32 *)(_register_)) = (_value_))
 
#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
(_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
}
 
#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
{ \
cyg_count32 _i_,_j_; \
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
}
 
//-----------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_HAL_IO_H
// End of hal_io.h
/arch/v2_0/include/basetype.h
0,0 → 1,65
#ifndef CYGONCE_HAL_BASETYPE_H
#define CYGONCE_HAL_BASETYPE_H
 
//=============================================================================
//
// basetype.h
//
// Standard types for this architecture.
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 1997-09-08
// Purpose: Define architecture base types.
// Usage: Included by "cyg_type.h", do not use directly
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
//-----------------------------------------------------------------------------
// Characterize the architecture
 
#define CYG_BYTEORDER CYG_MSBFIRST // Big endian
 
#define CYG_LABEL_DEFN(_name_) _##_name_
 
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_BASETYPE_H
// End of basetype.h
/arch/v2_0/include/arch.inc
0,0 → 1,195
#ifndef CYGONCE_HAL_ARCH_INC
#define CYGONCE_HAL_ARCH_INC
##=============================================================================
##
## arch.inc
##
## H8/300 assembler header file
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): yoshinori sato
## Contributors: yoshinori sato
## Date: 2002-02-14
## Purpose: Architecture definitions.
## Description: This file contains various definitions and macros that are
## useful for writing assembly code for the H8300 CPU family.
## Usage:
## #include <cyg/hal/arch.inc>
## ...
##
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <pkgconf/hal.h>
#include <cyg/hal/variant.inc>
 
##-----------------------------------------------------------------------------
## CPU specific macros. These provide a common assembler interface to
## operations that may have CPU specific implementations on different
## variants of the architecture.
 
#ifndef CYGPKG_HAL_H8300_CPU_INIT_DEFINED
# Initialize CPU
.macro hal_cpu_init
# Set up the PSW
ldc #0xc0,ccr
.endm
#endif
 
# Enable interrupts
.macro hal_cpu_int_enable
andc #0x3f,ccr
.endm
 
# Disable interrupts
.macro hal_cpu_int_disable
orc #0xc0,ccr
.endm
 
# Merge the interrupt enable state of the status register in
# \sr with the current sr.
.macro hal_cpu_int_merge sr wk=r0l
and.b #0xc0,\sr
stc ccr,\wk
bclr #7,\wk
or \sr,\wk
ldc \wk,ccr
.endm
 
# Enable further exception processing, and disable
# interrupt processing.
.macro hal_cpu_except_enable
.endm
# Return from exception.
.macro hal_cpu_eret pc,sr
.endm
##-----------------------------------------------------------------------------
# Default interrupt decoding macros.
 
#ifndef CYGPKG_HAL_H8300_INTC_DEFINED
 
#ifndef CYGPKG_HAL_H8300_INTC_INIT_DEFINED
# initialize all interrupts to disabled
.macro hal_intc_init
.endm
#endif
 
.macro hal_intc_decode vnum
.endm
 
#endif
 
#------------------------------------------------------------------------------
# MMU macros.
#ifndef CYGPKG_HAL_H8300_MMU_DEFINED
 
.macro hal_mmu_init
.endm
 
#endif
 
#------------------------------------------------------------------------------
# MEMC macros.
#ifndef CYGPKG_HAL_H8300_MEMC_DEFINED
 
.macro hal_memc_init
.endm
 
#endif
#------------------------------------------------------------------------------
# Cache macros.
#ifndef CYGPKG_HAL_H8300_CACHE_DEFINED
 
.macro hal_cache_init
.endm
 
#endif
 
#------------------------------------------------------------------------------
# Diagnostics macros.
#ifndef CYGPKG_HAL_H8300_DIAG_DEFINED
 
.macro hal_diag_init
.endm
 
.macro hal_diag_excpt_start
.endm
 
.macro hal_diag_intr_start
.endm
 
.macro hal_diag_restore
.endm
 
.macro hal_diag_data
.endm
#endif
 
#------------------------------------------------------------------------------
# Timer initialization.
#ifndef CYGPKG_HAL_H8300_TIMER_DEFINED
 
.macro hal_timer_init
.endm
 
#endif
 
#------------------------------------------------------------------------------
# Monitor initialization.
#ifndef CYGPKG_HAL_H8300_MON_DEFINED
 
.macro hal_mon_init
.endm
 
#endif
 
#------------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_ARCH_INC
# end of arch.inc
/arch/v2_0/include/h8300_stub.h
0,0 → 1,112
#ifndef CYGONCE_HAL_H8300_STUB_H
#define CYGONCE_HAL_H8300_STUB_H
//========================================================================
//
// h8300_stub.h
//
// H8/300-specific definitions for generic stub
//
//========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-13
// Purpose:
// Description: H8/300-specific definitions for generic stub
// Usage:
//
//####DESCRIPTIONEND####
//
//========================================================================
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define NUMREGS 32
 
#define REGSIZE( _x_ ) (4)
 
typedef unsigned long target_register_t;
 
enum regnames {
ER0,ER1,ER2,ER3,ER4,ER5,ER6,
SP, PC, CCR
};
 
typedef enum regnames regnames_t;
 
/* Given a trap value TRAP, return the corresponding signal. */
extern int __computeSignal (unsigned int trap_number);
 
/* Return the SPARC trap number corresponding to the last-taken trap. */
extern int __get_trap_number (void);
 
/* Return the currently-saved value corresponding to register REG. */
extern target_register_t get_register (regnames_t reg);
 
/* Store VALUE in the register corresponding to WHICH. */
extern void put_register (regnames_t which, target_register_t value);
 
/* Set the currently-saved pc register value to PC. This also updates NPC
as needed. */
extern void set_pc (target_register_t pc);
 
/* Set things up so that the next user resume will execute one instruction.
This may be done by setting breakpoints or setting a single step flag
in the saved user registers, for example. */
void __single_step (void);
 
/* Clear the single-step state. */
void __clear_single_step (void);
 
/* If the breakpoint we hit is in the breakpoint() instruction, return a
non-zero value. */
extern int __is_breakpoint_function (void);
 
/* Skip the current instruction. */
extern void __skipinst (void);
 
extern void __install_breakpoints (void);
 
extern void __clear_breakpoints (void);
 
#ifdef __cplusplus
} /* extern "C" */
#endif
 
#endif // ifndef CYGONCE_HAL_H8300_STUB_H
/arch/v2_0/include/hal_intr.h
0,0 → 1,249
#ifndef CYGONCE_HAL_HAL_INTR_H
#define CYGONCE_HAL_HAL_INTR_H
//==========================================================================
//
// hal_intr.h
//
// HAL Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-13
// Purpose: Define Interrupt support
// Description: The macros defined here provide the HAL APIs for handling
// interrupts and the clock.
// Usage:
// #include <cyg/hal/hal_intr.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
#include <cyg/hal/hal_io.h>
 
#include <cyg/hal/var_intr.h>
 
//--------------------------------------------------------------------------
// Static data used by HAL
 
// ISR tables
externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
 
// VSR table
externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
 
//--------------------------------------------------------------------------
// Default ISR
// The #define is used to test whether this routine exists, and to allow
// us to call it.
 
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
 
#define HAL_DEFAULT_ISR hal_default_isr
 
//--------------------------------------------------------------------------
// Interrupt state storage
 
typedef cyg_uint32 CYG_INTERRUPT_STATE;
 
//--------------------------------------------------------------------------
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
// Routine to execute DSRs using separate interrupt stack
externC void hal_interrupt_stack_call_pending_DSRs(void);
#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
hal_interrupt_stack_call_pending_DSRs()
 
// these are offered solely for stack usage testing
// if they are not defined, then there is no interrupt stack.
#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
// use them to declare these extern however you want:
// extern char HAL_INTERRUPT_STACK_BASE[];
// extern char HAL_INTERRUPT_STACK_TOP[];
// is recommended
 
#endif
 
//--------------------------------------------------------------------------
// Interrupt control macros
 
#define HAL_DISABLE_INTERRUPTS(_old_) \
asm volatile ( \
"sub.l er0,er0\n\t" \
"stc ccr,r0l\n\t" \
"orc #0x80,ccr\n\t" \
"and.b #0xc0,r0l\n\t" \
"mov.l er0,%0" \
: "=r"(_old_) \
: \
: "er0" \
);
 
#define HAL_ENABLE_INTERRUPTS() \
asm volatile ( \
"andc #0x3f,ccr" \
);
 
#define HAL_RESTORE_INTERRUPTS(_old_) \
asm volatile ( \
"mov.l %0,er0\n\t" \
"and.b #0xc0,r0l\n\t" \
"stc ccr,r0h\n\t" \
"and.b #0x3f,r0h\n\t" \
"or.b r0h,r0l\n\t" \
"ldc r0l,ccr" \
: \
: "r"(_old_) \
: "er0" \
);
 
#define HAL_QUERY_INTERRUPTS(_old_) \
asm volatile ( \
"sub.l er0,er0\n\t" \
"stc ccr,r0l\n\t" \
"and.b #0xc0,r0l\n\t" \
"mov.l er0,%0" \
: "=r"(_old_) \
);
 
#ifndef HAL_TRANSLATE_VECTOR
 
#define HAL_TRANSLATE_VECTOR(_vector_,_index_) _index_ = (_vector_)
 
#endif
 
//--------------------------------------------------------------------------
// Interrupt and VSR attachment macros
 
#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
CYG_MACRO_START \
cyg_uint32 _index_; \
HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
\
if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \
(_state_) = 0; \
else \
(_state_) = 1; \
CYG_MACRO_END
 
#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
CYG_MACRO_START \
cyg_uint32 _index_; \
HAL_TRANSLATE_VECTOR(_vector_,_index_); \
\
if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \
{ \
hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \
hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \
hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \
} \
CYG_MACRO_END
 
#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
CYG_MACRO_START \
cyg_uint32 _index_; \
HAL_TRANSLATE_VECTOR(_vector_,_index_); \
\
if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \
{ \
hal_interrupt_handlers[_index_] = (CYG_ADDRESS)HAL_DEFAULT_ISR; \
hal_interrupt_data[_index_] = 0; \
hal_interrupt_objects[_index_] = 0; \
} \
CYG_MACRO_END
 
#define HAL_VSR_GET( _vector_, _pvsr_ ) \
*((CYG_ADDRESS *)_pvsr_) = hal_vsr_table[_vector_];
 
#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \
if( _poldvsr_ != NULL ) \
*(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_;
 
 
//--------------------------------------------------------------------------
// Interrupt controller access
// Read interrupt control registers back after writing to them. This
// ensures that the written value is not sitting in the store buffers
// when interrupts are re-enabled.
 
#define HAL_INTERRUPT_MASK( _vector_ ) \
hal_interrupt_mask( _vector_ )
 
#define HAL_INTERRUPT_UNMASK( _vector_ ) \
hal_interrupt_unmask( _vector_ )
 
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
hal_interrupt_acknowledge( _vector_ )
 
#if !defined(HAL_INTERRUPT_CONFIGURE)
 
#error HAL_INTERRUPT_CONFIGURE not defined by variant
 
#endif
 
#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \
hal_interrupt_set_level( _vector_, _level_ )
 
 
externC void hal_interrupt_mask(int vector);
externC void hal_interrupt_unmask(int vector);
externC void hal_interrupt_acknowledge(int vector);
externC void hal_interrupt_set_level(int vector,int level);
//--------------------------------------------------------------------------
// Clock control.
// This is almost all handled in the var_intr.h.
 
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
#define HAL_CLOCK_LATENCY(_pvalue_) HAL_CLOCK_READ(_pvalue_)
#endif
 
//--------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_HAL_INTR_H
// EOF hal_intr.h
/arch/v2_0/include/hal_arch.h
0,0 → 1,295
#ifndef CYGONCE_HAL_HAL_ARCH_H
#define CYGONCE_HAL_HAL_ARCH_H
//==========================================================================
//
// hal_arch.h
//
// Architecture specific abstractions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg
// Date: 1999-02-18
// Purpose: Define architecture abstractions
// Usage: #include <cyg/hal/hal_arch.h>
//
//####DESCRIPTIONEND####
//
//==========================================================================
 
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
 
#include <cyg/hal/var_arch.h>
 
//--------------------------------------------------------------------------
// Exception handling function.
// This function is defined by the kernel according to this prototype. It is
// invoked from the HAL to deal with any CPU exceptions that the HAL does
// not want to deal with itself. It usually invokes the kernel's exception
// delivery mechanism.
 
externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
 
//--------------------------------------------------------------------------
// Bit manipulation routines
 
externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask);
externC cyg_uint32 hal_msbit_index(cyg_uint32 mask);
 
#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask);
 
#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask);
 
//--------------------------------------------------------------------------
// Context Initialization
// Initialize the context of a thread.
// Arguments:
// _sp_ name of variable containing current sp, will be written with new sp
// _thread_ thread object address, passed as argument to entry point
// _entry_ entry point address.
// _id_ bit pattern used in initializing registers, for debugging.
 
#ifndef HAL_THREAD_INIT_CONTEXT_EXTRA
#define HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_)
#endif
 
#define HAL_THREAD_INIT_CONTEXT( _sp_, _thread_, _entry_, _id_ ) \
{ \
register HAL_SavedRegisters *_regs_; \
_regs_ = (HAL_SavedRegisters *)(((CYG_ADDRWORD)(_sp_)&~15) - \
sizeof(HAL_SavedRegisters)*2); \
HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_); \
_regs_->er0 = (CYG_WORD)(_thread_); \
_regs_->er1 = (_id_)|0xddd1; \
_regs_->er2 = (_id_)|0xddd2; \
_regs_->er3 = (_id_)|0xddd3; \
_regs_->er4 = (_id_)|0xddd4; \
_regs_->er5 = (_id_)|0xddd5; \
_regs_->er6 = (_id_)|0xddd6; \
_regs_->ccr = 0x00; \
_regs_->pc = (CYG_WORD)(_entry_); \
_sp_ = (CYG_ADDRESS)_regs_; \
}
 
//--------------------------------------------------------------------------
// Context switch macros.
// The arguments are pointers to locations where the stack pointer
// of the current thread is to be stored, and from where the sp of the
// next thread is to be fetched.
 
externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
externC void hal_thread_load_context( CYG_ADDRESS to )
__attribute__ ((noreturn));
 
#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \
hal_thread_switch_context((CYG_ADDRESS)_tspptr_, \
(CYG_ADDRESS)_fspptr_);
 
#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \
hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
 
//--------------------------------------------------------------------------
// Execution reorder barrier.
// When optimizing the compiler can reorder code. In multithreaded systems
// where the order of actions is vital, this can sometimes cause problems.
// This macro may be inserted into places where reordering should not happen.
 
#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
 
//--------------------------------------------------------------------------
// Breakpoint support
// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to
// happen if executed.
// HAL_BREAKINST is the value of the breakpoint instruction and
// HAL_BREAKINST_SIZE is its size in bytes.
 
#define __HAL_BREAKPOINT(_label_) # _label_
#define HAL_BREAKPOINT(_label_) \
asm volatile (" .globl " __HAL_BREAKPOINT(_label_) "\n" \
__HAL_BREAKPOINT(_label_) ":\n\t" \
"trapa #3" \
);
 
#define HAL_BREAKINST 0x5703
 
#define HAL_BREAKINST_SIZE 2
 
//--------------------------------------------------------------------------
// Thread register state manipulation for GDB support.
 
// Translate a stack pointer as saved by the thread context macros above into
// a pointer to a HAL_SavedRegisters structure.
#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \
(_regs_) = (HAL_SavedRegisters *)(_sp_)
 
#ifndef HAL_GET_GDB_EXTRA_REGISTERS
#define HAL_GET_GDB_EXTRA_REGISTERS( _regval_, _regs_ )
#endif
#ifndef HAL_SET_GDB_EXTRA_REGISTERS
#define HAL_SET_GDB_EXTRA_REGISTERS( _regs_, _regval_ )
#endif
 
 
// Copy a set of registers from a HAL_SavedRegisters structure into a
// GDB ordered array.
#define HAL_GET_GDB_REGISTERS( _aregval_ , _regs_ ) \
{ \
CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \
\
_regval_[0] = (_regs_)->er0; \
_regval_[1] = (_regs_)->er1; \
_regval_[2] = (_regs_)->er2; \
_regval_[3] = (_regs_)->er3; \
_regval_[4] = (_regs_)->er4; \
_regval_[5] = (_regs_)->er5; \
_regval_[6] = (_regs_)->er6; \
\
_regval_[7] = (CYG_ADDRWORD)(_regs_) + \
sizeof(HAL_SavedRegisters); \
_regval_[8] = (_regs_)->pc; \
_regval_[9] = (_regs_)->ccr; \
\
HAL_GET_GDB_EXTRA_REGISTERS( _regval_, _regs_ ); \
}
 
// Copy a GDB ordered array into a HAL_SavedRegisters structure.
#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \
{ \
CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_); \
\
(_regs_)->er0 = _regval_[0]; \
(_regs_)->er1 = _regval_[1]; \
(_regs_)->er2 = _regval_[2]; \
(_regs_)->er3 = _regval_[3]; \
(_regs_)->er4 = _regval_[4]; \
(_regs_)->er5 = _regval_[5]; \
(_regs_)->er6 = _regval_[6]; \
\
(_regs_)->pc = _regval_[8]; \
(_regs_)->ccr = _regval_[9]; \
\
/* We do not allow the SP or PSW to be set. Changing the SP will \
* mess up the saved state. No PSW is saved on thread context \
* switches, so there is nowhere to save it to. \
*/ \
\
HAL_SET_GDB_EXTRA_REGISTERS( _regs_, _regval_ ); \
}
 
//-------------------------------------------------------------------------
// HAL setjmp
// Note: These definitions are repeated in context.S. If changes are required
// remember to update both sets.
 
#define CYGARC_JMP_BUF_SP 0
#define CYGARC_JMP_BUF_ER3 1
#define CYGARC_JMP_BUF_ER4 2
#define CYGARC_JMP_BUF_ER5 3
#define CYGARC_JMP_BUF_ER6 4
#define CYGARC_JMP_BUF_PC 5
 
#define CYGARC_JMP_BUF_SIZE 6
 
typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE];
 
externC int hal_setjmp(hal_jmp_buf env);
externC void hal_longjmp(hal_jmp_buf env, int val);
 
//-------------------------------------------------------------------------
// Idle thread code.
// This macro is called in the idle thread loop, and gives the HAL the
// chance to insert code. Typical idle thread behaviour might be to halt the
// processor.
 
externC void hal_idle_thread_action(cyg_uint32 loop_count);
 
#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)
 
//-----------------------------------------------------------------------------
// Minimal and sensible stack sizes: the intention is that applications
// will use these to provide a stack size in the first instance prior to
// proper analysis. Idle thread stack should be this big.
 
// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
 
// We define quite large stack needs for SPARClite, for it requires 576
// bytes (144 words) to process an interrupt and thread-switch, and
// momentarily, but needed in case of recursive interrupts, it needs 208
// words - if a sequence of saves to push out other regsets is interrupted.
 
// This is not a config option because it should not be adjusted except
// under "enough rope" sort of disclaimers.
 
// Worst case stack frame size: return link + 4 args + 4 pushed registers.
#define CYGNUM_HAL_STACK_FRAME_SIZE (40)
 
// Stack needed for a context switch:
#define CYGNUM_HAL_STACK_CONTEXT_SIZE (60)
 
// Interrupt + call to ISR, interrupt_end() and the DSR
#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (128)
 
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
// An interrupt stack which is large enough for all possible interrupt
// conditions (and only used for that purpose) exists. "User" stacks
// can be much smaller
 
#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+ \
CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+ \
CYGNUM_HAL_STACK_FRAME_SIZE*16)
#define CYGNUM_HAL_STACK_SIZE_TYPICAL (2048)
 
#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
// No separate interrupt stack exists. Make sure all threads contain
// a stack sufficiently large.
 
#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096)
#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096)
 
#endif
 
#define CYGARC_HAL_SAVE_GP()
#define CYGARC_HAL_RESTORE_GP()
//--------------------------------------------------------------------------
#endif // CYGONCE_HAL_HAL_ARCH_H
// EOF hal_arch.h
/arch/v2_0/include/hal_cache.h
0,0 → 1,188
#ifndef CYGONCE_HAL_CACHE_H
#define CYGONCE_HAL_CACHE_H
 
//=============================================================================
//
// hal_cache.h
//
// HAL cache control API
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): yoshinori sato
// Contributors: yoshinori sato
// Date: 2002-02-13
// Purpose: Cache control API
// Description: The macros defined here provide the HAL APIs for handling
// cache control operations.
// Usage:
// #include <cyg/hal/hal_cache.h>
// ...
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
 
 
 
//-----------------------------------------------------------------------------
// Cache dimensions
 
// Data cache
#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes
#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line
#define HAL_DCACHE_WAYS 0 // Associativity of the cache
 
// Instruction cache
#define HAL_ICACHE_SIZE 0 // Size of cache in bytes
#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line
#define HAL_ICACHE_WAYS 0 // Associativity of the cache
 
#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))
#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))
 
//-----------------------------------------------------------------------------
// Global control of data cache
 
// Enable the data cache
#define HAL_DCACHE_ENABLE()
 
// Disable the data cache
#define HAL_DCACHE_DISABLE()
 
// Invalidate the entire cache
#define HAL_DCACHE_INVALIDATE_ALL()
 
// Synchronize the contents of the cache with memory.
#define HAL_DCACHE_SYNC()
 
// Set the data cache refill burst size
//#define HAL_DCACHE_BURST_SIZE(_size_)
 
// Set the data cache write mode
//#define HAL_DCACHE_WRITE_MODE( _mode_ )
 
// Load the contents of the given address range into the data cache
// and then lock the cache so that it stays there.
//#define HAL_DCACHE_LOCK(_base_, _size_)
 
// Undo a previous lock operation
//#define HAL_DCACHE_UNLOCK(_base_, _size_)
 
// Unlock entire cache
//#define HAL_DCACHE_UNLOCK_ALL()
 
//-----------------------------------------------------------------------------
// Data cache line control
 
// Allocate cache lines for the given address range without reading its
// contents from memory.
//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ )
 
// Write dirty cache lines to memory and invalidate the cache entries
// for the given address range.
//#define HAL_DCACHE_FLUSH( _base_ , _size_ )
 
// Invalidate cache lines in the given range without writing to memory.
//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ )
 
// Write dirty cache lines to memory for the given address range.
//#define HAL_DCACHE_STORE( _base_ , _size_ )
 
// Preread the given range into the cache with the intention of reading
// from it later.
//#define HAL_DCACHE_READ_HINT( _base_ , _size_ )
 
// Preread the given range into the cache with the intention of writing
// to it later.
//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ )
 
// Allocate and zero the cache lines associated with the given range.
//#define HAL_DCACHE_ZERO( _base_ , _size_ )
 
//-----------------------------------------------------------------------------
// Global control of Instruction cache
 
// Enable the instruction cache
#define HAL_ICACHE_ENABLE()
 
// Disable the instruction cache
#define HAL_ICACHE_DISABLE()
 
// Invalidate the entire cache
#define HAL_ICACHE_INVALIDATE_ALL()
 
// Synchronize the contents of the cache with memory.
#define HAL_ICACHE_SYNC()
 
// Set the instruction cache refill burst size
//#define HAL_ICACHE_BURST_SIZE(_size_)
 
// Load the contents of the given address range into the instruction cache
// and then lock the cache so that it stays there.
//#define HAL_ICACHE_LOCK(_base_, _size_)
 
// Undo a previous lock operation
//#define HAL_ICACHE_UNLOCK(_base_, _size_)
 
// Unlock entire cache
//#define HAL_ICACHE_UNLOCK_ALL()
 
//-----------------------------------------------------------------------------
// Instruction cache line control
 
// Invalidate cache lines in the given range without writing to memory.
//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ )
 
#endif
 
 
//-----------------------------------------------------------------------------
// Check that a supported configuration has actually defined some macros.
 
#ifndef HAL_DCACHE_ENABLE
 
#error Unsupported H8300 configuration
 
#endif
 
//-----------------------------------------------------------------------------
// End of hal_cache.h
/arch/v2_0/doc/README
0,0 → 1,2
Please visit http://homepage2.nifty.com/ysato/eCos/index.en.html for up to date
information, particularly on which GNU tools to use and patches.
/arch/v2_0/ChangeLog
0,0 → 1,50
2003-01-31 Mark Salter <msalter@redhat.com>
 
* src/hal_syscall.c (hal_syscall_handler): Let generic syscall code
handle exit.
 
2002-04-29 Jonathan Larmour <jlarmour@redhat.com>
 
* src/vectors.S:
Don't use .file as it can confuse debugging since the .file
doesn't contain the path and therefore the debugger will never
know where it lives! This conflicts with using -Wa,--gstabs.
 
2002-04-24 Yoshinori Sato <qzb04471@nifty.ne.jp>
 
* New package.
 
//===========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//===========================================================================
/arch/v2_0/src/hal_syscall.c
0,0 → 1,105
//=============================================================================
//
// hal_syscall.c
//
//
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): msalter
// Contributors:msalter
// Date: 2000-11-5
// Purpose:
// Description:
//
//
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGPKG_REDBOOT
#include <pkgconf/redboot.h>
#endif
 
#if defined(CYGSEM_REDBOOT_BSP_SYSCALLS)
 
#include <cyg/hal/hal_stub.h> // Our header
#include <cyg/hal/hal_arch.h> // HAL_BREAKINST
#include <cyg/hal/hal_cache.h> // HAL_xCACHE_x
#include <cyg/hal/hal_intr.h> // interrupt disable/restore
 
#include <cyg/hal/hal_if.h> // ROM calling interface
#include <cyg/hal/hal_misc.h> // Helper functions
 
extern CYG_ADDRWORD __do_syscall(CYG_ADDRWORD func, // syscall function number
CYG_ADDRWORD arg1, CYG_ADDRWORD arg2, // up to four args.
CYG_ADDRWORD arg3, CYG_ADDRWORD arg4,
CYG_ADDRWORD *retval); // syscall return value
 
#define SYS_exit 1
#define SYS_interrupt 1000
 
int
hal_syscall_handler(void)
{
CYG_ADDRWORD func, arg1, arg2, arg3, arg4;
CYG_ADDRWORD err;
 
func = get_register(ER0);
arg1 = get_register(ER1);
arg2 = get_register(ER2);
arg3 = get_register(ER3);
arg4 = 0;
if (func == SYS_interrupt) {
// A console interrupt landed us here.
// Invoke the debug agent so as to cause a SIGINT.
return SIGINT;
}
 
if (__do_syscall(func, arg1, arg2, arg3, arg4, &err)) {
put_register(D0, err);
return 0;
}
 
return SIGTRAP;
}
 
#endif // CYGSEM_REDBOOT_BSP_SYSCALLS
/arch/v2_0/src/h8300_stub.c
0,0 → 1,286
//========================================================================
//
// h8300_stub.c
//
// Helper functions for H8/300H stub
//
//========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): Red Hat, jskov
// Contributors: Red Hat, jskov
// Date: 1998-11-06
// Purpose:
// Description: Helper functions for H8/300H stub
// Usage:
//
//####DESCRIPTIONEND####
//
//========================================================================
 
#include <stddef.h>
 
#include <pkgconf/hal.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
#include <cyg/hal/hal_stub.h>
#include <cyg/hal/hal_arch.h>
#include <cyg/hal/hal_intr.h>
 
#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id
#endif
 
/*----------------------------------------------------------------------
* Asynchronous interrupt support
*/
 
typedef unsigned short t_inst;
 
static struct
{
t_inst *targetAddr;
t_inst savedInstr;
} asyncBuffer;
 
/* Called to asynchronously interrupt a running program.
Must be passed address of instruction interrupted.
This is typically called in response to a debug port
receive interrupt.
*/
 
void
install_async_breakpoint(void *pc)
{
asyncBuffer.targetAddr = pc;
asyncBuffer.savedInstr = *(t_inst *)pc;
*(t_inst *)pc = (t_inst)HAL_BREAKINST;
__instruction_cache(CACHE_FLUSH);
__data_cache(CACHE_FLUSH);
}
 
/*--------------------------------------------------------------------*/
/* Given a trap value TRAP, return the corresponding signal. */
 
int __computeSignal (unsigned int trap_number)
{
switch (trap_number) {
case 11:
return SIGTRAP;
default:
return SIGINT;
}
}
 
/*--------------------------------------------------------------------*/
/* Return the trap number corresponding to the last-taken trap. */
 
int __get_trap_number (void)
{
extern int CYG_LABEL_NAME(_intvector);
// The vector is not not part of the GDB register set so get it
// directly from the save context.
return CYG_LABEL_NAME(_intvector);
}
 
/*--------------------------------------------------------------------*/
/* Set the currently-saved pc register value to PC. This also updates NPC
as needed. */
 
void set_pc (target_register_t pc)
{
put_register (PC, pc);
}
 
 
/*----------------------------------------------------------------------
* Single-step support. Lifted from CygMon.
*/
 
#define NUM_SS_BPTS 2
static target_register_t break_mem [NUM_SS_BPTS] = {0, 0};
static unsigned char break_mem_data [NUM_SS_BPTS];
 
/* Set a single-step breakpoint at ADDR. Up to two such breakpoints
can be set; WHICH specifies which one to set (0 or 1). */
 
static void
set_single_bp (int which, unsigned char *addr)
{
if (break_mem[which] == 0) {
break_mem[which] = (target_register_t) addr;
break_mem_data[which] = *(unsigned short *)addr;
*(unsigned short *)addr = HAL_BREAKINST;
}
}
 
/* Clear any single-step breakpoint(s) that may have been set. */
 
void __clear_single_step (void)
{
int x;
for (x = 0; x < NUM_SS_BPTS; x++)
{
unsigned char* addr = (unsigned char*) break_mem[x];
if (addr) {
*addr = break_mem_data[x];
break_mem[x] = 0;
}
}
}
 
/* Set breakpoint(s) to simulate a single step from the current PC. */
 
const static unsigned char opcode_length0[]={
0x04,0x02,0x04,0x02,0x04,0x02,0x04,0x02, /* 0x58 */
0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x60 */
0x02,0x02,0x11,0x11,0x02,0x02,0x04,0x04, /* 0x68 */
0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02, /* 0x70 */
0x08,0x04,0x06,0x04,0x04,0x04,0x04,0x04 /* 0x78 */
};
 
const static unsigned char opcode_length1[]={
0x10,0x00,0x00,0x00,0x11,0x00,0x00,0x00,
0x02,0x00,0x00,0x00,0x04,0x04,0x00,0x04
};
 
static int insn_length(unsigned char *pc)
{
if (*pc != 0x01 && (*pc < 0x58 || *pc>=0x80))
return 2;
else
switch (*pc) {
case 0x01:
switch (*(pc+1) & 0xf0) {
case 0x00:
if (*(pc+2)== 0x78) {
return 10;
} else if (*(pc+2)== 0x6b) {
return (*(pc+3) & 0x20)?8:6;
} else {
return (*(pc+2) & 0x02)?6:4;
}
case 0x40:
return (*(pc+2) & 0x02)?8:6;
default:
return opcode_length1[*(pc+1)>>4];
}
case 0x6a:
case 0x6b:
return (*(pc+1) & 0x20)?6:4;
default:
return opcode_length0[*pc-0x58];
}
}
 
void __single_step (void)
{
unsigned int pc = get_register (PC);
unsigned int next;
unsigned int opcode;
 
opcode = *(unsigned short *)pc;
next = pc + insn_length((unsigned char *)pc);
if (opcode == 0x5470) {
/* rts */
unsigned long *sp;
sp = (unsigned long *)get_register(SP);
next = *sp & 0x00ffffff;
} else if ((opcode & 0xfb00) != 0x5800) {
/* jmp / jsr */
int regs;
const short reg_tbl[]={ER0,ER1,ER2,ER3,ER4,ER5,ER6,SP};
switch(opcode & 0xfb00) {
case 0x5900:
regs = (opcode & 0x0070) >> 8;
next = get_register(reg_tbl[regs]);
break;
case 0x5a00:
next = *(unsigned long *)(pc+2) & 0x00ffffff;
break;
case 0x5b00:
next = *(unsigned long *)(opcode & 0xff);
break;
}
} else if (((opcode & 0xf000) == 0x4000) || ((opcode & 0xff00) == 0x5500)) {
/* b**:8 */
unsigned long dsp;
dsp = (long)(opcode && 0xff)+pc+2;
set_single_bp(1,(unsigned char *)dsp);
} else if (((opcode & 0xff00) == 0x5800) || ((opcode & 0xff00) == 0x5c00)) {
/* b**:16 */
unsigned long dsp;
dsp = *(unsigned short *)(pc+2)+pc+4;
set_single_bp(1,(unsigned char *)dsp);
}
set_single_bp(0,(unsigned char *)next);
}
 
void __install_breakpoints (void)
{
/* NOP since single-step HW exceptions are used instead of
breakpoints. */
}
 
void __clear_breakpoints (void)
{
 
}
 
 
/* If the breakpoint we hit is in the breakpoint() instruction, return a
non-zero value. */
 
externC void CYG_LABEL_NAME(breakinst)(void);
int
__is_breakpoint_function ()
{
return get_register (PC) == (target_register_t)&CYG_LABEL_NAME(breakinst);
}
 
 
/* Skip the current instruction. */
 
void __skipinst (void)
{
unsigned long pc = get_register (PC);
 
pc+=insn_length((unsigned char *)pc);
put_register (PC, (target_register_t) pc);
}
 
#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
/arch/v2_0/src/hal_misc.c
0,0 → 1,236
/*==========================================================================
//
// hal_misc.c
//
// HAL miscellaneous functions
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg
// Contributors: nickg, jlarmour
// Date: 1999-02-18
// Purpose: HAL miscellaneous functions
// Description: This file contains miscellaneous functions provided by the
// HAL.
//
//####DESCRIPTIONEND####
//
//========================================================================*/
 
#include <pkgconf/hal.h>
 
#include <cyg/infra/cyg_type.h>
#include <cyg/infra/cyg_trac.h>
 
#include <cyg/hal/hal_arch.h>
 
#include <cyg/hal/hal_intr.h>
 
#if 0
void trace( CYG_ADDRWORD tag, CYG_ADDRWORD a1, CYG_ADDRWORD a2)
{
CYG_ADDRWORD **pp = (CYG_ADDRWORD **)0x48100000;
CYG_ADDRWORD *ix = (CYG_ADDRWORD *)0x4810000C;
CYG_ADDRWORD *p = *pp;
*p++ = tag;
*ix = *ix + 1;
*p++ = *ix;
*p++ = a1;
*p++ = a2;
*pp = p;
}
#endif
 
/*------------------------------------------------------------------------*/
 
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
cyg_bool cyg_hal_stop_constructors;
#endif
 
void
cyg_hal_invoke_constructors(void)
{
typedef void (*pfunc) (void);
extern pfunc __CTOR_LIST__[];
extern pfunc __CTOR_END__[];
 
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
static pfunc *p = &__CTOR_END__[-1];
cyg_hal_stop_constructors = 0;
for (; p >= __CTOR_LIST__; p--) {
(*p) ();
if (cyg_hal_stop_constructors) {
p--;
break;
}
}
#else
pfunc *p;
 
for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--)
(*p) ();
#endif
 
} // cyg_hal_invoke_constructors()
 
/*------------------------------------------------------------------------*/
// Default ISR
externC cyg_uint32
hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
{
return 0;
}
 
//--------------------------------------------------------------------------
/* Determine the index of the ls bit of the supplied mask. */
 
cyg_uint32
hal_lsbit_index(cyg_uint32 mask)
{
cyg_uint32 n = mask;
 
static const signed char tab[64] =
{ -1, 0, 1, 12, 2, 6, 0, 13, 3, 0, 7, 0, 0, 0, 0, 14, 10,
4, 0, 0, 8, 0, 0, 25, 0, 0, 0, 0, 0, 21, 27 , 15, 31, 11,
5, 0, 0, 0, 0, 0, 9, 0, 0, 24, 0, 0 , 20, 26, 30, 0, 0, 0,
0, 23, 0, 19, 29, 0, 22, 18, 28, 17, 16, 0
};
 
n &= ~(n-1UL);
n = (n<<16)-n;
n = (n<<6)+n;
n = (n<<4)+n;
 
return tab[n>>26];
}
 
/*------------------------------------------------------------------------*/
/* Determine the index of the ms bit of the supplied mask. */
 
cyg_uint32
hal_msbit_index(cyg_uint32 mask)
{
cyg_uint32 x = mask;
cyg_uint32 w;
 
/* Phase 1: make word with all ones from that one to the right */
x |= x >> 16;
x |= x >> 8;
x |= x >> 4;
x |= x >> 2;
x |= x >> 1;
 
/* Phase 2: calculate number of "1" bits in the word */
w = (x & 0x55555555) + ((x >> 1) & 0x55555555);
w = (w & 0x33333333) + ((w >> 2) & 0x33333333);
w = w + (w >> 4);
w = (w & 0x000F000F) + ((w >> 8) & 0x000F000F);
return (cyg_uint32)((w + (w >> 16)) & 0xFF);
 
}
 
/*------------------------------------------------------------------------*/
/* First level C exception handler. */
 
externC void __handle_exception (void);
 
externC HAL_SavedRegisters *_hal_registers;
 
void
cyg_hal_exception_handler(HAL_SavedRegisters *regs,CYG_WORD vector)
{
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
 
// Set the pointer to the registers of the current exception
// context. At entry the GDB stub will expand the
// HAL_SavedRegisters structure into a (bigger) register array.
_hal_registers = regs;
 
__handle_exception();
 
#endif
#if defined(CYGPKG_HAL_EXCEPTIONS)
 
// We should decode the vector and pass a more appropriate
// value as the second argument. For now we simply pass a
// pointer to the saved registers. We should also divert
// breakpoint and other debug vectors into the debug stubs.
 
cyg_hal_deliver_exception( vector, (CYG_ADDRWORD)regs );
 
#endif
 
return;
}
 
/*------------------------------------------------------------------------*/
/* default ISR */
 
#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
{
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) && \
defined(CYGHWR_HAL_GDB_PORT_VECTOR) && \
defined(HAL_CTRLC_ISR)
 
#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN
if( vector == CYGHWR_HAL_GDB_PORT_VECTOR )
#endif
{
cyg_uint32 result = HAL_CTRLC_ISR( vector, data );
if( result != 0 ) return result;
}
#endif
CYG_TRACE1(true, "Interrupt: %d", vector);
CYG_FAIL("Spurious Interrupt!!!");
return 0;
}
#endif
 
/*------------------------------------------------------------------------*/
/* Idle thread activity. */
externC void hal_idle_thread_action(cyg_uint32 loop_count)
{
}
 
/*------------------------------------------------------------------------*/
/* End of hal_misc.c */
/arch/v2_0/src/context.S
0,0 → 1,142
##=============================================================================
##
## context.S
##
## H8/300 context switch code
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): yoshinori sato
## Contributors: yoshinori sato
## Date: 2002-02-17
## Purpose: H8/300 context switch code
## Description: This file contains implementations of the thread context
## switch routines. It also contains the longjmp() and setjmp()
## routines.
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <pkgconf/hal.h>
 
#include <cyg/hal/arch.inc>
#include <cyg/hal/basetype.h>
 
.h8300h
 
#------------------------------------------------------------------------------
# hal_thread_switch_context
# Switch thread contexts
# D0 = address of sp of next thread to execute
# D1 = address of sp save location of current thread
 
.global CYG_LABEL_DEFN(hal_thread_switch_context)
CYG_LABEL_DEFN(hal_thread_switch_context):
hal_cpu_save_all
mov.l sp,@er1
# Now load the destination thread by dropping through
# to hal_thread_load_context
#------------------------------------------------------------------------------
# hal_thread_load_context
# Load thread context
# D0 = address of sp of next thread to execute
# Note that this function is also the second half of hal_thread_switch_context
# and is simply dropped into from it.
.global CYG_LABEL_DEFN(hal_thread_load_context)
CYG_LABEL_DEFN(hal_thread_load_context):
 
mov.l @er0,sp
hal_cpu_load_all
rts
##-----------------------------------------------------------------------------
## HAL longjmp(), setjmp() implementations
## These implementations omit the usual movm [d2,d3,a2,a3],(sp)
## Which is the first instruction of all C compiled functions.
## Note: These definitions are repeated in hal_arch.h. If changes are required
## remember to update both sets.
 
#define CYGARC_JMP_BUF_SP 0
#define CYGARC_JMP_BUF_ER3 1
#define CYGARC_JMP_BUF_ER4 2
#define CYGARC_JMP_BUF_ER5 3
#define CYGARC_JMP_BUF_ER6 4
#define CYGARC_JMP_BUF_PC 5
 
#define CYGARC_JMP_BUF_SIZE 6
 
# This just preserves the callee save registers
# namely a2,a3,d2,d3
# setjmp cannot use movm to do this as we need to keep
# the sp underneath all live data at all times.
.globl CYG_LABEL_DEFN(hal_setjmp)
CYG_LABEL_DEFN(hal_setjmp): ; er0=env
mov.l er3,@(CYGARC_JMP_BUF_ER3*4,er0)
mov.l er4,@(CYGARC_JMP_BUF_ER4*4,er0)
mov.l er5,@(CYGARC_JMP_BUF_ER5*4,er0)
mov.l er6,@(CYGARC_JMP_BUF_ER6*4,er0)
mov.l @sp,er1
mov.l er1,@(CYGARC_JMP_BUF_PC*4,er0)
mov sp,er1
mov er1,@(CYGARC_JMP_BUF_SP*4,er0)
sub.l er0,er0
rts
 
# longjmp returns to caller of setjmp
# after restoring callee save registers
.globl CYG_LABEL_DEFN(hal_longjmp)
CYG_LABEL_DEFN(hal_longjmp):
mov.l @(CYGARC_JMP_BUF_ER3*4,er0),er3
mov.l @(CYGARC_JMP_BUF_ER4*4,er0),er4
mov.l @(CYGARC_JMP_BUF_ER5*4,er0),er5
mov.l @(CYGARC_JMP_BUF_ER6*4,er0),er6
mov.l @(CYGARC_JMP_BUF_PC*4,er0),er2
mov.l @(CYGARC_JMP_BUF_SP*4,er0),sp
mov.l er2,@sp
mov.l er1,er0
rts
 
#------------------------------------------------------------------------------
# end of context.S
 
/arch/v2_0/src/vectors.S
0,0 → 1,724
##=============================================================================
##
## vectors.S
##
## H8/300 exception vectors
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
## eCos is free software; you can redistribute it and/or modify it under
## the terms of the GNU General Public License as published by the Free
## Software Foundation; either version 2 or (at your option) any later version.
##
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
## This exception does not invalidate any other reasons why a work based on
## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): nickg
## Contributors: nickg, dmoseley, dhowells
## Date: 2002-02-14
## Purpose: H8/300 exception vectors
## Description: This file defines the code placed into the exception
## vectors. It also contains the first level default VSRs
## that save and restore state for both exceptions and
## interrupts.
##
######DESCRIPTIONEND####
##
##=============================================================================
 
#include <pkgconf/hal.h>
 
#ifdef CYGPKG_REDBOOT
#include <pkgconf/redboot.h>
#endif
#ifdef CYGPKG_KERNEL
 
#include <pkgconf/kernel.h>
#endif
 
#include <cyg/hal/arch.inc>
#include <cyg/hal/basetype.h>
##-----------------------------------------------------------------------------
// .file "vectors.S"
.h8300h
#ifdef CYGPKG_CYGMON
##-----------------------------------------------------------------------------
## Macros for Stack handling when running Cygmon
.macro hal_cygmon_switch_app_stack
#
; Switch to interrupt stack to handle exception
#
 
; First, save some scratch registers
mov.l er0,@er0_save
mov.l er1,@er1_save
 
; Copy the exception frame
mov.l #__cygmon_interrupt_stack,er0
mov.l @sp,er1
mov.l er1,@-er0
 
; Save the pre-exception sp in the register image
mov.l sp,@-er0
 
; Actually switch the stack
mov.l er0,sp
 
; Now, restore the scratch registers
mov.l @er0_save,er0
mov.l @er1_save,er1
.endm
 
.macro hal_cygmon_restore_app_stack
// For cygmon we are switching stacks immediately on exception.
// We must wait until the very end before restoring the original stack.
 
; Save some scratch registers
mov.l er0,@er0_save
mov.l er1,@er1_save
 
; We need to restore the application stack pointer, but we also
; need to restore the exception frame.
mov.l @sp+,er0
mov.l @sp+,er1
mov.l er1,@er0
mov.l er0,sp // Restore the frame-adjusted SP
 
; Restore the scratch registers
mov.l @er0_save,er0
mov.l @er1_save,er1
.endm
 
#endif // CYGPKG_CYGMON
 
##-----------------------------------------------------------------------------
#if defined(CYG_HAL_STARTUP_ROM) || defined(CYGPKG_HAL_H8300_H8300H_SIM)
.section .vectors,"a"
.globl reset_vector
 
reset_vector:
; Reset vector
.long CYG_LABEL_DEFN(_start)
.space 6*4
.long __interrupt7
.long __interrupt8
.long __interrupt9
.long __interrupt10
.long __interrupt11
.long __interrupt12
.long __interrupt13
.long __interrupt14
.long __interrupt15
.long __interrupt16
.long __interrupt17
.long __interrupt18
.long __interrupt19
.long __interrupt20
.long __interrupt21
.long __interrupt22
.long __interrupt23
.long __interrupt24
.long __interrupt25
.long __interrupt26
.long __interrupt27
.long __interrupt28
.long __interrupt29
.long __interrupt30
.long __interrupt31
.long __interrupt32
.long __interrupt33
.long __interrupt34
.long __interrupt35
.long __interrupt36
.long __interrupt37
.long __interrupt38
.long __interrupt39
.long __interrupt40
.long __interrupt41
.long __interrupt42
.long __interrupt43
.long __interrupt44
.long __interrupt45
.long __interrupt46
.long __interrupt47
.long __interrupt48
.long __interrupt49
.long __interrupt50
.long __interrupt51
.long __interrupt52
.long __interrupt53
.long __interrupt54
.long __interrupt55
.long __interrupt56
.long __interrupt57
.long __interrupt58
.long __interrupt59
.long __interrupt60
.long __interrupt61
.long __interrupt62
.long __interrupt63
#endif
 
#define INTERRUPT_ENTRY(no) \
__interrupt##no: \
jsr @interrupt_entry
 
.section .int_fook_table,"a"
.space 7*4
__interrupt_table:
INTERRUPT_ENTRY(7)
INTERRUPT_ENTRY(8)
INTERRUPT_ENTRY(9)
INTERRUPT_ENTRY(10)
INTERRUPT_ENTRY(11)
INTERRUPT_ENTRY(12)
INTERRUPT_ENTRY(13)
INTERRUPT_ENTRY(14)
INTERRUPT_ENTRY(15)
INTERRUPT_ENTRY(16)
INTERRUPT_ENTRY(17)
INTERRUPT_ENTRY(18)
INTERRUPT_ENTRY(19)
INTERRUPT_ENTRY(20)
INTERRUPT_ENTRY(21)
INTERRUPT_ENTRY(22)
INTERRUPT_ENTRY(23)
INTERRUPT_ENTRY(24)
INTERRUPT_ENTRY(25)
INTERRUPT_ENTRY(26)
INTERRUPT_ENTRY(27)
INTERRUPT_ENTRY(28)
INTERRUPT_ENTRY(29)
INTERRUPT_ENTRY(30)
INTERRUPT_ENTRY(31)
INTERRUPT_ENTRY(32)
INTERRUPT_ENTRY(33)
INTERRUPT_ENTRY(34)
INTERRUPT_ENTRY(35)
INTERRUPT_ENTRY(36)
INTERRUPT_ENTRY(37)
INTERRUPT_ENTRY(38)
INTERRUPT_ENTRY(39)
INTERRUPT_ENTRY(40)
INTERRUPT_ENTRY(41)
INTERRUPT_ENTRY(42)
INTERRUPT_ENTRY(43)
INTERRUPT_ENTRY(44)
INTERRUPT_ENTRY(45)
INTERRUPT_ENTRY(46)
INTERRUPT_ENTRY(47)
INTERRUPT_ENTRY(48)
INTERRUPT_ENTRY(49)
INTERRUPT_ENTRY(50)
INTERRUPT_ENTRY(51)
INTERRUPT_ENTRY(52)
INTERRUPT_ENTRY(53)
INTERRUPT_ENTRY(54)
INTERRUPT_ENTRY(55)
INTERRUPT_ENTRY(56)
INTERRUPT_ENTRY(57)
INTERRUPT_ENTRY(58)
INTERRUPT_ENTRY(59)
INTERRUPT_ENTRY(60)
INTERRUPT_ENTRY(61)
INTERRUPT_ENTRY(62)
INTERRUPT_ENTRY(63)
##-----------------------------------------------------------------------------
## Startup code
.text
 
.globl CYG_LABEL_DEFN(_start)
CYG_LABEL_DEFN(_start):
; set up stack
 
mov.l #__interrupt_stack,sp
ldc #0x80,ccr
; Initialize hardware
hal_cpu_init
hal_mmu_init
hal_memc_init
hal_diag_init
hal_intc_init
hal_cache_init
hal_timer_init
hal_mon_init
 
#ifdef CYG_HAL_STARTUP_ROM
; Copy data from ROM to RAM
 
mov.l #CYG_LABEL_DEFN(__rom_data_start),er5
mov.l #CYG_LABEL_DEFN(__ram_data_start),er6
mov.l #CYG_LABEL_DEFN(__ram_data_end),er4
sub.l er6,er4
1:
eepmov.w
dec.w #1,e4
cmp.w #-1,e4
bhi 1b
 
#endif
 
; Setup Interrupt Vector (virtual)
mov.l #CYG_LABEL_DEFN(__rom_int_fook_start),er5
mov.l #CYG_LABEL_DEFN(__int_fook_start),er6
mov.l #CYG_LABEL_DEFN(__int_fook_end),er4
sub.l er6,er4
1:
eepmov.w
dec.w #1,e4
cmp.w #-1,e4
bhi 1b
 
; Clear BSS
mov.l #CYG_LABEL_DEFN(__bss_start),er5
mov.l er5,er6
adds #1,er6
mov.l #CYG_LABEL_DEFN(__bss_end),er4
sub.l #CYG_LABEL_DEFN(__bss_start),er4
 
mov.b #0,r0l
mov.b r0l,@er5
1:
eepmov.w
dec.w #1,e4
cmp.w #-1,e4
bhi 1b
 
; Call variant and platform HAL
; initialization routines.
 
.extern CYG_LABEL_DEFN(hal_variant_init)
jsr @CYG_LABEL_DEFN(hal_variant_init)
 
.extern CYG_LABEL_DEFN(hal_platform_init)
jsr @CYG_LABEL_DEFN(hal_platform_init)
; Call constructors
 
.extern CYG_LABEL_DEFN(cyg_hal_invoke_constructors)
jsr @CYG_LABEL_DEFN(cyg_hal_invoke_constructors)
 
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
.extern CYG_LABEL_DEFN(initialize_stub)
jsr @CYG_LABEL_DEFN(initialize_stub)
#endif
 
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
|| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
.extern CYG_LABEL_DEFN(hal_ctrlc_isr_init)
jsr @CYG_LABEL_DEFN(hal_ctrlc_isr_init)
#endif
 
 
mov.b #0x9a,r0l
mov.b r0l,@0xfee027
; Call cyg_start
sub.l er0,er0
.extern CYG_LABEL_DEFN(cyg_start)
jsr @CYG_LABEL_DEFN(cyg_start)
 
9:
bra 9b ; Loop if we return
 
interrupt_entry:
mov.l er0,@-sp
mov.l @(4,sp),er0
sub.l #__interrupt_table,er0
shlr.l er0
shlr.l er0
add.w #7,r0
mov.l er0,@CYG_LABEL_DEFN(_intvector)
mov.l @sp+,er0
adds #4,sp
#ifdef CYGPKG_CYGMON
hal_cygmon_switch_app_stack
#endif
hal_cpu_save_all ; push all registers
mov.l @CYG_LABEL_DEFN(_intvector),er0
shll.l er0
shll.l er0
mov.l @(CYG_LABEL_DEFN(hal_vsr_table),er0),er0
jmp @er0
 
##-----------------------------------------------------------------------------
## The following macros are defined depending on whether the HAL is configured
## to support the kernel or not.
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
.extern CYG_LABEL_DEFN(cyg_scheduler_sched_lock)
; Increment the scheduler lock
.macro increment_sched_lock reg=er0
mov.l @CYG_LABEL_DEFN(cyg_scheduler_sched_lock),\reg
inc.l #1,\reg
mov.l \reg,@CYG_LABEL_DEFN(cyg_scheduler_sched_lock)
.endm
 
#else
.macro increment_sched_lock reg=er0
.endm
 
#endif
 
##-----------------------------------------------------------------------------
## Default interrupt VSR
 
.text
.globl CYG_LABEL_DEFN(__default_interrupt_vsr)
CYG_LABEL_DEFN(__default_interrupt_vsr):
 
; We come here with all the registers pushed
; onto the stack.
 
hal_diag_intr_start
increment_sched_lock
#if defined(CYGPKG_CYGMON)
// For Cygmon, we saved this back when we originally switched stacks.
mov.l @sp,er1 ; A2 = saved thread state
#elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
; Increment interrupt nesting counter
mov.l sp,er1
mov.l #__interrupt_stack,er0 ; A0 = interrupt stack top
cmp.l #__interrupt_stack_base,sp ; compare with base of stack
blt 1f ; if lt switch to int stack
cmp.l er0,sp ; compare sp with stack top
ble 8f ; if le already on istack
1:
mov.l er0,sp ; switch to new SP
8:
mov.l er1,@-sp ; save old SP
mov.l @er1,er1
#else
mov @sp,er1 ; A2 = saved thread state
#endif
 
; Here D3 contains the table byte offset of the vector to
; call.
 
#if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
 
; Call cyg_instrument to record that this interrupt is being raised.
 
.extern CYG_LABEL_DEFN(cyg_instrument)
mov.l er1,er3
mov.l #0x0301,er0 ; type = INTR,RAISE
mov.l @CYG_LABEL_DEFN(_intvector),er2 ; arg2 = table offset
jsr CYG_LABEL_DEFN(cyg_instrument) ; call instrumentation
#endif
 
#ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
 
; To allow nested interrupts, we set the IE bit. We do
; not touch the IPL bits, so only higher priority interrupts
; will be nested on top of us. Also, new interrupts will not
; be delivered until the ISR calls
; Cyg_Interrupt::acknowledge_interrupt(). At some future point
; we may want to do the ack stuff here to allow immediate nesting.
andc #0x7f,ccr
#endif
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) || \
defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
 
; If we have Ctrl-C support enabled, save a pointer to the
; saved CPU state here so we can plant a breakpoint there if
; this is a ^C.
.extern CYG_LABEL_DEFN(hal_saved_interrupt_state)
mov.l er3,@CYG_LABEL_DEFN(hal_saved_interrupt_state)
#endif
mov.l @CYG_LABEL_DEFN(_intvector),er0
shll.l er0
shll.l er0
mov.l @(CYG_LABEL_DEFN(hal_interrupt_handlers),er0),er2
mov.l @(CYG_LABEL_DEFN(hal_interrupt_data),er0),er1
 
shlr.l er0
shlr.l er0
 
jsr @er2
 
; on return d0 bit 1 will indicate whether a DSR is
; to be posted. Pass this together with a pointer to
; the interrupt object we have just used to the
; interrupt tidy up routine.
; D3 is defined to be saved across procedure calls, and
; should still contain the vector byte index. Similarly,
; A2 should still point to the saved machine state.
 
#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
; If interrupt was caused by GDB, the ISR call above
; is skipped by jumping here.
2:
#endif
 
#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK) && !defined(CYGPKG_CYGMON)
 
; If we are returning from the last nested interrupt, move back
; to the thread stack. interrupt_end() must be called on the
; thread stack since it potentially causes a context switch.
mov.l @sp+,sp ; pop old sp
 
#endif
 
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
; We only need to call _interrupt_end() when there is a kernel
; present to do any tidying up.
; Using the vector offset in D3, get the interrupt object pointer
; into D1.
mov.l @CYG_LABEL_DEFN(_intvector),er1
shll.l er1
shll.l er1
mov.l @(CYG_LABEL_DEFN(hal_interrupt_objects),er1),er1
 
; Even when this is not the last nested interrupt, we must call
; _interrupt_end() to post the DSR and decrement the scheduler
; lock.
mov.l er3,er2 ; arg3 = saved state.
jsr @CYG_LABEL_DEFN(interrupt_end) ; call interrupt end fn
#endif
 
 
# show_interrupts
 
hal_diag_restore
hal_cpu_load_all
#ifdef CYGPKG_CYGMON
hal_cygmon_restore_app_stack
#endif
rte ; and return
 
.section .bss
.global CYG_LABEL_DEFN(_intvector)
CYG_LABEL_DEFN(_intvector):
.long 0
 
.text
##-----------------------------------------------------------------------------
## Execute pending DSRs on the interrupt stack with interrupts enabled.
## Note: this can only be called from code running on a thread stack
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
.extern CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)
.global CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs)
 
CYG_LABEL_DEFN(hal_interrupt_stack_call_pending_DSRs):
mov.l er5,@-sp ; save some work regs
mov.l er6,@-sp
mov.l sp,er6 ; save current SP
mov.l #__interrupt_stack,sp ; interrupt stack pointer
stc ccr,r5l ; save PSW
hal_cpu_int_enable ; enable interrupts
 
; Call kernel code to invoke DSRs.
jsr @CYG_LABEL_DEFN(cyg_interrupt_call_pending_DSRs)
 
; On return the old SP in a2 and the old PSW in d2 will
; have been preserved by the calling conventions.
hal_cpu_int_merge r5l ; Restore previous PSW
mov.l er6,sp ; restore old SP
mov.l @sp+,er6 ; Retrieve old work regs
mov.l @sp+,er5
rts ; and return
#endif
#ifdef CYGPKG_CYGMON
.section .bss
er0_save:
.long 0
er1_save:
.long 0
er2_save:
.long 0
er3_save:
.long 0
er4_save:
.long 0
er5_save:
.long 0
er6_save:
.long 0
sp_save:
.long 0
#endif
 
##-----------------------------------------------------------------------------
## Default TRAP VSR
 
.text
.globl CYG_LABEL_DEFN(__default_trap_vsr)
CYG_LABEL_DEFN(__default_trap_vsr):
 
#ifdef CYG_HAL_DIAG_EXCPT_END
hal_diag_excpt_start
#endif
 
mov.l sp,er0
mov.l @CYG_LABEL_DEFN(_intvector),er1
 
jsr @CYG_LABEL_DEFN(cyg_hal_exception_handler)
 
#ifdef CYG_HAL_DIAG_EXCPT_END
hal_diag_excpt_end
#endif
hal_cpu_load_all
#ifdef CYGPKG_CYGMON
hal_cygmon_restore_app_stack
#endif
rte
 
##-----------------------------------------------------------------------------
## VSR table. The VSRs pointed to by this table are called from the stubs
## connected to the hardware.
 
#ifndef CYG_HAL_H8300_VSR_TABLE_DEFINED
.data
 
.globl CYG_LABEL_DEFN(hal_vsr_table)
CYG_LABEL_DEFN(hal_vsr_table):
.long CYG_LABEL_DEFN(__default_trap_vsr)
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long CYG_LABEL_DEFN(__default_trap_vsr)
.long CYG_LABEL_DEFN(__default_trap_vsr)
.long CYG_LABEL_DEFN(__default_trap_vsr)
.long CYG_LABEL_DEFN(__default_trap_vsr)
.long CYG_LABEL_DEFN(__default_trap_vsr)
 
.rept 64-12
.long CYG_LABEL_DEFN(__default_interrupt_vsr)
.endr
#endif
##-----------------------------------------------------------------------------
## Interrupt tables
.data
 
.extern CYG_LABEL_DEFN(hal_default_isr)
.globl CYG_LABEL_DEFN(hal_interrupt_handlers)
CYG_LABEL_DEFN(hal_interrupt_handlers):
.rept CYG_ISR_TABLE_SIZE
.long CYG_LABEL_DEFN(hal_default_isr)
.endr
.globl CYG_LABEL_DEFN(hal_interrupt_data)
CYG_LABEL_DEFN(hal_interrupt_data):
.rept CYG_ISR_TABLE_SIZE
.long 0
.endr
.globl CYG_LABEL_DEFN(hal_interrupt_objects)
CYG_LABEL_DEFN(hal_interrupt_objects):
.rept CYG_ISR_TABLE_SIZE
.long 0
.endr
##-----------------------------------------------------------------------------
## Temporary interrupt stack
.section .bss
 
.balign 16
.global _cyg_interrupt_stack_base
_cyg_interrupt_stack_base:
__interrupt_stack_base:
.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
.byte 0
.endr
.balign 16
.global _cyg_interrupt_stack
_cyg_interrupt_stack:
__interrupt_stack:
#ifdef CYGPKG_CYGMON
.balign 16
.global __cygmon_interrupt_stack_base
__cygmon_interrupt_stack_base:
.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
.byte 0
.endr
.balign 16
.global __cygmon_interrupt_stack
__cygmon_interrupt_stack:
#endif
 
.long 0,0,0,0,0,0,0,0
 
##-----------------------------------------------------------------------------
 
.data
hal_diag_data
 
 
##-----------------------------------------------------------------------------
## end of vectors.S
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.