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https://opencores.org/ocsvn/or1k/or1k/trunk
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- This comparison shows the changes necessary to convert path
/or1k/trunk/ecos-2.0/packages/hal/powerpc/sim/v2_0/include/pkgconf
- from Rev 1254 to Rev 1765
- ↔ Reverse comparison
Rev 1254 → Rev 1765
/mlt_powerpc_sim_ram.h
0,0 → 1,22
// eCos memory layout - Fri Oct 20 10:36:41 2000 |
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// This is a generated file - do not edit |
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#ifndef __ASSEMBLER__ |
#include <cyg/infra/cyg_type.h> |
#include <stddef.h> |
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#endif |
#define CYGMEM_REGION_ram (0) |
#define CYGMEM_REGION_ram_SIZE (0x100000) |
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__reserved_vsr_table) []; |
#endif |
#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table)) |
#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200) |
#ifndef __ASSEMBLER__ |
extern char CYG_LABEL_NAME (__heap1) []; |
#endif |
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1)) |
#define CYGMEM_SECTION_heap1_SIZE (0x100000 - (size_t) CYG_LABEL_NAME (__heap1)) |
/mlt_powerpc_sim_ram.ldi
0,0 → 1,28
// eCos memory layout - Fri Oct 20 10:36:41 2000 |
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// This is a generated file - do not edit |
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#include <cyg/infra/cyg_type.inc> |
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MEMORY |
{ |
ram : ORIGIN = 0, LENGTH = 0x100000 |
} |
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SECTIONS |
{ |
SECTIONS_BEGIN |
SECTION_vectors (ram, 0, LMA_EQ_VMA) |
CYG_LABEL_DEFN(__reserved_vsr_table) = 0x3000; . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200; |
SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA) |
SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA) |
SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA) |
SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA) |
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8); |
SECTIONS_END |
} |
/mlt_powerpc_sim_ram.mlt
0,0 → 1,14
version 0 |
region ram 0 100000 0 ! |
section vectors 0 1 0 1 1 0 1 0 0 0 ! |
section reserved_vsr_table 200 1 0 0 1 1 1 1 3000 3000 text text ! |
section text 0 4 0 1 0 1 0 1 fini fini ! |
section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 ! |
section rodata1 0 8 0 1 0 1 0 1 rodata rodata ! |
section rodata 0 8 0 1 0 1 0 1 fixup fixup ! |
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table ! |
section gcc_except_table 0 1 0 1 0 1 0 1 data data ! |
section data 0 8 0 1 0 1 0 1 sbss sbss ! |
section sbss 0 4 0 1 0 1 0 1 bss bss ! |
section bss 0 10 0 1 0 1 0 1 heap1 heap1 ! |
section heap1 0 8 0 0 0 0 0 0 ! |