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- This comparison shows the changes necessary to convert path
/or1k/trunk/gdb-5.0/gdb/config/mn10200
- from Rev 107 to Rev 1765
- ↔ Reverse comparison
Rev 107 → Rev 1765
/tm-mn10200.h
0,0 → 1,214
/* Parameters for execution on a Matsushita mn10200 processor. |
Copyright 1997 Free Software Foundation, Inc. |
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Contributed by Geoffrey Noer <noer@cygnus.com> |
|
This file is part of GDB. |
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This program is free software; you can redistribute it and/or modify |
it under the terms of the GNU General Public License as published by |
the Free Software Foundation; either version 2 of the License, or |
(at your option) any later version. |
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This program is distributed in the hope that it will be useful, |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
GNU General Public License for more details. |
|
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software |
Foundation, Inc., 59 Temple Place - Suite 330, |
Boston, MA 02111-1307, USA. */ |
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/* The mn10200 is little endian. */ |
#define TARGET_BYTE_ORDER LITTLE_ENDIAN |
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/* ints are only 16bits on the mn10200. */ |
#undef TARGET_INT_BIT |
#define TARGET_INT_BIT 16 |
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/* The mn10200 doesn't support long long types. */ |
#undef TARGET_LONG_LONG_BIT |
#define TARGET_LONG_LONG_BIT 32 |
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/* The mn10200 doesn't support double or long double either. */ |
#undef TARGET_DOUBLE_BIT |
#undef TARGET_LONG_DOUBLE_BIT |
#define TARGET_DOUBLE_BIT 32 |
#define TARGET_LONG_DOUBLE_BIT 32 |
|
/* Not strictly correct, but the machine independent code is not |
ready to handle any of the basic sizes not being a power of two. */ |
#undef TARGET_PTR_BIT |
#define TARGET_PTR_BIT 32 |
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/* The mn10200 really has 24 bit registers but the simulator reads/writes |
them as 32bit values, so we claim they're 32bits each. This may have |
to be tweaked if the Matsushita emulator/board really deals with them |
as 24bits each. */ |
#define REGISTER_SIZE 4 |
|
#define MAX_REGISTER_RAW_SIZE REGISTER_SIZE |
#define NUM_REGS 11 |
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#define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE) |
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#define REGISTER_NAMES \ |
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "sp", \ |
"pc", "mdr", "psw"} |
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#define FP_REGNUM 6 |
#define SP_REGNUM 7 |
#define PC_REGNUM 8 |
#define MDR_REGNUM 9 |
#define PSW_REGNUM 10 |
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/* Treat the registers as 32bit values. */ |
#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_long |
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#define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE) |
#define REGISTER_VIRTUAL_SIZE(REG) REGISTER_SIZE |
#define REGISTER_RAW_SIZE(REG) REGISTER_SIZE |
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#define MAX_REGISTER_VIRTUAL_SIZE REGISTER_SIZE |
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/* The breakpoint instruction must be the same size as te smallest |
instruction in the instruction set. |
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The Matsushita mn10x00 processors have single byte instructions |
so we need a single byte breakpoint. Matsushita hasn't defined |
one, so we defined it ourselves. |
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0xff is the only available single byte insn left on the mn10200. */ |
#define BREAKPOINT {0xff} |
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#define FUNCTION_START_OFFSET 0 |
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#define DECR_PC_AFTER_BREAK 0 |
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/* Stacks grow the normal way. */ |
#define INNER_THAN(lhs,rhs) ((lhs) < (rhs)) |
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#define SAVED_PC_AFTER_CALL(frame) \ |
(read_memory_integer (read_register (SP_REGNUM), REGISTER_SIZE) & 0xffffff) |
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struct frame_info; |
struct frame_saved_regs; |
struct type; |
struct value; |
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#define EXTRA_FRAME_INFO struct frame_saved_regs fsr; int status; int stack_size; |
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extern void mn10200_init_extra_frame_info PARAMS ((struct frame_info *)); |
#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10200_init_extra_frame_info (fi) |
#define INIT_FRAME_PC(x,y) |
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extern void mn10200_frame_find_saved_regs PARAMS ((struct frame_info *, |
struct frame_saved_regs *)); |
#define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr |
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extern CORE_ADDR mn10200_frame_chain PARAMS ((struct frame_info *)); |
#define FRAME_CHAIN(fi) mn10200_frame_chain (fi) |
#define FRAME_CHAIN_VALID(FP, FI) generic_file_frame_chain_valid (FP, FI) |
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extern CORE_ADDR mn10200_find_callers_reg PARAMS ((struct frame_info *, int)); |
extern CORE_ADDR mn10200_frame_saved_pc PARAMS ((struct frame_info *)); |
#define FRAME_SAVED_PC(FI) (mn10200_frame_saved_pc (FI)) |
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/* Extract from an array REGBUF containing the (raw) register state |
a function return value of type TYPE, and copy that, in virtual format, |
into VALBUF. */ |
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#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \ |
{ \ |
if (TYPE_LENGTH (TYPE) > 8) \ |
abort (); \ |
else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \ |
{ \ |
memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), 2); \ |
memcpy (VALBUF + 2, REGBUF + REGISTER_BYTE (1), 2); \ |
} \ |
else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\ |
{ \ |
memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \ |
} \ |
else \ |
{ \ |
memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE)); \ |
} \ |
} |
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#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \ |
extract_address (REGBUF + REGISTER_BYTE (4), \ |
REGISTER_RAW_SIZE (4)) |
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#define STORE_RETURN_VALUE(TYPE, VALBUF) \ |
{ \ |
if (TYPE_LENGTH (TYPE) > 8) \ |
abort (); \ |
else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \ |
{ \ |
write_register_bytes (REGISTER_BYTE (0), VALBUF, 2); \ |
write_register_bytes (REGISTER_BYTE (1), VALBUF + 2, 2); \ |
} \ |
else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\ |
{ \ |
write_register_bytes (REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \ |
} \ |
else \ |
{ \ |
write_register_bytes (REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE)); \ |
} \ |
} |
|
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extern CORE_ADDR mn10200_store_struct_return (CORE_ADDR addr, CORE_ADDR sp); |
#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \ |
(SP) = mn10200_store_struct_return (STRUCT_ADDR, SP) |
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extern CORE_ADDR mn10200_skip_prologue PARAMS ((CORE_ADDR)); |
#define SKIP_PROLOGUE(pc) (mn10200_skip_prologue (pc)) |
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#define FRAME_ARGS_SKIP 0 |
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#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame) |
#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame) |
#define FRAME_NUM_ARGS(fi) (-1) |
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extern void mn10200_pop_frame PARAMS ((struct frame_info *)); |
#define POP_FRAME mn10200_pop_frame (get_current_frame ()) |
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#define USE_GENERIC_DUMMY_FRAMES 1 |
#define CALL_DUMMY {0} |
#define CALL_DUMMY_START_OFFSET (0) |
#define CALL_DUMMY_BREAKPOINT_OFFSET (0) |
#define CALL_DUMMY_LOCATION AT_ENTRY_POINT |
#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP) |
#define CALL_DUMMY_ADDRESS() entry_point_address () |
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extern CORE_ADDR mn10200_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR)); |
#define PUSH_RETURN_ADDRESS(PC, SP) mn10200_push_return_address (PC, SP) |
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#define PUSH_DUMMY_FRAME generic_push_dummy_frame () |
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extern CORE_ADDR |
mn10200_push_arguments PARAMS ((int, struct value **, CORE_ADDR, |
unsigned char, CORE_ADDR)); |
#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \ |
(mn10200_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)) |
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#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP) |
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#define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \ |
(TYPE_LENGTH (TYPE) > 8) |
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extern use_struct_convention_fn mn10200_use_struct_convention; |
#define USE_STRUCT_CONVENTION(GCC_P, TYPE) mn10200_use_struct_convention (GCC_P, TYPE) |
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/* Override the default get_saved_register function with |
one that takes account of generic CALL_DUMMY frames. */ |
#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \ |
generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) |
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/* Define this for Wingdb */ |
#define TARGET_MN10200 |
/mn10200.mt
0,0 → 1,6
# Target: Matsushita mn10200 |
TDEPFILES= mn10200-tdep.o |
TM_FILE= tm-mn10200.h |
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SIM_OBS = remote-sim.o |
SIM = ../sim/mn10200/libsim.a |