OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

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  • This comparison shows the changes necessary to convert path 
    /or1k/trunk/gdb-5.0/gdb/config/pa
    from Rev 107 to Rev 1765
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  •

Rev 107 → Rev 1765

/hppaosf.mt
0,0 → 1,3
# Target: HP PA-RISC running OSF1
TDEPFILES= hppa-tdep.o
TM_FILE= tm-hppao.h
/hpux11w.mh
0,0 → 1,11
# Host: Hewlett-Packard PA-RISC machine, running HPUX 11.00
 
MH_CFLAGS = -D__HP_CURSES
 
XM_FILE= xm-hppah.h
XDEPFILES= ser-tcp.o
 
NAT_FILE= nm-hppah11.h
NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infttrace.o hp-psymtab-read.o hp-symtab-read.o pa64solib.o
 
HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
/hppa64.mt
0,0 → 1,4
# Target: HP PA-RISC 2.0 running HPUX 11.00 in wide mode
TDEPFILES= hppa-tdep.o
TM_FILE= tm-hppa64.h
TM_CLIBS=
/hppabsd.mh
0,0 → 1,7
# Host: Hewlett-Packard PA-RISC machine, running BSD
XDEPFILES= ser-tcp.o
XM_FILE= xm-hppab.h
NAT_FILE= nm-hppab.h
NATDEPFILES= hppab-nat.o corelow.o core-aout.o inftarg.o fork-child.o somread.o infptrace.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
 
GDBSERVER_DEPFILES= low-hppabsd.o
/nm-hppab.h
0,0 → 1,136
/* HPPA PA-RISC machine native support for BSD, for GDB.
Copyright 1991, 1992 Free Software Foundation, Inc.
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
#include "somsolib.h"
 
#define U_REGS_OFFSET 0
 
#define KERNEL_U_ADDR 0
 
/* What a coincidence! */
#define REGISTER_U_ADDR(addr, blockend, regno) \
{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
 
/* 3rd argument to ptrace is supposed to be a caddr_t. */
 
#define PTRACE_ARG3_TYPE caddr_t
 
/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
with five arguments, so programs written for normal ptrace lose. */
#define FIVE_ARG_PTRACE
 
 
/* This macro defines the register numbers (from REGISTER_NAMES) that
are effectively unavailable to the user through ptrace(). It allows
us to include the whole register set in REGISTER_NAMES (inorder to
better support remote debugging). If it is used in
fetch/store_inferior_registers() gdb will not complain about I/O errors
on fetching these registers. If all registers in REGISTER_NAMES
are available, then return false (0). */
 
#define CANNOT_STORE_REGISTER(regno) \
((regno) == 0) || \
((regno) == PCSQ_HEAD_REGNUM) || \
((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
 
/* fetch_inferior_registers is in hppab-nat.c. */
#define FETCH_INFERIOR_REGISTERS
 
/* attach/detach works to some extent under BSD and HPUX. So long
as the process you're attaching to isn't blocked waiting on io,
blocked waiting on a signal, or in a system call things work
fine. (The problems in those cases are related to the fact that
the kernel can't provide complete register information for the
target process... Which really pisses off GDB.) */
 
#define ATTACH_DETACH
 
/* The PA-BSD kernel has support for using the data memory break bit
to implement fast watchpoints.
 
Watchpoints on the PA act much like traditional page protection
schemes, but with some notable differences.
 
First, a special bit in the page table entry is used to cause
a trap when a specific page is written to. This avoids having
to overload watchpoints on the page protection bits. This makes
it possible for the kernel to easily decide if a trap was caused
by a watchpoint or by the user writing to protected memory and can
signal the user program differently in each case.
 
Second, the PA has a bit in the processor status word which causes
data memory breakpoints (aka watchpoints) to be disabled for a single
instruction. This bit can be used to avoid the overhead of unprotecting
and reprotecting pages when it becomes necessary to step over a watchpoint.
 
 
When the kernel receives a trap indicating a write to a page which
is being watched, the kernel performs a couple of simple actions. First
is sets the magic "disable memory breakpoint" bit in the processor
status word, it then sends a SIGTRAP to the process which caused the
trap.
 
GDB will take control and catch the signal for the inferior. GDB then
examines the PSW-X bit to determine if the SIGTRAP was caused by a
watchpoint firing. If so GDB single steps the inferior over the
instruction which caused the watchpoint to trigger (note because the
kernel disabled the data memory break bit for one instruction no trap
will be taken!). GDB will then determines the appropriate action to
take. (this may include restarting the inferior if the watchpoint
fired because of a write to an address on the same page as a watchpoint,
but no write to the watched address occured). */
 
#define TARGET_HAS_HARDWARE_WATCHPOINTS /* Enable the code in procfs.c */
 
/* The PA can watch any number of locations, there's no need for it to reject
anything (generic routines already check that all intermediates are
in memory). */
#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
((type) == bp_hardware_watchpoint)
 
/* When a hardware watchpoint fires off the PC will be left at the
instruction which caused the watchpoint. It will be necessary for
GDB to step over the watchpoint.
 
On a PA running BSD, it is trivial to identify when it will be
necessary to step over a hardware watchpoint as we can examine
the PSW-X bit. If the bit is on, then we trapped because of a
watchpoint, else we trapped for some other reason. */
#define STOPPED_BY_WATCHPOINT(W) \
((W).kind == TARGET_WAITKIND_STOPPED \
&& (W).value.sig == TARGET_SIGNAL_TRAP \
&& ((int) read_register (IPSW_REGNUM) & 0x00100000))
 
/* The PA can single step over a watchpoint if the kernel has set the
"X" bit in the processor status word (disable data memory breakpoint
for one instruction).
 
The kernel will always set this bit before notifying the inferior
that it hit a watchpoint. Thus, the inferior can single step over
the instruction which caused the watchpoint to fire. This avoids
the traditional need to disable the watchpoint, step the inferior,
then enable the watchpoint again. */
#define HAVE_STEPPABLE_WATCHPOINT
 
/* Use these macros for watchpoint insertion/deletion. */
/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
#define target_insert_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 1)
#define target_remove_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 0)
/hppapro.mt
0,0 → 1,3
# Target: PA based debug monitor
TDEPFILES= hppa-tdep.o op50-rom.o w89k-rom.o monitor.o xmodem.o dsrec.o
TM_FILE= tm-pro.h
/hpux11.mh
0,0 → 1,11
# Host: Hewlett-Packard PA-RISC machine, running HPUX 11.00
 
MH_CFLAGS = -D__HP_CURSES
 
XM_FILE= xm-hppah.h
XDEPFILES= ser-tcp.o
 
NAT_FILE= nm-hppah11.h
NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infttrace.o somread.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
 
HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
/hpux1020.mh
0,0 → 1,11
# Host: Hewlett-Packard PA-RISC machine, running HPUX 10.20
 
MH_CFLAGS = -D__HP_CURSES
 
XM_FILE= xm-hppah.h
XDEPFILES= ser-tcp.o
 
NAT_FILE= nm-hppah.h
NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infptrace.o somread.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
 
HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
/hpux11w.mt
0,0 → 1,3
# Target: HP PA-RISC running HPUX 11.00
TDEPFILES= hppa-tdep.o remote-pa.o
TM_FILE= tm-hppah.h
/tm-hppa.h
0,0 → 1,806
/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
Copyright 1986, 1987, 1989-1993, 1995, 1999, 2000 Free Software Foundation, Inc.
 
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
/* Forward declarations of some types we use in prototypes */
 
struct frame_info;
struct frame_saved_regs;
struct value;
struct type;
struct inferior_status;
 
/* Target system byte order. */
 
#define TARGET_BYTE_ORDER BIG_ENDIAN
 
/* By default assume we don't have to worry about software floating point. */
#ifndef SOFT_FLOAT
#define SOFT_FLOAT 0
#endif
 
/* Get at various relevent fields of an instruction word. */
 
#define MASK_5 0x1f
#define MASK_11 0x7ff
#define MASK_14 0x3fff
#define MASK_21 0x1fffff
 
/* This macro gets bit fields using HP's numbering (MSB = 0) */
#ifndef GET_FIELD
#define GET_FIELD(X, FROM, TO) \
((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
#endif
 
/* Watch out for NaNs */
 
#define IEEE_FLOAT
 
/* On the PA, any pass-by-value structure > 8 bytes is actually
passed via a pointer regardless of its type or the compiler
used. */
 
#define REG_STRUCT_HAS_ADDR(gcc_p,type) \
(TYPE_LENGTH (type) > 8)
 
/* Offset from address of function to start of its code.
Zero on most machines. */
 
#define FUNCTION_START_OFFSET 0
 
/* Advance PC across any function entry prologue instructions
to reach some "real" code. */
 
extern CORE_ADDR hppa_skip_prologue PARAMS ((CORE_ADDR));
#define SKIP_PROLOGUE(pc) (hppa_skip_prologue (pc))
 
/* If PC is in some function-call trampoline code, return the PC
where the function itself actually starts. If not, return NULL. */
 
#define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, NULL)
extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
 
/* Return non-zero if we are in an appropriate trampoline. */
 
#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
in_solib_call_trampoline (pc, name)
extern int in_solib_call_trampoline PARAMS ((CORE_ADDR, char *));
 
#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) \
in_solib_return_trampoline (pc, name)
extern int in_solib_return_trampoline PARAMS ((CORE_ADDR, char *));
 
/* Immediately after a function call, return the saved pc.
Can't go through the frames for this because on some machines
the new frame is not set up until the new function executes
some instructions. */
 
#undef SAVED_PC_AFTER_CALL
#define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call (frame)
extern CORE_ADDR saved_pc_after_call PARAMS ((struct frame_info *));
 
/* Stack grows upward */
#define INNER_THAN(lhs,rhs) ((lhs) > (rhs))
 
/* elz: adjust the quantity to the next highest value which is 64-bit aligned.
This is used in valops.c, when the sp is adjusted.
On hppa the sp must always be kept 64-bit aligned */
 
#define STACK_ALIGN(arg) ( ((arg)%8) ? (((arg)+7)&-8) : (arg))
#define NO_EXTRA_ALIGNMENT_NEEDED 1
 
/* Sequence of bytes for breakpoint instruction. */
 
#define BREAKPOINT {0x00, 0x01, 0x00, 0x04}
#define BREAKPOINT32 0x10004
 
/* Amount PC must be decremented by after a breakpoint.
This is often the number of bytes in BREAKPOINT
but not always.
 
Not on the PA-RISC */
 
#define DECR_PC_AFTER_BREAK 0
 
/* Sometimes we may pluck out a minimal symbol that has a negative
address.
 
An example of this occurs when an a.out is linked against a foo.sl.
The foo.sl defines a global bar(), and the a.out declares a signature
for bar(). However, the a.out doesn't directly call bar(), but passes
its address in another call.
 
If you have this scenario and attempt to "break bar" before running,
gdb will find a minimal symbol for bar() in the a.out. But that
symbol's address will be negative. What this appears to denote is
an index backwards from the base of the procedure linkage table (PLT)
into the data linkage table (DLT), the end of which is contiguous
with the start of the PLT. This is clearly not a valid address for
us to set a breakpoint on.
 
Note that one must be careful in how one checks for a negative address.
0xc0000000 is a legitimate address of something in a shared text
segment, for example. Since I don't know what the possible range
is of these "really, truly negative" addresses that come from the
minimal symbols, I'm resorting to the gross hack of checking the
top byte of the address for all 1's. Sigh.
*/
#define PC_REQUIRES_RUN_BEFORE_USE(pc) \
(! target_has_stack && (pc & 0xFF000000))
 
/* return instruction is bv r0(rp) or bv,n r0(rp) */
 
#define ABOUT_TO_RETURN(pc) ((read_memory_integer (pc, 4) | 0x2) == 0xE840C002)
 
/* Say how long (ordinary) registers are. This is a piece of bogosity
used in push_word and a few other places; REGISTER_RAW_SIZE is the
real way to know how big a register is. */
 
#define REGISTER_SIZE 4
 
/* Number of machine registers */
 
#define NUM_REGS 128
 
/* Initializer for an array of names of registers.
There should be NUM_REGS strings in this initializer.
They are in rows of eight entries */
 
#define REGISTER_NAMES \
{"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
"r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
"sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
"ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
"sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
"cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
"fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
"fr4", "fr4R", "fr5", "fr5R", "fr6", "fr6R", "fr7", "fr7R", \
"fr8", "fr8R", "fr9", "fr9R", "fr10", "fr10R", "fr11", "fr11R", \
"fr12", "fr12R", "fr13", "fr13R", "fr14", "fr14R", "fr15", "fr15R", \
"fr16", "fr16R", "fr17", "fr17R", "fr18", "fr18R", "fr19", "fr19R", \
"fr20", "fr20R", "fr21", "fr21R", "fr22", "fr22R", "fr23", "fr23R", \
"fr24", "fr24R", "fr25", "fr25R", "fr26", "fr26R", "fr27", "fr27R", \
"fr28", "fr28R", "fr29", "fr29R", "fr30", "fr30R", "fr31", "fr31R"}
 
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
and correspond to the general registers of the machine,
and some are "phony" register numbers which are too large
to be actual register numbers as far as the user is concerned
but do serve to get the desired values when passed to read_register. */
 
#define R0_REGNUM 0 /* Doesn't actually exist, used as base for
other r registers. */
#define FLAGS_REGNUM 0 /* Various status flags */
#define RP_REGNUM 2 /* return pointer */
#define FP_REGNUM 3 /* Contains address of executing stack */
/* frame */
#define SP_REGNUM 30 /* Contains address of top of stack */
#define SAR_REGNUM 32 /* Shift Amount Register */
#define IPSW_REGNUM 41 /* Interrupt Processor Status Word */
#define PCOQ_HEAD_REGNUM 33 /* instruction offset queue head */
#define PCSQ_HEAD_REGNUM 34 /* instruction space queue head */
#define PCOQ_TAIL_REGNUM 35 /* instruction offset queue tail */
#define PCSQ_TAIL_REGNUM 36 /* instruction space queue tail */
#define EIEM_REGNUM 37 /* External Interrupt Enable Mask */
#define IIR_REGNUM 38 /* Interrupt Instruction Register */
#define IOR_REGNUM 40 /* Interrupt Offset Register */
#define SR4_REGNUM 43 /* space register 4 */
#define RCR_REGNUM 51 /* Recover Counter (also known as cr0) */
#define CCR_REGNUM 54 /* Coprocessor Configuration Register */
#define TR0_REGNUM 57 /* Temporary Registers (cr24 -> cr31) */
#define CR27_REGNUM 60 /* Base register for thread-local storage, cr27 */
#define FP0_REGNUM 64 /* floating point reg. 0 (fspr) */
#define FP4_REGNUM 72
 
#define ARG0_REGNUM 26 /* The first argument of a callee. */
#define ARG1_REGNUM 25 /* The second argument of a callee. */
#define ARG2_REGNUM 24 /* The third argument of a callee. */
#define ARG3_REGNUM 23 /* The fourth argument of a callee. */
 
/* compatibility with the rest of gdb. */
#define PC_REGNUM PCOQ_HEAD_REGNUM
#define NPC_REGNUM PCOQ_TAIL_REGNUM
 
/*
* Processor Status Word Masks
*/
 
#define PSW_T 0x01000000 /* Taken Branch Trap Enable */
#define PSW_H 0x00800000 /* Higher-Privilege Transfer Trap Enable */
#define PSW_L 0x00400000 /* Lower-Privilege Transfer Trap Enable */
#define PSW_N 0x00200000 /* PC Queue Front Instruction Nullified */
#define PSW_X 0x00100000 /* Data Memory Break Disable */
#define PSW_B 0x00080000 /* Taken Branch in Previous Cycle */
#define PSW_C 0x00040000 /* Code Address Translation Enable */
#define PSW_V 0x00020000 /* Divide Step Correction */
#define PSW_M 0x00010000 /* High-Priority Machine Check Disable */
#define PSW_CB 0x0000ff00 /* Carry/Borrow Bits */
#define PSW_R 0x00000010 /* Recovery Counter Enable */
#define PSW_Q 0x00000008 /* Interruption State Collection Enable */
#define PSW_P 0x00000004 /* Protection ID Validation Enable */
#define PSW_D 0x00000002 /* Data Address Translation Enable */
#define PSW_I 0x00000001 /* External, Power Failure, Low-Priority */
/* Machine Check Interruption Enable */
 
/* When fetching register values from an inferior or a core file,
clean them up using this macro. BUF is a char pointer to
the raw value of the register in the registers[] array. */
 
#define CLEAN_UP_REGISTER_VALUE(regno, buf) \
do { \
if ((regno) == PCOQ_HEAD_REGNUM || (regno) == PCOQ_TAIL_REGNUM) \
(buf)[sizeof(CORE_ADDR) -1] &= ~0x3; \
} while (0)
 
/* Define DO_REGISTERS_INFO() to do machine-specific formatting
of register dumps. */
 
#define DO_REGISTERS_INFO(_regnum, fp) pa_do_registers_info (_regnum, fp)
extern void pa_do_registers_info PARAMS ((int, int));
 
#if 0
#define STRCAT_REGISTER(regnum, fpregs, stream, precision) pa_do_strcat_registers_info (regnum, fpregs, stream, precision)
extern void pa_do_strcat_registers_info (int, int, struct ui_file *, enum precision_type);
#endif
 
/* PA specific macro to see if the current instruction is nullified. */
#ifndef INSTRUCTION_NULLIFIED
#define INSTRUCTION_NULLIFIED \
(((int)read_register (IPSW_REGNUM) & 0x00200000) && \
!((int)read_register (FLAGS_REGNUM) & 0x2))
#endif
 
/* Number of bytes of storage in the actual machine representation
for register N. On the PA-RISC, all regs are 4 bytes, including
the FP registers (they're accessed as two 4 byte halves). */
 
#define REGISTER_RAW_SIZE(N) 4
 
/* Total amount of space needed to store our copies of the machine's
register state, the array `registers'. */
#define REGISTER_BYTES (NUM_REGS * 4)
 
/* Index within `registers' of the first byte of the space for
register N. */
 
#define REGISTER_BYTE(N) (N) * 4
 
/* Number of bytes of storage in the program's representation
for register N. */
 
#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
 
/* Largest value REGISTER_RAW_SIZE can have. */
 
#define MAX_REGISTER_RAW_SIZE 4
 
/* Largest value REGISTER_VIRTUAL_SIZE can have. */
 
#define MAX_REGISTER_VIRTUAL_SIZE 8
 
/* Return the GDB type object for the "standard" data type
of data in register N. */
 
#define REGISTER_VIRTUAL_TYPE(N) \
((N) < FP4_REGNUM ? builtin_type_int : builtin_type_float)
 
/* Store the address of the place in which to copy the structure the
subroutine will return. This is called from call_function. */
 
#define STORE_STRUCT_RETURN(ADDR, SP) {write_register (28, (ADDR)); }
 
/* Extract from an array REGBUF containing the (raw) register state
a function return value of type TYPE, and copy that, in virtual format,
into VALBUF.
 
elz: changed what to return when length is > 4: the stored result is
in register 28 and in register 29, with the lower order word being in reg 29,
so we must start reading it from somehere in the middle of reg28
 
FIXME: Not sure what to do for soft float here. */
 
#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
{ \
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
memcpy ((VALBUF), \
((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM), \
TYPE_LENGTH (TYPE)); \
else \
memcpy ((VALBUF), \
(char *)(REGBUF) + REGISTER_BYTE (28) + \
(TYPE_LENGTH (TYPE) > 4 ? (8 - TYPE_LENGTH (TYPE)) : (4 - TYPE_LENGTH (TYPE))), \
TYPE_LENGTH (TYPE)); \
}
 
 
/* elz: decide whether the function returning a value of type type
will put it on the stack or in the registers.
The pa calling convention says that:
register 28 (called ret0 by gdb) contains any ASCII char,
and any non_floating point value up to 32-bits.
reg 28 and 29 contain non-floating point up tp 64 bits and larger
than 32 bits. (higer order word in reg 28).
fr4: floating point up to 64 bits
sr1: space identifier (32-bit)
stack: any lager than 64-bit, with the address in r28
*/
extern use_struct_convention_fn hppa_use_struct_convention;
#define USE_STRUCT_CONVENTION(gcc_p,type) hppa_use_struct_convention (gcc_p,type)
 
/* Write into appropriate registers a function return value
of type TYPE, given in virtual format.
 
For software floating point the return value goes into the integer
registers. But we don't have any flag to key this on, so we always
store the value into the integer registers, and if it's a float value,
then we put it in the float registers too. */
 
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
write_register_bytes (REGISTER_BYTE (28),(VALBUF), TYPE_LENGTH (TYPE)) ; \
if (!SOFT_FLOAT) \
write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_FLT \
? REGISTER_BYTE (FP4_REGNUM) \
: REGISTER_BYTE (28)), \
(VALBUF), TYPE_LENGTH (TYPE))
 
/* Extract from an array REGBUF containing the (raw) register state
the address in which a function should return its structure value,
as a CORE_ADDR (or an expression that can be used as one). */
 
#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
(*(int *)((REGBUF) + REGISTER_BYTE (28)))
 
/* elz: Return a large value, which is stored on the stack at addr.
This is defined only for the hppa, at this moment.
The above macro EXTRACT_STRUCT_VALUE_ADDRESS is not called anymore,
because it assumes that on exit from a called function which returns
a large structure on the stack, the address of the ret structure is
still in register 28. Unfortunately this register is usually overwritten
by the called function itself, on hppa. This is specified in the calling
convention doc. As far as I know, the only way to get the return value
is to have the caller tell us where it told the callee to put it, rather
than have the callee tell us.
*/
#define VALUE_RETURNED_FROM_STACK(valtype,addr) \
hppa_value_returned_from_stack (valtype, addr)
 
/*
* This macro defines the register numbers (from REGISTER_NAMES) that
* are effectively unavailable to the user through ptrace(). It allows
* us to include the whole register set in REGISTER_NAMES (inorder to
* better support remote debugging). If it is used in
* fetch/store_inferior_registers() gdb will not complain about I/O errors
* on fetching these registers. If all registers in REGISTER_NAMES
* are available, then return false (0).
*/
 
#define CANNOT_STORE_REGISTER(regno) \
((regno) == 0) || \
((regno) == PCSQ_HEAD_REGNUM) || \
((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
 
#define INIT_EXTRA_FRAME_INFO(fromleaf, frame) init_extra_frame_info (fromleaf, frame)
extern void init_extra_frame_info PARAMS ((int, struct frame_info *));
 
/* Describe the pointer in each stack frame to the previous stack frame
(its caller). */
 
/* FRAME_CHAIN takes a frame's nominal address
and produces the frame's chain-pointer.
 
FRAME_CHAIN_COMBINE takes the chain pointer and the frame's nominal address
and produces the nominal address of the caller frame.
 
However, if FRAME_CHAIN_VALID returns zero,
it means the given frame is the outermost one and has no caller.
In that case, FRAME_CHAIN_COMBINE is not used. */
 
/* In the case of the PA-RISC, the frame's nominal address
is the address of a 4-byte word containing the calling frame's
address (previous FP). */
 
#define FRAME_CHAIN(thisframe) frame_chain (thisframe)
extern CORE_ADDR frame_chain PARAMS ((struct frame_info *));
 
extern int hppa_frame_chain_valid PARAMS ((CORE_ADDR, struct frame_info *));
#define FRAME_CHAIN_VALID(chain, thisframe) hppa_frame_chain_valid (chain, thisframe)
 
#define FRAME_CHAIN_COMBINE(chain, thisframe) (chain)
 
/* Define other aspects of the stack frame. */
 
/* A macro that tells us whether the function invocation represented
by FI does not have a frame on the stack associated with it. If it
does not, FRAMELESS is set to 1, else 0. */
#define FRAMELESS_FUNCTION_INVOCATION(FI) \
(frameless_function_invocation (FI))
extern int frameless_function_invocation PARAMS ((struct frame_info *));
 
extern CORE_ADDR hppa_frame_saved_pc PARAMS ((struct frame_info * frame));
#define FRAME_SAVED_PC(FRAME) hppa_frame_saved_pc (FRAME)
 
#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
 
#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
/* Set VAL to the number of args passed to frame described by FI.
Can set VAL to -1, meaning no way to tell. */
 
/* We can't tell how many args there are
now that the C compiler delays popping them. */
#define FRAME_NUM_ARGS(fi) (-1)
 
/* Return number of bytes at start of arglist that are not really args. */
 
#define FRAME_ARGS_SKIP 0
 
#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
hppa_frame_find_saved_regs (frame_info, &frame_saved_regs)
extern void
hppa_frame_find_saved_regs PARAMS ((struct frame_info *,
struct frame_saved_regs *));
 
/* Things needed for making the inferior call functions. */
 
/* Push an empty stack frame, to record the current PC, etc. */
 
#define PUSH_DUMMY_FRAME push_dummy_frame (inf_status)
extern void push_dummy_frame PARAMS ((struct inferior_status *));
 
/* Discard from the stack the innermost frame,
restoring all saved registers. */
#define POP_FRAME hppa_pop_frame ()
extern void hppa_pop_frame PARAMS ((void));
 
#define INSTRUCTION_SIZE 4
 
#ifndef PA_LEVEL_0
 
/* Non-level zero PA's have space registers (but they don't always have
floating-point, do they???? */
 
/* This sequence of words is the instructions
 
; Call stack frame has already been built by gdb. Since we could be calling
; a varargs function, and we do not have the benefit of a stub to put things in
; the right place, we load the first 4 word of arguments into both the general
; and fp registers.
call_dummy
ldw -36(sp), arg0
ldw -40(sp), arg1
ldw -44(sp), arg2
ldw -48(sp), arg3
ldo -36(sp), r1
fldws 0(0, r1), fr4
fldds -4(0, r1), fr5
fldws -8(0, r1), fr6
fldds -12(0, r1), fr7
ldil 0, r22 ; FUNC_LDIL_OFFSET must point here
ldo 0(r22), r22 ; FUNC_LDO_OFFSET must point here
ldsid (0,r22), r4
ldil 0, r1 ; SR4EXPORT_LDIL_OFFSET must point here
ldo 0(r1), r1 ; SR4EXPORT_LDO_OFFSET must point here
ldsid (0,r1), r20
combt,=,n r4, r20, text_space ; If target is in data space, do a
ble 0(sr5, r22) ; "normal" procedure call
copy r31, r2
break 4, 8
mtsp r21, sr0
ble,n 0(sr0, r22)
text_space ; Otherwise, go through _sr4export,
ble (sr4, r1) ; which will return back here.
stw r31,-24(r30)
break 4, 8
mtsp r21, sr0
ble,n 0(sr0, r22)
nop ; To avoid kernel bugs
nop ; and keep the dummy 8 byte aligned
 
The dummy decides if the target is in text space or data space. If
it's in data space, there's no problem because the target can
return back to the dummy. However, if the target is in text space,
the dummy calls the secret, undocumented routine _sr4export, which
calls a function in text space and can return to any space. Instead
of including fake instructions to represent saved registers, we
know that the frame is associated with the call dummy and treat it
specially.
 
The trailing NOPs are needed to avoid a bug in HPUX, BSD and OSF1
kernels. If the memory at the location pointed to by the PC is
0xffffffff then a ptrace step call will fail (even if the instruction
is nullified).
 
The code to pop a dummy frame single steps three instructions
starting with the last mtsp. This includes the nullified "instruction"
following the ble (which is uninitialized junk). If the
"instruction" following the last BLE is 0xffffffff, then the ptrace
will fail and the dummy frame is not correctly popped.
 
By placing a NOP in the delay slot of the BLE instruction we can be
sure that we never try to execute a 0xffffffff instruction and
avoid the kernel bug. The second NOP is needed to keep the call
dummy 8 byte aligned. */
 
/* Define offsets into the call dummy for the target function address */
#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 9)
#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 10)
 
/* Define offsets into the call dummy for the _sr4export address */
#define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
#define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
 
#define CALL_DUMMY {0x4BDA3FB9, 0x4BD93FB1, 0x4BD83FA9, 0x4BD73FA1,\
0x37C13FB9, 0x24201004, 0x2C391005, 0x24311006,\
0x2C291007, 0x22C00000, 0x36D60000, 0x02C010A4,\
0x20200000, 0x34210000, 0x002010b4, 0x82842022,\
0xe6c06000, 0x081f0242, 0x00010004, 0x00151820,\
0xe6c00002, 0xe4202000, 0x6bdf3fd1, 0x00010004,\
0x00151820, 0xe6c00002, 0x08000240, 0x08000240}
 
#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 28)
#define REG_PARM_STACK_SPACE 16
 
#else /* defined PA_LEVEL_0 */
 
/* This is the call dummy for a level 0 PA. Level 0's don't have space
registers (or floating point??), so we skip all that inter-space call stuff,
and avoid touching the fp regs.
 
call_dummy
 
ldw -36(%sp), %arg0
ldw -40(%sp), %arg1
ldw -44(%sp), %arg2
ldw -48(%sp), %arg3
ldil 0, %r31 ; FUNC_LDIL_OFFSET must point here
ldo 0(%r31), %r31 ; FUNC_LDO_OFFSET must point here
ble 0(%sr0, %r31)
copy %r31, %r2
break 4, 8
nop ; restore_pc_queue expects these
bv,n 0(%r22) ; instructions to be here...
nop
*/
 
/* Define offsets into the call dummy for the target function address */
#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 4)
#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 5)
 
#define CALL_DUMMY {0x4bda3fb9, 0x4bd93fb1, 0x4bd83fa9, 0x4bd73fa1,\
0x23e00000, 0x37ff0000, 0xe7e00000, 0x081f0242,\
0x00010004, 0x08000240, 0xeac0c002, 0x08000240}
 
#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 12)
 
#endif
 
#define CALL_DUMMY_START_OFFSET 0
 
/* If we've reached a trap instruction within the call dummy, then
we'll consider that to mean that we've reached the call dummy's
end after its successful completion. */
#define CALL_DUMMY_HAS_COMPLETED(pc, sp, frame_address) \
(PC_IN_CALL_DUMMY((pc), (sp), (frame_address)) && \
(read_memory_integer((pc), 4) == BREAKPOINT32))
 
/*
* Insert the specified number of args and function address
* into a call sequence of the above form stored at DUMMYNAME.
*
* On the hppa we need to call the stack dummy through $$dyncall.
* Therefore our version of FIX_CALL_DUMMY takes an extra argument,
* real_pc, which is the location where gdb should start up the
* inferior to do the function call.
*/
 
#define FIX_CALL_DUMMY hppa_fix_call_dummy
 
extern CORE_ADDR
hppa_fix_call_dummy PARAMS ((char *, CORE_ADDR, CORE_ADDR, int,
struct value **, struct type *, int));
 
#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
(hppa_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
extern CORE_ADDR
hppa_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int,
CORE_ADDR));
/* The low two bits of the PC on the PA contain the privilege level. Some
genius implementing a (non-GCC) compiler apparently decided this means
that "addresses" in a text section therefore include a privilege level,
and thus symbol tables should contain these bits. This seems like a
bonehead thing to do--anyway, it seems to work for our purposes to just
ignore those bits. */
#define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x3)
 
#define GDB_TARGET_IS_HPPA
 
#define BELIEVE_PCC_PROMOTION 1
 
/*
* Unwind table and descriptor.
*/
 
struct unwind_table_entry
{
CORE_ADDR region_start;
CORE_ADDR region_end;
 
unsigned int Cannot_unwind:1; /* 0 */
unsigned int Millicode:1; /* 1 */
unsigned int Millicode_save_sr0:1; /* 2 */
unsigned int Region_description:2; /* 3..4 */
unsigned int reserved1:1; /* 5 */
unsigned int Entry_SR:1; /* 6 */
unsigned int Entry_FR:4; /* number saved *//* 7..10 */
unsigned int Entry_GR:5; /* number saved *//* 11..15 */
unsigned int Args_stored:1; /* 16 */
unsigned int Variable_Frame:1; /* 17 */
unsigned int Separate_Package_Body:1; /* 18 */
unsigned int Frame_Extension_Millicode:1; /* 19 */
unsigned int Stack_Overflow_Check:1; /* 20 */
unsigned int Two_Instruction_SP_Increment:1; /* 21 */
unsigned int Ada_Region:1; /* 22 */
unsigned int cxx_info:1; /* 23 */
unsigned int cxx_try_catch:1; /* 24 */
unsigned int sched_entry_seq:1; /* 25 */
unsigned int reserved2:1; /* 26 */
unsigned int Save_SP:1; /* 27 */
unsigned int Save_RP:1; /* 28 */
unsigned int Save_MRP_in_frame:1; /* 29 */
unsigned int extn_ptr_defined:1; /* 30 */
unsigned int Cleanup_defined:1; /* 31 */
 
unsigned int MPE_XL_interrupt_marker:1; /* 0 */
unsigned int HP_UX_interrupt_marker:1; /* 1 */
unsigned int Large_frame:1; /* 2 */
unsigned int Pseudo_SP_Set:1; /* 3 */
unsigned int reserved4:1; /* 4 */
unsigned int Total_frame_size:27; /* 5..31 */
 
/* This is *NOT* part of an actual unwind_descriptor in an object
file. It is *ONLY* part of the "internalized" descriptors that
we create from those in a file.
*/
struct
{
unsigned int stub_type:4; /* 0..3 */
unsigned int padding:28; /* 4..31 */
}
stub_unwind;
};
 
/* HP linkers also generate unwinds for various linker-generated stubs.
GDB reads in the stubs from the $UNWIND_END$ subspace, then
"converts" them into normal unwind entries using some of the reserved
fields to store the stub type. */
 
struct stub_unwind_entry
{
/* The offset within the executable for the associated stub. */
unsigned stub_offset;
 
/* The type of stub this unwind entry describes. */
char type;
 
/* Unknown. Not needed by GDB at this time. */
char prs_info;
 
/* Length (in instructions) of the associated stub. */
short stub_length;
};
 
/* Sizes (in bytes) of the native unwind entries. */
#define UNWIND_ENTRY_SIZE 16
#define STUB_UNWIND_ENTRY_SIZE 8
 
/* The gaps represent linker stubs used in MPE and space for future
expansion. */
enum unwind_stub_types
{
LONG_BRANCH = 1,
PARAMETER_RELOCATION = 2,
EXPORT = 10,
IMPORT = 11,
IMPORT_SHLIB = 12,
};
 
/* We use the objfile->obj_private pointer for two things:
 
* 1. An unwind table;
*
* 2. A pointer to any associated shared library object.
*
* #defines are used to help refer to these objects.
*/
 
/* Info about the unwind table associated with an object file.
 
* This is hung off of the "objfile->obj_private" pointer, and
* is allocated in the objfile's psymbol obstack. This allows
* us to have unique unwind info for each executable and shared
* library that we are debugging.
*/
struct obj_unwind_info
{
struct unwind_table_entry *table; /* Pointer to unwind info */
struct unwind_table_entry *cache; /* Pointer to last entry we found */
int last; /* Index of last entry */
};
 
typedef struct obj_private_struct
{
struct obj_unwind_info *unwind_info; /* a pointer */
struct so_list *so_info; /* a pointer */
CORE_ADDR dp;
}
obj_private_data_t;
 
#if 0
extern void target_write_pc
PARAMS ((CORE_ADDR, int))
extern CORE_ADDR target_read_pc PARAMS ((int));
extern CORE_ADDR skip_trampoline_code PARAMS ((CORE_ADDR, char *));
#endif
 
#define TARGET_READ_PC(pid) target_read_pc (pid)
extern CORE_ADDR target_read_pc PARAMS ((int));
 
#define TARGET_WRITE_PC(v,pid) target_write_pc (v,pid)
extern void target_write_pc PARAMS ((CORE_ADDR, int));
 
#define TARGET_READ_FP() target_read_fp (inferior_pid)
extern CORE_ADDR target_read_fp PARAMS ((int));
 
/* For a number of horrible reasons we may have to adjust the location
of variables on the stack. Ugh. */
#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
 
extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
 
/* If the current gcc for for this target does not produce correct debugging
information for float parameters, both prototyped and unprototyped, then
define this macro. This forces gdb to always assume that floats are
passed as doubles and then converted in the callee.
 
For the pa, it appears that the debug info marks the parameters as
floats regardless of whether the function is prototyped, but the actual
values are passed as doubles for the non-prototyped case and floats for
the prototyped case. Thus we choose to make the non-prototyped case work
for C and break the prototyped case, since the non-prototyped case is
probably much more common. (FIXME). */
 
#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (current_language -> la_language == language_c)
 
/* Here's how to step off a permanent breakpoint. */
#define SKIP_PERMANENT_BREAKPOINT (hppa_skip_permanent_breakpoint)
extern void hppa_skip_permanent_breakpoint (void);
 
/* On HP-UX, certain system routines (millicode) have names beginning
with $ or $$, e.g. $$dyncall, which handles inter-space procedure
calls on PA-RISC. Tell the expression parser to check for those
when parsing tokens that begin with "$". */
#define SYMBOLS_CAN_START_WITH_DOLLAR (1)
/nm-hppah.h
0,0 → 1,286
/* Native support for HPPA-RISC machine running HPUX, for GDB.
Copyright 1991, 1992 Free Software Foundation, Inc.
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
#define U_REGS_OFFSET 0
 
#define KERNEL_U_ADDR 0
 
/* What a coincidence! */
#define REGISTER_U_ADDR(addr, blockend, regno) \
{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
 
/* This isn't really correct, because ptrace is actually a 32-bit
interface. However, the modern HP-UX targets all really use
ttrace, which is a 64-bit interface --- a debugger running in
either 32- or 64-bit mode can debug a 64-bit process. BUT, the
code doesn't use ttrace directly --- it calls call_ptrace instead,
which is supposed to be drop-in substitute for ptrace. In other
words, they access a 64-bit system call (ttrace) through a
compatibility layer which is allegedly a 32-bit interface.
 
So I don't feel the least bit guilty about this. */
#define PTRACE_ARG3_TYPE CORE_ADDR
 
/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
with five arguments, so programs written for normal ptrace lose. */
#define FIVE_ARG_PTRACE
 
/* We need to figure out where the text region is so that we use the
appropriate ptrace operator to manipulate text. Simply reading/writing
user space will crap out HPUX. */
#define NEED_TEXT_START_END 1
 
/* This macro defines the register numbers (from REGISTER_NAMES) that
are effectively unavailable to the user through ptrace(). It allows
us to include the whole register set in REGISTER_NAMES (inorder to
better support remote debugging). If it is used in
fetch/store_inferior_registers() gdb will not complain about I/O errors
on fetching these registers. If all registers in REGISTER_NAMES
are available, then return false (0). */
 
#define CANNOT_STORE_REGISTER(regno) \
((regno) == 0) || \
((regno) == PCSQ_HEAD_REGNUM) || \
((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
 
/* In hppah-nat.c: */
#define FETCH_INFERIOR_REGISTERS
#define CHILD_XFER_MEMORY
#define CHILD_POST_FOLLOW_INFERIOR_BY_CLONE
#define CHILD_POST_FOLLOW_VFORK
 
/* While this is for use by threaded programs, it doesn't appear
* to hurt non-threaded ones. This is used in infrun.c: */
#define PREPARE_TO_PROCEED(select_it) hppa_prepare_to_proceed()
extern int hppa_prepare_to_proceed PARAMS ((void));
 
/* In infptrace.c or infttrace.c: */
#define CHILD_PID_TO_EXEC_FILE
#define CHILD_POST_STARTUP_INFERIOR
#define CHILD_ACKNOWLEDGE_CREATED_INFERIOR
#define CHILD_INSERT_FORK_CATCHPOINT
#define CHILD_REMOVE_FORK_CATCHPOINT
#define CHILD_INSERT_VFORK_CATCHPOINT
#define CHILD_REMOVE_VFORK_CATCHPOINT
#define CHILD_HAS_FORKED
#define CHILD_HAS_VFORKED
#define CHILD_CAN_FOLLOW_VFORK_PRIOR_TO_EXEC
#define CHILD_INSERT_EXEC_CATCHPOINT
#define CHILD_REMOVE_EXEC_CATCHPOINT
#define CHILD_HAS_EXECD
#define CHILD_REPORTED_EXEC_EVENTS_PER_EXEC_CALL
#define CHILD_HAS_SYSCALL_EVENT
#define CHILD_POST_ATTACH
#define CHILD_THREAD_ALIVE
#define CHILD_PID_TO_STR
 
#define REQUIRE_ATTACH(pid) hppa_require_attach(pid)
extern int hppa_require_attach PARAMS ((int));
 
#define REQUIRE_DETACH(pid,signal) hppa_require_detach(pid,signal)
extern int hppa_require_detach PARAMS ((int, int));
 
/* So we can cleanly use code in infptrace.c. */
#define PT_KILL PT_EXIT
#define PT_STEP PT_SINGLE
#define PT_CONTINUE PT_CONTIN
 
/* FIXME HP MERGE : Previously, PT_RDUAREA. this is actually fixed
in gdb-hp-snapshot-980509 */
#define PT_READ_U PT_RUAREA
#define PT_WRITE_U PT_WUAREA
#define PT_READ_I PT_RIUSER
#define PT_READ_D PT_RDUSER
#define PT_WRITE_I PT_WIUSER
#define PT_WRITE_D PT_WDUSER
 
/* attach/detach works to some extent under BSD and HPUX. So long
as the process you're attaching to isn't blocked waiting on io,
blocked waiting on a signal, or in a system call things work
fine. (The problems in those cases are related to the fact that
the kernel can't provide complete register information for the
target process... Which really pisses off GDB.) */
 
#define ATTACH_DETACH
 
/* In infptrace or infttrace.c: */
 
/* Starting with HP-UX 10.30, support is provided (in the form of
ttrace requests) for memory-protection-based hardware watchpoints.
 
The 10.30 implementation of these functions reside in infttrace.c.
 
Stubs of these functions will be provided in infptrace.c, so that
10.20 will at least link. However, the "can I use a fast watchpoint?"
query will always return "No" for 10.20. */
 
#define TARGET_HAS_HARDWARE_WATCHPOINTS
 
/* The PA can watch any number of locations (generic routines already check
that all intermediates are in watchable memory locations). */
#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
hppa_can_use_hw_watchpoint(type, cnt, ot)
 
/* The PA can also watch memory regions of arbitrary size, since we're using
a page-protection scheme. (On some targets, apparently watch registers
are used, which can only accomodate regions of REGISTER_SIZE.) */
#define TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT(byte_count) \
(1)
 
/* However, some addresses may not be profitable to use hardware to watch,
or may be difficult to understand when the addressed object is out of
scope, and hence should be unwatched. On some targets, this may have
severe performance penalties, such that we might as well use regular
watchpoints, and save (possibly precious) hardware watchpoints for other
locations.
 
On HP-UX, we choose not to watch stack-based addresses, because
 
[1] Our implementation relies on page protection traps. The granularity
of these is large and so can generate many false hits, which are expensive
to respond to.
 
[2] Watches of "*p" where we may not know the symbol that p points to,
make it difficult to know when the addressed object is out of scope, and
hence shouldn't be watched. Page protection that isn't removed when the
addressed object is out of scope will either degrade execution speed
(false hits) or give false triggers (when the address is recycled by
other calls).
 
Since either of these points results in a slow-running inferior, we might
as well use normal watchpoints, aka single-step & test. */
#define TARGET_RANGE_PROFITABLE_FOR_HW_WATCHPOINT(pid,start,len) \
hppa_range_profitable_for_hw_watchpoint(pid, start, (LONGEST)(len))
 
/* On HP-UX, we're using page-protection to implement hardware watchpoints.
When an instruction attempts to write to a write-protected memory page,
a SIGBUS is raised. At that point, the write has not actually occurred.
 
We must therefore remove page-protections; single-step the inferior (to
allow the write to happen); restore page-protections; and check whether
any watchpoint triggered.
 
If none did, then the write was to a "nearby" location that just happens
to fall on the same page as a watched location, and so can be ignored.
 
The only intended client of this macro is wait_for_inferior(), in infrun.c.
When HAVE_NONSTEPPABLE_WATCHPOINT is true, that function will take care
of the stepping & etc. */
 
#define STOPPED_BY_WATCHPOINT(W) \
((W.kind == TARGET_WAITKIND_STOPPED) && \
(stop_signal == TARGET_SIGNAL_BUS) && \
! stepped_after_stopped_by_watchpoint && \
bpstat_have_active_hw_watchpoints ())
 
/* When a hardware watchpoint triggers, we'll move the inferior past it
by removing all eventpoints; stepping past the instruction that caused
the trigger; reinserting eventpoints; and checking whether any watched
location changed. */
#define HAVE_NONSTEPPABLE_WATCHPOINT
 
/* Our implementation of "hardware" watchpoints uses memory page-protection
faults. However, HP-UX has unfortunate interactions between these and
system calls; basically, it's unsafe to have page protections on when a
syscall is running. Therefore, we also ask for notification of syscall
entries and returns. When the inferior enters a syscall, we disable
h/w watchpoints. When the inferior returns from a syscall, we reenable
h/w watchpoints.
 
infptrace.c supplies dummy versions of these; infttrace.c is where the
meaningful implementations are.
*/
#define TARGET_ENABLE_HW_WATCHPOINTS(pid) \
hppa_enable_page_protection_events (pid)
extern void hppa_enable_page_protection_events PARAMS ((int));
 
#define TARGET_DISABLE_HW_WATCHPOINTS(pid) \
hppa_disable_page_protection_events (pid)
extern void hppa_disable_page_protection_events PARAMS ((int));
 
/* Use these macros for watchpoint insertion/deletion. */
#define target_insert_watchpoint(addr, len, type) \
hppa_insert_hw_watchpoint (inferior_pid, addr, (LONGEST)(len), type)
 
#define target_remove_watchpoint(addr, len, type) \
hppa_remove_hw_watchpoint (inferior_pid, addr, (LONGEST)(len), type)
 
/* We call our k-thread processes "threads", rather
* than processes. So we need a new way to print
* the string. Code is in hppah-nat.c.
*/
 
extern char *child_pid_to_str PARAMS ((pid_t));
 
#define target_tid_to_str( pid ) \
hppa_tid_to_str( pid )
extern char *hppa_tid_to_str PARAMS ((pid_t));
 
/* For this, ID can be either a process or thread ID, and the function
will describe it appropriately, returning the description as a printable
string.
 
The function that implements this macro is defined in infptrace.c and
infttrace.c.
*/
#define target_pid_or_tid_to_str(ID) \
hppa_pid_or_tid_to_str (ID)
extern char *hppa_pid_or_tid_to_str PARAMS ((pid_t));
 
/* This is used when handling events caused by a call to vfork(). On ptrace-
based HP-UXs, when you resume the vforked child, the parent automagically
begins running again. To prevent this runaway, this function is used.
 
Note that for vfork on HP-UX, we receive three events of interest:
 
1. the vfork event for the new child process
2. the exit or exec event of the new child process (actually, you get
two exec events on ptrace-based HP-UXs)
3. the vfork event for the original parent process
 
The first is always received first. The other two may be received in any
order; HP-UX doesn't guarantee an order.
*/
#define ENSURE_VFORKING_PARENT_REMAINS_STOPPED(PID) \
hppa_ensure_vforking_parent_remains_stopped (PID)
extern void hppa_ensure_vforking_parent_remains_stopped PARAMS ((int));
 
/* This is used when handling events caused by a call to vfork().
 
On ttrace-based HP-UXs, the parent vfork and child exec arrive more or less
together. That is, you could do two wait()s without resuming either parent
or child, and get both events.
 
On ptrace-based HP-UXs, you must resume the child after its exec event is
delivered or you won't get the parent's vfork. I.e., you can't just wait()
and get the parent vfork, after receiving the child exec.
*/
#define RESUME_EXECD_VFORKING_CHILD_TO_GET_PARENT_VFORK() \
hppa_resume_execd_vforking_child_to_get_parent_vfork ()
extern int hppa_resume_execd_vforking_child_to_get_parent_vfork PARAMS ((void));
 
#define HPUXHPPA
 
#define MAY_SWITCH_FROM_INFERIOR_PID (1)
 
#define MAY_FOLLOW_EXEC (1)
 
#define USE_THREAD_STEP_NEEDED (1)
/tm-hppab.h
0,0 → 1,47
/* Parameters for execution on an HP PA-RISC machine running BSD, for GDB.
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu). */
 
/* For BSD:
 
The signal context structure pointer is always saved at the base
of the frame + 0x4.
 
We get the PC & SP directly from the sigcontext structure itself.
For other registers we have to dive in a little deeper:
 
The hardware save state pointer is at offset 0x10 within the
signal context structure.
 
Within the hardware save state, registers are found in the same order
as the register numbers in GDB. */
 
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
*(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \
}
 
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
*(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \
}
 
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
{ \
int i; \
CORE_ADDR TMP; \
TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \
TMP = read_memory_integer (TMP + 0x10, 4); \
for (i = 0; i < NUM_REGS; i++) \
{ \
if (i == SP_REGNUM) \
(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
else \
(FSR)->regs[i] = TMP + i * 4; \
} \
}
 
/* It's mostly just the common stuff. */
#include "pa/tm-hppa.h"
/hppahpux.mh
0,0 → 1,9
# Host: Hewlett-Packard PA-RISC machine, running HPUX
 
XM_FILE= xm-hppah.h
XDEPFILES= ser-tcp.o
 
NAT_FILE= nm-hppah.h
NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o somread.o infptrace.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
 
HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
/hppabsd.mt
0,0 → 1,3
# Target: HP PA-RISC running bsd
TDEPFILES= hppa-tdep.o
TM_FILE= tm-hppab.h
/nm-hppah11.h
0,0 → 1,23
/* Native support for HPPA-RISC machine running HPUX 11.x, for GDB.
Copyright 1998 Free Software Foundation, Inc.
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
#define GDB_NATIVE_HPUX_11
 
#include "pa/nm-hppah.h"
/xm-hppab.h
0,0 → 1,28
/* Parameters for hosting on an HPPA PA-RISC machine, running BSD, for GDB.
Copyright 1991, 1992 Free Software Foundation, Inc.
 
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
/* This is a big-endian host. */
 
#define HOST_BYTE_ORDER BIG_ENDIAN
 
#include "pa/xm-pa.h"
/hppaosf.mh
0,0 → 1,9
# Host: Hewlett-Packard PA-RISC machine, running BSD
XDEPFILES= ser-tcp.o
XM_FILE= xm-hppab.h
NAT_FILE= nm-hppao.h
NATDEPFILES= fork-child.o m3-nat.o hppam3-nat.o somread.o hp-psymtab-read.o hp-symtab-read.o somsolib.o
NAT_CLIBS= -lmachid -lnetname -lmach
 
GDBSERVER_DEPFILES= low-hppabsd.o
 
/tm-hppah.h
0,0 → 1,90
/* Parameters for execution on an HP PA-RISC machine, running HPUX, for GDB.
Copyright 1991, 1992 Free Software Foundation, Inc.
 
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
#define HPUX_SNAP1
#define HPUX_SNAP2
 
/* The solib hooks are not really designed to have a list of hook
and handler routines. So until we clean up those interfaces you
either get SOM shared libraries or HP's unusual PA64 ELF shared
libraries, but not both. */
#ifdef GDB_TARGET_IS_HPPA_20W
#include "pa64solib.h"
#endif
 
#ifndef GDB_TARGET_IS_HPPA_20W
#include "somsolib.h"
#endif
 
/* Actually, for a PA running HPUX the kernel calls the signal handler
without an intermediate trampoline. Luckily the kernel always sets
the return pointer for the signal handler to point to _sigreturn. */
#define IN_SIGTRAMP(pc, name) (name && STREQ ("_sigreturn", name))
 
/* For HPUX:
 
The signal context structure pointer is always saved at the base
of the frame which "calls" the signal handler. We only want to find
the hardware save state structure, which lives 10 32bit words into
sigcontext structure.
 
Within the hardware save state structure, registers are found in the
same order as the register numbers in GDB.
 
At one time we peeked at %r31 rather than the PC queues to determine
what instruction took the fault. This was done on purpose, but I don't
remember why. Looking at the PC queues is really the right way, and
I don't remember why that didn't work when this code was originally
written. */
 
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + (43 * 4) , 4); \
}
 
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + (40 * 4), 4); \
}
 
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
{ \
int i; \
CORE_ADDR TMP; \
TMP = (FRAME)->frame + (10 * 4); \
for (i = 0; i < NUM_REGS; i++) \
{ \
if (i == SP_REGNUM) \
(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
else \
(FSR)->regs[i] = TMP + i * 4; \
} \
}
 
/* For HP-UX on PA-RISC we have an implementation
for the exception handling target op (in hppa-tdep.c) */
#define CHILD_ENABLE_EXCEPTION_CALLBACK
#define CHILD_GET_CURRENT_EXCEPTION_EVENT
 
/* Mostly it's common to all HPPA's. */
#include "pa/tm-hppa.h"
/tm-pro.h
0,0 → 1,14
/* Parameters for execution on an HP PA-RISC level 0 embedded system.
This is based on tm-hppab.h.
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu). */
 
#define PA_LEVEL_0 /* Disables touching space regs and fp */
 
/* All the PRO targets use software floating point at the moment. */
#define SOFT_FLOAT 1
 
/* It's mostly just the common stuff. */
#include "pa/tm-hppa.h"
 
#define GDB_TARGET_IS_PA_ELF
/hpux11.mt
0,0 → 1,3
# Target: HP PA-RISC running HPUX 11.00
TDEPFILES= hppa-tdep.o remote-pa.o somsolib.o
TM_FILE= tm-hppah.h
/nm-hppao.h
0,0 → 1,57
/* HPPA PA-RISC machine native support for Lites, for GDB.
Copyright 1995 Free Software Foundation, Inc.
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
#include "nm-m3.h"
#define U_REGS_OFFSET 0
 
#define KERNEL_U_ADDR 0
 
/* What a coincidence! */
#define REGISTER_U_ADDR(addr, blockend, regno) \
{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
 
/* This macro defines the register numbers (from REGISTER_NAMES) that
are effectively unavailable to the user through ptrace(). It allows
us to include the whole register set in REGISTER_NAMES (inorder to
better support remote debugging). If it is used in
fetch/store_inferior_registers() gdb will not complain about I/O errors
on fetching these registers. If all registers in REGISTER_NAMES
are available, then return false (0). */
 
#define CANNOT_STORE_REGISTER(regno) \
((regno) == 0) || \
((regno) == PCSQ_HEAD_REGNUM) || \
((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
 
/* fetch_inferior_registers is in hppab-nat.c. */
#define FETCH_INFERIOR_REGISTERS
 
/* attach/detach works to some extent under BSD and HPUX. So long
as the process you're attaching to isn't blocked waiting on io,
blocked waiting on a signal, or in a system call things work
fine. (The problems in those cases are related to the fact that
the kernel can't provide complete register information for the
target process... Which really pisses off GDB.) */
 
#define ATTACH_DETACH
 
#define EMULATOR_BASE 0x90100000
#define EMULATOR_END 0x90200000
/hpux1020.mt
0,0 → 1,3
# Target: HP PA-RISC running hpux
TDEPFILES= hppa-tdep.o remote-pa.o somsolib.o corelow.o
TM_FILE= tm-hppah.h
/tm-hppa64.h
0,0 → 1,333
/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
Free Software Foundation, Inc.
 
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
 
/* PA 64-bit specific definitions. Override those which are in
tm-hppa.h */
 
/* jimb: this must go. I'm just using it to disable code I haven't
gotten working yet. */
#define GDB_TARGET_IS_HPPA_20W
 
#include "pa/tm-hppah.h"
 
#define HPUX_1100 1
 
/* The low two bits of the IA are the privilege level of the instruction. */
#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
 
/* Say how long (ordinary) registers are. This is used in
push_word and a few other places, but REGISTER_RAW_SIZE is
the real way to know how big a register is. */
 
#undef REGISTER_SIZE
#define REGISTER_SIZE 8
 
/* Number of bytes of storage in the actual machine representation
for register N. On the PA-RISC 2.0, all regs are 8 bytes, including
the FP registers (they're accessed as two 4 byte halves). */
 
#undef REGISTER_RAW_SIZE
#define REGISTER_RAW_SIZE(N) 8
 
/* Largest value REGISTER_RAW_SIZE can have. */
 
#undef MAX_REGISTER_RAW_SIZE
#define MAX_REGISTER_RAW_SIZE 8
 
/* Total amount of space needed to store our copies of the machine's
register state, the array `registers'. */
 
#undef REGISTER_BYTES
#define REGISTER_BYTES (NUM_REGS * 8)
 
/* Index within `registers' of the first byte of the space for
register N. */
 
#undef REGISTER_BYTE
#define REGISTER_BYTE(N) ((N) * 8)
 
#undef REGISTER_VIRTUAL_TYPE
#define REGISTER_VIRTUAL_TYPE(N) \
((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
 
 
/* Number of machine registers */
#undef NUM_REGS
#define NUM_REGS 96
 
/* Initializer for an array of names of registers.
There should be NUM_REGS strings in this initializer.
They are in rows of eight entries */
#undef REGISTER_NAMES
#define REGISTER_NAMES \
{"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
"r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
"sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
"ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
"sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
"cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
"fpsr", "fpe1", "fpe2", "fpe3", "fr4", "fr5", "fr6", "fr7", \
"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
"fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
"fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}
 
#undef FP0_REGNUM
#undef FP4_REGNUM
#define FP0_REGNUM 64 /* floating point reg. 0 (fspr)*/
#define FP4_REGNUM 68
 
/* Redefine some target bit sizes from the default. */
 
/* Number of bits in a long or unsigned long for the target machine. */
 
#define TARGET_LONG_BIT 64
 
/* Number of bits in a long long or unsigned long long for the
target machine. */
 
#define TARGET_LONG_LONG_BIT 64
 
/* Number of bits in a pointer for the target machine */
 
#define TARGET_PTR_BIT 64
 
/* Argument Pointer Register */
#define AP_REGNUM 29
 
#define DP_REGNUM 27
 
#define FP5_REGNUM 70
 
#define SR5_REGNUM 48
 
#undef FRAME_ARGS_ADDRESS
#define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)
 
/* We access locals from SP. This may not work for frames which call
alloca; for those, we may need to consult unwind tables.
jimb: FIXME. */
#undef FRAME_LOCALS_ADDRESS
#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
 
#define INIT_FRAME_AP init_frame_ap
#define EXTRA_FRAME_INFO \
CORE_ADDR ap;
 
/* For a number of horrible reasons we may have to adjust the location
of variables on the stack. Ugh. jimb: why? */
#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
 
extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
 
 
/* jimb: omitted dynamic linking stuff here */
 
/* This sequence of words is the instructions
 
; Call stack frame has already been built by gdb. Since we could be calling
; a varargs function, and we do not have the benefit of a stub to put things in
; the right place, we load the first 8 word of arguments into both the general
; and fp registers.
call_dummy
nop
copy %r4,%r29
copy %r5,%r22
copy %r6,%r27
fldd -64(0,%r29),%fr4
fldd -56(0,%r29),%fr5
fldd -48(0,%r29),%fr6
fldd -40(0,%r29),%fr7
fldd -32(0,%r29),%fr8
fldd -24(0,%r29),%fr9
fldd -16(0,%r29),%fr10
fldd -8(0,%r29),%fr11
copy %r22,%r1
ldd -64(%r29), %r26
ldd -56(%r29), %r25
ldd -48(%r29), %r24
ldd -40(%r29), %r23
ldd -32(%r29), %r22
ldd -24(%r29), %r21
ldd -16(%r29), %r20
bve,l (%r1),%r2
ldd -8(%r29), %r19
break 4, 8
mtsp %r21, %sr0
ble 0(%sr0, %r22)
nop
*/
 
/* Call dummys are sized and written out in word sized hunks. So we have
to pack the instructions into words. Ugh. */
#undef CALL_DUMMY
#define CALL_DUMMY {0x08000240349d0000LL, 0x34b6000034db0000LL, \
0x53a43f8353a53f93LL, 0x53a63fa353a73fb3LL,\
0x53a83fc353a93fd3LL, 0x2fa1100a2fb1100bLL,\
0x36c1000053ba3f81LL, 0x53b93f9153b83fa1LL,\
0x53b73fb153b63fc1LL, 0x53b53fd10fa110d4LL,\
0xe820f0000fb110d3LL, 0x0001000400151820LL,\
0xe6c0000008000240LL}
 
#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
#define CALL_DUMMY_BREAKPOINT_OFFSET 22 * 4
 
/* CALL_DUMMY_LENGTH is computed based on the size of a word on the target
machine, not the size of an instruction. Since a word on this target
holds two instructions we have to divide the instruction size by two to
get the word size of the dummy. */
#undef CALL_DUMMY_LENGTH
#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 26 / 2)
 
/* The PA64 ABI mandates a 16 byte stack alignment. */
#undef STACK_ALIGN
#define STACK_ALIGN(arg) ( ((arg)%16) ? (((arg)+15)&-16) : (arg))
 
/* The PA64 ABI reserves 64 bytes of stack space for outgoing register
parameters. */
#undef REG_PARM_STACK_SPACE
#define REG_PARM_STACK_SPACE 64
 
/* Use the 64-bit calling conventions designed for the PA2.0 in wide mode. */
#define PA20W_CALLING_CONVENTIONS
 
#undef FUNC_LDIL_OFFSET
#undef FUNC_LDO_OFFSET
#undef SR4EXPORT_LDIL_OFFSET
#undef SR4EXPORT_LDO_OFFSET
#undef CALL_DUMMY_LOCATION
 
#undef REG_STRUCT_HAS_ADDR
 
#undef EXTRACT_RETURN_VALUE
/* RM: floats are returned in FR4R, doubles in FR4
* integral values are in r28, padded on the left
* aggregates less that 65 bits are in r28, right padded
* aggregates upto 128 bits are in r28 and r29, right padded
*/
#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
{ \
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
memcpy ((VALBUF), \
((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
TYPE_LENGTH (TYPE)); \
else if (is_integral_type(TYPE) || SOFT_FLOAT) \
memcpy ((VALBUF), \
(char *)(REGBUF) + REGISTER_BYTE (28) + \
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
TYPE_LENGTH (TYPE)); \
else if (TYPE_LENGTH (TYPE) <= 8) \
memcpy ((VALBUF), \
(char *)(REGBUF) + REGISTER_BYTE (28), \
TYPE_LENGTH (TYPE)); \
else if (TYPE_LENGTH (TYPE) <= 16) \
{ \
memcpy ((VALBUF), \
(char *)(REGBUF) + REGISTER_BYTE (28), \
8); \
memcpy (((char *) VALBUF + 8), \
(char *)(REGBUF) + REGISTER_BYTE (29), \
TYPE_LENGTH (TYPE) - 8); \
} \
}
 
/* RM: struct upto 128 bits are returned in registers */
#undef USE_STRUCT_CONVENTION
#define USE_STRUCT_CONVENTION(gcc_p, value_type)\
(TYPE_LENGTH (value_type) > 16)
 
/* RM: for return command */
#undef STORE_RETURN_VALUE
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
{ \
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
write_register_bytes \
(REGISTER_BYTE (FP4_REGNUM) + \
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
(VALBUF), \
TYPE_LENGTH (TYPE)); \
else if (is_integral_type(TYPE) || SOFT_FLOAT) \
write_register_bytes \
(REGISTER_BYTE (28) + \
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
(VALBUF), \
TYPE_LENGTH (TYPE)); \
else if (TYPE_LENGTH (TYPE) <= 8) \
write_register_bytes \
( REGISTER_BYTE (28), \
(VALBUF), \
TYPE_LENGTH (TYPE)); \
else if (TYPE_LENGTH (TYPE) <= 16) \
{ \
write_register_bytes \
(REGISTER_BYTE (28), \
(VALBUF), \
8); \
write_register_bytes \
(REGISTER_BYTE (29), \
((char *) VALBUF + 8), \
TYPE_LENGTH (TYPE) - 8); \
} \
}
 
/* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
* see comments there. For PA64, the save_state structure is at an
* offset of 24 32-bit words from the sigcontext structure. The 64 bit
* general registers are at an offset of 640 bytes from the beginning of the
* save_state structure, and the floating pointer register are at an offset
* of 256 bytes from the beginning of the save_state structure.
*/
#undef FRAME_SAVED_PC_IN_SIGTRAMP
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
}
 
#undef FRAME_BASE_BEFORE_SIGTRAMP
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
}
 
#undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
{ \
int i; \
CORE_ADDR TMP1, TMP2; \
TMP1 = (FRAME)->frame + (24 * 4) + 640; \
TMP2 = (FRAME)->frame + (24 * 4) + 256; \
for (i = 0; i < NUM_REGS; i++) \
{ \
if (i == SP_REGNUM) \
(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
else if (i >= FP0_REGNUM) \
(FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
else \
(FSR)->regs[i] = TMP1 + i * 8; \
} \
}
 
/* jimb: omitted purify call support */
/xm-hppah.h
0,0 → 1,50
/* Parameters for hosting on an HPPA-RISC machine running HPUX, for GDB.
Copyright 1991, 1992 Free Software Foundation, Inc.
 
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
 
This file is part of GDB.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
 
/* Host is big-endian. */
#define HOST_BYTE_ORDER BIG_ENDIAN
 
#include "pa/xm-pa.h"
 
#define USG
 
#ifndef __STDC__
/* This define is discussed in decode_line_1 in symtab.c */
#define HPPA_COMPILER_BUG
#endif
 
#define HAVE_TERMIOS
 
/* HP defines malloc and realloc as returning void *, even for non-ANSI
compilations (such as with the native compiler). */
 
#define MALLOC_INCOMPATIBLE
 
extern void *
malloc PARAMS ((size_t));
 
extern void *
realloc PARAMS ((void *, size_t));
 
extern void
free PARAMS ((void *));
/xm-pa.h
0,0 → 1,5
/* Definitions for all PA machines. */
 
/* This was created for "makeva", which is obsolete. This file can
probably go away (unless someone can think of some other host thing
which is common to various pa machines). */
/tm-hppao.h
0,0 → 1,96
/* Parameters for execution on an HP PA-RISC machine running OSF1, for GDB.
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu). */
 
/* Define offsets to access CPROC stack when it does not have
* a kernel thread.
*/
#define MACHINE_CPROC_SP_OFFSET 20
#define MACHINE_CPROC_PC_OFFSET 16
#define MACHINE_CPROC_FP_OFFSET 12
 
/*
* Software defined PSW masks.
*/
#define PSW_SS 0x10000000 /* Kernel managed single step */
 
/* Thread flavors used in re-setting the T bit.
* @@ this is also bad for cross debugging.
*/
#define TRACE_FLAVOR HP800_THREAD_STATE
#define TRACE_FLAVOR_SIZE HP800_THREAD_STATE_COUNT
#define TRACE_SET(x,state) \
((struct hp800_thread_state *)state)->cr22 |= PSW_SS
#define TRACE_CLEAR(x,state) \
((((struct hp800_thread_state *)state)->cr22 &= ~PSW_SS), 1)
 
/* For OSF1 (Should be close if not identical to BSD, but I haven't
tested it yet):
 
The signal context structure pointer is always saved at the base
of the frame + 0x4.
 
We get the PC & SP directly from the sigcontext structure itself.
For other registers we have to dive in a little deeper:
 
The hardware save state pointer is at offset 0x10 within the
signal context structure.
 
Within the hardware save state, registers are found in the same order
as the register numbers in GDB. */
 
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
*(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \
}
 
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
{ \
*(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
*(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \
}
 
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
{ \
int i; \
CORE_ADDR TMP; \
TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \
TMP = read_memory_integer (TMP + 0x10, 4); \
for (i = 0; i < NUM_REGS; i++) \
{ \
if (i == SP_REGNUM) \
(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
else \
(FSR)->regs[i] = TMP + i * 4; \
} \
}
 
/* OSF1 does not need the pc space queue restored. */
#define NO_PC_SPACE_QUEUE_RESTORE
 
/* The mach kernel uses the recovery counter to implement single
stepping. While this greatly simplifies the kernel support
necessary for single stepping, it unfortunately does the wrong
thing in the presense of a nullified instruction (gives control
back two insns after the nullifed insn). This is an artifact
of the HP architecture (recovery counter doesn't tick for
nullified insns).
 
Do our best to avoid losing in such situations. */
#define INSTRUCTION_NULLIFIED \
(({ \
int ipsw = (int)read_register(IPSW_REGNUM); \
if (ipsw & PSW_N) \
{ \
int pcoqt = (int)read_register(PCOQ_TAIL_REGNUM); \
write_register(PCOQ_HEAD_REGNUM, pcoqt); \
write_register(PCOQ_TAIL_REGNUM, pcoqt + 0x4); \
write_register(IPSW_REGNUM, ipsw & ~(PSW_N | PSW_B | PSW_X)); \
stop_pc = pcoqt; \
} \
}), 0)
 
/* It's mostly just the common stuff. */
 
#include "pa/tm-hppa.h"
/hppahpux.mt
0,0 → 1,3
# Target: HP PA-RISC running hpux
TDEPFILES= hppa-tdep.o
TM_FILE= tm-hppah.h

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