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URL https://opencores.org/ocsvn/or1k_soc_on_altera_embedded_dev_kit/or1k_soc_on_altera_embedded_dev_kit/trunk

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Rev 19 → Rev 20

/trunk/soc/sw/orpmon/gencrc.c
0,0 → 1,66
/* Generates crc for specified binary file.
We do very dirty hack here -- first occurrence of 0xccccccccdddddddd in output file designates where crc
and size should be placed. We calculate the crc on the binary and then replace the occurences in the ELF
file directly. This was done so, we don't need to */
 
#include <stdio.h>
 
#define MAX_SIZE 500000
#ifdef __BIG_ENDIAN__
#define SWAP32(x) (x)
#else /* !__BIG_ENDIAN__ */
#define SWAP32(x) ((((x) >> 24) & 0xff) << 0 \
| (((x) >> 16) & 0xff) << 8 \
| (((x) >> 8) & 0xff) << 16 \
| (((x) >> 0) & 0xff) << 24)
#endif /* __BIG_ENDIAN__ */
 
unsigned char buf[MAX_SIZE];
 
unsigned long crc32 (unsigned long crc, const unsigned char *buf, unsigned long len)
{
/* Create bitwise CRC table first */
unsigned long crc_table[256];
int i, k;
for (i = 0; i < 256; i++) {
unsigned long c = (unsigned long)i;
for (k = 0; k < 8; k++) c = c & 1 ? 0xedb88320 ^ (c >> 1) : c >> 1;
crc_table[i] = c;
}
 
/* Calculate crc on buf */
crc = crc ^ 0xffffffffL;
while (len--) crc = crc_table[((int)crc ^ (*buf++)) & 0xff] ^ (crc >> 8);
return crc ^ 0xffffffffL;
}
 
int main (int argc, char *argv[])
{
FILE *fi, *fo;
int size, i, tsize;
unsigned long crc;
if (argc != 3) return -1;
fi = fopen (argv[1], "rb");
fo = fopen (argv[2], "rb+");
if (!fi || !fo) return 1;
size = fread (buf, 1, MAX_SIZE, fi);
fclose (fi);
crc = crc32 (0, buf, size);
tsize = fread (buf, 1, MAX_SIZE, fo);
 
for (i = 0; i < tsize; i++)
if (*((unsigned long *)&buf[i]) == SWAP32(0xcccccccc) && *((unsigned long *)&buf[i + 4]) == SWAP32(0xdddddddd)) {
*(unsigned long *)&buf[i] = SWAP32(crc);
*(unsigned long *)&buf[i + 4] = SWAP32(size);
break;
}
 
if (i >= tsize - 8) return 2;
fseek (fo, 0l, SEEK_SET);
fwrite (buf, 1, tsize, fo);
fclose (fo);
return 0;
}
trunk/soc/sw/orpmon/gencrc.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/hdbug.h =================================================================== --- trunk/soc/sw/orpmon/include/hdbug.h (nonexistent) +++ trunk/soc/sw/orpmon/include/hdbug.h (revision 20) @@ -0,0 +1,57 @@ +/* + atabug.h -- ATA debugging (C-header file) + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +/* + * Definitions for the Opencores ATA Controller Core + */ + +#ifndef __OC_HDBUG_H +#define __OC_HDBUG_H + + +#define HD_DEBUG + + +#define MAX_HDBUG_COMMANDS 10 + +/* ---------------------------- */ +/* ----- Prototypes ----- */ +/* ---------------------------- */ +void module_hdbug_init (void); +int hdbug(int argc, char **argv); +int hdbug_exit(int argc, char **argv); +int hdbug_help(int argc, char **argv); +void register_hdbug_command (const char *name, const char *params, const char *help, int (*func)(int argc, char *argv[])); +int hdbug_mon_command(void); +int execute_hdbug_command(char *pstr, int argc, char **argv); + +int hdbug_umount_cmd(int arc, char **argv); +int hdbug_mount_cmd(int argc, char **argv); + +int hdbug_cd_cmd(int argc, char **argv); + +int hdbug_dir_cmd(int argc, char **argv); +int hdbug_dir_print(struct dos_dir_entry *entry); + + +inline void *swap(void *var, size_t size); + +#endif
trunk/soc/sw/orpmon/include/hdbug.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/int.h =================================================================== --- trunk/soc/sw/orpmon/include/int.h (nonexistent) +++ trunk/soc/sw/orpmon/include/int.h (revision 20) @@ -0,0 +1,20 @@ + +/* Number of interrupt handlers */ +#define MAX_INT_HANDLERS 32 + +/* Handler entry */ +struct ihnd { + void (*handler)(void); +}; + +/* Add interrupt handler */ +int int_add(unsigned long vect, void (* handler)(void)); + +/* Initialize routine */ +int int_init(void); + +/* Disable interrupt */ +int int_disable(unsigned long vect); + +/* Enable interrupt */ +int int_enable(unsigned long vect);
trunk/soc/sw/orpmon/include/int.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/spi.h =================================================================== --- trunk/soc/sw/orpmon/include/spi.h (nonexistent) +++ trunk/soc/sw/orpmon/include/spi.h (revision 20) @@ -0,0 +1,17 @@ +extern void spi_init (int slave, int fq, int bit_nb, int lsb, int tx_pol, int rx_pol); +extern unsigned long spi_xmit (unsigned long val); + +/* SPI register offsets */ +#define SPI_RX 0x00 +#define SPI_TX 0x00 +#define SPI_CTRL 0x04 +#define SPI_DEVIDER 0x08 +#define SPI_SS 0x0c + +/* SPI control register bits */ +#define SPI_CTRL_IE 0x00000200 +#define SPI_CTRL_LSB 0x00000100 +#define SPI_CTRL_TX_NEGEDGE 0x00000004 +#define SPI_CTRL_RX_NEGEDGE 0x00000002 +#define SPI_CTRL_GO 0x00000001 +#define SPI_CTRL_BSY 0x00000001
trunk/soc/sw/orpmon/include/spi.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/flash.h =================================================================== --- trunk/soc/sw/orpmon/include/flash.h (nonexistent) +++ trunk/soc/sw/orpmon/include/flash.h (revision 20) @@ -0,0 +1,51 @@ +#ifndef _FLASH_H +#define _FLASH_H + +#ifdef FLASH_ORG_16_2 +/* INC_ADDR = for how many bytes address should be incremented */ +#define INC_ADDR 4 +#define reg_write(a,b) (REG32(a) = b) +#define reg_read(a) (REG32(a)) +#define check_error_bit(a,b) ((a & (b << 16)) || (a & b)) +#define fl_wait_busy(a) (!(a & (FL_SR_WSM_READY << 16)) || !(a & FL_SR_WSM_READY)) + +#elif FLASH_ORG_16_1 +#define INC_ADDR 2 +#define reg_write(a,b) (REG16(a) = (unsigned short)b) +#define reg_read(a) (REG16(a)) +#define check_error_bit(a,b) (a & b) +#define fl_wait_busy(a) (!(a & FL_SR_WSM_READY)) +#else +#error Flash organization is not set! Check board.h. +#endif + +#define FL_SR_WSM_READY 0x80 +#define FL_SR_ERASE_ERR 0x20 +#define FL_SR_PROG_ERR 0x40 +#define FL_SR_PROG_LV 0x08 +#define FL_SR_LOCK 0x02 + +int fl_init (void); +int fl_unlock_one_block (unsigned long addr); +int fl_unlock_blocks (void); +int fl_word_program (unsigned long addr, unsigned long val); +int fl_block_erase (unsigned long addr); + +/* erase = 1 (whole chip), erase = 2 (required only) */ +int fl_program (unsigned long src_addr, unsigned long dst_addr, unsigned long len, int erase, int verify); + +/* + * Next definitions and functions are here, because we need there flash + * functions in RAM (when we are running orpmon from Flash). They are + * copied to RAM and fl_ext_program, fl_ext_erase and fl_ext_unlock are + * pointing to them. + */ +typedef int(*t_fl_ext_program)(unsigned long, unsigned long); +typedef int(*t_fl_erase)(unsigned long); + +typedef void(*t_uart_putc)(unsigned char); + +t_fl_ext_program fl_ext_program; +t_fl_erase fl_ext_erase, fl_ext_unlock; + +#endif /* _FLASH_H */
trunk/soc/sw/orpmon/include/flash.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/mc-init-1.h =================================================================== --- trunk/soc/sw/orpmon/include/mc-init-1.h (nonexistent) +++ trunk/soc/sw/orpmon/include/mc-init-1.h (revision 20) @@ -0,0 +1,37 @@ +#ifndef _MC_INIT_1_H_ +#define _MC_INIT_1_H_ + +#if IN_CLK==25000000 +# define MC_CSR_VAL 0x0B000300 +# define MC_MASK_VAL 0x000003f0 +# define FLASH_BASE_ADDR 0xf0000000 +# define FLASH_TMS_VAL 0x00000103 +# define SDRAM_BASE_ADDR 0x00000000 +# define SDRAM_TMS_VAL 0x19220057 +#elif IN_CLK==50000000 /* marvin on bender2 board - 50mhz */ +# define MC_CSR_VAL 0x0B000300 +# define MC_MASK_VAL 0x000003f0 +# define FLASH_BASE_ADDR 0xf0000000 +# define FLASH_TMS_VAL 0x00000810 +# define SDRAM_BASE_ADDR 0x00000000 +# define SDRAM_TMS_VAL 0x2a570700 +#elif IN_CLK==100000000 +# define MC_CSR_VAL 0x0B000300 +# define MC_MASK_VAL 0x000003f0 +# define FLASH_BASE_ADDR 0xf0000000 +# define FLASH_TMS_VAL 0x00000810 +# define SDRAM_BASE_ADDR 0x00000000 +# define SDRAM_TMS_VAL 0x2a570700 +#elif IN_CLK==120000000 /* marvin on 120mhz */ +# define MC_CSR_VAL 0x0B000300 +# define MC_MASK_VAL 0x000003f0 +# define FLASH_BASE_ADDR 0xf0000000 +# define FLASH_TMS_VAL 0x00000810 +# define SDRAM_BASE_ADDR 0x00000000 +# define SDRAM_TMS_VAL 0x2a570700 +#else +# error No MC initialize values for this frequency +#endif + +#endif /* _MC_INIT_1_H_ */ +
trunk/soc/sw/orpmon/include/mc-init-1.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/build.h =================================================================== --- trunk/soc/sw/orpmon/include/build.h (nonexistent) +++ trunk/soc/sw/orpmon/include/build.h (revision 20) @@ -0,0 +1 @@ +#define BUILD_VERSION "mié jun 1 11:58:23 CEST 2005"
trunk/soc/sw/orpmon/include/build.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/mc-init-2.h =================================================================== --- trunk/soc/sw/orpmon/include/mc-init-2.h (nonexistent) +++ trunk/soc/sw/orpmon/include/mc-init-2.h (revision 20) @@ -0,0 +1,228 @@ +#ifndef _MC_INIT_2_H_ +#define _MC_INIT_2_H_ + +/* clock period in [ns] */ +#define SYS_CLK_PERIOD (1000000000/IN_CLK) + +/* FLASH timings: worst cases in ns, from data sheets */ +# define FLASH_WA_TIME 150 /* write access*/ +# define FLASH_WE_DELAY 30 /* write enable*/ +# define FLASH_WH_TIME 0 /* write hold */ +# define FLASH_RA_TIME 150 /* read access*/ +# define FLASH_PRA_TIME 25 /* page read access time */ +# define FLASH_RT_TIME 35 /* read turnaround time */ + +/* SDRAM timings: worst cases in ns, from data sheets */ +# define SDRAM_tRCD 23 +# define SDRAM_tWR 20 +# define SDRAM_tRC 60 +# define SDRAM_tRFC 60 /* sometimes the same as tRC */ +# define SDRAM_tRAS 50 /* use the worst case minimal value */ +# define SDRAM_tRP 23 +# define SDRAM_tRRD 15 +# define SDRAM_tREF ((64000000/8192)+1) + +# define FLASH_BAR_VAL FLASH_BASE_ADDR +# define FLASH_AMR_VAL (~(FLASH_SIZE-1)) /* address mask register */ +# define SDRAM_BASE_ADDR 0x00000000 +# define SDRAM_SIZE 0x02000000 +# define SDRAM_BAR_VAL SDRAM_BASE_ADDR +# define SDRAM_AMR_VAL (~(SDRAM_SIZE-1)) + +/* independant from flash properties, always 0 ;) */ +# define FLASH_OE_DELAY 0 /* output enable */ +# define FLASH_OE_VAL ((FLASH_OE_DELAY+(SYS_CLK_PERIOD-1))/SYS_CLK_PERIOD) + +// define FLASH_WTR_VAL 0x00011009 /* write timings */ +# define FLASH_WTR_VAL ((0x000003ff & ((FLASH_WA_TIME-1) /SYS_CLK_PERIOD)) | \ + (0x0000f000 & ((FLASH_WE_DELAY-1)/SYS_CLK_PERIOD)) | \ + (0x001f0000 & ((FLASH_WH_TIME) /SYS_CLK_PERIOD))) + +// define FLASH_RTR_VAL 0x01002009 /* read timings */ +# define FLASH_RTR_VAL ((0x000003ff & ((FLASH_RA_TIME-1) /SYS_CLK_PERIOD)) | \ + (0x0000f000 & (FLASH_OE_VAL )) | \ + (0x001f0000 & ((FLASH_PRA_TIME-1)/SYS_CLK_PERIOD)) | \ + (0x1f000000 & ((FLASH_RT_TIME-1 /SYS_CLK_PERIOD)))) + +/* round this value down: + * if it's 30 / 10 -> we want 2, so it's ok, 31 / 10 -> we want 3 + * + * define SDRAM_RCDR_VAL 0x00000002 + */ +# define SDRAM_RCDR_VAL ((SDRAM_tRCD-1)/SYS_CLK_PERIOD) + +// prviously undefined +# define SDRAM_WRTR_VAL ((SDRAM_tWR+(SYS_CLK_PERIOD-1)/SYS_CLK_PERIOD)-2) +# if SDRAM_WRTR_VAL<0 +# undef SDRAM_WRTR_VAL +# define SDRAM_WRTR_VAL 0 +# endif + +// define SDRAM_RCTR_VAL 0x00000006 +# define SDRAM_RCTR_VAL ((SDRAM_tRC+(SYS_CLK_PERIOD-1)/SYS_CLK_PERIOD)-2) +# if SDRAM_RCTR_VAL<0 +# undef SDRAM_RCTR_VAL +# define SDRAM_RCTR_VAL 0 +# endif + +// define SDRAM_REFCTR_VAL 0x00000006 +# define SDRAM_REFCTR_VAL ((SDRAM_tRFC+(SYS_CLK_PERIOD-1)/SYS_CLK_PERIOD)-2) +# if SDRAM_REFCTR_VAL<0 +# undef SDRAM_REFCTR_VAL +# define SDRAM_REFCTR_VAL 0 +# endif + +// define SDRAM_RATR_VAL 0x00000006 +# define SDRAM_RATR_VAL ((SDRAM_tRAS+(SYS_CLK_PERIOD-1)/SYS_CLK_PERIOD)-2) +# if SDRAM_RATR_VAL<0 +# undef SDRAM_RATR_VAL +# define SDRAM_RATR_VAL 0 +# endif + +// define SDRAM_PTR_VAL 0x00000001 +# define SDRAM_PTR_VAL (((SDRAM_tRP+(SYS_CLK_PERIOD-1))/SYS_CLK_PERIOD)-2) +# if SDRAM_PTR_VAL<0 +# undef SDRAM_PTR_VAL +# define SDRAM_PTR_VAL 0 +# endif + +// define SDRAM_RRDR_VAL 0x00000000 +# define SDRAM_RRDR_VAL (((SDRAM_tRRD+(SYS_CLK_PERIOD-1))/SYS_CLK_PERIOD)-2) +# if SDRAM_RRDR_VAL<0 +# undef SDRAM_RRDR_VAL +# define SDRAM_RRDR_VAL 0 +# endif + +/* + * we don't want to go to the edge with refresh delays + * define SDRAM_RIR_VAL 0x00000300 + */ +# define SDRAM_RIR_VAL ((SDRAM_tREF/SYS_CLK_PERIOD)-((SDRAM_tREF/SYS_CLK_PERIOD)+10)/10) + + +# define MC_BAR_0 (0x00) +# define MC_AMR_0 (0x04) +# define MC_BAR_1 (0x08) +# define MC_AMR_1 (0x0c) +# define MC_BAR_2 (0x10) +# define MC_AMR_2 (0x14) +# define MC_BAR_3 (0x18) +# define MC_AMR_3 (0x1c) +# define MC_CCR_0 (0x20) +# define MC_CCR_1 (0x24) +# define MC_CCR_2 (0x28) +# define MC_CCR_3 (0x2c) +# define MC_WTR_0 (0x30) +# define MC_RTR_0 (0x34) +# define MC_WTR_1 (0x38) +# define MC_RTR_1 (0x3c) +# define MC_WTR_2 (0x40) +# define MC_RTR_2 (0x44) +# define MC_WTR_3 (0x48) +# define MC_RTR_3 (0x4c) + +# define MC_BAR_4 (0x80) +# define MC_AMR_4 (0x84) +# define MC_BAR_5 (0x88) +# define MC_AMR_5 (0x8c) +# define MC_BAR_6 (0x90) +# define MC_AMR_6 (0x94) +# define MC_BAR_7 (0x98) +# define MC_AMR_7 (0x9c) +# define MC_CCR_4 (0xa0) +# define MC_CCR_5 (0xa4) +# define MC_CCR_6 (0xa8) +# define MC_CCR_7 (0xac) + +# define MC_RATR (0xb0) /* row active time register */ +# define MC_RCTR (0xb4) +# define MC_RRDR (0xb8) +# define MC_PTR (0xbc) +# define MC_WRTR (0xc0) +# define MC_REFCTR (0xc4) +# define MC_RCDR (0xc8) +# define MC_RIR (0xcc) +# define MC_SMBOR (0xe0) +# define MC_ORR (0xe4) +# define MC_OSR (0xe8) +# define MC_PCR (0xec) +# define MC_IIR (0xf0) + +/* POC register field definition */ +# define MC_POC_EN_BW_OFFSET 0 +# define MC_POC_EN_BW_WIDTH 2 +# define MC_POC_EN_MEMTYPE_OFFSET 2 +# define MC_POC_EN_MEMTYPE_WIDTH 2 + +/* CSC register field definition */ +# define MC_CSC_EN_OFFSET 0 +# define MC_CSC_MEMTYPE_OFFSET 1 +# define MC_CSC_MEMTYPE_WIDTH 2 +# define MC_CSC_BW_OFFSET 4 +# define MC_CSC_BW_WIDTH 2 +# define MC_CSC_MS_OFFSET 6 +# define MC_CSC_MS_WIDTH 2 +# define MC_CSC_WP_OFFSET 8 +# define MC_CSC_BAS_OFFSET 9 +# define MC_CSC_KRO_OFFSET 10 +# define MC_CSC_PEN_OFFSET 11 +# define MC_CSC_SEL_OFFSET 16 +# define MC_CSC_SEL_WIDTH 8 + +# define MC_CSC_MEMTYPE_SDRAM 0 +# define MC_CSC_MEMTYPE_SSRAM 1 +# define MC_CSC_MEMTYPE_ASYNC 2 +# define MC_CSC_MEMTYPE_SYNC 3 + +# define MC_CSR_VALID 0xFF000703LU +# define MC_POC_VALID 0x0000000FLU +# define MC_BA_MASK_VALID 0x000003FFLU +# define MC_CSC_VALID 0x00FF0FFFLU +# define MC_TMS_SDRAM_VALID 0x0FFF83FFLU +# define MC_TMS_SSRAM_VALID 0x00000000LU +# define MC_TMS_ASYNC_VALID 0x03FFFFFFLU +# define MC_TMS_SYNC_VALID 0x01FFFFFFLU +# define MC_TMS_VALID 0xFFFFFFFFLU /* reg test compat. */ + +/* TMS register field definition SDRAM */ +# define MC_TMS_SDRAM_TRFC_OFFSET 24 +# define MC_TMS_SDRAM_TRFC_WIDTH 4 +# define MC_TMS_SDRAM_TRP_OFFSET 20 +# define MC_TMS_SDRAM_TRP_WIDTH 4 +# define MC_TMS_SDRAM_TRCD_OFFSET 17 +# define MC_TMS_SDRAM_TRCD_WIDTH 4 +# define MC_TMS_SDRAM_TWR_OFFSET 15 +# define MC_TMS_SDRAM_TWR_WIDTH 2 +# define MC_TMS_SDRAM_WBL_OFFSET 9 +# define MC_TMS_SDRAM_OM_OFFSET 7 +# define MC_TMS_SDRAM_OM_WIDTH 2 +# define MC_TMS_SDRAM_CL_OFFSET 4 +# define MC_TMS_SDRAM_CL_WIDTH 3 +# define MC_TMS_SDRAM_BT_OFFSET 3 +# define MC_TMS_SDRAM_BL_OFFSET 0 +# define MC_TMS_SDRAM_BL_WIDTH 3 + +/* TMS register field definition ASYNC */ +# define MC_TMS_ASYNC_TWWD_OFFSET 20 +# define MC_TMS_ASYNC_TWWD_WIDTH 6 +# define MC_TMS_ASYNC_TWD_OFFSET 16 +# define MC_TMS_ASYNC_TWD_WIDTH 4 +# define MC_TMS_ASYNC_TWPW_OFFSET 12 +# define MC_TMS_ASYNC_TWPW_WIDTH 4 +# define MC_TMS_ASYNC_TRDZ_OFFSET 8 +# define MC_TMS_ASYNC_TRDZ_WIDTH 4 +# define MC_TMS_ASYNC_TRDV_OFFSET 0 +# define MC_TMS_ASYNC_TRDV_WIDTH 8 + +/* TMS register field definition SYNC */ +# define MC_TMS_SYNC_TTO_OFFSET 16 +# define MC_TMS_SYNC_TTO_WIDTH 9 +# define MC_TMS_SYNC_TWR_OFFSET 12 +# define MC_TMS_SYNC_TWR_WIDTH 4 +# define MC_TMS_SYNC_TRDZ_OFFSET 8 +# define MC_TMS_SYNC_TRDZ_WIDTH 4 +# define MC_TMS_SYNC_TRDV_OFFSET 0 +# define MC_TMS_SYNC_TRDV_WIDTH 8 + +#endif /* _MC_INIT_2_H_ */ +
trunk/soc/sw/orpmon/include/mc-init-2.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/keyboard.h =================================================================== --- trunk/soc/sw/orpmon/include/keyboard.h (nonexistent) +++ trunk/soc/sw/orpmon/include/keyboard.h (revision 20) @@ -0,0 +1,51 @@ +#if KBD_ENABLED + +/* + * keyboard controller registers + */ +#define KBD_STATUS_REG (unsigned int) KBD_BASE_ADD+0x4 +#define KBD_CNTL_REG (unsigned int) KBD_BASE_ADD+0x4 +#define KBD_DATA_REG (unsigned int) KBD_BASE_ADD+0x0 +/* + * controller commands + */ +#define KBD_READ_MODE (unsigned int) 0x20 +#define KBD_WRITE_MODE (unsigned int) 0x60 +#define KBD_SELF_TEST (unsigned int) 0xAA +#define KBD_SELF_TEST2 (unsigned int) 0xAB +#define KBD_CNTL_ENABLE (unsigned int) 0xAE +/* + * keyboard commands + */ +#define KBD_ENABLE (unsigned int) 0xF4 +#define KBD_DISABLE (unsigned int) 0xF5 +#define KBD_RESET (unsigned int) 0xFF +/* + * keyboard replies + */ +#define KBD_ACK (unsigned int) 0xFA +#define KBD_POR (unsigned int) 0xAA +/* + * status register bits + */ +#define KBD_OBF (unsigned int) 0x01 +#define KBD_IBF (unsigned int) 0x02 +#define KBD_GTO (unsigned int) 0x40 +#define KBD_PERR (unsigned int) 0x80 +/* + * keyboard controller mode register bits + */ +#define KBD_EKI (unsigned int) 0x01 +#define KBD_SYS (unsigned int) 0x04 +#define KBD_DMS (unsigned int) 0x20 +#define KBD_KCC (unsigned int) 0x40 + +#define TIMEOUT_CONST 500000 + +extern volatile int kbd_tail; +extern volatile int kbd_head; +extern volatile int kbd_buf[KBDBUF_SIZE]; + +extern int kbd_init(void); + +#endif /* KBD_ENABLED */
trunk/soc/sw/orpmon/include/keyboard.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/atabug.h =================================================================== --- trunk/soc/sw/orpmon/include/atabug.h (nonexistent) +++ trunk/soc/sw/orpmon/include/atabug.h (revision 20) @@ -0,0 +1,76 @@ +/* + atabug.h -- ATA debugging (C-header file) + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +/* + * Definitions for the Opencores ATA Controller Core + */ + +#ifndef __OC_ATABUG_H +#define __OC_ATABUG_H + + +#define ATA_DEBUG + + +#define MAX_ATA_COMMANDS 25 + +struct partition { + char boot; + char start_head; + short start_cylinder; + char start_sector; + char system; + char end_head; + short end_cylinder; + char end_sector; + int start; + int sectors; +}; + +/* ---------------------------- */ +/* ----- Prototypes ----- */ +/* ---------------------------- */ +void module_ata_init (void); +int atabug(int argc, char **argv); +int atabug_exit(int argc, char **argv); +int atabug_help(int argc, char **argv); +void register_ata_command (const char *name, const char *params, const char *help, int (*func)(int argc, char *argv[])); +int ata_mon_command(void); +int execute_ata_command(char *pstr, int argc, char **argv); + +int ata_close_cmd(int arc, char **argv); +int ata_dump_device_regs_cmd(int argc, char **argv); +int ata_dump_host_regs_cmd(int argc, char **argv); +int ata_dump_dataport_cmd(int argc, char **argv); +int ata_enable_cmd(int argc, char **argv); +int ata_exec_cmd_cmd(int argc, char **argv); +int ata_identify_device_cmd(int argc, char **argv); +int ata_open_cmd(int argc, char **argv); +int ata_read_sectors_cmd(int argc, char **argv); +int ata_read_mbr_cmd(int argc, char **argv); +int ata_read_dosboot_cmd(int argc, char **argv); +int ata_reset_cmd(int argc, char **argv); +int ata_select_device_cmd(int argc, char **argv); +int ata_set_piomode_cmd(int argc, char **argv); + +unsigned char atabug_dump_data(unsigned char *buffer, int cnt); + +#endif
trunk/soc/sw/orpmon/include/atabug.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/ata.h =================================================================== --- trunk/soc/sw/orpmon/include/ata.h (nonexistent) +++ trunk/soc/sw/orpmon/include/ata.h (revision 20) @@ -0,0 +1,465 @@ +/* +///////////////////////////////////////////////////////////////////// +//// //// +//// Include file for OpenCores ATA Controller (OCIDEC) //// +//// //// +//// File : ata.h //// +//// Function: c-include file //// +//// //// +//// Authors: Richard Herveille (rherveille@opencores) //// +//// www.opencores.org //// +//// //// +///////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2002 Richard Herveille //// +//// rherveille@opencores.org //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer.//// +//// //// +//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //// +//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //// +//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //// +//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //// +//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //// +//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //// +//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //// +//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //// +//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //// +//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //// +//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //// +//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //// +//// POSSIBILITY OF SUCH DAMAGE. //// +//// //// +///////////////////////////////////////////////////////////////////// +*/ + +/* + * Definitions for the Opencores ATA Controller Core + */ + +#ifndef __OC_ATA_H +#define __OC_ATA_H + + +#ifndef REG32 +#define REG32(adr) *((volatile unsigned long *)(adr)) +#endif + + +typedef unsigned long basetype; + +/* --- Register definitions --- */ + +/* ----- Core Registers */ +#define ATA_CTRL 0x00 /* Control register */ +#define ATA_STAT 0x04 /* Status register */ +#define ATA_PCTR 0x08 /* PIO command timing register */ +#define ATA_PFTR0 0x0c /* PIO Fast Timing register Device0 */ +#define ATA_PFTR1 0x10 /* PIO Fast Timing register Device1 */ +#define ATA_DTR0 0x14 /* DMA Timing register Device2 */ +#define ATA_DTR1 0x18 /* DMA Timing register Device1 */ +#define ATA_DTXB 0x3c /* DMA Transmit buffer */ +#define ATA_RXB 0x3c /* DMA Receive buffer */ + +/* ----- ATA Registers */ +#define ATA_ASR 0x78 /* Alternate Status Register (R) */ +#define ATA_CR 0x5c /* Command Register (W) */ +#define ATA_CHR 0x54 /* Cylinder High Register (R/W) */ +#define ATA_CLR 0x50 /* Cylinder Low Register (R/W) */ +#define ATA_DR 0x40 /* Data Register */ +#define ATA_DCR 0x78 /* Device Control Register (W) */ +#define ATA_DHR 0x58 /* Device/Head Register (R/W) */ +#define ATA_ERR 0x44 /* Error Register (R) */ +#define ATA_FR 0x44 /* Features Register (W) */ +#define ATA_SCR 0x48 /* Sector Count Register (R/W) */ +#define ATA_SNR 0x4c /* Sector Number Register (R/W) */ +#define ATA_SR 0x5c /* Status Register (R) */ +#define ATA_DA 0x7c /* Device Address Register (R) */ + /* ATA/ATAPI-5 does not describe Device Status Register */ + +/* ---------------------------- */ +/* ----- Bits definitions ----- */ +/* ---------------------------- */ + +/* ----- Core Control register */ + /* bits 31-16 are reserved */ +#define ATA_DMA_EN (0<<15) /* DMAen, DMA enable bit */ + /* bit 14 is reserved */ +#define ATA_DMA_WR (1<<14) /* DMA Write transaction */ +#define ATA_DMA_RD (0<<14) /* DMA Read transaction */ + /* bits 13-10 are reserved */ +#define ATA_BELEC1 (1<< 9) /* Big-Little endian conversion */ + /* enable bit for Device1 */ +#define ATA_BELEC0 (1<< 8) /* Big-Little endian conversion */ + /* enable bit for Device0 */ +#define ATA_IDE_EN (1<< 7) /* IDE core enable bit */ +#define ATA_FTE1 (1<< 6) /* Device1 Fast PIO Timing Enable bit */ +#define ATA_FTE0 (1<< 5) /* Device0 Fast PIO Timing Enable bit */ +#define ATA_PWPP (1<< 4) /* PIO Write Ping-Pong Enable bit */ +#define ATA_IORDY_FTE1 (1<< 3) /* Device1 Fast PIO Timing IORDY */ + /* enable bit */ +#define ATA_IORDY_FTE0 (1<< 2) /* Device0 Fast PIO Timing IORDY */ + /* enable bit */ +#define ATA_IORDY (1<< 1) /* PIO Command Timing IORDY enable bit*/ +#define ATA_RST (1<< 0) /* ATA Reset bit */ + +/* ----- Core Status register */ +#define ATA_DEVID 0xf0000000 /* bits 31-28 Device-ID */ +#define ATA_REVNO 0x0f000000 /* bits 27-24 Revision number */ + /* bits 23-16 are reserved */ +#define ATA_DMA_TIP (1<<15) /* DMA Transfer in progress */ + /* bits 14-10 are reserved */ +#define ATA_DRBE (1<<10) /* DMA Receive buffer empty */ +#define ATA_DTBF (1<< 9) /* DMA Transmit buffer full */ +#define ATA_DMARQ (1<< 8) /* DMARQ Line status */ +#define ATA_PIO_TIP (1<< 7 /* PIO Transfer in progress */ +#define ATA_PWPPF (1<< 6) /* PIO write ping-pong full */ + /* bits 5-1 are reserved */ +#define ATA_IDEIS (1<< 0) /* IDE Interrupt status */ + + +/* ----- Core Timing registers */ +#define ATA_TEOC 24 /* End of cycle time DMA/PIO */ +#define ATA_T4 16 /* DIOW- data hold time PIO */ +#define ATA_T2 8 /* DIOR-/DIOW- pulse width PIO */ +#define ATA_TD 8 /* DIOR-/DIOW- pulse width DMA */ +#define ATA_T1 0 /* Address valid to DIOR-/DIOW- PIO */ +#define ATA_TM 0 /* CS[1:0]valid to DIOR-/DIOW- DMA */ + + +/* ----- ATA (Alternate) Status Register */ +#define ATA_SR_BSY 0x80 /* Busy */ +#define ATA_SR_DRDY 0x40 /* Device Ready */ +#define ATA_SR_DF 0x20 /* Device Fault */ +#define ATA_SR_DSC 0x10 /* Device Seek Complete */ +#define ATA_SR_DRQ 0x08 /* Data Request */ +#define ATA_SR_COR 0x04 /* Corrected data (obsolete) */ +#define ATA_SR_IDX 0x02 /* (obsolete) */ +#define ATA_SR_ERR 0x01 /* Error */ + +/* ----- ATA Device Control Register */ + /* bits 7-3 are reserved */ +#define ATA_DCR_RST 0x04 /* Software reset (RST=1, reset) */ +#define ATA_DCR_IEN 0x02 /* Interrupt Enable (IEN=0, enabled) */ + /* always write a '0' to bit0 */ + +/* ----- ATA Device Address Register */ +/* All values in this register are one's complement (i.e. inverted) */ +#define ATA_DAR_WTG 0x40 /* Write Gate */ +#define ATA_DAR_H 0x3c /* Head Select */ +#define ATA_DAR_DS1 0x02 /* Drive select 1 */ +#define ATA_DAR_DS0 0x01 /* Drive select 0 */ + +/* ----- Device/Head Register */ +#define ATA_DHR_LBA 0x40 /* LBA/CHS mode ('1'=LBA mode) */ +#define ATA_DHR_DEV 0x10 /* Device ('0'=dev0, '1'=dev1) */ +#define ATA_DHR_H 0x0f /* Head Select */ + +/* ----- Error Register */ +#define ATA_ERR_BBK 0x80 /* Bad Block */ +#define ATA_ERR_UNC 0x40 /* Uncorrectable Data Error */ +#define ATA_ERR_IDNF 0x10 /* ID Not Found */ +#define ATA_ERR_ABT 0x04 /* Aborted Command */ +#define ATA_ERR_TON 0x02 /* Track0 Not Found */ +#define ATA_ERR_AMN 0x01 /* Address Mark Not Found */ + + +/* ---------------------------- */ +/* ----- ATA commands ----- */ +/* ---------------------------- */ +#define CFA_ERASE_SECTORS 0xC0 +#define CFA_REQUEST_EXTENDED_ERROR_CODE 0x03 +#define CFA_TRANSLATE_SECTOR 0x87 +#define CFA_WRITE_MULTIPLE_WITHOUT_ERASE 0xCD +#define CFA_WRITE_SECTORS_WITHOUT_ERASE 0x38 +#define CHECK_POWER_MODE 0xE5 +#define DEVICE_RESET 0x08 +#define DOWNLOAD_MICROCODE 0x92 +#define EXECUTE_DEVICE_DIAGNOSTIC 0x90 +#define FLUSH_CACHE 0xE7 +#define GET_MEDIA_STATUS 0xDA +#define IDENTIFY_DEVICE 0xEC +#define IDENTIFY_PACKET_DEVICE 0xA1 +#define IDLE 0xE3 +#define IDLE_IMMEDIATE 0xE1 +#define INITIALIZE_DEVICE_PARAMETERS 0x91 +#define MEDIA_EJECT 0xED +#define MEDIA_LOCK 0xDE +#define MEDIA_UNLOCK 0xDF +#define NOP 0x00 +#define PACKET 0xA0 +#define READ_BUFFER 0xE4 +#define READ_DMA 0xC8 +#define READ_DMA_QUEUED 0xC7 +#define READ_MULTIPLE 0xC4 +#define READ_NATIVE_MAX_ADDRESS 0xF8 +#define READ_SECTOR 0x20 +#define READ_SECTORS 0x20 +#define READ_VERIFY_SECTOR 0x40 +#define READ_VERIFY_SECTORS 0x40 +#define SECURITY_DISABLE_PASSWORD 0xF6 +#define SECURITY_ERASE_PREPARE 0xF3 +#define SECURITY_ERASE_UNIT 0xF4 +#define SECURITY_FREEZE_LOCK 0xF5 +#define SECURITY_SET_PASSWORD 0xF1 +#define SECURITY_UNLOCK 0xF2 +#define SEEK 0x70 +#define SERVICE 0xA2 +#define SET_FEATURES 0xEF +#define SET_MAX 0xF9 +#define SET_MULTIPLE_MODE 0xC6 +#define SLEEP 0xE6 +#define SMART 0xB0 +#define STANDBY 0xE2 +#define STANDBY_IMMEDIATE 0xE0 +#define WRITE_BUFFER 0xE8 +#define WRITE_DMA 0xCA +#define WRITE_DMA_QUEUED 0xCC +#define WRITE_MULTIPLE 0xC5 +#define WRITE_SECTOR 0x30 +#define WRITE_SECTORS 0x30 + + +/* SET_FEATURES has a number of sub-commands (in Features Register) */ +#define CFA_ENABLE_8BIT_PIO_TRANSFER_MODE 0x01 +#define ENABLE_WRITE_CACHE 0x02 +#define SET_TRANSFER_MODE_SECTOR_COUNT_REG 0x03 +#define ENABLE_ADVANCED_POWER_MANAGEMENT 0x05 +#define ENABLE_POWERUP_IN_STANDBY_FEATURE_SET 0x06 +#define POWERUP_IN_STANDBY_FEATURE_SET_SPINUP 0x07 +#define CFA_ENABLE_POWER_MODE1 0x0A +#define DISABLE_MEDIA_STATUS_NOTIFICATION 0x31 +#define DISABLE_READ_LOOKAHEAD 0x55 +#define ENABLE_RELEASE_INTERRUPT 0x5D +#define ENABLE_SERVICE_INTERRUPT 0x5E +#define DISABLE_REVERTING_TO_POWERON_DEFAULTS 0x66 +#define CFA_DISABLE_8BIT_PIO_TRANSFER_MODE 0x81 +#define DISABLE_WRITE_CACHE 0x82 +#define DISABLE_ADVANCED_POWER_MANAGEMENT 0x85 +#define DISABLE_POWERUP_IN_STANDBY_FEATURE_SET 0x86 +#define CFA_DISABLE_POWER_MODE1 0x8A +#define ENABLE_MEDIA_STATUS_NOTIFICATION 0x95 +#define ENABLE_READ_LOOKAHEAD_FEATURE 0xAA +#define ENABLE_REVERTING_TO_POWERON_DEFAULTS 0xCC +#define DISABLE_RELEASE_INTERRUPT 0xDD +#define DISABLE_SERVICE_INTERRUPT 0xDE + +/* SET_MAX has a number of sub-commands (in Features Register) */ +#define SET_MAX_ADDRESS 0x00 +#define SET_MAX_SET_PASSWORD 0x01 +#define SET_MAX_LOCK 0x02 +#define SET_MAX_UNLOCK 0x03 +#define SET_MAX_FREEZE_LOCK 0x04 + +/* SET_MAX has a number of sub-commands (in Features Register) */ +#define SMART_READ_DATA 0xD0 +#define SMART_ATTRIBITE_AUTOSAVE 0xD1 +#define SMART_SAVE_ATTRIBUTE_VALUES 0xD3 +#define SMART_EXECUTE_OFFLINE_IMMEDIATE 0xD4 +#define SMART_READ_LOG 0xD5 +#define SMART_WRITE_LOG 0xD6 +#define SMART_ENABLE_OPERATIONS 0xD8 +#define SMART_DISABLE_OPERATIONS 0xD9 +#define SMART_RETURN_STATUS 0xDA + +/* ---------------------------- */ +/* ----- Structs ----- */ +/* ---------------------------- */ + +/* ---------------------------- */ +/* ----- Macros ----- */ +/* ---------------------------- */ + +#define ata_astatus(base) (REG32(base + ATA_ASR)) +#define ata_status(base) (REG32(base + ATA_SR)) +#define ata_error(base) (REG32(base + ATA_ERR)) +#define ata_cmd(base) (REG32(base + ATA_CR)) + +#define ata_dev_busy(base) (ata_astatus(base) & ATA_SR_BSY) +#define ata_dev_cmdrdy(base) (ata_astatus(base) & (~ATA_SR_BSY & ATA_SR_DRDY)) +#define ata_dev_datrdy(base) (ata_astatus(base) & ATA_SR_DRQ) + + + +/* + INTERNALS +*/ + +/* ------------------- */ +/* ----- defines ----- */ +/* ------------------- */ +#define READ 0 +#define WRITE 1 + +#define FMODE_READ 0 +#define FMODE_WRITE 1 + +#define SET (1<<31) +#define CLR 0 + + +#define PIO4 0x02 +#define PIO3 0x01 + +/*define MAJOR, MINOR numbers */ +#define MAJOR(dev) (dev >> 8) +#define MINOR(dev) (dev & 0xff) + +#define MINOR_DEV0 0x00 +#define MINOR_DEV1 0X80 + + +#define ATA_IOCTL_EXEC_CMD 0 +#define ATA_IOCTL_READ 1 +#define ATA_IOCTL_ENABLE_HOST 2 +#define ATA_IOCTL_IDENTIFY_DEVICE 3 +#define ATA_IOCTL_IDENTIFY_HOST 4 +#define ATA_IOCTL_SELECT_DEVICE 5 +#define ATA_IOCTL_SET_RST 6 +#define ATA_IOCTL_SET_PIO 7 +#define ATA_IOCTL_SET_FEATURES 8 +#define ATA_IOCTL_SET_FTE 9 + +#define ARG_HW_RST 0 +#define ARG_SW_RST 1 +#define ARG_DEV_RST 2 + +/* PIO numbers and PIO timing (in ns) */ +#define ARG_PIO4 4 +#define ARG_PIO3 3 +#define ARG_PIO2 2 +#define ARG_PIO1 1 +#define ARG_PIO0 0 + +/* register transfer timings */ +#define PIO0_RT0 600 +#define PIO0_RT1 70 +#define PIO0_RT2 290 +#define PIO0_RT2I 0 +#define PIO0_RT4 30 +#define PIO0_RT9 20 + +#define PIO1_RT0 383 +#define PIO1_RT1 50 +#define PIO1_RT2 290 +#define PIO1_RT2I 0 +#define PIO1_RT4 20 +#define PIO1_RT9 15 + +#define PIO2_RT0 330 +#define PIO2_RT1 30 +#define PIO2_RT2 290 +#define PIO2_RT2I 0 +#define PIO2_RT4 15 +#define PIO2_RT9 10 + +#define PIO3_RT0 180 +#define PIO3_RT1 30 +#define PIO3_RT2 80 +#define PIO3_RT2I 70 +#define PIO3_RT4 10 +#define PIO3_RT9 10 + +#define PIO4_RT0 120 +#define PIO4_RT1 25 +#define PIO4_RT2 70 +#define PIO4_RT2I 25 +#define PIO4_RT4 10 +#define PIO4_RT9 10 + +/* data transfer timings */ +#define PIO0_DT0 600 +#define PIO0_DT1 70 +#define PIO0_DT2 165 +#define PIO0_DT2I 0 +#define PIO0_DT4 30 +#define PIO0_DT9 20 + +#define PIO1_DT0 383 +#define PIO1_DT1 50 +#define PIO1_DT2 125 +#define PIO1_DT2I 0 +#define PIO1_DT4 20 +#define PIO1_DT9 15 + +#define PIO2_DT0 240 +#define PIO2_DT1 30 +#define PIO2_DT2 100 +#define PIO2_DT2I 0 +#define PIO2_DT4 15 +#define PIO2_DT9 10 + +#define PIO3_DT0 180 +#define PIO3_DT1 30 +#define PIO3_DT2 80 +#define PIO3_DT2I 70 +#define PIO3_DT4 10 +#define PIO3_DT9 10 + +#define PIO4_DT0 120 +#define PIO4_DT1 25 +#define PIO4_DT2 70 +#define PIO4_DT2I 25 +#define PIO4_DT4 10 +#define PIO4_DT9 10 + + + +/* error numbers */ +#define EINVAL -1 +#define EIOCTLIARG -2 + +#define EOPENIDEV -3 +#define EOPENIHOST -4 +#define EOPENNODEV -5 + + + + +/* ------------------------------ */ +/* ----- structs & typedefs ----- */ +/* ------------------------------ */ +struct inode { + unsigned short i_rdev; +}; + +struct file { + unsigned long f_mode; + unsigned long f_flags; +}; + +typedef unsigned int dev_t; + +struct request { + dev_t rq_dev; + int cmd; + unsigned long sector; + unsigned long nr_sectors; + unsigned char *buffer; +}; + + +/* ---------------------------- */ +/* ----- Prototypes ----- */ +/* ---------------------------- */ +int ata_open(struct inode *inode, struct file *filp); +int ata_open_device_not_found(struct inode *inode); + +int ata_release(struct inode *inode, struct file *filp); + +int ata_ioctl(struct inode *inode, struct file *filp, unsigned command, unsigned long argument); +unsigned long ata_calc_pio_timing(short t0, short t1, short t2, short t4, short t2i, short t9); + +int ata_read_dport(unsigned long base); + +int ata_check_media_change(dev_t dev); + +int ata_revalidate(dev_t dev); + +int ata_request(struct inode *inode, struct file *filp, struct request *request); + + +#endif
trunk/soc/sw/orpmon/include/ata.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/spr_defs.h =================================================================== --- trunk/soc/sw/orpmon/include/spr_defs.h (nonexistent) +++ trunk/soc/sw/orpmon/include/spr_defs.h (revision 20) @@ -0,0 +1,429 @@ +/* spr_defs.h -- Defines OR1K architecture specific special-purpose registers + Copyright (C) 1999 Damjan Lampret, lampret@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* This file is also used by microkernel test bench. Among +others it is also used in assembly file(s). */ + +/* Definition of special-purpose registers (SPRs) */ + +#define MAX_GRPS (32) +#define MAX_SPRS_PER_GRP_BITS (11) +#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS) +#define MAX_SPRS (0x10000) + +/* Base addresses for the groups */ +#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS) + +/* System control and status group */ +#define SPR_VR (SPRGROUP_SYS + 0) +#define SPR_UPR (SPRGROUP_SYS + 1) +#define SPR_CPUCFGR (SPRGROUP_SYS + 2) +#define SPR_DMMUCFGR (SPRGROUP_SYS + 3) +#define SPR_IMMUCFGR (SPRGROUP_SYS + 4) +#define SPR_DCCFGR (SPRGROUP_SYS + 5) +#define SPR_ICCFGR (SPRGROUP_SYS + 6) +#define SPR_DCFGR (SPRGROUP_SYS + 7) +#define SPR_PCCFGR (SPRGROUP_SYS + 8) +#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */ +#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */ +#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */ +#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */ +#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */ +#define SPR_EEAR_BASE (SPRGROUP_SYS + 48) +#define SPR_EEAR_LAST (SPRGROUP_SYS + 63) +#define SPR_ESR_BASE (SPRGROUP_SYS + 64) +#define SPR_ESR_LAST (SPRGROUP_SYS + 79) + +/* Data MMU group */ +#define SPR_DMMUCR (SPRGROUP_DMMU + 0) +#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) +#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) +#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) +#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) + +/* Instruction MMU group */ +#define SPR_IMMUCR (SPRGROUP_IMMU + 0) +#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) +#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) +#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) +#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) + +/* Data cache group */ +#define SPR_DCCR (SPRGROUP_DC + 0) +#define SPR_DCBPR (SPRGROUP_DC + 1) +#define SPR_DCBFR (SPRGROUP_DC + 2) +#define SPR_DCBIR (SPRGROUP_DC + 3) +#define SPR_DCBWR (SPRGROUP_DC + 4) +#define SPR_DCBLR (SPRGROUP_DC + 5) +#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) +#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) + +/* Instruction cache group */ +#define SPR_ICCR (SPRGROUP_IC + 0) +#define SPR_ICBPR (SPRGROUP_IC + 1) +#define SPR_ICBIR (SPRGROUP_IC + 2) +#define SPR_ICBLR (SPRGROUP_IC + 3) +#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200) +#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200) + +/* MAC group */ +#define SPR_MACLO (SPRGROUP_MAC + 1) +#define SPR_MACHI (SPRGROUP_MAC + 2) + +/* Debug group */ +#define SPR_DVR(N) (SPRGROUP_D + (N)) +#define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) +#define SPR_DMR1 (SPRGROUP_D + 16) +#define SPR_DMR2 (SPRGROUP_D + 17) +#define SPR_DWCR0 (SPRGROUP_D + 18) +#define SPR_DWCR1 (SPRGROUP_D + 19) +#define SPR_DSR (SPRGROUP_D + 20) +#define SPR_DRR (SPRGROUP_D + 21) + +/* Performance counters group */ +#define SPR_PCCR(N) (SPRGROUP_PC + (N)) +#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) + +/* Power management group */ +#define SPR_PMR (SPRGROUP_PM + 0) + +/* PIC group */ +#define SPR_PICMR (SPRGROUP_PIC + 0) +#define SPR_PICPR (SPRGROUP_PIC + 1) +#define SPR_PICSR (SPRGROUP_PIC + 2) + +/* Tick Timer group */ +#define SPR_TTMR (SPRGROUP_TT + 0) +#define SPR_TTCR (SPRGROUP_TT + 1) + +/* + * Bit definitions for the Version Register + * + */ +#define SPR_VR_VER 0xffff0000 /* Processor version */ +#define SPR_VR_REV 0x0000003f /* Processor revision */ + +/* + * Bit definitions for the Unit Present Register + * + */ +#define SPR_UPR_UP 0x00000001 /* UPR present */ +#define SPR_UPR_DCP 0x00000002 /* Data cache present */ +#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */ +#define SPR_UPR_DMP 0x00000008 /* Data MMU present */ +#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */ +#define SPR_UPR_OB32P 0x00000020 /* ORBIS32 present */ +#define SPR_UPR_OB64P 0x00000040 /* ORBIS64 present */ +#define SPR_UPR_OF32P 0x00000080 /* ORFPX32 present */ +#define SPR_UPR_OF64P 0x00000100 /* ORFPX64 present */ +#define SPR_UPR_OV32P 0x00000200 /* ORVDX32 present */ +#define SPR_UPR_OV64P 0x00000400 /* ORVDX64 present */ +#define SPR_UPR_DUP 0x00000800 /* Debug unit present */ +#define SPR_UPR_PCUP 0x00001000 /* Performance counters unit present */ +#define SPR_UPR_PMP 0x00002000 /* Power management present */ +#define SPR_UPR_PICP 0x00004000 /* PIC present */ +#define SPR_UPR_TTP 0x00008000 /* Tick timer present */ +#define SPR_UPR_SRP 0x00010000 /* Shadow registers present */ +#define SPR_UPR_RES 0x00fe0000 /* ORVDX32 present */ +#define SPR_UPR_CUST 0xff000000 /* Custom units */ + +/* + * Bit definitions for the Supervision Register + * + */ +#define SPR_SR_CID 0xf0000000 /* Context ID */ +#define SPR_SR_SUMRA 0x00010000 /* Supervisor SPR read access */ +#define SPR_SR_FO 0x00008000 /* Fixed one */ +#define SPR_SR_EPH 0x00004000 /* Exception Prefix High */ +#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */ +#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */ +#define SPR_SR_OV 0x00000800 /* Overflow flag */ +#define SPR_SR_CY 0x00000400 /* Carry flag */ +#define SPR_SR_F 0x00000200 /* Condition Flag */ +#define SPR_SR_CE 0x00000100 /* CID Enable */ +#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */ +#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */ +#define SPR_SR_DME 0x00000020 /* Data MMU Enable */ +#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */ +#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */ +#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */ +#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */ +#define SPR_SR_SM 0x00000001 /* Supervisor Mode */ + +/* + * Bit definitions for the Data MMU Control Register + * + */ +#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Instruction MMU Control Register + * + */ +#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Data TLB Match Register + * + */ +#define SPR_DTLBMR_V 0x00000001 /* Valid */ +#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_DTLBMR_CID 0x0000003c /* Context ID */ +#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Data TLB Translate Register + * + */ +#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_DTLBTR_A 0x00000010 /* Accessed */ +#define SPR_DTLBTR_D 0x00000020 /* Dirty */ +#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */ +#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ +#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ +#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ +#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for the Instruction TLB Match Register + * + */ +#define SPR_ITLBMR_V 0x00000001 /* Valid */ +#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_ITLBMR_CID 0x0000003c /* Context ID */ +#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Instruction TLB Translate Register + * + */ +#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_ITLBTR_A 0x00000010 /* Accessed */ +#define SPR_ITLBTR_D 0x00000020 /* Dirty */ +#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ +#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ +#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for Data Cache Control register + * + */ +#define SPR_DCCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Insn Cache Control register + * + */ +#define SPR_ICCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Debug Control registers + * + */ +#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */ +#define SPR_DCR_CC 0x0000000e /* Compare condition */ +#define SPR_DCR_SC 0x00000010 /* Signed compare */ +#define SPR_DCR_CT 0x000000e0 /* Compare to */ + +/* Bit results with SPR_DCR_CC mask */ +#define SPR_DCR_CC_MASKED 0x00000000 +#define SPR_DCR_CC_EQUAL 0x00000001 +#define SPR_DCR_CC_LESS 0x00000002 +#define SPR_DCR_CC_LESSE 0x00000003 +#define SPR_DCR_CC_GREAT 0x00000004 +#define SPR_DCR_CC_GREATE 0x00000005 +#define SPR_DCR_CC_NEQUAL 0x00000006 + +/* Bit results with SPR_DCR_CT mask */ +#define SPR_DCR_CT_DISABLED 0x00000000 +#define SPR_DCR_CT_IFEA 0x00000020 +#define SPR_DCR_CT_LEA 0x00000040 +#define SPR_DCR_CT_SEA 0x00000060 +#define SPR_DCR_CT_LD 0x00000080 +#define SPR_DCR_CT_SD 0x000000a0 +#define SPR_DCR_CT_LSEA 0x000000c0 + +/* + * Bit definitions for Debug Mode 1 register + * + */ +#define SPR_DMR1_CW0 0x00000003 /* Chain watchpoint 0 */ +#define SPR_DMR1_CW1 0x0000000c /* Chain watchpoint 1 */ +#define SPR_DMR1_CW2 0x00000030 /* Chain watchpoint 2 */ +#define SPR_DMR1_CW3 0x000000c0 /* Chain watchpoint 3 */ +#define SPR_DMR1_CW4 0x00000300 /* Chain watchpoint 4 */ +#define SPR_DMR1_CW5 0x00000c00 /* Chain watchpoint 5 */ +#define SPR_DMR1_CW6 0x00003000 /* Chain watchpoint 6 */ +#define SPR_DMR1_CW7 0x0000c000 /* Chain watchpoint 7 */ +#define SPR_DMR1_CW8 0x00030000 /* Chain watchpoint 8 */ +#define SPR_DMR1_CW9 0x000c0000 /* Chain watchpoint 9 */ +#define SPR_DMR1_CW10 0x00300000 /* Chain watchpoint 10 */ +#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/ +#define SPR_DMR1_BT 0x00800000 /* Branch trace */ +#define SPR_DMR1_DXFW 0x01000000 /* Disable external force watchpoint */ + +/* + * Bit definitions for Debug Mode 2 register + * + */ +#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_AWTC 0x00001ffc /* Assign watchpoints to counters */ +#define SPR_DMR2_WGB 0x00ffe000 /* Watchpoints generating breakpoint */ + +/* + * Bit definitions for Debug watchpoint counter registers + * + */ +#define SPR_DWCR_COUNT 0x0000ffff /* Count */ +#define SPR_DWCR_MATCH 0xffff0000 /* Match */ + +/* + * Bit definitions for Debug stop register + * + */ +#define SPR_DSR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DSR_TTE 0x00000010 /* iTick Timer exception */ +#define SPR_DSR_AE 0x00000020 /* Alignment exception */ +#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DSR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DSR_RE 0x00000400 /* Range exception */ +#define SPR_DSR_SCE 0x00000800 /* System call exception */ +#define SPR_DSR_SSE 0x00001000 /* Single Step Exception */ +#define SPR_DSR_TE 0x00002000 /* Trap exception */ + +/* + * Bit definitions for Debug reason register + * + */ +#define SPR_DRR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */ +#define SPR_DRR_AE 0x00000020 /* Alignment exception */ +#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DRR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DRR_RE 0x00000400 /* Range exception */ +#define SPR_DRR_SCE 0x00000800 /* System call exception */ +#define SPR_DRR_TE 0x00001000 /* Trap exception */ + +/* + * Bit definitions for Performance counters mode registers + * + */ +#define SPR_PCMR_CP 0x00000001 /* Counter present */ +#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */ +#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */ +#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */ +#define SPR_PCMR_LA 0x00000010 /* Load access event */ +#define SPR_PCMR_SA 0x00000020 /* Store access event */ +#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/ +#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */ +#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */ +#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */ +#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */ +#define SPR_PCMR_BS 0x00000800 /* Branch stall event */ +#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */ +#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */ +#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */ +#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */ + +/* + * Bit definitions for the Power management register + * + */ +#define SPR_PMR_SDF 0x0000000f /* Slow down factor */ +#define SPR_PMR_DME 0x00000010 /* Doze mode enable */ +#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */ +#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */ +#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */ + +/* + * Bit definitions for PICMR + * + */ +#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */ + +/* + * Bit definitions for PICPR + * + */ +#define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */ + +/* + * Bit definitions for PICSR + * + */ +#define SPR_PICSR_IS 0xffffffff /* Interrupt status */ + +/* + * Bit definitions for Tick Timer Control Register + * + */ +#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */ +#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD +#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */ +#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */ +#define SPR_TTMR_RT 0x40000000 /* Restart tick */ +#define SPR_TTMR_SR 0x80000000 /* Single run */ +#define SPR_TTMR_CR 0xc0000000 /* Continuous run */ +#define SPR_TTMR_M 0xc0000000 /* Tick mode */ + +/* + * l.nop constants + * + */ +#define NOP_NOP 0x0000 /* Normal nop instruction */ +#define NOP_EXIT 0x0001 /* End of simulation */ +#define NOP_REPORT 0x0002 /* Simple report */ +#define NOP_PRINTF 0x0003 /* Simprintf instruction */ +#define NOP_REPORT_FIRST 0x0400 /* Report with number */ +#define NOP_REPORT_LAST 0x03ff /* Report with number */
trunk/soc/sw/orpmon/include/spr_defs.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/string.h =================================================================== --- trunk/soc/sw/orpmon/include/string.h (nonexistent) +++ trunk/soc/sw/orpmon/include/string.h (revision 20) @@ -0,0 +1,45 @@ +/* + string.h -- String manipulation + Implements (some) of the standard string routines + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#ifndef __STRING_H +#define __STRING_H +#include + +/* Basic string functions */ +extern size_t strlen(const char *s); +extern char *strcpy(char *dest, const char *src); +extern char *strncpy(char *dest, const char *src, size_t n); +extern char *strcat(char *dest, const char *src); +extern char *strncat(char *dest, const char *src, size_t n); +extern int strcmp(const char *s1, const char *s2); +extern int strncmp(const char *s1, const char *s2, size_t n); +extern char *strchr(const char *s, int c); +extern char *strrchr(const char *s, int c); + +/* Basic mem functions */ +extern void *memcpy(void *dest, const void *src, size_t n); +extern void *memmove(void *dest, void *src, size_t n); +extern int memcmp(const void *s1, const void *s2, size_t n); +extern void *memchr(const void *s, int c, size_t n); +extern void *memset(void *d, int c, size_t n); + +#endif
trunk/soc/sw/orpmon/include/string.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/uart.h =================================================================== --- trunk/soc/sw/orpmon/include/uart.h (nonexistent) +++ trunk/soc/sw/orpmon/include/uart.h (revision 20) @@ -0,0 +1,142 @@ +extern void uart_init(void); +extern void uart_putc(char); +extern char uart_getc(void); +extern char uart_testc(void); +extern void uart_print_str(char *); +extern void uart_print_long(unsigned long); + +#if 1 +#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ +#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ +#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ +#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ +#define UART_IER 1 /* Out: Interrupt Enable Register */ +#define UART_IIR 2 /* In: Interrupt ID Register */ +#define UART_FCR 2 /* Out: FIFO Control Register */ +#define UART_EFR 2 /* I/O: Extended Features Register */ + /* (DLAB=1, 16C660 only) */ +#define UART_LCR 3 /* Out: Line Control Register */ +#define UART_MCR 4 /* Out: Modem Control Register */ +#define UART_LSR 5 /* In: Line Status Register */ +#define UART_MSR 6 /* In: Modem Status Register */ +#define UART_SCR 7 /* I/O: Scratch Register */ +#else + +#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ +#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ +#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ +#define UART_DLM 4 /* Out: Divisor Latch High (DLAB=1) */ +#define UART_IER 4 /* Out: Interrupt Enable Register */ +#define UART_IIR 8 /* In: Interrupt ID Register */ +#define UART_FCR 8 /* Out: FIFO Control Register */ +#define UART_EFR 8 /* I/O: Extended Features Register */ + /* (DLAB=1, 16C660 only) */ +#define UART_LCR 12 /* Out: Line Control Register */ +#define UART_MCR 12 /* Out: Modem Control Register */ +#define UART_LSR 20 /* In: Line Status Register */ +#define UART_MSR 24 /* In: Modem Status Register */ +#define UART_SCR 28 /* I/O: Scratch Register */ +#endif + +/* + * These are the definitions for the FIFO Control Register + * (16650 only) + */ +#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ +/* 16650 redefinitions */ +#define UART_FCR6_R_TRIGGER_8 0x00 /* Mask for receive trigger set at 1 */ +#define UART_FCR6_R_TRIGGER_16 0x40 /* Mask for receive trigger set at 4 */ +#define UART_FCR6_R_TRIGGER_24 0x80 /* Mask for receive trigger set at 8 */ +#define UART_FCR6_R_TRIGGER_28 0xC0 /* Mask for receive trigger set at 14 */ +#define UART_FCR6_T_TRIGGER_16 0x00 /* Mask for transmit trigger set at 16 */ +#define UART_FCR6_T_TRIGGER_8 0x10 /* Mask for transmit trigger set at 8 */ +#define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */ +#define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */ + +/* + * These are the definitions for the Line Control Register + * + * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting + * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. + */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ +#define UART_LCR_SBC 0x40 /* Set break control */ +#define UART_LCR_SPAR 0x20 /* Stick parity (?) */ +#define UART_LCR_EPAR 0x10 /* Even parity select */ +#define UART_LCR_PARITY 0x08 /* Parity Enable */ +#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */ +#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ +#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ +#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ +#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ + +/* + * These are the definitions for the Line Status Register + */ +#define UART_LSR_TEMT 0x40 /* Transmitter empty */ +#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ +#define UART_LSR_BI 0x10 /* Break interrupt indicator */ +#define UART_LSR_FE 0x08 /* Frame error indicator */ +#define UART_LSR_PE 0x04 /* Parity error indicator */ +#define UART_LSR_OE 0x02 /* Overrun error indicator */ +#define UART_LSR_DR 0x01 /* Receiver data ready */ + +/* + * These are the definitions for the Interrupt Identification Register + */ +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_TOI 0x0c /* Receive time out interrupt */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +/* + * These are the definitions for the Interrupt Enable Register + */ +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ + +/* + * These are the definitions for the Modem Control Register + */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ +#define UART_MCR_OUT2 0x08 /* Out2 complement */ +#define UART_MCR_OUT1 0x04 /* Out1 complement */ +#define UART_MCR_RTS 0x02 /* RTS complement */ +#define UART_MCR_DTR 0x01 /* DTR complement */ + +/* + * These are the definitions for the Modem Status Register + */ +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ +#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ + +/* + * These are the definitions for the Extended Features Register + * (StarTech 16C660 only, when DLAB=1) + */ +#define UART_EFR_CTS 0x80 /* CTS flow control */ +#define UART_EFR_RTS 0x40 /* RTS flow control */ +#define UART_EFR_SCD 0x20 /* Special character detect */ +#define UART_EFR_ENI 0x10 /* Enhanced Interrupt */ +
trunk/soc/sw/orpmon/include/uart.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/support.h =================================================================== --- trunk/soc/sw/orpmon/include/support.h (nonexistent) +++ trunk/soc/sw/orpmon/include/support.h (revision 20) @@ -0,0 +1,61 @@ +/* Support file for or32 tests. This file should is included + in each test. It calls main() function and add support for + basic functions */ + +#ifndef SUPPORT_H +#define SUPPORT_H + +#include +#include +#include + +#include "string.h" + +/* Register access macros */ +#define REG8(add) *((volatile unsigned char *)(add)) +#define REG16(add) *((volatile unsigned short *)(add)) +#define REG32(add) *((volatile unsigned long *)(add)) + +/* For writing into SPR. */ +void mtspr(unsigned long spr, unsigned long value); + +/* For reading SPR. */ +unsigned long mfspr(unsigned long spr); + +/* Function to be called at entry point - not defined here. */ +int main (int, char **); + +/* Prints out a value */ +void report(unsigned long value); + +/* Calculates a 32-bit CRC */ +unsigned long crc32 (unsigned long crc, const unsigned char *buf, unsigned long len); + +/* return value by making a syscall */ +extern void exit (int i) __attribute__ ((__noreturn__)); + +/* some stdlib functions */ + +/* defined in 'string.h' +extern void *memcpy (void *dest, const void *src, unsigned long n); +extern void *memmove (void *dest, const void *src, unsigned long n); +int memcmp (void *dstvoid, const void *srcvoid, unsigned long length); +extern void *memset (void * dstvoid, const char data, unsigned long length); +extern void *memchr(const void *s, int c, unsigned long n); +extern int strlen (const char *src); +extern int strcmp (const char *s1, const char *s2); +extern char *strcpy (char *dst0, char *src0); +*/ +unsigned long strtoul (const char *str, char **endptr, int base); + +/* defined in 'ctype.h' +#define isspace(c) ((c) == ' ' || (c) == '\t') +*/ + +extern volatile unsigned long timestamp; +extern void reset_timer (void); +extern unsigned long get_timer (unsigned long base); +extern void set_timer (unsigned long t); +extern void sleep(unsigned long sleep_time); + +#endif
trunk/soc/sw/orpmon/include/support.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/smc91111.h =================================================================== --- trunk/soc/sw/orpmon/include/smc91111.h (nonexistent) +++ trunk/soc/sw/orpmon/include/smc91111.h (revision 20) @@ -0,0 +1,401 @@ +/*------------------------------------------------------------------------ + . smc91111.h + . This is a driver for SMSC's 91C111 single-chip Ethernet device. + . + . (C) Copyright 2005 + . + . Copyright (C) 2001 Standard Microsystems Corporation (SMSC) + . Developed by Simple Network Magic Corporation (SNMC) + . Copyright (C) 1996 by Erik Stahlman (ES) + . + . This program is free software; you can redistribute it and/or modify + . it under the terms of the GNU General Public License as published by + . the Free Software Foundation; either version 2 of the License, or + . (at your option) any later version. + . + . This program is distributed in the hope that it will be useful, + . but WITHOUT ANY WARRANTY; without even the implied warranty of + . MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + . GNU General Public License for more details. + . + . You should have received a copy of the GNU General Public License + . along with this program; if not, write to the Free Software + . Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + . + . Information contained in this file was obtained from the LAN91C111 + . manual from SMC. To get a copy, if you really want one, you can find + . information under www.smsc.com. + . + . + . "Features" of the SMC chip: + . Integrated PHY/MAC for 10/100BaseT Operation + . Supports internal and external MII + . Integrated 8K packet memory + . EEPROM interface for configuration + . + . + . author: + . Javier Castillo ( javier.castillo@urjc.es ) + . + . Sources: + . o smc91111.c by Erik Stahlman + . + . History: + . 06/05/05 Javier Castillo Modified smc91111.h to work with OR1200 + ----------------------------------------------------------------------------*/ + +#ifndef _SMC91111_H_ +#define _SMC91111_H_ + +/* + * This function may be called by the board specific initialisation code + * in order to override the default mac address. + */ + +extern void eth_init (void (*rec)(volatile unsigned char *, int)); +extern void eth_send(void *buf, unsigned long len); +extern unsigned long eth_rx (void); +extern void eth_halt(void); + + +#define BANK_SELECT 14 +#define SMC_SELECT_BANK(bank) REG16(ETH_BASE+BANK_SELECT)=bank +#define SMC_PHY_ADDR 0x0000 + +/* Transmit Control Register */ +/* BANK 0 */ +#define TCR_REG 0x0000 +#define TCR_ENABLE 0x0001 /* When 1 we can transmit */ +#define TCR_LOOP 0x0002 /* Controls output pin LBK */ +#define TCR_FORCOL 0x0004 /* When 1 will force a collision */ +#define TCR_PAD_EN 0x0080 /* When 1 will pad tx frames < 64 bytes w/0 */ +#define TCR_NOCRC 0x0100 /* When 1 will not append CRC to tx frames */ +#define TCR_MON_CSN 0x0400 /* When 1 tx monitors carrier */ +#define TCR_FDUPLX 0x0800 /* When 1 enables full duplex operation */ +#define TCR_STP_SQET 0x1000 /* When 1 stops tx if Signal Quality Error */ +#define TCR_EPH_LOOP 0x2000 /* When 1 enables EPH block loopback */ +#define TCR_SWFDUP 0x8000 /* When 1 enables Switched Full Duplex mode */ +#define TCR_CLEAR 0 +#define TCR_DEFAULT TCR_ENABLE | TCR_SWFDUP + +/* EPH Status Register */ +/* BANK 0 */ +#define EPH_STATUS_REG 0x0002 +#define ES_TX_SUC 0x0001 /* Last TX was successful */ +#define ES_SNGL_COL 0x0002 /* Single collision detected for last tx */ +#define ES_MUL_COL 0x0004 /* Multiple collisions detected for last tx */ +#define ES_LTX_MULT 0x0008 /* Last tx was a multicast */ +#define ES_16COL 0x0010 /* 16 Collisions Reached */ +#define ES_SQET 0x0020 /* Signal Quality Error Test */ +#define ES_LTXBRD 0x0040 /* Last tx was a broadcast */ +#define ES_TXDEFR 0x0080 /* Transmit Deferred */ +#define ES_LATCOL 0x0200 /* Late collision detected on last tx */ +#define ES_LOSTCARR 0x0400 /* Lost Carrier Sense */ +#define ES_EXC_DEF 0x0800 /* Excessive Deferral */ +#define ES_CTR_ROL 0x1000 /* Counter Roll Over indication */ +#define ES_LINK_OK 0x4000 /* Driven by inverted value of nLNK pin */ +#define ES_TXUNRN 0x8000 /* Tx Underrun */ + + +/* Receive Control Register */ +/* BANK 0 */ +#define RCR_REG 0x0004 +#define RCR_RX_ABORT 0x0001 /* Set if a rx frame was aborted */ +#define RCR_PRMS 0x0002 /* Enable promiscuous mode */ +#define RCR_ALMUL 0x0004 /* When set accepts all multicast frames */ +#define RCR_RXEN 0x0100 /* IFF this is set, we can receive packets */ +#define RCR_STRIP_CRC 0x0200 /* When set strips CRC from rx packets */ +#define RCR_ABORT_ENB 0x0200 /* When set will abort rx on collision */ +#define RCR_FILT_CAR 0x0400 /* When set filters leading 12 bit s of carrier */ +#define RCR_SOFTRST 0x8000 /* resets the chip */ +#define RCR_CLEAR 0x0 +#define RCR_DEFAULT RCR_RXEN + +/* Counter Register */ +/* BANK 0 */ +#define COUNTER_REG 0x0006 + +/* Memory Information Register */ +/* BANK 0 */ +#define MIR_REG 0x0008 + +/* Receive/Phy Control Register */ +/* BANK 0 */ +#define RPC_REG 0x000A +#define RPC_SPEED 0x2000 /* When 1 PHY is in 100Mbps mode. */ +#define RPC_DPLX 0x1000 /* When 1 PHY is in Full-Duplex Mode */ +#define RPC_ANEG 0x0800 /* When 1 PHY is in Auto-Negotiate Mode */ +#define RPC_LSXA_SHFT 5 /* Bits to shift LS2A,LS1A,LS0A to lsb */ +#define RPC_LSXB_SHFT 2 /* Bits to get LS2B,LS1B,LS0B to lsb */ +#define RPC_LED_100_10 (0x00) /* LED = 100Mbps OR's with 10Mbps link detect */ +#define RPC_LED_RES (0x01) /* LED = Reserved */ +#define RPC_LED_10 (0x02) /* LED = 10Mbps link detect */ +#define RPC_LED_FD (0x03) /* LED = Full Duplex Mode */ +#define RPC_LED_TX_RX (0x04) /* LED = TX or RX packet occurred */ +#define RPC_LED_100 (0x05) /* LED = 100Mbps link dectect */ +#define RPC_LED_TX (0x06) /* LED = TX packet occurred */ +#define RPC_LED_RX (0x07) /* LED = RX packet occurred */ + +#define RPC_DEFAULT RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX + +/* Bank 0 0x000C is reserved */ + +/* Bank Select Register */ +/* All Banks */ +#define BSR_REG 0x000E + + +/* Configuration Reg */ +/* BANK 1 */ +#define CONFIG_REG 0x0000 +#define CONFIG_EXT_PHY 0x0200 /* 1=external MII, 0=internal Phy */ +#define CONFIG_GPCNTRL 0x0400 /* Inverse value drives pin nCNTRL */ +#define CONFIG_NO_WAIT 0x1000 /* When 1 no extra wait states on ISA bus */ +#define CONFIG_EPH_POWER_EN 0x8000 /* When 0 EPH is placed into low power mode. */ +/* Default is powered-up, Internal Phy, Wait States, and pin nCNTRL=low */ +#define CONFIG_DEFAULT (CONFIG_EPH_POWER_EN) + +/* Base Address Register */ +/* BANK 1 */ +#define BASE_REG 0x0002 + + +/* Individual Address Registers */ +/* BANK 1 */ +#define ADDR0_REG 0x0004 +#define ADDR1_REG 0x0006 +#define ADDR2_REG 0x0008 + + +/* General Purpose Register */ +/* BANK 1 */ +#define GP_REG 0x000A + + +/* Control Register */ +/* BANK 1 */ +#define CTL_REG 0x000C +#define CTL_RCV_BAD 0x4000 /* When 1 bad CRC packets are received */ +#define CTL_AUTO_RELEASE 0x0800 /* When 1 tx pages are released automatically */ +#define CTL_LE_ENABLE 0x0080 /* When 1 enables Link Error interrupt */ +#define CTL_CR_ENABLE 0x0040 /* When 1 enables Counter Rollover interrupt */ +#define CTL_TE_ENABLE 0x0020 /* When 1 enables Transmit Error interrupt */ +#define CTL_EEPROM_SELECT 0x0004 /* Controls EEPROM reload & store */ +#define CTL_RELOAD 0x0002 /* When set reads EEPROM into registers */ +#define CTL_STORE 0x0001 /* When set stores registers into EEPROM */ +#define CTL_DEFAULT (0x1A10) /* Autorelease enabled*/ + +/* MMU Command Register */ +/* BANK 2 */ +#define MMU_CMD_REG 0x0000 +#define MC_BUSY 1 /* When 1 the last release has not completed */ +#define MC_NOP (0<<5) /* No Op */ +#define MC_ALLOC (1<<5) /* OR with number of 256 byte packets */ +#define MC_RESET (2<<5) /* Reset MMU to initial state */ +#define MC_REMOVE (3<<5) /* Remove the current rx packet */ +#define MC_RELEASE (4<<5) /* Remove and release the current rx packet */ +#define MC_FREEPKT (5<<5) /* Release packet in PNR register */ +#define MC_ENQUEUE (6<<5) /* Enqueue the packet for transmit */ +#define MC_RSTTXFIFO (7<<5) /* Reset the TX FIFOs */ + + +/* Packet Number Register */ +/* BANK 2 */ +#define PN_REG 0x0002 + + +/* Allocation Result Register */ +/* BANK 2 */ +#define AR_REG 0x0003 +#define AR_FAILED 0x80 /* Alocation Failed */ + + +/* RX FIFO Ports Register */ +/* BANK 2 */ +#define RXFIFO_REG 0x0004 /* Must be read as a word */ +#define RXFIFO_REMPTY 0x8000 /* RX FIFO Empty */ + + +/* TX FIFO Ports Register */ +/* BANK 2 */ +#define TXFIFO_REG RXFIFO_REG /* Must be read as a word */ +#define TXFIFO_TEMPTY 0x80 /* TX FIFO Empty */ + + +/* Pointer Register */ +/* BANK 2 */ +#define PTR_REG 0x0006 +#define PTR_RCV 0x8000 /* 1=Receive area, 0=Transmit area */ +#define PTR_AUTOINC 0x4000 /* Auto increment the pointer on each access */ +#define PTR_READ 0x2000 /* When 1 the operation is a read */ +#define PTR_NOTEMPTY 0x0800 /* When 1 _do not_ write fifo DATA REG */ + + +/* Data Register */ +/* BANK 2 */ +#define SMC91111_DATA_REG 0x0008 + + +/* Interrupt Status/Acknowledge Register */ +/* BANK 2 */ +#define SMC91111_INT_REG 0x000C + + +/* Interrupt Mask Register */ +/* BANK 2 */ +#define IM_REG 0x000D +#define IM_MDINT 0x80 /* PHY MI Register 18 Interrupt */ +#define IM_ERCV_INT 0x40 /* Early Receive Interrupt */ +#define IM_EPH_INT 0x20 /* Set by Etheret Protocol Handler section */ +#define IM_RX_OVRN_INT 0x10 /* Set by Receiver Overruns */ +#define IM_ALLOC_INT 0x08 /* Set when allocation request is completed */ +#define IM_TX_EMPTY_INT 0x04 /* Set if the TX FIFO goes empty */ +#define IM_TX_INT 0x02 /* Transmit Interrrupt */ +#define IM_RCV_INT 0x01 /* Receive Interrupt */ + + +/* Multicast Table Registers */ +/* BANK 3 */ +#define MCAST_REG1 0x0000 +#define MCAST_REG2 0x0002 +#define MCAST_REG3 0x0004 +#define MCAST_REG4 0x0006 + + +/* Management Interface Register (MII) */ +/* BANK 3 */ +#define MII_REG 0x0008 +#define MII_MSK_CRS100 0x4000 /* Disables CRS100 detection during tx half dup */ +#define MII_MDOE 0x0008 /* MII Output Enable */ +#define MII_MCLK 0x0004 /* MII Clock, pin MDCLK */ +#define MII_MDI 0x0002 /* MII Input, pin MDI */ +#define MII_MDO 0x0001 /* MII Output, pin MDO */ + + +/* Revision Register */ +/* BANK 3 */ +#define REV_REG 0x000A /* ( hi: chip id low: rev # ) */ + + +/* Early RCV Register */ +/* BANK 3 */ +/* this is NOT on SMC9192 */ +#define ERCV_REG 0x000C +#define ERCV_RCV_DISCRD 0x0080 /* When 1 discards a packet being received */ +#define ERCV_THRESHOLD 0x001F /* ERCV Threshold Mask */ + +/* External Register */ +/* BANK 7 */ +#define EXT_REG 0x0000 + +/* + . Transmit status bits +*/ +#define TS_SUCCESS 0x0001 +#define TS_LOSTCAR 0x0400 +#define TS_LATCOL 0x0200 +#define TS_16COL 0x0010 + +/* + . Receive status bits +*/ +#define RS_ALGNERR 0x8000 +#define RS_BRODCAST 0x4000 +#define RS_BADCRC 0x2000 +#define RS_ODDFRAME 0x1000 /* bug: the LAN91C111 never sets this on receive */ +#define RS_TOOLONG 0x0800 +#define RS_TOOSHORT 0x0400 +#define RS_MULTICAST 0x0001 +#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT) + + +/* PHY Register Addresses (LAN91C111 Internal PHY) */ + +/* PHY Control Register */ +#define PHY_CNTL_REG 0x00 +#define PHY_CNTL_RST 0x8000 /* 1=PHY Reset */ +#define PHY_CNTL_LPBK 0x4000 /* 1=PHY Loopback */ +#define PHY_CNTL_SPEED 0x2000 /* 1=100Mbps, 0=10Mpbs */ +#define PHY_CNTL_ANEG_EN 0x1000 /* 1=Enable Auto negotiation */ +#define PHY_CNTL_PDN 0x0800 /* 1=PHY Power Down mode */ +#define PHY_CNTL_MII_DIS 0x0400 /* 1=MII 4 bit interface disabled */ +#define PHY_CNTL_ANEG_RST 0x0200 /* 1=Reset Auto negotiate */ +#define PHY_CNTL_DPLX 0x0100 /* 1=Full Duplex, 0=Half Duplex */ +#define PHY_CNTL_COLTST 0x0080 /* 1= MII Colision Test */ + +/* PHY Status Register */ +#define PHY_STAT_REG 0x01 +#define PHY_STAT_CAP_T4 0x8000 /* 1=100Base-T4 capable */ +#define PHY_STAT_CAP_TXF 0x4000 /* 1=100Base-X full duplex capable */ +#define PHY_STAT_CAP_TXH 0x2000 /* 1=100Base-X half duplex capable */ +#define PHY_STAT_CAP_TF 0x1000 /* 1=10Mbps full duplex capable */ +#define PHY_STAT_CAP_TH 0x0800 /* 1=10Mbps half duplex capable */ +#define PHY_STAT_CAP_SUPR 0x0040 /* 1=recv mgmt frames with not preamble */ +#define PHY_STAT_ANEG_ACK 0x0020 /* 1=ANEG has completed */ +#define PHY_STAT_REM_FLT 0x0010 /* 1=Remote Fault detected */ +#define PHY_STAT_CAP_ANEG 0x0008 /* 1=Auto negotiate capable */ +#define PHY_STAT_LINK 0x0004 /* 1=valid link */ +#define PHY_STAT_JAB 0x0002 /* 1=10Mbps jabber condition */ +#define PHY_STAT_EXREG 0x0001 /* 1=extended registers implemented */ + +/* PHY Identifier Registers */ +#define PHY_ID1_REG 0x02 /* PHY Identifier 1 */ +#define PHY_ID2_REG 0x03 /* PHY Identifier 2 */ + +/* PHY Auto-Negotiation Advertisement Register */ +#define PHY_AD_REG 0x04 +#define PHY_AD_NP 0x8000 /* 1=PHY requests exchange of Next Page */ +#define PHY_AD_ACK 0x4000 /* 1=got link code word from remote */ +#define PHY_AD_RF 0x2000 /* 1=advertise remote fault */ +#define PHY_AD_T4 0x0200 /* 1=PHY is capable of 100Base-T4 */ +#define PHY_AD_TX_FDX 0x0100 /* 1=PHY is capable of 100Base-TX FDPLX */ +#define PHY_AD_TX_HDX 0x0080 /* 1=PHY is capable of 100Base-TX HDPLX */ +#define PHY_AD_10_FDX 0x0040 /* 1=PHY is capable of 10Base-T FDPLX */ +#define PHY_AD_10_HDX 0x0020 /* 1=PHY is capable of 10Base-T HDPLX */ +#define PHY_AD_CSMA 0x0001 /* 1=PHY is capable of 802.3 CMSA */ + +/* PHY Auto-negotiation Remote End Capability Register */ +#define PHY_RMT_REG 0x05 +/* Uses same bit definitions as PHY_AD_REG */ + +/* PHY Configuration Register 1 */ +#define PHY_CFG1_REG 0x10 +#define PHY_CFG1_LNKDIS 0x8000 /* 1=Rx Link Detect Function disabled */ +#define PHY_CFG1_XMTDIS 0x4000 /* 1=TP Transmitter Disabled */ +#define PHY_CFG1_XMTPDN 0x2000 /* 1=TP Transmitter Powered Down */ +#define PHY_CFG1_BYPSCR 0x0400 /* 1=Bypass scrambler/descrambler */ +#define PHY_CFG1_UNSCDS 0x0200 /* 1=Unscramble Idle Reception Disable */ +#define PHY_CFG1_EQLZR 0x0100 /* 1=Rx Equalizer Disabled */ +#define PHY_CFG1_CABLE 0x0080 /* 1=STP(150ohm), 0=UTP(100ohm) */ +#define PHY_CFG1_RLVL0 0x0040 /* 1=Rx Squelch level reduced by 4.5db */ +#define PHY_CFG1_TLVL_SHIFT 2 /* Transmit Output Level Adjust */ +#define PHY_CFG1_TLVL_MASK 0x003C +#define PHY_CFG1_TRF_MASK 0x0003 /* Transmitter Rise/Fall time */ + + +/* PHY Configuration Register 2 */ +#define PHY_CFG2_REG 0x11 +#define PHY_CFG2_APOLDIS 0x0020 /* 1=Auto Polarity Correction disabled */ +#define PHY_CFG2_JABDIS 0x0010 /* 1=Jabber disabled */ +#define PHY_CFG2_MREG 0x0008 /* 1=Multiple register access (MII mgt) */ +#define PHY_CFG2_INTMDIO 0x0004 /* 1=Interrupt signaled with MDIO pulseo */ + +/* PHY Status Output (and Interrupt status) Register */ +#define PHY_INT_REG 0x12 /* Status Output (Interrupt Status) */ +#define PHY_INT_INT 0x8000 /* 1=bits have changed since last read */ +#define PHY_INT_LNKFAIL 0x4000 /* 1=Link Not detected */ +#define PHY_INT_LOSSSYNC 0x2000 /* 1=Descrambler has lost sync */ +#define PHY_INT_CWRD 0x1000 /* 1=Invalid 4B5B code detected on rx */ +#define PHY_INT_SSD 0x0800 /* 1=No Start Of Stream detected on rx */ +#define PHY_INT_ESD 0x0400 /* 1=No End Of Stream detected on rx */ +#define PHY_INT_RPOL 0x0200 /* 1=Reverse Polarity detected */ +#define PHY_INT_JAB 0x0100 /* 1=Jabber detected */ +#define PHY_INT_SPDDET 0x0080 /* 1=100Base-TX mode, 0=10Base-T mode */ +#define PHY_INT_DPLXDET 0x0040 /* 1=Device in Full Duplex */ + +/* PHY Interrupt/Status Mask Register */ +#define PHY_MASK_REG 0x13 /* Interrupt Mask */ +/* Uses the same bit definitions as PHY_INT_REG */ + + +#endif /* _SMC_91111_H_ */
trunk/soc/sw/orpmon/include/smc91111.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/screen.h =================================================================== --- trunk/soc/sw/orpmon/include/screen.h (nonexistent) +++ trunk/soc/sw/orpmon/include/screen.h (revision 20) @@ -0,0 +1,35 @@ +#ifndef SCREEN_H +#define SCREEN_H + +#if CRT_ENABLED +#define RESX 640 +#define RESY 480 +#define CHAR_WIDTH 8 +#define CHAR_HEIGHT 12 +#define COLOR_BLACK 0x00 +#define COLOR_WHITE 0xFF + +#define CHARSX (RESX/CHAR_WIDTH) +#define CHARSY (RESY/CHAR_HEIGHT) + +#define CRT_REG (CRT_BASE_ADDR + 0) +#define CRT_PALLETE (CRT_BASE_ADDR + 0x400) +#define CRT_BUFFER_REG (CRT_BASE_ADDR + 4) +#define PUT_PIXEL(x, y, color) (*(((unsigned char *)FB_BASE_ADDR) + (y) * RESX + (x)) = (color)) +#define SET_PALLETE(i, r, g, b) (*(((unsigned long *)CRT_PALLETE) + (i)) = (((r) >> 3) << 11) | (((g) >> 2) << 5) | (((b) >> 3) << 0)) + +void put_char_xy (int x, int y, char c); +void put_char (char c); +void put_string (char *s); +void screen_clear (void); +void screen_init (void); +void screen_putc (char); + +extern unsigned long fg_color; +extern unsigned long bg_color; +extern int cx; +extern int cy; + +#endif /* CRT_ENABLED */ +#endif +
trunk/soc/sw/orpmon/include/screen.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/eth.h =================================================================== --- trunk/soc/sw/orpmon/include/eth.h (nonexistent) +++ trunk/soc/sw/orpmon/include/eth.h (revision 20) @@ -0,0 +1,149 @@ +#define ETH_REG_BASE ETH_BASE +#define ETH_BD_BASE (ETH_BASE + 0x400) +#define ETH_TOTAL_BD 128 +#define ETH_MAXBUF_LEN 0x600 + +#define ETH_TXBD_NUM 8 +#define ETH_TXBD_NUM_MASK (ETH_TXBD_NUM - 1) +#define ETH_RXBD_NUM 8 +#define ETH_RXBD_NUM_MASK (ETH_RXBD_NUM - 1) + +/* Ethernet buffer descriptor */ +typedef struct _eth_bd { + volatile unsigned long len_status; /* Buffer length and status */ + volatile unsigned long addr; /* Buffer address */ +} eth_bd; + +extern void eth_init (void (*rec)(volatile unsigned char *, int)); +extern void *eth_get_tx_buf (void); +extern void eth_send (void *buf, unsigned long len); +extern unsigned long eth_rx (void); +extern void eth_halt(void); +extern void init_rx_bd_pool(void); +extern void init_tx_bd_pool(void); + +/* Tx BD */ +#define ETH_TX_BD_READY 0x8000 /* Tx BD Ready */ +#define ETH_TX_BD_IRQ 0x4000 /* Tx BD IRQ Enable */ +#define ETH_TX_BD_WRAP 0x2000 /* Tx BD Wrap (last BD) */ +#define ETH_TX_BD_PAD 0x1000 /* Tx BD Pad Enable */ +#define ETH_TX_BD_CRC 0x0800 /* Tx BD CRC Enable */ + +#define ETH_TX_BD_UNDERRUN 0x0100 /* Tx BD Underrun Status */ +#define ETH_TX_BD_RETRY 0x00F0 /* Tx BD Retry Status */ +#define ETH_TX_BD_RETLIM 0x0008 /* Tx BD Retransmission Limit Status */ +#define ETH_TX_BD_LATECOL 0x0004 /* Tx BD Late Collision Status */ +#define ETH_TX_BD_DEFER 0x0002 /* Tx BD Defer Status */ +#define ETH_TX_BD_CARRIER 0x0001 /* Tx BD Carrier Sense Lost Status */ +#define ETH_TX_BD_STATS (ETH_TX_BD_UNDERRUN | \ + ETH_TX_BD_RETRY | \ + ETH_TX_BD_RETLIM | \ + ETH_TX_BD_LATECOL | \ + ETH_TX_BD_DEFER | \ + ETH_TX_BD_CARRIER) + +/* Rx BD */ +#define ETH_RX_BD_EMPTY 0x8000 /* Rx BD Empty */ +#define ETH_RX_BD_IRQ 0x4000 /* Rx BD IRQ Enable */ +#define ETH_RX_BD_WRAP 0x2000 /* Rx BD Wrap (last BD) */ + +#define ETH_RX_BD_MISS 0x0080 /* Rx BD Miss Status */ +#define ETH_RX_BD_OVERRUN 0x0040 /* Rx BD Overrun Status */ +#define ETH_RX_BD_INVSIMB 0x0020 /* Rx BD Invalid Symbol Status */ +#define ETH_RX_BD_DRIBBLE 0x0010 /* Rx BD Dribble Nibble Status */ +#define ETH_RX_BD_TOOLONG 0x0008 /* Rx BD Too Long Status */ +#define ETH_RX_BD_SHORT 0x0004 /* Rx BD Too Short Frame Status */ +#define ETH_RX_BD_CRCERR 0x0002 /* Rx BD CRC Error Status */ +#define ETH_RX_BD_LATECOL 0x0001 /* Rx BD Late Collision Status */ +#define ETH_RX_BD_STATS (ETH_RX_BD_MISS | \ + ETH_RX_BD_OVERRUN | \ + ETH_RX_BD_INVSIMB | \ + ETH_RX_BD_DRIBBLE | \ + ETH_RX_BD_TOOLONG | \ + ETH_RX_BD_SHORT | \ + ETH_RX_BD_CRCERR | \ + ETH_RX_BD_LATECOL) + +/* Register space */ +#define ETH_MODER 0x00 /* Mode Register */ +#define ETH_INT 0x04 /* Interrupt Source Register */ +#define ETH_INT_MASK 0x08 /* Interrupt Mask Register */ +#define ETH_IPGT 0x0C /* Back to Bak Inter Packet Gap Register */ +#define ETH_IPGR1 0x10 /* Non Back to Back Inter Packet Gap Register 1 */ +#define ETH_IPGR2 0x14 /* Non Back to Back Inter Packet Gap Register 2 */ +#define ETH_PACKETLEN 0x18 /* Packet Length Register (min. and max.) */ +#define ETH_COLLCONF 0x1C /* Collision and Retry Configuration Register */ +#define ETH_TX_BD_NUM 0x20 /* Transmit Buffer Descriptor Number Register */ +#define ETH_CTRLMODER 0x24 /* Control Module Mode Register */ +#define ETH_MIIMODER 0x28 /* MII Mode Register */ +#define ETH_MIICOMMAND 0x2C /* MII Command Register */ +#define ETH_MIIADDRESS 0x30 /* MII Address Register */ +#define ETH_MIITX_DATA 0x34 /* MII Transmit Data Register */ +#define ETH_MIIRX_DATA 0x38 /* MII Receive Data Register */ +#define ETH_MIISTATUS 0x3C /* MII Status Register */ +#define ETH_MAC_ADDR0 0x40 /* MAC Individual Address Register 0 */ +#define ETH_MAC_ADDR1 0x44 /* MAC Individual Address Register 1 */ +#define ETH_HASH_ADDR0 0x48 /* Hash Register 0 */ +#define ETH_HASH_ADDR1 0x4C /* Hash Register 1 */ + +/* MODER Register */ +#define ETH_MODER_RXEN 0x00000001 /* Receive Enable */ +#define ETH_MODER_TXEN 0x00000002 /* Transmit Enable */ +#define ETH_MODER_NOPRE 0x00000004 /* No Preamble */ +#define ETH_MODER_BRO 0x00000008 /* Reject Broadcast */ +#define ETH_MODER_IAM 0x00000010 /* Use Individual Hash */ +#define ETH_MODER_PRO 0x00000020 /* Promiscuous (receive all) */ +#define ETH_MODER_IFG 0x00000040 /* Min. IFG not required */ +#define ETH_MODER_LOOPBCK 0x00000080 /* Loop Back */ +#define ETH_MODER_NOBCKOF 0x00000100 /* No Backoff */ +#define ETH_MODER_EXDFREN 0x00000200 /* Excess Defer */ +#define ETH_MODER_FULLD 0x00000400 /* Full Duplex */ +#define ETH_MODER_RST 0x00000800 /* Reset MAC */ +#define ETH_MODER_DLYCRCEN 0x00001000 /* Delayed CRC Enable */ +#define ETH_MODER_CRCEN 0x00002000 /* CRC Enable */ +#define ETH_MODER_HUGEN 0x00004000 /* Huge Enable */ +#define ETH_MODER_PAD 0x00008000 /* Pad Enable */ +#define ETH_MODER_RECSMALL 0x00010000 /* Receive Small */ + +/* Interrupt Source Register */ +#define ETH_INT_TXB 0x00000001 /* Transmit Buffer IRQ */ +#define ETH_INT_TXE 0x00000002 /* Transmit Error IRQ */ +#define ETH_INT_RXF 0x00000004 /* Receive Frame IRQ */ +#define ETH_INT_RXE 0x00000008 /* Receive Error IRQ */ +#define ETH_INT_BUSY 0x00000010 /* Busy IRQ */ +#define ETH_INT_TXC 0x00000020 /* Transmit Control Frame IRQ */ +#define ETH_INT_RXC 0x00000040 /* Received Control Frame IRQ */ + +/* Interrupt Mask Register */ +#define ETH_INT_MASK_TXB 0x00000001 /* Transmit Buffer IRQ Mask */ +#define ETH_INT_MASK_TXE 0x00000002 /* Transmit Error IRQ Mask */ +#define ETH_INT_MASK_RXF 0x00000004 /* Receive Frame IRQ Mask */ +#define ETH_INT_MASK_RXE 0x00000008 /* Receive Error IRQ Mask */ +#define ETH_INT_MASK_BUSY 0x00000010 /* Busy IRQ Mask */ +#define ETH_INT_MASK_TXC 0x00000020 /* Transmit Control Frame IRQ Mask */ +#define ETH_INT_MASK_RXC 0x00000040 /* Received Control Frame IRQ Mask */ + +/* Control Module Mode Register */ +#define ETH_CTRLMODER_PASSALL 0x00000001 /* Pass Control Frames */ +#define ETH_CTRLMODER_RXFLOW 0x00000002 /* Receive Control Flow Enable */ +#define ETH_CTRLMODER_TXFLOW 0x00000004 /* Transmit Control Flow Enable */ + +/* MII Mode Register */ +#define ETH_MIIMODER_CLKDIV 0x000000FF /* Clock Divider */ +#define ETH_MIIMODER_NOPRE 0x00000100 /* No Preamble */ +#define ETH_MIIMODER_RST 0x00000200 /* MIIM Reset */ + +/* MII Command Register */ +#define ETH_MIICOMMAND_SCANSTAT 0x00000001 /* Scan Status */ +#define ETH_MIICOMMAND_RSTAT 0x00000002 /* Read Status */ +#define ETH_MIICOMMAND_WCTRLDATA 0x00000004 /* Write Control Data */ + +/* MII Address Register */ +#define ETH_MIIADDRESS_FIAD 0x0000001F /* PHY Address */ +#define ETH_MIIADDRESS_RGAD 0x00001F00 /* RGAD Address */ + +/* MII Status Register */ +#define ETH_MIISTATUS_LINKFAIL 0x00000001 /* Link Fail */ +#define ETH_MIISTATUS_BUSY 0x00000002 /* MII Busy */ +#define ETH_MIISTATUS_NVALID 0x00000004 /* Data in MII Status Register is invalid */ +
trunk/soc/sw/orpmon/include/eth.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/ctype.h =================================================================== --- trunk/soc/sw/orpmon/include/ctype.h (nonexistent) +++ trunk/soc/sw/orpmon/include/ctype.h (revision 20) @@ -0,0 +1,72 @@ +/* + ctype.h -- character types + Implements the usual ctype stuff (only valid for ASCII systems) + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + +#ifndef __CTYPE_H +#define __CTYPE_H + +/* basic types */ +#define __CT_d 0x01 /* numeric digit */ +#define __CT_u 0x02 /* upper case */ +#define __CT_l 0x04 /* lower case */ +#define __CT_c 0x08 /* control character */ +#define __CT_s 0x10 /* whitespace */ +#define __CT_p 0x20 /* punctuation */ +#define __CT_x 0x40 /* hexadecimal */ +#define __CT_b 0x80 /* blank (is also space) */ + +/* combination types */ +#define __CT_lx (__CT_l | __CT_x) /* lower case hexadecimal */ +#define __CT_ux (__CT_u | __CT_x) /* upper case hexadecimal */ + +#define __CT_space (__CT_s | __CT_b) +#define __CT_alphanum (__CT_l | __CT_u | __CT_d) +#define __CT_graph (__CT_l | __CT_u | __CT_d | __CT_p) +#define __CT_print (__CT_l | __CT_u | __CT_d | __CT_p | __CT_b) + +extern const unsigned char __ctype_table[256]; + +#define _toupper(c) ( (c) ^ 0x20 ) +#define _tolower(c) ( (c) ^ 0x20 ) +#define toupper(c) ( islower(c) ? _tolower(c) : (c) ) +#define tolower(c) ( isupper(c) ? _toupper(c) : (c) ) +#define toascii(c) ( (c) & 0x7F ) + + +/* standard defenitions are taken from man-pages */ +/*#define isalnum(c) ( isalpha(c) || isdigit(c) ) */ +#define isalnum(c) ( __ctype_table[(int) c] & __CT_alphanum ) +/*#define isalpha(c) ( isupper(c) || islower(c) ) */ +#define isalpha(c) ( __ctype_table[(int) c] & __CT_ul ) +#define isascii(c) ( (c) & ~0x7F ) +#define isblank(c) ( __ctype_table[(int) c] & __CT_b ) +#define iscntrl(c) ( __ctype_table[(int) c] & __CT_c ) +#define isdigit(c) ( __ctype_table[(int) c] & __CT_d ) +#define isgraph(c) ( __ctype_table[(int) c] & __CT_graph ) +#define islower(c) ( __ctype_table[(int) c] & __CT_l ) +#define isprint(c) ( __ctype_table[(int) c] & __CT_print) +#define ispunct(c) ( __ctype_table[(int) c] & __CT_p ) +#define isspace(c) ( __ctype_table[(int) c] & __CT_space ) +#define isupper(c) ( __ctype_table[(int) c] & __CT_u ) +#define isxdigit(c) ( __ctype_table[(int) c] & __CT_x ) + +#endif /* __CTYPE_H */
trunk/soc/sw/orpmon/include/ctype.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/dos.h =================================================================== --- trunk/soc/sw/orpmon/include/dos.h (nonexistent) +++ trunk/soc/sw/orpmon/include/dos.h (revision 20) @@ -0,0 +1,94 @@ +/* + dos.h -- dos services (C-header file) + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +/* + * Definitions for the Opencores ATA Controller Core + */ + +#ifndef __OC_DOS_H +#define __OC_DOS_H + +#include "ata.h" + +struct dosparam { + unsigned short bytes_per_sector; + unsigned char fats; // number of FATs + unsigned char sectors_per_cluster; + unsigned short sectors_per_fat; + unsigned short root_entries; // number of entries in the root sector + + unsigned long ssector; // startsector of current directory + unsigned long csector; // startsector of current cluster + unsigned long sentry; // startentry of current cluster + unsigned char cbuf[8192]; // cluster buffer. This should be dynamically alocated + + /* ata driver structures */ + struct inode inode; + struct file filp; + struct request request; +}; + + +struct dos_dir_entry { + unsigned char name[8]; + unsigned char ext[3]; + + unsigned char attribute; // attributes + + unsigned char reserved[10]; + + unsigned short time; // time of creation/modification + unsigned short date; // date of creation/modification + + unsigned short sc; // startcluster + unsigned long size; // file size +}; + + +#define ATT_ARC 0x20 +#define ATT_DIR 0x10 +#define ATT_LAB 0x08 +#define ATT_SYS 0x04 +#define ATT_HID 0x02 +#define ATT_RW 0x01 + + +/* + macros +*/ +#define bytes_per_cluster(param) (unsigned long)(param->sectors_per_cluster * param->bytes_per_sector) +#define entries_per_cluster(param) (unsigned long)(bytes_per_cluster(param) / sizeof(struct dos_dir_entry) ) + + +/* + prototypes +*/ +int dos_open(struct dosparam *params); +int dos_release(struct dosparam *params); + +struct dos_dir_entry *dos_dir_get_entry(struct dosparam *params, unsigned long entry); +struct dos_dir_entry *dos_dir_find_entry(struct dosparam *params, const char *name); + +char *dos_read_cluster(struct dosparam *params, unsigned long ssector); +char *dos_dir_cluster_read_nxt(struct dosparam *params); +char *dos_dir_cluster_reset(struct dosparam *params); + +#endif
trunk/soc/sw/orpmon/include/dos.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/net.h =================================================================== --- trunk/soc/sw/orpmon/include/net.h (nonexistent) +++ trunk/soc/sw/orpmon/include/net.h (revision 20) @@ -0,0 +1,310 @@ +/* + * LiMon Monitor (LiMon) - Network. + * + * Copyright 1994 - 2000 Neil Russell. + * (See License) + * + * + * History + * 9/16/00 bor adapted to TQM823L/STK8xxL board, RARP/TFTP boot added + */ + +#ifndef __NET_H__ +#define __NET_H__ + + +/* + * The number of receive packet buffers, and the required packet buffer + * alignment in memory. + * + */ + +#define PKTBUFSRX 4 +#define PKTALIGN 32 + +/****** from cpu_arch.h ************/ + +/* Byte swapping stuff (not needed on PPC). */ + +#define SWAP16(x) (x) +#define SWAP16c(x) (x) +#define SWAP32(x) (x) + +/****** end from cpu_arch.h **************/ + +typedef unsigned long IPaddr_t; + + + +/* + * The current receive packet handler. Called with a pointer to the + * application packet, and a protocol type (PORT_BOOTPC or PORT_TFTP). + * All other packets are dealt with without calling the handler. + */ +typedef void rxhand_f(unsigned char *, unsigned, unsigned, unsigned); + +/* + * A timeout handler. Called after time interval has expired. + */ +typedef void thand_f(void); + +#ifdef CONFIG_NET_MULTI + +#define NAMESIZE 16 + +enum eth_state_t { + ETH_STATE_INIT, + ETH_STATE_PASSIVE, + ETH_STATE_ACTIVE +}; + +struct eth_device { + char name[NAMESIZE]; + unsigned char enetaddr[6]; + int iobase; + int state; + + int (*init) (struct eth_device*, bd_t*); + int (*send) (struct eth_device*, volatile void* pachet, int length); + int (*recv) (struct eth_device*); + void (*halt) (struct eth_device*); + + struct eth_device *next; + void *priv; +}; + +extern int eth_initialize(bd_t *bis); /* Initialize network subsystem */ +extern int eth_register(struct eth_device* dev);/* Register network device */ +extern void eth_try_another(void); /* Change the device */ +#endif + +/**********************************************************************/ +/* + * Protocol headers. + */ + +/* + * Ethernet header + */ +typedef struct { + unsigned char et_dest[6]; /* Destination node */ + unsigned char et_src[6]; /* Source node */ + unsigned short et_protlen; /* Protocol or length */ + unsigned char et_dsap; /* 802 DSAP */ + unsigned char et_ssap; /* 802 SSAP */ + unsigned char et_ctl; /* 802 control */ + unsigned char et_snap1; /* SNAP */ + unsigned char et_snap2; + unsigned char et_snap3; + unsigned short et_prot; /* 802 protocol */ +} Ethernet_t; + +#define ETHER_HDR_SIZE 14 /* Ethernet header size */ +#define E802_HDR_SIZE 22 /* 802 ethernet header size */ +#define PROT_IP 0x0800 /* IP protocol */ +#define PROT_ARP 0x0806 /* IP ARP protocol */ +#define PROT_RARP 0x8035 /* IP ARP protocol */ + +#define IPPROTO_ICMP 1 /* Internet Control Message Protocol */ +#define IPPROTO_UDP 17 /* User Datagram Protocol */ + +/* + * Internet Protocol (IP) header. + */ +typedef struct { + unsigned char ip_hl_v; /* header length and version */ + unsigned char ip_tos; /* type of service */ + unsigned short ip_len; /* total length */ + unsigned short ip_id; /* identification */ + unsigned short ip_off; /* fragment offset field */ + unsigned char ip_ttl; /* time to live */ + unsigned char ip_p; /* protocol */ + unsigned short ip_sum; /* checksum */ + IPaddr_t ip_src; /* Source IP address */ + IPaddr_t ip_dst; /* Destination IP address */ + unsigned short udp_src; /* UDP source port */ + unsigned short udp_dst; /* UDP destination port */ + unsigned short udp_len; /* Length of UDP packet */ + unsigned short udp_xsum; /* Checksum */ +} IP_t; + +#define IP_HDR_SIZE_NO_UDP (sizeof (IP_t) - 8) +#define IP_HDR_SIZE (sizeof (IP_t)) + + +/* + * Address Resolution Protocol (ARP) header. + */ +typedef struct +{ + unsigned short ar_hrd; /* Format of hardware address */ +# define ARP_ETHER 1 /* Ethernet hardware address */ + unsigned short ar_pro; /* Format of protocol address */ + unsigned char ar_hln; /* Length of hardware address */ + unsigned char ar_pln; /* Length of protocol address */ + unsigned short ar_op; /* Operation */ +# define ARPOP_REQUEST 1 /* Request to resolve address */ +# define ARPOP_REPLY 2 /* Response to previous request */ + +# define RARPOP_REQUEST 3 /* Request to resolve address */ +# define RARPOP_REPLY 4 /* Response to previous request */ + + /* + * The remaining fields are variable in size, according to + * the sizes above, and are defined as appropriate for + * specific hardware/protocol combinations. + */ + unsigned char ar_data[0]; +#if 0 + unsigned char ar_sha[]; /* Sender hardware address */ + unsigned char ar_spa[]; /* Sender protocol address */ + unsigned char ar_tha[]; /* Target hardware address */ + unsigned char ar_tpa[]; /* Target protocol address */ +#endif /* 0 */ +} ARP_t; + +#define ARP_HDR_SIZE (8+20) /* Size assuming ethernet */ + +/* + * ICMP stuff (just enough to handle (host) redirect messages) + */ +#define ICMP_REDIRECT 5 /* Redirect (change route) */ + +/* Codes for REDIRECT. */ +#define ICMP_REDIR_NET 0 /* Redirect Net */ +#define ICMP_REDIR_HOST 1 /* Redirect Host */ + +typedef struct icmphdr { + unsigned char type; + unsigned char code; + unsigned short checksum; + union { + struct { + unsigned short id; + unsigned short sequence; + } echo; + unsigned long gateway; + struct { + unsigned short __unused; + unsigned short mtu; + } frag; + } un; +} ICMP_t; + + + +/* + * Maximum packet size; used to allocate packet storage. + * TFTP packets can be 524 bytes + IP header + ethernet header. + * Lets be conservative, and go for 38 * 16. (Must also be + * a multiple of 32 bytes). + */ +/* + * AS.HARNOIS : Better to set PKTSIZE to maximum size because + * traffic type is not always controlled + * maximum packet size = 1518 + * maximum packet size and multiple of 32 bytes = 1536 + */ +#define PKTSIZE 1518 +#define PKTSIZE_ALIGN 1536 +/*#define PKTSIZE 608*/ + +/* + * Maximum receive ring size; that is, the number of packets + * we can buffer before overflow happens. Basically, this just + * needs to be enough to prevent a packet being discarded while + * we are processing the previous one. + */ +#define RINGSZ 4 +#define RINGSZ_LOG2 2 + +/**********************************************************************/ +/* + * Globals. + */ + +/* net.c */ +/** BOOTP EXTENTIONS **/ +extern IPaddr_t NetOurGatewayIP; /* Our gateway IP addresse */ +extern IPaddr_t NetOurSubnetMask; /* Our subnet mask (0 = unknown)*/ +extern IPaddr_t NetOurDNSIP; /* Our Domain Name Server (0 = unknown)*/ +extern char NetOurNISDomain[32]; /* Our NIS domain */ +extern char NetOurHostName[32]; /* Our hostname */ +extern char NetOurRootPath[64]; /* Our root path */ +extern unsigned short NetBootFileSize; /* Our boot file size in blocks */ +/** END OF BOOTP EXTENTIONS **/ +extern unsigned long NetBootFileXferSize; /* size of bootfile in bytes */ +extern unsigned char NetOurEther[6]; /* Our ethernet address */ +extern unsigned char NetServerEther[6]; /* Boot server enet address */ +extern IPaddr_t NetOurIP; /* Our IP addr (0 = unknown) */ +extern IPaddr_t NetServerIP; /* Server IP addr (0 = unknown) */ +volatile unsigned char * NetTxPacket; /* THE transmit packet */ +extern volatile unsigned char * NetRxPackets[PKTBUFSRX];/* Receive packets */ +extern volatile unsigned char * NetRxPkt; /* Current receive packet */ +extern int NetRxPktLen; /* Current rx packet length */ +extern unsigned NetIPID; /* IP ID (counting) */ +extern unsigned char NetBcastAddr[6]; /* Ethernet boardcast address */ + +extern int NetState; /* Network loop state */ +#define NETLOOP_CONTINUE 1 +#define NETLOOP_RESTART 2 +#define NETLOOP_SUCCESS 3 +#define NETLOOP_FAIL 4 + + +typedef enum { BOOTP, RARP, ARP, TFTP, DHCP } proto_t; + +/* from net/net.c */ +extern char BootFile[128]; /* Boot File name */ + +/* Initialize the network adapter */ +extern int NetLoop(proto_t protocol); + +/* Shutdown adapters and cleanup */ +extern void NetStop(void); + +/* Load failed. Start again. */ +extern void NetStartAgain(void); + +/* Copy ethernet address */ +extern void NetCopyEther(volatile unsigned char *, unsigned char *); + +/* Set ethernet header */ +extern void NetSetEther(volatile unsigned char *, unsigned char *, unsigned long); + +/* Set IP header */ +extern void NetSetIP(volatile unsigned char *, IPaddr_t, int, int, int); + +/* Checksum */ +extern int NetCksumOk(unsigned char *, int); /* Return true if cksum OK */ +extern unsigned NetCksum(unsigned char *, int); /* Calculate the checksum */ + +/* Set callbacks */ +extern void NetSetHandler(rxhand_f *); /* Set RX packet handler */ +extern void NetSetTimeout(int, thand_f *); /* Set timeout handler */ + +/* Transmit "NetTxPacket" */ +extern void NetSendPacket(volatile unsigned char *, int); + +/* Processes a received packet */ +extern void NetReceive(volatile unsigned char *, int); + +/* Print an IP address on the console */ +extern void print_IPaddr (IPaddr_t); + +/* Convert an IP address to a string */ +extern void ip_to_string (IPaddr_t x, char *s); + +/* read an IP address from a environment variable */ +extern IPaddr_t getenv_IPaddr (char *); + +/* copy a filename (allow for "..." notation, limit length) */ +extern void copy_filename (unsigned char *dst, unsigned char *src, int size); + +/* converts IP from unsigned long to string */ +extern char *inet_ntoa(unsigned long); +extern unsigned long inet_aton(const char *); + +/**********************************************************************/ + +#endif /* __NET_H__ */
trunk/soc/sw/orpmon/include/net.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/board.h =================================================================== --- trunk/soc/sw/orpmon/include/board.h (nonexistent) +++ trunk/soc/sw/orpmon/include/board.h (revision 20) @@ -0,0 +1,138 @@ +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#define CFG_IN_FLASH 1 +#define MC_ENABLED 1 + +//LAN controller +//#define SMC91111_LAN 1 +#define OC_LAN 1 + +/* BOARD + * 0 - bender + * 1 - marvin + */ +#define BOARD 1 + +#if BOARD==0 +// Nibbler on bender1 + +# define IC_ENABLE 1 +# define IC_SIZE 4096 +# define DC_ENABLE 1 +# define DC_SIZE 2048 +# define FLASH_BASE_ADDR 0xf0000000 +# define FLASH_SIZE 0x02000000 +# define FLASH_BLOCK_SIZE 0x00020000 +# define START_ADD 0x0 +# define CONFIG_OR32_MC_VERSION 2 +# define IN_CLK 25000000 +# define BOARD_DEF_NAME "bender" +// Flash Organization on board +// FLASH_ORG_XX_Y +// where XX - flash bit size +// Y - number of parallel devices connected +# define FLASH_ORG_16_1 1 +#elif BOARD==1 +//Marvin + +# define IC_ENABLE 0 +# define IC_SIZE 8192 +# define DC_ENABLE 0 +# define DC_SIZE 8192 +# define FLASH_BASE_ADDR 0xf0000000 +# define FLASH_SIZE 0x04000000 +# define FLASH_BLOCK_SIZE 0x00040000 +# define START_ADD 0x0 +# define CONFIG_OR32_MC_VERSION 1 +/*# define IN_CLK 100000000*/ +# define IN_CLK 50000000 +# define FLASH_ORG_16_2 1 +# define BOARD_DEF_NAME "marvin" +#else + +//Custom Board +# define IC_ENABLE 0 +# define IC_SIZE 8192 +# define DC_ENABLE 0 +# define DC_SIZE 8192 +# define FLASH_BASE_ADDR 0xf0000000 +# define FLASH_SIZE 0x04000000 +# define FLASH_BLOCK_SIZE 0x00040000 +# define START_ADD 0x0 +# define CONFIG_OR32_MC_VERSION 1 +# define IN_CLK 25000000 +# define FLASH_ORG_16_2 1 +# define BOARD_DEF_NAME "custom" + +#endif + +#define UART_BAUD_RATE 115200 + +#define TICKS_PER_SEC 100 + +#define STACK_SIZE 0x10000 + +#if CONFIG_OR32_MC_VERSION==1 +// Marvin, Bender MC +# include "mc-init-1.h" +#elif CONFIG_OR32_MC_VERSION==2 +// Highland MC +# include "mc-init-2.h" +#else +# error "no memory controler chosen" +#endif + +#define UART_BASE 0x90000000 +#define UART_IRQ 2 +#define ETH_BASE 0x92000000 +#define ETH_IRQ 4 +#define MC_BASE_ADDR 0x93000000 +#define SPI_BASE 0xb9000000 +#define CRT_BASE_ADDR 0x97000000 +#define ATA_BASE_ADDR 0x9e000000 +#define KBD_BASE_ADD 0x94000000 +#define KBD_IRQ 5 + +#define SANCHO_BASE_ADD 0x98000000 +#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */ + +#if 1 +#define BOARD_DEF_IP 0x0100002a /* 1.0.0.42 */ +#define BOARD_DEF_MASK 0xffffff00 /* 255.255.255.0 */ +#define BOARD_DEF_GW 0x01000001 /* 1.0.0.1 */ +#define BOARD_DEF_TBOOT_SRVR "1.0.0.66" +#else +#define BOARD_DEF_IP 0x0aed012a /* 10.237.1.42 */ +#define BOARD_DEF_MASK 0xffffff00 /* 255.255.255.0 */ +#define BOARD_DEF_GW 0x0aed0101 /* 10.0.0.1 */ +#define BOARD_DEF_TBOOT_SRVR "10.237.1.27" +#endif + + +#define ETH_MACADDR0 0x00 +#define ETH_MACADDR1 0x12 +#define ETH_MACADDR2 0x34 +#define ETH_MACADDR3 0x56 +#define ETH_MACADDR4 0x78 +#define ETH_MACADDR5 0x9a + +#define CRT_ENABLED 1 +#define FB_BASE_ADDR 0xa8000000 + +/* Whether online help is available -- saves space */ +#define HELP_ENABLED 1 + +/* Whether self check is enabled */ +#define SELF_CHECK 0 + +/* Whether we have keyboard suppport */ +#define KBD_ENABLED 1 + +/* Keyboard buffer size */ +#define KBDBUF_SIZE 256 + +/* Which console is used (CT_NONE, CT_SIM, CT_UART, CT_CRT) */ +#define CONSOLE_TYPE CT_UART + +#endif
trunk/soc/sw/orpmon/include/board.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/include/common.h =================================================================== --- trunk/soc/sw/orpmon/include/common.h (nonexistent) +++ trunk/soc/sw/orpmon/include/common.h (revision 20) @@ -0,0 +1,113 @@ +#ifndef _COMMON_H_ +#define _COMMON_H_ + +#include "board.h" + +/* max number of images saved in flash */ +#ifndef MAX_IMAGES +#define MAX_IMAGES 40 +#endif + +#ifdef DEBUG +#define debug(fmt,args...) printf (fmt ,##args) +#else +#define debug(fmt,args...) __printf (fmt ,##args) +#endif + +/* A Board Information structure that is given to a program when + * ppcboot starts it up. */ +typedef struct bd_info { + enum bi_console_type_t { + CT_NONE, + CT_UART, + CT_CRT, + CT_SIM, + } bi_console_type; + unsigned long bi_memstart; /* start of DRAM memory */ + unsigned long bi_memsize; /* size of DRAM memory in bytes */ + unsigned long bi_flashstart; /* start of FLASH memory */ + unsigned long bi_flashsize; /* size of FLASH memory */ + unsigned long bi_flashoffset; /* reserved area for startup monitor */ + unsigned long bi_sramstart; /* start of SRAM memory */ + unsigned long bi_sramsize; /* size of SRAM memory */ + unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ + unsigned long bi_ip_addr; /* IP Address */ + unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ + unsigned long bi_intfreq; /* Internal Freq, in MHz */ + unsigned long bi_busfreq; /* Bus Freq, in MHz */ + unsigned long bi_baudrate; /* Console Baudrate */ +} bd_t; + +typedef struct { + unsigned long src_addr; + unsigned long dst_addr; + unsigned long start_addr; + unsigned long length; + unsigned long ip; + unsigned long gw_ip; + unsigned long mask; + unsigned long srv_ip; + unsigned char eth_add[6]; + unsigned long erase_method; /* 0 = do not erase, 1 = fully, 2 = as needed */ +} global_struct; + + +/* structure for command interpreter */ +typedef struct { + const char *name; + const char *params; + const char *help; + int (*func)(int argc, char *argv[]); +} command_struct; + +typedef struct { + unsigned long eth_ip; + unsigned long eth_mask; + unsigned long eth_gw; + unsigned long tftp_srv_ip; + char tftp_filename[64]; + unsigned long img_number; + unsigned long img_start_addr[MAX_IMAGES]; + unsigned long img_length[MAX_IMAGES]; +} flash_cfg_struct; + +extern bd_t bd; +extern global_struct global; + +/* stdio */ +extern int getc (void); +extern int testc (void); +extern int ctrlc (void); +extern void putc (const char c); +extern int printf (const char *fmt, ...); + +extern unsigned long parse_ip (char *ip); + +/* simulator stdout */ +extern void __printf (const char *fmt, ...); + +/* Reports a 32bit value to the simulator */ +extern void report(unsigned long value); + +/* Commands stuff */ +#if HELP_ENABLED +#define register_command(name,params,help,funct) register_command_func (name, params, help, funct) +#else /* !HELP_ENABLED */ +#define register_command(name,params,help,funct) register_command_func (name, "", "", funct) +#endif /* HELP_ENABLED */ + +extern void register_command_func (const char *name, const char *params, const char *help, int (*func)(int argc, char *argv[])); + +/* Redirects console */ +extern void change_console_type (enum bi_console_type_t con_type); + +/* OR1k specific */ +/* For writing into SPR. */ +extern void mtspr(unsigned long spr, unsigned long value); + +/* For reading SPR. */ +extern unsigned long mfspr(unsigned long spr); + + +#endif /* _COMMON_H_ */ +
trunk/soc/sw/orpmon/include/common.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/modem.c =================================================================== --- trunk/soc/sw/orpmon/services/modem.c (nonexistent) +++ trunk/soc/sw/orpmon/services/modem.c (revision 20) @@ -0,0 +1,242 @@ +#include "common.h" +#include "support.h" +#include "net.h" +#include "uart.h" +#include "spr_defs.h" +#include "flash.h" + +#define SOH 0x01 +#define STX 0x02 +#define EOT 0x04 +#define ACK 0x06 +#define NAK 0x15 +#define CAN 0x18 +#define C 0x43 + +#define CPMEOF 0x1A + +#define RETRY 10 +#define TIMEOUT 3 + +/* update CRC */ +unsigned short +updcrc(register int c, register unsigned int crc) +{ + register int count; + + for (count=8; --count>=0;) { + if (crc & 0x8000) { + crc <<= 1; + crc += (((c<<=1) & 0400) != 0); + crc ^= 0x1021; + } + else { + crc <<= 1; + crc += (((c<<=1) & 0400) != 0); + } + } + return crc; +} + + +static thand_f *mTimeHandler; +static unsigned long mTimeValue; +static int mTimeoutCount; + +static unsigned long src_addr; + +unsigned int length; +unsigned int modemMode = 0, bLen = 128; +unsigned short mycrc; +unsigned long bno = 0; + +static void mStartTimeout(void); + +void +mSetTimeout(int iv, thand_f *f) +{ + if(iv == 0) + mTimeHandler = (thand_f *)0; + else { + mTimeHandler = f; + mTimeValue = get_timer(0) + iv; + } +} + +static void +mStartTimeout(void) +{ + if(++mTimeoutCount >= RETRY) { + printf("...retry counter exceeded, quitting...\n"); + return; + } else { + printf("."); + mSetTimeout(TIMEOUT * TICKS_PER_SEC, mStartTimeout); + uart_putc(C); + + } +} + +static void +mReceiveTimeout(void) +{ + if(++mTimeoutCount >= RETRY) { + uart_putc(NAK); + printf("..."); + return; + } else { + mSetTimeout(TIMEOUT * TICKS_PER_SEC, mReceiveTimeout); + uart_putc(NAK); + } +} + +int +getBlock(unsigned char t) +{ + unsigned int i = 0, j = 0; + unsigned char mybuf[133]; + unsigned char bNo, nBno; + unsigned long dst_addr; + + unsigned char flags; + flags = UART_LSR_FE | UART_LSR_PE | UART_LSR_OE | UART_LSR_BI; /*frame,parity,overrun errors */ + + mycrc = 0; + + switch(t) { + case SOH: + for(i = 0; i < 132; i++) { + if((REG8(UART_BASE + UART_LSR) & flags) == flags) { + uart_putc(CAN); + } + mybuf[i] = uart_getc(); + } + + bNo = mybuf[0]; /* packet id */ + nBno = mybuf[1]; /* neg. packet id */ + + if((bNo == 0x00) && (nBno == 0xff) && (bno == 0)) { /* start block */ + modemMode = 2; /* ymodem */ + uart_putc(ACK); + uart_putc(C); + return 1; + } + else if((0xff-bNo) == nBno) { /* data block */ + for(i = 2, j = 0; i < 130; i++, j++) { + length++; + mycrc = updcrc(mybuf[i], mycrc); + dst_addr = src_addr+(bno*0x8000)+((bNo-1)*0x80)+j; + REG8(dst_addr) = mybuf[i]; + } + + mycrc = updcrc(mybuf[130], mycrc); + mycrc = updcrc(mybuf[131], mycrc); + + if(mycrc == 0) /* CRC match! */ { + uart_putc(ACK); + for(i=0;i < 128; i+=4) { + /* for(j=0; j<4; j++) { + tmp = tmp << 8; + tmp |= mybuf[i+j+2]; + } + dst_addr = src_addr+(bno*0x8000)+((bNo-1)*128)+i; + fl_word_program(dst_addr, tmp);*/ + } + if(bNo == 0xff) + bno++; + return 1; + } + else { + uart_putc(NAK); + return -1; + } + } + else { /* packet id didn't match neg packet id! */ + uart_putc(NAK); + return -1; + } + return 1; + break; + case EOT: + if(modemMode == 2) {/* ymodem */ + uart_putc(NAK); + if(uart_getc() == EOT) { + uart_putc(ACK); + uart_putc(C); + } + else + uart_putc(ACK); + } else /* zmodem */ + uart_putc(ACK); + + return 0; + break; + default: + /* Unknown header */ + uart_putc(NAK); + return -1; + } +} + +int +mGetData(unsigned long saddr) +{ + int retval = 1; + unsigned char c; + + length = 0; + src_addr = saddr; + modemMode = 1; + bno = 0; + + printf("src_addr: 0x%lx\n", src_addr); + if(fl_init() != 0) { + printf("Flash init failed!\n"); + return(-1); + } + +#if 0 + printf("Unlocking flash..."); + for (i = 0, c = FLASH_BASE_ADDR; i < (FLASH_SIZE / FLASH_BLOCK_SIZE); + i++, c += FLASH_BLOCK_SIZE) + if (fl_unlock_one_block (c)) return 1; + printf("done\n"); + + printf("Erasing flash..."); + for (i = 0, c = FLASH_BASE_ADDR; i < (FLASH_SIZE / FLASH_BLOCK_SIZE); + i++, c += FLASH_BLOCK_SIZE) + if (fl_block_erase (c)) return 1; + printf ("done\n"); +#endif + printf("Waiting..."); + + mTimeoutCount = 0; + mSetTimeout(TIMEOUT * TICKS_PER_SEC, mStartTimeout); + + while(1) { + if(mTimeHandler && (get_timer(0) > mTimeValue)) { + thand_f *x; + x = mTimeHandler; + mTimeHandler = (thand_f *)0; + (*x)(); + } + c = uart_testc(); + if(c != 0) + break; + } + + while(retval != 0) { + retval = getBlock(c); + if(retval != 0) + c = uart_getc(); + } + + if(modemMode == 2) { + c = uart_getc(); + retval = getBlock(c); /* last 'dummy' block for YModem */ + printf("... protocol: YModem, "); + } + else + printf("... protocol: ZModem, "); + return length; +}
trunk/soc/sw/orpmon/services/modem.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/tftp.h =================================================================== --- trunk/soc/sw/orpmon/services/tftp.h (nonexistent) +++ trunk/soc/sw/orpmon/services/tftp.h (revision 20) @@ -0,0 +1,21 @@ +/* + * LiMon - BOOTP/TFTP. + * + * Copyright 1994, 1995, 2000 Neil Russell. + * (See License) + */ + +#ifndef __TFTP_H__ +#define __TFTP_H__ + +/**********************************************************************/ +/* + * Global functions and variables. + */ + +/* tftp.c */ +extern void TftpStart (void); /* Begin TFTP get */ + +/**********************************************************************/ + +#endif /* __TFTP_H__ */
trunk/soc/sw/orpmon/services/tftp.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/arp.c =================================================================== --- trunk/soc/sw/orpmon/services/arp.c (nonexistent) +++ trunk/soc/sw/orpmon/services/arp.c (revision 20) @@ -0,0 +1,109 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include "common.h" +#include "support.h" +#include "net.h" +#include "bootp.h" +#include "tftp.h" +#include "arp.h" + +#define TIMEOUT 5 /* Seconds before trying ARP again */ +#define TIMEOUT_COUNT 1 /* # of timeouts before giving up */ + +static void ArpHandler(unsigned char *pkt, unsigned dest, unsigned src, unsigned len); +static void ArpTimeout(void); + +int ArpTry = 0; + +/* + * Handle a ARP received packet. + */ +static void +ArpHandler(unsigned char *pkt, unsigned dest, unsigned src, unsigned len) +{ + /* Check if the frame is really an ARP reply */ + if (memcmp (NetServerEther, NetBcastAddr, 6) != 0) { +#ifdef DEBUG + printf("Got good ARP - start TFTP\n"); +#endif + TftpStart (); + } +} + + +/* + * Timeout on ARP request. + */ +static void +ArpTimeout(void) +{ + if (ArpTry >= TIMEOUT_COUNT) { + printf("\nRetry count exceeded; starting again\n"); + NetStartAgain (); + } else { + NetSetTimeout (TIMEOUT * TICKS_PER_SEC, ArpTimeout); + ArpRequest (); + } +} + + +void +ArpRequest (void) +{ + int i; + volatile unsigned char *pkt; + ARP_t * arp; +#ifdef DEBUG + printf("ARP broadcast %d\n", ++ArpTry); +#endif + pkt = NetTxPacket; + + NetSetEther(pkt, NetBcastAddr, PROT_ARP); + pkt += ETHER_HDR_SIZE; + + arp = (ARP_t *)pkt; + + arp->ar_hrd = ARP_ETHER; + arp->ar_pro = PROT_IP; + arp->ar_hln = 6; + arp->ar_pln = 4; + arp->ar_op = ARPOP_REQUEST; + NetCopyEther(&arp->ar_data[0], NetOurEther); /* source ET addr */ + *(IPaddr_t *)(&arp->ar_data[6]) = NetOurIP; /* source IP addr */ + for (i=10; i<16; ++i) { + arp->ar_data[i] = 0; /* dest ET addr = 0 */ + } + + if((NetServerIP & NetOurSubnetMask) != (NetOurIP & NetOurSubnetMask)) { + *(IPaddr_t *)(&arp->ar_data[16]) = NetOurGatewayIP; + } else { + *((IPaddr_t *)(&(arp->ar_data[16]))) = NetServerIP; + } + + NetSendPacket(NetTxPacket, ETHER_HDR_SIZE + ARP_HDR_SIZE); + + NetSetTimeout(TIMEOUT * TICKS_PER_SEC, ArpTimeout); + NetSetHandler(ArpHandler); +} +
trunk/soc/sw/orpmon/services/arp.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/bootp.c =================================================================== --- trunk/soc/sw/orpmon/services/bootp.c (nonexistent) +++ trunk/soc/sw/orpmon/services/bootp.c (revision 20) @@ -0,0 +1,863 @@ +/* + * Based on LiMon - BOOTP. + * + * Copyright 1994, 1995, 2000 Neil Russell. + * (See License) + * Copyright 2000 Roland Borde + * Copyright 2000 Paolo Scaffardi + */ + +#if 0 +#define DEBUG 1 /* general debug */ +#define DEBUG_BOOTP_EXT 1 /* Debug received vendor fields */ +#endif + +#ifdef DEBUG_BOOTP_EXT +#define debug_ext(fmt,args...) printf (fmt ,##args) +#else +#define debug_ext(fmt,args...) +#endif + +#include "common.h" +#include "net.h" +#include "bootp.h" +#include "tftp.h" +#include "arp.h" + +#define BOOTP_VENDOR_MAGIC 0x63825363 /* RFC1048 Magic Cookie */ + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +#define TIMEOUT 5 /* Seconds before trying BOOTP again */ +#define TIMEOUT_COUNT 1 /* # of timeouts before giving up */ + +#define PORT_BOOTPS 67 /* BOOTP server UDP port */ +#define PORT_BOOTPC 68 /* BOOTP client UDP port */ + +#ifndef CONFIG_DHCP_MIN_EXT_LEN /* minimal length of extension list */ +#define CONFIG_DHCP_MIN_EXT_LEN 64 +#endif + +ulong BootpID; +int BootpTry; +#ifdef CONFIG_BOOTP_RANDOM_DELAY +ulong seed1, seed2; +#endif + +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) +dhcp_state_t dhcp_state = INIT; +unsigned int dhcp_leasetime = 0; +static void DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len); + +/* For Debug */ +char *dhcpmsg2str(int type) +{ + switch (type) { + case 1: return "DHCPDISCOVER"; break; + case 2: return "DHCPOFFER"; break; + case 3: return "DHCPREQUEST"; break; + case 4: return "DHCPDECLINE"; break; + case 5: return "DHCPACK"; break; + case 6: return "DHCPNACK"; break; + case 7: return "DHCPRELEASE"; break; + default: return "UNKNOWN/INVALID MSG TYPE"; break; + } +} + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX) +extern u8 *dhcp_vendorex_prep (u8 *e); /*rtn new e after add own opts. */ +extern u8 *dhcp_vendorex_proc (u8 *e); /*rtn next e if mine,else NULL */ +#endif + +#endif /* CFG_CMD_DHCP */ + +static int BootpCheckPkt(uchar *pkt, unsigned dest, unsigned src, unsigned len) +{ + Bootp_t *bp = (Bootp_t *) pkt; + int retval = 0; + + if (dest != PORT_BOOTPC || src != PORT_BOOTPS) + retval = -1; + if (len < sizeof (Bootp_t) - OPT_SIZE) + retval = -2; + if (bp->bp_op != OP_BOOTREQUEST && + bp->bp_op != OP_BOOTREPLY && + bp->bp_op != DHCP_OFFER && + bp->bp_op != DHCP_ACK && + bp->bp_op != DHCP_NAK ) { + retval = -3; + } + if (bp->bp_htype != HWT_ETHER) + retval = -4; + if (bp->bp_hlen != HWL_ETHER) + retval = -5; + if (bp->bp_id != BootpID) + retval = -6; + + debug ("Filtering pkt = %d\n", retval); + + return retval; +} + +/* + * Copy parameters of interest from BOOTP_REPLY/DHCP_OFFER packet + */ +void BootpCopyNetParams(Bootp_t *bp) +{ + NetOurIP = bp->bp_yiaddr; + NetServerIP = bp->bp_siaddr; + NetCopyEther(NetServerEther, ((Ethernet_t *)NetRxPkt)->et_src); + copy_filename (BootFile, bp->bp_file, sizeof(BootFile)); + + debug ("Bootfile: %s\n", BootFile); + + /* Propagate to environment: + * don't delete exising entry when BOOTP / DHCP reply does + * not contain a new value + */ + if (*BootFile) { + setenv ("bootfile", BootFile); + } +} + +static int truncate_sz (const char *name, int maxlen, int curlen) +{ + if (curlen >= maxlen) { + printf("*** WARNING: %s is too long (%d - max: %d) - truncated\n", + name, curlen, maxlen); + curlen = maxlen - 1; + } + return (curlen); +} + +#if !(CONFIG_COMMANDS & CFG_CMD_DHCP) + +static void BootpVendorFieldProcess(u8 *ext) +{ + int size = *(ext+1) ; + + debug_ext ("[BOOTP] Processing extension %d... (%d bytes)\n", *ext, *(ext+1)); + + NetBootFileSize = 0; + + switch (*ext) { + /* Fixed length fields */ + case 1: /* Subnet mask */ + if (NetOurSubnetMask == 0) + memcpy(&NetOurSubnetMask, ext+2, 4); + break; + case 2: /* Time offset - Not yet supported */ + break; + /* Variable length fields */ + case 3: /* Gateways list */ + if (NetOurGatewayIP == 0) { + memcpy(&NetOurGatewayIP, ext+2, 4); + } + break; + case 4: /* Time server - Not yet supported */ + break; + case 5: /* IEN-116 name server - Not yet supported */ + break; + case 6: + if (NetOurDNSIP == 0) { + memcpy(&NetOurDNSIP, ext+2, 4); + } + break; + case 7: /* Log server - Not yet supported */ + break; + case 8: /* Cookie/Quote server - Not yet supported */ + break; + case 9: /* LPR server - Not yet supported */ + break; + case 10: /* Impress server - Not yet supported */ + break; + case 11: /* RPL server - Not yet supported */ + break; + case 12: /* Host name */ + if (NetOurHostName[0] == 0) { + size = truncate_sz("Host Name", sizeof(NetOurHostName), size); + memcpy(&NetOurHostName, ext+2, size); + NetOurHostName[size] = 0 ; + } + break; + case 13: /* Boot file size */ + memcpy(&NetBootFileSize, ext+2, size); + break; + case 14: /* Merit dump file - Not yet supported */ + break; + case 15: /* Domain name - Not yet supported */ + break; + case 16: /* Swap server - Not yet supported */ + break; + case 17: /* Root path */ + if (NetOurRootPath[0] == 0) { + size = truncate_sz("Root Path", sizeof(NetOurRootPath), size); + memcpy(&NetOurRootPath, ext+2, size); + NetOurRootPath[size] = 0 ; + } + break; + case 18: /* Extension path - Not yet supported */ + /* + * This can be used to send the informations of the + * vendor area in another file that the client can + * access via TFTP. + */ + break; + /* IP host layer fields */ + case 40: /* NIS Domain name */ + if (NetOurNISDomain[0] == 0) { + size = truncate_sz ("NIS Domain Name", + sizeof(NetOurNISDomain), + size); + memcpy(&NetOurNISDomain, ext+2, size); + NetOurNISDomain[size] = 0 ; + } + break; + /* Application layer fields */ + case 43: /* Vendor specific info - Not yet supported */ + /* + * Binary informations to exchange specific + * product information. + */ + break; + /* Reserved (custom) fields (128..254) */ + } +} + +static void BootpVendorProcess(u8 *ext, int size) +{ + u8 *end = ext + size ; + + debug_ext ("[BOOTP] Checking extension (%d bytes)...\n", size); + + while ((ext < end) && (*ext != 0xff)) { + if (*ext == 0) { + ext ++ ; + } else { + u8 *opt = ext ; + ext += ext[1] + 2 ; + if (ext <= end) + BootpVendorFieldProcess (opt) ; + } + } + +#ifdef DEBUG_BOOTP_EXT + printf("[BOOTP] Received fields: \n"); + if (NetOurSubnetMask) { + puts ("NetOurSubnetMask : "); + print_IPaddr (NetOurSubnetMask); + putc('\n'); + } + + if (NetOurGatewayIP) { + puts ("NetOurGatewayIP : "); + print_IPaddr (NetOurGatewayIP); + putc('\n'); + } + + if (NetBootFileSize) { + printf("NetBootFileSize : %d\n", NetBootFileSize); + } + + if (NetOurHostName[0]) { + printf("NetOurHostName : %s\n", NetOurHostName); + } + + if (NetOurRootPath[0]) { + printf("NetOurRootPath : %s\n", NetOurRootPath); + } + + if (NetOurNISDomain[0]) { + printf("NetOurNISDomain : %s\n", NetOurNISDomain); + } +#endif /* DEBUG_BOOTP_EXT */ +} + +/* + * Handle a BOOTP received packet. + */ +static void +BootpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len) +{ + Bootp_t *bp; + char *s; + + debug ("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%d)\n", + src, dest, len, sizeof (Bootp_t)); + + bp = (Bootp_t *)pkt; + + if (BootpCheckPkt(pkt, dest, src, len)) /* Filter out pkts we don't want */ + return; + + /* + * Got a good BOOTP reply. Copy the data into our variables. + */ +#ifdef CONFIG_STATUS_LED + status_led_set (STATUS_LED_BOOT, STATUS_LED_OFF); +#endif + + BootpCopyNetParams(bp); /* Store net parameters from reply */ + + /* Retrieve extended informations (we must parse the vendor area) */ + if ((*(uint *)bp->bp_vend) == BOOTP_VENDOR_MAGIC) + BootpVendorProcess(&bp->bp_vend[4], len); + + NetSetTimeout(0, (thand_f *)0); + + debug ("Got good BOOTP\n"); + + if (((s = getenv("autoload")) != NULL) && (*s == 'n')) { + /* + * Just use BOOTP to configure system; + * Do not use TFTP to load the bootfile. + */ + NetState = NETLOOP_SUCCESS; + return; + } + + /* Send ARP request to get TFTP server ethernet address. + * This automagically starts TFTP, too. + */ + ArpRequest(); +} +#endif /* !CFG_CMD_DHCP */ + +/* + * Timeout on BOOTP/DHCP request. + */ +static void +BootpTimeout(void) +{ + if (BootpTry >= TIMEOUT_COUNT) { + puts ("\nRetry count exceeded; starting again\n"); + NetStartAgain (); + } else { + NetSetTimeout (TIMEOUT * CFG_HZ, BootpTimeout); + BootpRequest (); + } +} + +/* + * Initialize BOOTP extension fields in the request. + */ +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) +static int DhcpExtended(u8 *e, int message_type, IPaddr_t ServerID, IPaddr_t RequestedIP) +{ + u8 *start = e ; + u8 *cnt; +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX) + u8 *x; +#endif + + *e++ = 99; /* RFC1048 Magic Cookie */ + *e++ = 130; + *e++ = 83; + *e++ = 99; + + *e++ = 53; /* DHCP Message Type */ + *e++ = 1; + *e++ = message_type; + + *e++ = 57; /* Maximum DHCP Message Size */ + *e++ = 2; + *e++ = (576-312+OPT_SIZE) >> 8; + *e++ = (576-312+OPT_SIZE) & 0xff; + + if ( ServerID ) { + *e++ = 54; /* ServerID */ + *e++ = 4; + *e++ = ServerID >> 24; + *e++ = ServerID >> 16; + *e++ = ServerID >> 8; + *e++ = ServerID & 0xff; + } + + if ( RequestedIP ) { + *e++ = 50; /* Requested IP */ + *e++ = 4; + *e++ = RequestedIP >> 24; + *e++ = RequestedIP >> 16; + *e++ = RequestedIP >> 8; + *e++ = RequestedIP & 0xff; + } + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX) + if ((x = dhcp_vendorex_prep (e))) + return x - start ; +#endif + + *e++ = 55; /* Parameter Request List */ + cnt = e++; /* Pointer to count of requested items */ + *cnt = 0; +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_SUBNETMASK) + *e++ = 1; /* Subnet Mask */ + *cnt += 1; +#endif +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_GATEWAY) + *e++ = 3; /* Router Option */ + *cnt += 1; +#endif +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS) + *e++ = 6; /* DNS Server(s) */ + *cnt += 1; +#endif +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_HOSTNAME) + *e++ = 12; /* Hostname */ + *cnt += 1; +#endif +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTFILESIZE) + *e++ = 13; /* Boot File Size */ + *cnt += 1; +#endif +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTPATH) + *e++ = 17; /* Boot path */ + *cnt += 1; +#endif +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_NISDOMAIN) + *e++ = 40; /* NIS Domain name request */ + *cnt += 1; +#endif + *e++ = 255; /* End of the list */ + + /* Pad to minimal length */ +#ifdef CONFIG_DHCP_MIN_EXT_LEN + while ((e - start) <= CONFIG_DHCP_MIN_EXT_LEN) + *e++ = 0; +#endif + + return e - start ; +} + +#else /* CFG_CMD_DHCP */ +/* + * Warning: no field size check - change CONFIG_BOOTP_MASK at your own risk! + */ +static int BootpExtended (u8 *e) +{ + u8 *start = e ; + + *e++ = 99; /* RFC1048 Magic Cookie */ + *e++ = 130; + *e++ = 83; + *e++ = 99; + +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) + *e++ = 53; /* DHCP Message Type */ + *e++ = 1; + *e++ = DHCP_DISCOVER; + + *e++ = 57; /* Maximum DHCP Message Size */ + *e++ = 2; + *e++ = (576-312+OPT_SIZE) >> 16; + *e++ = (576-312+OPT_SIZE) & 0xff; +#endif /* CFG_CMD_DHCP */ + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_SUBNETMASK) + *e++ = 1; /* Subnet mask request */ + *e++ = 4; + e += 4; +#endif + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_GATEWAY) + *e++ = 3; /* Default gateway request */ + *e++ = 4; + e += 4; +#endif + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS) + *e++ = 6; /* Domain Name Server */ + *e++ = 4; + e += 4; +#endif + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_HOSTNAME) + *e++ = 12; /* Host name request */ + *e++ = 32; + e += 32; +#endif + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTFILESIZE) + *e++ = 13; /* Boot file size */ + *e++ = 2; + e += 2; +#endif + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTPATH) + *e++ = 17; /* Boot path */ + *e++ = 32; + e += 32; +#endif + +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_NISDOMAIN) + *e++ = 40; /* NIS Domain name request */ + *e++ = 32; + e += 32; +#endif + + *e++ = 255; /* End of the list */ + + return e - start ; +} +#endif /* CFG_CMD_DHCP */ + +void +BootpRequest (void) +{ + volatile uchar *pkt, *iphdr; + Bootp_t *bp; + int ext_len, pktlen, iplen; + +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) + dhcp_state = INIT; +#endif + +#ifdef CONFIG_BOOTP_RANDOM_DELAY /* Random BOOTP delay */ + unsigned char bi_enetaddr[6]; + int reg; + char *e,*s; + uchar tmp[64]; + ulong tst1, tst2, sum, m_mask, m_value = 0; + + if (BootpTry ==0) { + /* get our mac */ + reg = getenv_r ("ethaddr", tmp, sizeof(tmp)); + s = (reg > 0) ? tmp : NULL; + + for (reg=0; reg<6; ++reg) { + bi_enetaddr[reg] = s ? simple_strtoul(s, &e, 16) : 0; + if (s) { + s = (*e) ? e+1 : e; + } + } +#ifdef DEBUG + printf("BootpRequest => Our Mac: "); + for (reg=0; reg<6; reg++) { + printf ("%x%c", + bi_enetaddr[reg], + reg==5 ? '\n' : ':'); + } +#endif /* DEBUG */ + + /* Mac-Manipulation 2 get seed1 */ + tst1=0; + tst2=0; + for (reg=2; reg<6; reg++) { + tst1 = tst1 << 8; + tst1 = tst1 | bi_enetaddr[reg]; + } + for (reg=0; reg<2; reg++) { + tst2 = tst2 | bi_enetaddr[reg]; + tst2 = tst2 << 8; + } + + seed1 = tst1^tst2; + + /* Mirror seed1*/ + m_mask=0x1; + for (reg=1;reg<=32;reg++) { + m_value |= (m_mask & seed1); + seed1 = seed1 >> 1; + m_value = m_value << 1; + } + seed1 = m_value; + seed2 = 0xB78D0945; + } + + /* Random Number Generator */ + + for (reg=0;reg<=0;reg++) { + sum = seed1 + seed2; + if (sum < seed1 || sum < seed2) + sum++; + seed2 = seed1; + seed1 = sum; + + if (BootpTry<=2) { /* Start with max 1024 * 1ms */ + sum = sum >> (22-BootpTry); + } else { /*After 3rd BOOTP request max 8192 * 1ms */ + sum = sum >> 19; + } + } + + printf ("Random delay: %ld ms...\n", sum); + for (reg=0; reg bp_op = OP_BOOTREQUEST; + bp->bp_htype = HWT_ETHER; + bp->bp_hlen = HWL_ETHER; + bp->bp_hops = 0; + bp->bp_secs = SWAP16( get_timer(0) / CFG_HZ); + bp->bp_ciaddr = 0; + bp->bp_yiaddr = 0; + bp->bp_siaddr = 0; + bp->bp_giaddr = 0; + NetCopyEther(bp->bp_chaddr, NetOurEther); + copy_filename (bp->bp_file, BootFile, sizeof(bp->bp_file)); + + /* Request additional information from the BOOTP/DHCP server */ +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) + ext_len = DhcpExtended(bp->bp_vend, DHCP_DISCOVER, 0, 0); +#else + ext_len = BootpExtended(bp->bp_vend); +#endif /* CFG_CMD_DHCP */ + + /* + * Bootp ID is the lower 4 bytes of our ethernet address + * plus the current time in HZ. + */ + BootpID = ((ulong)NetOurEther[2] << 24) + | ((ulong)NetOurEther[3] << 16) + | ((ulong)NetOurEther[4] << 8) + | (ulong)NetOurEther[5]; + BootpID += get_timer(0); + bp->bp_id = BootpID; + + /* + * Calculate proper packet lengths taking into account the + * variable size of the options field + */ + pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + ext_len; + iplen = BOOTP_HDR_SIZE - sizeof(bp->bp_vend) + ext_len; + NetSetIP(iphdr, 0xffffffffL, PORT_BOOTPS, PORT_BOOTPC, iplen); + NetSetTimeout(SELECT_TIMEOUT * CFG_HZ, BootpTimeout); + +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) + dhcp_state = SELECTING; + NetSetHandler(DhcpHandler); +#else + NetSetHandler(BootpHandler); +#endif /* CFG_CMD_DHCP */ + NetSendPacket(NetTxPacket, pktlen); +} + +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) +void DhcpOptionsProcess(char *popt) +{ + char *end = popt + BOOTP_HDR_SIZE; + int oplen, size; + + while ( popt < end && *popt != 0xff ) { + oplen = *(popt + 1); + switch(*popt) { + case 1: + NetOurSubnetMask = *(IPaddr_t *)(popt + 2); + break; + case 3: + NetOurGatewayIP = *(IPaddr_t *)(popt + 2); + break; + case 6: + NetOurDNSIP = *(IPaddr_t *)(popt +2); + break; + case 12: + size = truncate_sz ("Host Name", + sizeof(NetOurHostName), + oplen); + memcpy(&NetOurHostName, popt+2, size); + NetOurHostName[size] = 0 ; + break; + case 15: /* Ignore Domain Name Option */ + break; + case 17: + size = truncate_sz ("Root Path", + sizeof(NetOurRootPath), + oplen); + memcpy(&NetOurRootPath, popt+2, size); + NetOurRootPath[size] = 0 ; + break; + case 51: + dhcp_leasetime = *(unsigned int *)(popt + 2); + break; + case 53: /* Ignore Message Type Option */ + break; + case 54: + NetServerIP = *(IPaddr_t *)(popt+2); + break; + case 58: /* Ignore Renewal Time Option */ + break; + case 59: /* Ignore Rebinding Time Option */ + break; + default: +#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX) + if (dhcp_vendorex_proc(popt)) + break; +#endif + printf("*** Unhandled DHCP Option in OFFER/ACK: %d\n", + *popt); + break; + } + popt += oplen + 2; /* Process next option */ + } +} + +static int DhcpMessageType(unsigned char *popt) +{ + if ((*(uint *)popt) != BOOTP_VENDOR_MAGIC) + return -1; + + popt += 4; + while ( *popt != 0xff ) { + if ( *popt == 53 ) /* DHCP Message Type */ + return *(popt + 2); + popt += *(popt + 1) + 2; /* Scan through all options */ + } + return -1; +} + +void DhcpSendRequestPkt(Bootp_t *bp_offer) +{ + volatile uchar *pkt, *iphdr; + Bootp_t *bp; + int pktlen, iplen, extlen; + + debug ("DhcpSendRequestPkt: Sending DHCPREQUEST\n"); + pkt = NetTxPacket; + memset ((void*)pkt, 0, PKTSIZE); + + NetSetEther(pkt, NetBcastAddr, PROT_IP); + pkt += ETHER_HDR_SIZE; + + iphdr = pkt; /* We'll need this later to set proper pkt size */ + pkt += IP_HDR_SIZE; + + bp = (Bootp_t *)pkt; + bp->bp_op = OP_BOOTREQUEST; + bp->bp_htype = HWT_ETHER; + bp->bp_hlen = HWL_ETHER; + bp->bp_hops = 0; + bp->bp_secs = SWAP16( get_timer(0) / CFG_HZ); + bp->bp_ciaddr = bp_offer->bp_ciaddr; + bp->bp_yiaddr = bp_offer->bp_yiaddr; + bp->bp_siaddr = bp_offer->bp_siaddr; + bp->bp_giaddr = bp_offer->bp_giaddr; + NetCopyEther(bp->bp_chaddr, NetOurEther); + + /* + * ID is the id of the OFFER packet + */ + + bp->bp_id = bp_offer->bp_id; + + /* + * Copy options from OFFER packet if present + */ + extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetServerIP, bp->bp_yiaddr); + + pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen; + iplen = BOOTP_HDR_SIZE - sizeof(bp->bp_vend) + extlen; + NetSetIP(iphdr, 0xffffffffL, PORT_BOOTPS, PORT_BOOTPC, iplen); + + debug ("Transmitting DHCPREQUEST packet: len = %d\n", pktlen); + NetSendPacket(NetTxPacket, pktlen); +} + +/* + * Handle DHCP received packets. + */ +static void +DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len) +{ + Bootp_t *bp = (Bootp_t *)pkt; + + debug ("DHCPHandler: got packet: (src=%d, dst=%d, len=%d) state: %d\n", + src, dest, len, dhcp_state); + + if (BootpCheckPkt(pkt, dest, src, len)) /* Filter out pkts we don't want */ + return; + + debug ("DHCPHandler: got DHCP packet: (src=%d, dst=%d, len=%d) state: %d\n", + src, dest, len, dhcp_state); + + switch (dhcp_state) { + case SELECTING: + /* + * Wait an appropriate time for any potential DHCPOFFER packets + * to arrive. Then select one, and generate DHCPREQUEST response. + * If filename is in format we recognize, assume it is a valid + * OFFER from a server we want. + */ + debug ("DHCP: state=SELECTING bp_file: \"%s\"\n", bp->bp_file); +#ifdef CFG_BOOTFILE_PREFIX + if (strncmp(bp->bp_file, + CFG_BOOTFILE_PREFIX, + strlen(CFG_BOOTFILE_PREFIX)) == 0 ) { +#endif /* CFG_BOOTFILE_PREFIX */ + + debug ("TRANSITIONING TO REQUESTING STATE\n"); + dhcp_state = REQUESTING; +#if 0 + if ((*(uint *)bp->bp_vend) == BOOTP_VENDOR_MAGIC) + DhcpOptionsProcess(&bp->bp_vend[4]); + +#endif + BootpCopyNetParams(bp); /* Store net params from reply */ + + NetSetTimeout(TIMEOUT * CFG_HZ, BootpTimeout); + DhcpSendRequestPkt(bp); +#ifdef CFG_BOOTFILE_PREFIX + } +#endif /* CFG_BOOTFILE_PREFIX */ + + return; + break; + case REQUESTING: + debug ("DHCP State: REQUESTING\n"); + + if ( DhcpMessageType(bp->bp_vend) == DHCP_ACK ) { + char *s; + + if ((*(uint *)bp->bp_vend) == BOOTP_VENDOR_MAGIC) + DhcpOptionsProcess(&bp->bp_vend[4]); + BootpCopyNetParams(bp); /* Store net params from reply */ + dhcp_state = BOUND; + printf("DHCP client bound to address "); + print_IPaddr(NetOurIP); + printf("\n"); + + /* Obey the 'autoload' setting */ + if (((s = getenv("autoload")) != NULL) && (*s == 'n')) { + NetState = NETLOOP_SUCCESS; + return; + } + /* Send ARP request to get TFTP server ethernet address. + * This automagically starts TFTP, too. + */ + ArpRequest(); + return; + } + break; + default: + printf("DHCP: INVALID STATE\n"); + break; + } + +} + +void DhcpRequest(void) +{ + BootpRequest(); +} +#endif /* CFG_CMD_DHCP */ + +#endif /* CFG_CMD_NET */
trunk/soc/sw/orpmon/services/bootp.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/rarp.c =================================================================== --- trunk/soc/sw/orpmon/services/rarp.c (nonexistent) +++ trunk/soc/sw/orpmon/services/rarp.c (revision 20) @@ -0,0 +1,101 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include "common.h" +#include "net.h" +#include "bootp.h" +#include "rarp.h" +#include "tftp.h" + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + +#define TIMEOUT 5 /* Seconds before trying BOOTP again */ +#define TIMEOUT_COUNT 1 /* # of timeouts before giving up */ + + +int RarpTry; + +/* + * Handle a RARP received packet. + */ +static void +RarpHandler(uchar * dummi0, unsigned dummi1, unsigned dummi2, unsigned dummi3) +{ +#ifdef DEBUG + printf("Got good RARP\n"); +#endif + TftpStart (); +} + + +/* + * Timeout on BOOTP request. + */ +static void +RarpTimeout(void) +{ + if (RarpTry >= TIMEOUT_COUNT) { + puts ("\nRetry count exceeded; starting again\n"); + NetStartAgain (); + } else { + NetSetTimeout (TIMEOUT * CFG_HZ, RarpTimeout); + RarpRequest (); + } +} + + +void +RarpRequest (void) +{ + int i; + volatile uchar *pkt; + ARP_t * rarp; + + printf("RARP broadcast %d\n", ++RarpTry); + pkt = NetTxPacket; + + NetSetEther(pkt, NetBcastAddr, PROT_RARP); + pkt += ETHER_HDR_SIZE; + + rarp = (ARP_t *)pkt; + + rarp->ar_hrd = ARP_ETHER; + rarp->ar_pro = PROT_IP; + rarp->ar_hln = 6; + rarp->ar_pln = 4; + rarp->ar_op = RARPOP_REQUEST; + NetCopyEther(&rarp->ar_data[0], NetOurEther); /* source ET addr */ + *(IPaddr_t *)(&rarp->ar_data[6]) = NetOurIP; /* source IP addr */ + NetCopyEther(&rarp->ar_data[10], NetOurEther); /* dest ET addr = source ET addr ??*/ + /* dest. IP addr set to broadcast */ + for (i = 0; i <= 3; i++) { + rarp->ar_data[16 + i] = 0xff; + } + + NetSendPacket(NetTxPacket, ETHER_HDR_SIZE + ARP_HDR_SIZE); + + NetSetTimeout(TIMEOUT * CFG_HZ, RarpTimeout); + NetSetHandler(RarpHandler); +} + +#endif /* CFG_CMD_NET */
trunk/soc/sw/orpmon/services/rarp.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/dos.c =================================================================== --- trunk/soc/sw/orpmon/services/dos.c (nonexistent) +++ trunk/soc/sw/orpmon/services/dos.c (revision 20) @@ -0,0 +1,231 @@ +/* + dos.c -- provides simple access to FAT (dos) partitions + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + +//#include "common.h" + +#include +#include +#include "dos.h" +#include "ata.h" + + +/* + D O S _ O P E N +*/ +int dos_open(struct dosparam *params) +{ + int error, start_sector, partition; + unsigned char buf[512]; + + struct inode *inode = ¶ms->inode; + struct file *filp = ¶ms->filp; + struct request *request = ¶ms->request; + + if( (error = ata_open(inode, filp)) ) + return error; + + + /* device opened, read MBR */ + request->cmd = READ; + request->sector = 0; + request->nr_sectors = 1; + request->buffer = buf; + + /* skip bootload (446) bytes */ + /* currently only support the first partition (partition 4) */ + /* This is OK, because CompactFLASH devices only have 1 partition */ + if ( (error = ata_request(inode, filp, request)) ) + return error; + + partition = 0; /* first partition */ + partition *= 16; /* 16 bytes per partition table */ + partition += 446; /* skip bootloader, go to partition table */ + start_sector = buf[partition +11] << 24 | + buf[partition +10] << 16 | + buf[partition +9] << 8 | + buf[partition +8]; + + /* device opened, read boot-sector */ + request->cmd = READ; + request->sector = start_sector; + request->nr_sectors = 1; + request->buffer = buf; + + if ( (error = ata_request(inode, filp, request)) ) + return error; + + /* get the necessary data from the boot-sector */ + params->bytes_per_sector = (buf[12]<<8) | buf[11]; + params->fats = buf[16]; + params->sectors_per_fat = (buf[23]<<8) | buf[22]; + params->root_entries = (buf[18]<<8) | buf[17]; + params->sectors_per_cluster = buf[13]; + + + /* set start of current directory to start of root-directory */ + params->ssector = start_sector + params->fats * params->sectors_per_fat +1; + + /* set current sector to start of root-directory */ + params->csector = params->ssector; + + /* set start-entry number */ + params->sentry = 0; + + return 0; +} + +/* + D O S _ R E L E A S E +*/ +int dos_release(struct dosparam *params) +{ + return 0; +} + +/* + D O S _ N A M E C M P +*/ +int dos_namecmp(const char *sname, const char *name, const char *ext) +{ + char fname[9], fext[4], *p; + + /* filename : */ + /* copy the filename */ + strncpy(fname, sname, 8); + + /* check if we copied the '.' already, if so terminate string */ + if ( (p = strchr(fname, '.')) ) + *p = '\0'; + + /* fill remaining chars with ' ' */ + strncat(fname, " ", 8-strlen(fname) ); + + fname[9] = '\0'; + + /* file-extension */ + /* search for the '.' in the filename */ + if ( (p = strchr(sname, '.')) ) + strncpy(fext, p, 3); + else + fext[0] = fext[1] = fext[2] = ' '; + + fext[4] = '\0'; + + return ( strcmp(fname, name) && strcmp(fext, ext) ); +} + + +/* + D O S _ D I R _ F I N D _ E N T R Y +*/ +struct dos_dir_entry *dos_dir_find_entry(struct dosparam *params, const char *name) +{ + struct dos_dir_entry *entry; + unsigned long entry_no = 0; + + /* go to start of current directory */ + if (params->csector != params->ssector) + dos_dir_cluster_reset(params); + + /* search for the requested entry */ + while ( (entry = dos_dir_get_entry(params, entry_no)) && dos_namecmp(name, entry->name, entry->ext) ) + entry_no++; + + return entry; +} + + +/* + D O S _ D I R _ G E T _ E N T R Y +*/ +struct dos_dir_entry *dos_dir_get_entry(struct dosparam *params, unsigned long entry) +{ + char *buf = params->cbuf; + + if (entry < params->sentry) + buf = dos_dir_cluster_reset(params); + + while ( entry >= (params->sentry + entries_per_cluster(params)) ) + if ( !(buf = dos_dir_cluster_read_nxt(params)) ) + return NULL; + + return (struct dos_dir_entry*)(buf + ( (entry - params->sentry) * sizeof(struct dos_dir_entry)) ); +} + + +/* + D O S _ R E A D _ C L U S T E R +*/ +char *dos_read_cluster(struct dosparam *params, unsigned long ssector) +{ + int error; + + struct inode *inode = ¶ms->inode; + struct file *filp = ¶ms->filp; + struct request *request = ¶ms->request; + + request->cmd = READ; + request->sector = ssector; + request->nr_sectors = params->sectors_per_cluster; + request->buffer = params->cbuf; + + if ( (error = ata_request(inode, filp, request)) ) + return NULL; + + params->csector = ssector; + + return params->cbuf; +} + + +/* + D O S _ D I R _ C L U S T E R _ R E A D _ N X T +*/ +char *dos_dir_cluster_read_nxt(struct dosparam *params) +{ + char *p; + unsigned long nxt_cluster_start; + + /* TODO: add FAT lookup */ + + nxt_cluster_start = params->csector + params->sectors_per_cluster; + + if ( !(p = dos_read_cluster(params, nxt_cluster_start)) ) + return NULL; + + + params->sentry += entries_per_cluster(params); + + return p; +} + + +/* + D O S _ D I R _ C L U S T E R _ R E S E T +*/ +char *dos_dir_cluster_reset(struct dosparam *params) +{ + params->sentry = 0; + return dos_read_cluster(params, params->ssector); +} + +
trunk/soc/sw/orpmon/services/dos.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/net.c =================================================================== --- trunk/soc/sw/orpmon/services/net.c (nonexistent) +++ trunk/soc/sw/orpmon/services/net.c (revision 20) @@ -0,0 +1,694 @@ +/* + * Copied from Linux Monitor (LiMon) - Networking. + * + * Copyright 1994 - 2000 Neil Russell. + * (See License) + * Copyright 2000 Roland Borde + * Copyright 2000 Paolo Scaffardi + * Copyright 2000, 2001 Wolfgang Denk + */ + +/* + * General Desription: + * + * The user interface supports commands for BOOTP, RARP, and TFTP. + * Also, we support ARP internally. Depending on available data, + * these interact as follows: + * + * BOOTP: + * + * Prerequisites: - own ethernet address + * We want: - own IP address + * - TFTP server IP address + * - name of bootfile + * Next step: ARP + * + * RARP: + * + * Prerequisites: - own ethernet address + * We want: - own IP address + * - TFTP server IP address + * Next step: ARP + * + * ARP: + * + * Prerequisites: - own ethernet address + * - own IP address + * - TFTP server IP address + * We want: - TFTP server ethernet address + * Next step: TFTP + * + * DHCP: + * + * Prerequisites: - own ethernet address + * We want: - IP, Netmask, ServerIP, Gateway IP + * - bootfilename, lease time + * Next step: - TFTP + * + * TFTP: + * + * Prerequisites: - own ethernet address + * - own IP address + * - TFTP server IP address + * - TFTP server ethernet address + * - name of bootfile (if unknown, we use a default name + * derived from our own IP address) + * We want: - load the boot file + * Next step: none + */ + + +#include "common.h" +#include "support.h" +#include "net.h" +#include "bootp.h" +#include "tftp.h" +#include "rarp.h" +#include "arp.h" +#if OC_LAN==1 + #include "eth.h" +#else if SMC91111_LAN==1 + #include "smc91111.h" +#endif + +#if 0 +#define ET_DEBUG +#endif + +/** BOOTP EXTENTIONS **/ + +IPaddr_t NetOurSubnetMask=0; /* Our subnet mask (0=unknown) */ +IPaddr_t NetOurGatewayIP=0; /* Our gateways IP address */ +IPaddr_t NetOurDNSIP=0; /* Our DNS IP address */ +char NetOurNISDomain[32]={0,}; /* Our NIS domain */ +char NetOurHostName[32]={0,}; /* Our hostname */ +char NetOurRootPath[64]={0,}; /* Our bootpath */ +unsigned short NetBootFileSize=0; /* Our bootfile size in blocks */ + +/** END OF BOOTP EXTENTIONS **/ + +unsigned long NetBootFileXferSize; /* The actual transferred size of the bootfile (in bytes) */ +unsigned char NetOurEther[6]; /* Our ethernet address */ +unsigned char NetServerEther[6] = /* Boot server enet address */ + { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; +IPaddr_t NetOurIP; /* Our IP addr (0 = unknown) */ +IPaddr_t NetServerIP; /* Our IP addr (0 = unknown) */ +volatile unsigned char *NetRxPkt; /* Current receive packet */ +int NetRxPktLen; /* Current rx packet length */ +unsigned NetIPID; /* IP packet ID */ +unsigned char NetBcastAddr[6] = /* Ethernet bcast address */ + { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; +int NetState; /* Network loop state */ + +char BootFile[128]; /* Boot File name */ + +volatile unsigned char PktBuf[(PKTBUFSRX+1) * PKTSIZE_ALIGN + PKTALIGN]; + +volatile unsigned char *NetRxPackets[PKTBUFSRX]; /* Receive packets */ + +static rxhand_f *packetHandler; /* Current RX packet handler */ +static thand_f *timeHandler; /* Current timeout handler */ +static unsigned long timeValue; /* Current timeout value */ +volatile unsigned char *NetTxPacket = 0; /* THE transmit packet */ + +static int net_check_prereq (proto_t protocol); + +/**********************************************************************/ +/* + * Main network processing loop. + */ +int +NetLoop(proto_t protocol) +{ +#if 1 + if (!NetTxPacket) { + int i; + + /* + * Setup packet buffers, aligned correctly. + */ + NetTxPacket = &PktBuf[0] + (PKTALIGN - 1); + NetTxPacket -= (unsigned long)NetTxPacket % PKTALIGN; + for (i = 0; i < PKTBUFSRX; i++) { + NetRxPackets[i] = NetTxPacket + (i+1)*PKTSIZE_ALIGN; + } + } + + eth_halt(); + eth_init(NetReceive); + +restart: + + NetCopyEther(NetOurEther, global.eth_add); + + NetState = NETLOOP_CONTINUE; + + /* + * Start the ball rolling with the given start function. From + * here on, this code is a state machine driven by received + * packets and timer events. + */ + + if (protocol == TFTP) { /* TFTP */ + NetOurIP = global.ip; + NetServerIP = global.srv_ip; + NetOurGatewayIP = global.gw_ip; + NetOurSubnetMask= global.mask; + + if (net_check_prereq (protocol) != 0) { + return 0; + } + + /* always use ARP to get server ethernet address */ + ArpTry = 0; + ArpRequest (); + +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) + } else if (protocol == DHCP) { + if (net_check_prereq (protocol) != 0) { + return 0; + } + + /* Start with a clean slate... */ + NetOurIP = 0; + NetServerIP = 0; + DhcpRequest(); /* Basically same as BOOTP */ + +#endif /* CFG_CMD_DHCP */ + + } else { /* BOOTP or RARP */ + + /* + * initialize our IP addr to 0 in order to accept ANY + * IP addr assigned to us by the BOOTP / RARP server + */ + NetOurIP = 0; + NetServerIP = 0; + + if (net_check_prereq (protocol) != 0) { + return 0; + } +#ifdef BOOTP + if (protocol == BOOTP) { + BootpTry = 0; + BootpRequest (); + } +#endif +#ifdef RARP + if { + RarpTry = 0; + RarpRequest (); + } +#endif + } + + NetBootFileXferSize = 0; + + /* + * Main packet reception loop. Loop receiving packets until + * someone sets `NetQuit'. + */ + for (;;) { +// WATCHDOG_RESET(); + /* + * Check the ethernet for a new packet. The ethernet + * receive routine will process it. + */ + eth_rx(); + + /* + * Abort if ctrl-c was pressed. + */ + if (ctrlc()) { + eth_halt(); + printf("\nAbort\n"); + return 0; + } + + + /* + * Check for a timeout, and run the timeout handler + * if we have one. + */ + if (timeHandler && (get_timer(0) > timeValue)) { + thand_f *x; + + x = timeHandler; + timeHandler = (thand_f *)0; + (*x)(); + } + + + switch (NetState) { + + case NETLOOP_RESTART: + goto restart; + + case NETLOOP_SUCCESS: + if (NetBootFileXferSize > 0) { + printf("Bytes transferred = %ld (%lx hex)\n", + NetBootFileXferSize, + NetBootFileXferSize); + } + eth_halt(); + return NetBootFileXferSize; + + case NETLOOP_FAIL: + return 0; + } + } +#endif +} + +/**********************************************************************/ + + +#if 1 +void +NetStartAgain(void) +{ + NetState = NETLOOP_RESTART; +} + +/**********************************************************************/ +/* + * Miscelaneous bits. + */ + +void +NetSetHandler(rxhand_f * f) +{ + packetHandler = f; +} + + +void +NetSetTimeout(int iv, thand_f * f) +{ + if (iv == 0) { + timeHandler = (thand_f *)0; + } else { + timeHandler = f; + timeValue = get_timer(0) + iv; + } +} + + +void +NetSendPacket(volatile unsigned char * pkt, int len) +{ + +#if OC_LAN==1 + unsigned char *p; + + p = eth_get_tx_buf(); + memcpy(p, (void *)pkt, len); + eth_send(p, len); +#else if SMC91111_LAN==1 + eth_send(pkt, len); +#endif +} + + + +void +NetReceive(volatile unsigned char * pkt, int len) +{ + Ethernet_t *et; + IP_t *ip; + ARP_t *arp; + int x; + + + NetRxPkt = pkt; + NetRxPktLen = len; + et = (Ethernet_t *)pkt; + + x = SWAP16(et->et_protlen); + + if (x < 1514) { + /* + * Got a 802 packet. Check the other protocol field. + */ + x = SWAP16(et->et_prot); + ip = (IP_t *)(pkt + E802_HDR_SIZE); + len -= E802_HDR_SIZE; + } else { + ip = (IP_t *)(pkt + ETHER_HDR_SIZE); + len -= ETHER_HDR_SIZE; + } + +#ifdef ET_DEBUG + printf("Receive from protocol 0x%x\n", x); +#endif + + switch (x) { + + case PROT_ARP: + /* + * We have to deal with two types of ARP packets: + * - REQUEST packets will be answered by sending our + * IP address - if we know it. + * - REPLY packates are expected only after we asked + * for the TFTP server's or the gateway's ethernet + * address; so if we receive such a packet, we set + * the server ethernet address + */ +#ifdef ET_DEBUG + printf("Got ARP\n"); +#endif + arp = (ARP_t *)ip; + if (len < ARP_HDR_SIZE) { + printf("bad length %d < %d\n", len, ARP_HDR_SIZE); + return; + } + if (SWAP16(arp->ar_hrd) != ARP_ETHER) { + return; + } + if (SWAP16(arp->ar_pro) != PROT_IP) { + return; + } + if (arp->ar_hln != 6) { + return; + } + if (arp->ar_pln != 4) { + return; + } + + if (NetOurIP == 0 || + *((IPaddr_t *)&arp->ar_data[16]) != NetOurIP) { + return; + } + + switch (SWAP16(arp->ar_op)) { + case ARPOP_REQUEST: /* reply with our IP address */ +#ifdef ET_DEBUG + printf("Got ARP REQUEST, return our IP\n"); +#endif + NetSetEther((unsigned char *)et, et->et_src, PROT_ARP); + arp->ar_op = SWAP16(ARPOP_REPLY); + NetCopyEther(&arp->ar_data[10], &arp->ar_data[0]); + NetCopyEther(&arp->ar_data[0], NetOurEther); + *(IPaddr_t *)(&arp->ar_data[16]) = + *(IPaddr_t *)(&arp->ar_data[6]); + *(IPaddr_t *)(&arp->ar_data[6]) = NetOurIP; + NetSendPacket((unsigned char *)et,((unsigned char *)arp-pkt)+ARP_HDR_SIZE); + return; + case ARPOP_REPLY: /* set TFTP server eth addr */ +#ifdef ET_DEBUG + printf("Got ARP REPLY, set server/gtwy eth addr\n"); +#endif + NetCopyEther(NetServerEther, &arp->ar_data[0]); + (*packetHandler)(0,0,0,0); /* start TFTP */ + return; + default: +#ifdef ET_DEBUG + printf("Unexpected ARP opcode 0x%x\n", SWAP16(arp->ar_op)); +#endif + return; + } + + case PROT_RARP: +#ifdef ET_DEBUG + printf("Got RARP\n"); +#endif + arp = (ARP_t *)ip; + if (len < ARP_HDR_SIZE) { + printf("bad length %d < %d\n", len, ARP_HDR_SIZE); + return; + } + + if ((SWAP16(arp->ar_op) != RARPOP_REPLY) || + (SWAP16(arp->ar_hrd) != ARP_ETHER) || + (SWAP16(arp->ar_pro) != PROT_IP) || + (arp->ar_hln != 6) || (arp->ar_pln != 4)) { + + printf("invalid RARP header\n"); + } else { + NetOurIP = *((IPaddr_t *)&arp->ar_data[16]); + NetServerIP = *((IPaddr_t *)&arp->ar_data[6]); + NetCopyEther(NetServerEther, &arp->ar_data[0]); + + (*packetHandler)(0,0,0,0); + } + break; + + case PROT_IP: +#ifdef ET_DEBUG + printf("Got IP\n"); +#endif + if (len < IP_HDR_SIZE) { + debug ("len bad %d < %d\n", len, IP_HDR_SIZE); + return; + } + if (len < SWAP16(ip->ip_len)) { + printf("len bad %d < %d\n", len, SWAP16(ip->ip_len)); + return; + } + len = SWAP16(ip->ip_len); +#ifdef ET_DEBUG + printf("len=%d, v=%02x\n", len, ip->ip_hl_v & 0xff); +#endif + if ((ip->ip_hl_v & 0xf0) != 0x40) { + return; + } + if (ip->ip_off & SWAP16c(0x1fff)) { /* Can't deal w/ fragments */ + return; + } + if (!NetCksumOk((unsigned char *)ip, IP_HDR_SIZE_NO_UDP / 2)) { + printf("checksum bad\n"); + return; + } + if (NetOurIP && + ip->ip_dst != NetOurIP && + ip->ip_dst != 0xFFFFFFFF) { + return; + } + /* + * watch for ICMP host redirects + * + * There is no real handler code (yet). We just watch + * for ICMP host redirect messages. In case anybody + * sees these messages: please contact me + * (wd@denx.de), or - even better - send me the + * necessary fixes :-) + * + * Note: in all cases where I have seen this so far + * it was a problem with the router configuration, + * for instance when a router was configured in the + * BOOTP reply, but the TFTP server was on the same + * subnet. So this is probably a warning that your + * configuration might be wrong. But I'm not really + * sure if there aren't any other situations. + */ + if (ip->ip_p == IPPROTO_ICMP) { + ICMP_t *icmph = (ICMP_t *)&(ip->udp_src); + + if (icmph->type != ICMP_REDIRECT) + return; + if (icmph->code != ICMP_REDIR_HOST) + return; + printf (" ICMP Host Redirect to "); + print_IPaddr(icmph->un.gateway); + putc(' '); + } else if (ip->ip_p != IPPROTO_UDP) { /* Only UDP packets */ + return; + } + + /* + * IP header OK. Pass the packet to the current handler. + */ + (*packetHandler)((unsigned char *)ip +IP_HDR_SIZE, + SWAP16(ip->udp_dst), + SWAP16(ip->udp_src), + SWAP16(ip->udp_len) - 8); + + break; + } +} + + +/**********************************************************************/ + +static int net_check_prereq (proto_t protocol) +{ + switch (protocol) { + case ARP: /* nothing to do */ + break; + + case TFTP: + if (NetServerIP == 0) { + printf ("*** ERROR: `serverip' not set\n"); + return (1); + } + + if (NetOurIP == 0) { + printf ("*** ERROR: `ipaddr' not set\n"); + return (1); + } + /* Fall through */ + + case DHCP: + case RARP: + case BOOTP: + if (memcmp(NetOurEther, "\0\0\0\0\0\0", 6) == 0) { + printf ("*** ERROR: `ethaddr' not set\n"); + return (1); + } + /* Fall through */ + } + return (0); /* OK */ +} +/**********************************************************************/ + +int +NetCksumOk(unsigned char * ptr, int len) +{ + return !((NetCksum(ptr, len) + 1) & 0xfffe); +} + + +unsigned +NetCksum(unsigned char * ptr, int len) +{ + unsigned long xsum; + + xsum = 0; + while (len-- > 0) + xsum += *((unsigned short *)ptr)++; + xsum = (xsum & 0xffff) + (xsum >> 16); + xsum = (xsum & 0xffff) + (xsum >> 16); + return (xsum & 0xffff); +} + + +void +NetCopyEther(volatile unsigned char * to, unsigned char * from) +{ + int i; + + for (i = 0; i < 6; i++) + *to++ = *from++; +} + + +void +NetSetEther(volatile unsigned char * xet, unsigned char * addr, unsigned long prot) +{ + volatile Ethernet_t *et = (Ethernet_t *)xet; + + NetCopyEther(et->et_dest, addr); + NetCopyEther(et->et_src, NetOurEther); + et->et_protlen = SWAP16(prot); +} + + +void +NetSetIP(volatile unsigned char * xip, IPaddr_t dest, int dport, int sport, int len) +{ + volatile IP_t *ip = (IP_t *)xip; + + /* + * If the data is an odd number of bytes, zero the + * byte after the last byte so that the checksum + * will work. + */ + if (len & 1) + xip[IP_HDR_SIZE + len] = 0; + + /* + * Construct an IP and UDP header. + (need to set no fragment bit - XXX) + */ + ip->ip_hl_v = 0x45; /* IP_HDR_SIZE / 4 (not including UDP) */ + ip->ip_tos = 0; + ip->ip_len = SWAP16(IP_HDR_SIZE + len); + ip->ip_id = SWAP16(NetIPID++); + ip->ip_off = SWAP16c(0x4000); /* No fragmentation */ + ip->ip_ttl = 255; + ip->ip_p = 17; /* UDP */ + ip->ip_sum = 0; + ip->ip_src = NetOurIP; + ip->ip_dst = dest; + ip->udp_src = SWAP16(sport); + ip->udp_dst = SWAP16(dport); + ip->udp_len = SWAP16(8 + len); + ip->udp_xsum = 0; + ip->ip_sum = ~NetCksum((unsigned char *)ip, IP_HDR_SIZE_NO_UDP / 2); +} + +void copy_filename (unsigned char *dst, unsigned char *src, int size) +{ + if (*src && (*src == '"')) { + ++src; + --size; + } + + while ((--size > 0) && *src && (*src != '"')) { + *dst++ = *src++; + } + *dst = '\0'; +} + +void ip_to_string (IPaddr_t x, char *s) +{ + char num[] = "0123456789ABCDEF"; + int i; + + x = SWAP32(x); + + for(i = 28; i >= 0; i -= 4) + *s++ = num[((x >> i) & 0x0f)]; + *s = 0; +} + +void print_IPaddr (IPaddr_t x) +{ + char tmp[12]; + + ip_to_string(x, tmp); + + printf(tmp); +} + +static unsigned int i2a(char* dest,unsigned int x) { + register unsigned int tmp=x; + register unsigned int len=0; + if (x>=100) { *dest++=tmp/100+'0'; tmp=tmp%100; ++len; } + if (x>=10) { *dest++=tmp/10+'0'; tmp=tmp%10; ++len; } + *dest++=tmp+'0'; + return len+1; +} + +char *inet_ntoa(unsigned long in) { + static char buf[20]; + unsigned int len; + unsigned char *ip=(unsigned char*)∈ + + len=i2a(buf,ip[0]); buf[len]='.'; ++len; + len+=i2a(buf+ len,ip[1]); buf[len]='.'; ++len; + len+=i2a(buf+ len,ip[2]); buf[len]='.'; ++len; + len+=i2a(buf+ len,ip[3]); buf[len]=0; + return buf; +} + +unsigned long inet_aton(const char *cp) +{ + unsigned long a[4]; + unsigned long ret; + char *p = (char *)cp; + int i,d; + if (strcmp(cp, "255.255.255.255") == 0) + return -1; + + for(i = 0; i < 4; i++) { + a[i] = strtoul(p, 0, 0); + for(d=1; (p[d] != '.') && (i < 3); d++); + p = &p[d+1]; + } + + ret = (a[0] << 24) | (a[1] << 16) | (a[2] << 8) | a[3]; + return ret; +} + +#endif
trunk/soc/sw/orpmon/services/net.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/arp.h =================================================================== --- trunk/soc/sw/orpmon/services/arp.h (nonexistent) +++ trunk/soc/sw/orpmon/services/arp.h (revision 20) @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef __ARP_H__ +#define __ARP_H__ + +/**********************************************************************/ +/* + * Global functions and variables. + */ + +extern int ArpTry; + +extern void ArpRequest (void); /* Send a ARP request */ + +/**********************************************************************/ + +#endif /* __ARP_H__ */ +
trunk/soc/sw/orpmon/services/arp.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/bootp.h =================================================================== --- trunk/soc/sw/orpmon/services/bootp.h (nonexistent) +++ trunk/soc/sw/orpmon/services/bootp.h (revision 20) @@ -0,0 +1,95 @@ +/* + * Copied from LiMon - BOOTP. + * + * Copyright 1994, 1995, 2000 Neil Russell. + * (See License) + * Copyright 2000 Paolo Scaffardi + */ + +#ifndef __BOOTP_H__ +#define __BOOTP_H__ + +#ifndef __NET_H__ +#include "net.h" +#endif /* __NET_H__ */ + +/**********************************************************************/ + +/* + * BOOTP header. + */ +#if (CONFIG_COMMANDS & CFG_CMD_DHCP) +#define OPT_SIZE 312 /* Minimum DHCP Options size per RFC2131 - results in 576 byte pkt */ +#else +#define OPT_SIZE 64 +#endif + +typedef struct +{ + unsigned char bp_op; /* Operation */ +# define OP_BOOTREQUEST 1 +# define OP_BOOTREPLY 2 + unsigned char bp_htype; /* Hardware type */ +# define HWT_ETHER 1 + unsigned char bp_hlen; /* Hardware address length */ +# define HWL_ETHER 6 + unsigned char bp_hops; /* Hop count (gateway thing) */ + unsigned long bp_id; /* Transaction ID */ + unsigned short bp_secs; /* Seconds since boot */ + unsigned short bp_spare1; /* Alignment */ + IPaddr_t bp_ciaddr; /* Client IP address */ + IPaddr_t bp_yiaddr; /* Your (client) IP address */ + IPaddr_t bp_siaddr; /* Server IP address */ + IPaddr_t bp_giaddr; /* Gateway IP address */ + unsigned char bp_chaddr[16]; /* Client hardware address */ + char bp_sname[64]; /* Server host name */ + char bp_file[128]; /* Boot file name */ + char bp_vend[OPT_SIZE]; /* Vendor information */ +} Bootp_t; + +#define BOOTP_HDR_SIZE sizeof (Bootp_t) +#define BOOTP_SIZE (ETHER_HDR_SIZE + IP_HDR_SIZE + BOOTP_HDR_SIZE) + +/**********************************************************************/ +/* + * Global functions and variables. + */ + +/* bootp.c */ +extern unsigned long BootpID; /* ID of cur BOOTP request */ +extern char BootFile[128]; /* Boot file name */ +extern int BootpTry; +#ifdef CONFIG_BOOTP_RANDOM_DELAY +unsigned long seed1, seed2; /* seed for random BOOTP delay */ +#endif + + +/* Send a BOOTP request */ +extern void BootpRequest (void); + +/****************** DHCP Support *********************/ +extern void DhcpRequest(void); + +/* DHCP States */ +typedef enum { INIT, + INIT_REBOOT, + REBOOTING, + SELECTING, + REQUESTING, + REBINDING, + BOUND, + RENEWING } dhcp_state_t; + +#define DHCP_DISCOVER 1 +#define DHCP_OFFER 2 +#define DHCP_REQUEST 3 +#define DHCP_DECLINE 4 +#define DHCP_ACK 5 +#define DHCP_NAK 6 +#define DHCP_RELEASE 7 + +#define SELECT_TIMEOUT 3 /* Seconds to wait for offers */ + +/**********************************************************************/ + +#endif /* __BOOTP_H__ */
trunk/soc/sw/orpmon/services/bootp.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/rarp.h =================================================================== --- trunk/soc/sw/orpmon/services/rarp.h (nonexistent) +++ trunk/soc/sw/orpmon/services/rarp.h (revision 20) @@ -0,0 +1,44 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef __RARP_H__ +#define __RARP_H__ + +#ifndef __NET_H__ +#include "net.h" +#endif /* __NET_H__ */ + + +/**********************************************************************/ +/* + * Global functions and variables. + */ + +extern int RarpTry; + +extern void RarpRequest (void); /* Send a RARP request */ + +/**********************************************************************/ + +#endif /* __RARP_H__ */
trunk/soc/sw/orpmon/services/rarp.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/Makefile =================================================================== --- trunk/soc/sw/orpmon/services/Makefile (nonexistent) +++ trunk/soc/sw/orpmon/services/Makefile (revision 20) @@ -0,0 +1,43 @@ +# (C) Marko Mlinar, based on ppcboot +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# CFLAGS += -DET_DEBUG -DDEBUG + +LIB = services.o + +OBJS = net.o tftp.o bootp.o rarp.o arp.o dos.o modem.o + +all: $(LIB) + +$(LIB): $(START) $(OBJS) $(AOBJS) + $(LD) -r -o $@ $(OBJS) $(AOBJS) + +######################################################################### + +.depend: Makefile $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ + +sinclude .depend + +#########################################################################
trunk/soc/sw/orpmon/services/Makefile Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/services/tftp.c =================================================================== --- trunk/soc/sw/orpmon/services/tftp.c (nonexistent) +++ trunk/soc/sw/orpmon/services/tftp.c (revision 20) @@ -0,0 +1,314 @@ +/* + * Copyright 1994, 1995, 2000 Neil Russell. + * (See License) + * Copyright 2000, 2001 DENX Software Engineering, Wolfgang Denk, wd@denx.de + */ + +#include "common.h" +#include "support.h" +#include "net.h" +#include "tftp.h" +#include "bootp.h" + +#undef ET_DEBUG + +#define WELL_KNOWN_PORT 69 /* Well known TFTP port # */ +#define TIMEOUT 2 /* Seconds to timeout for a lost pkt */ +#define TIMEOUT_COUNT 10 /* # of timeouts before giving up */ + /* (for checking the image size) */ +#define HASHES_PER_LINE 65 /* Number of "loading" hashes per line */ + +/* + * TFTP operations. + */ +#define TFTP_RRQ 1 +#define TFTP_WRQ 2 +#define TFTP_DATA 3 +#define TFTP_ACK 4 +#define TFTP_ERROR 5 + + +static int TftpServerPort; /* The UDP port at their end */ +static int TftpOurPort; /* The UDP port at our end */ +static int TftpTimeoutCount; +static unsigned TftpBlock; +static unsigned TftpLastBlock; +static int TftpState; +#define STATE_RRQ 1 +#define STATE_DATA 2 +#define STATE_TOO_LARGE 3 +#define STATE_BAD_MAGIC 4 + +char *tftp_filename; + +#ifdef CFG_DIRECT_FLASH_TFTP +extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +#endif + +static __inline__ void +store_block (unsigned block, unsigned char * src, unsigned len) +{ + unsigned long offset = block * 512, newsize = offset + len; +#ifdef CFG_DIRECT_FLASH_TFTP + int i, rc = 0; + + for (i=0; i= flash_info[i].start[0]) { + rc = 1; + break; + } + } + + if (rc) { /* Flash is destination for this packet */ + rc = flash_write ((unsigned char *)src, (unsigned long)(global.src_addr+offset), len); + switch (rc) { + case 0: /* OK */ + break; + case 1: printf ("Timeout writing to Flash\n"); + break; + case 2: printf ("Flash not Erased\n"); + break; + case 4: printf ("Can't write to protected Flash sectors\n"); + break; + case 8: printf ("Outside available Flash\n"); + break; + case 16:printf ("Size must be aligned (multiple of 8?)\n"); + break; + default: + printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc); + break; + } + if (rc) { + NetState = NETLOOP_FAIL; + return; + } + } + else +#endif /* CFG_DIRECT_FLASH_TFTP */ + (void)memcpy((void *)(global.src_addr + offset), src, len); + + if (NetBootFileXferSize < newsize) + NetBootFileXferSize = newsize; +} + +static void TftpSend (void); +static void TftpTimeout (void); + +/**********************************************************************/ + +static void +TftpSend (void) +{ + volatile unsigned char * pkt; + volatile unsigned char * xp; + int len = 0; + + /* + * We will always be sending some sort of packet, so + * cobble together the packet headers now. + */ + pkt = NetTxPacket + ETHER_HDR_SIZE + IP_HDR_SIZE; + + switch (TftpState) { + + case STATE_RRQ: + xp = pkt; + *((unsigned short *)pkt)++ = SWAP16c(TFTP_RRQ); + strcpy ((char *)pkt, tftp_filename); + pkt += strlen(tftp_filename) + 1; + strcpy ((char *)pkt, "octet"); + pkt += 5 /*strlen("octet")*/ + 1; + len = pkt - xp; + break; + + case STATE_DATA: + xp = pkt; + *((unsigned short *)pkt)++ = SWAP16c(TFTP_ACK); + *((unsigned short *)pkt)++ = SWAP16(TftpBlock); + len = pkt - xp; + break; + + case STATE_TOO_LARGE: + xp = pkt; + *((unsigned short *)pkt)++ = SWAP16c(TFTP_ERROR); + *((unsigned short *)pkt)++ = SWAP16(3); + strcpy ((char *)pkt, "File too large"); + pkt += 14 /*strlen("File too large")*/ + 1; + len = pkt - xp; + break; + + case STATE_BAD_MAGIC: + xp = pkt; + *((unsigned short *)pkt)++ = SWAP16c(TFTP_ERROR); + *((unsigned short *)pkt)++ = SWAP16(2); + strcpy ((char *)pkt, "File has bad magic"); + pkt += 18 /*strlen("File has bad magic")*/ + 1; + len = pkt - xp; + break; + } + + NetSetEther (NetTxPacket, NetServerEther, PROT_IP); + NetSetIP (NetTxPacket + ETHER_HDR_SIZE, NetServerIP, + TftpServerPort, TftpOurPort, len); + NetSendPacket (NetTxPacket, ETHER_HDR_SIZE + IP_HDR_SIZE + len); +} + + +static void +TftpHandler (unsigned char * pkt, unsigned dest, unsigned src, unsigned len) +{ + if (dest != TftpOurPort) { + return; + } + if (TftpState != STATE_RRQ && src != TftpServerPort) { + return; + } + + if (len < 2) { + return; + } + len -= 2; + switch (SWAP16(*((unsigned short *)pkt)++)) { + + case TFTP_RRQ: + case TFTP_WRQ: + case TFTP_ACK: + break; + default: + break; + + case TFTP_DATA: + if (len < 2) + return; + len -= 2; + TftpBlock = SWAP16(*(unsigned short *)pkt); + if (((TftpBlock - 1) % 10) == 0) { + putc ('#'); + TftpTimeoutCount = 0; + } else if ((TftpBlock % (10 * HASHES_PER_LINE)) == 0) { + printf ("\n\t "); + } + + if (TftpState == STATE_RRQ) { + TftpState = STATE_DATA; + TftpServerPort = src; + TftpLastBlock = 0; + + if (TftpBlock != 1) { /* Assertion */ + printf ("\nTFTP error: " + "First block is not block 1 (%d)\n" + "Starting again\n\n", + TftpBlock); + NetStartAgain (); + break; + } + } + + if (TftpBlock == TftpLastBlock) { + /* + * Same block again; ignore it. + */ + break; + } + + TftpLastBlock = TftpBlock; + NetSetTimeout (TIMEOUT * TICKS_PER_SEC, TftpTimeout); + + store_block (TftpBlock - 1, pkt + 2, len); + + /* + * Acknoledge the block just received, which will prompt + * the server for the next one. + */ + TftpSend (); + + if (len < 512) { + /* + * We received the whole thing. Try to + * run it. + */ + printf ("\ndone\n"); + NetState = NETLOOP_SUCCESS; + } + break; + + case TFTP_ERROR: + printf ("\nTFTP error: '%s' (%d)\n", + pkt + 2, SWAP16(*(unsigned short *)pkt)); + printf ("Starting again\n\n"); + NetStartAgain (); + break; + } +} + + +static void +TftpTimeout (void) +{ + if (++TftpTimeoutCount >= TIMEOUT_COUNT) { + printf ("\nRetry count exceeded; starting again\n"); + NetStartAgain (); + } else { + printf ("T "); + NetSetTimeout (TIMEOUT * TICKS_PER_SEC, TftpTimeout); + TftpSend (); + } +} + + +void +TftpStart (void) +{ +#ifdef ET_DEBUG + printf ("\nServer ethernet address %02x:%02x:%02x:%02x:%02x:%02x\n", + NetServerEther[0], + NetServerEther[1], + NetServerEther[2], + NetServerEther[3], + NetServerEther[4], + NetServerEther[5] + ); +#endif /* DEBUG */ + + printf ("TFTP from server "); print_IPaddr (NetServerIP); + printf ("; our IP address is "); print_IPaddr (NetOurIP); + + // Check if we need to send across this subnet + if (NetOurGatewayIP && NetOurSubnetMask) { + IPaddr_t OurNet = NetOurIP & NetOurSubnetMask; + IPaddr_t ServerNet = NetServerIP & NetOurSubnetMask; + + if (OurNet != ServerNet) { + printf ("; sending through gateway "); + print_IPaddr (NetOurGatewayIP) ; + } + } + putc ('\n'); + + printf ("Filename '%s'.", tftp_filename); + + if (NetBootFileSize) { + printf (" Size is %d%s kB => %x Bytes", + NetBootFileSize/2, + (NetBootFileSize%2) ? ".5" : "", + NetBootFileSize<<9); + } + + putc ('\n'); + + printf ("Load address: 0x%lx\n", global.src_addr); + + printf ("Loading: *\b"); + + NetSetTimeout (TIMEOUT * TICKS_PER_SEC, TftpTimeout); + NetSetHandler (TftpHandler); + + TftpServerPort = WELL_KNOWN_PORT; + TftpTimeoutCount = 0; + TftpState = STATE_RRQ; + TftpOurPort = 1024 + (get_timer(0) % 3072); + + TftpSend (); +} +
trunk/soc/sw/orpmon/services/tftp.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/reset.S =================================================================== --- trunk/soc/sw/orpmon/reset.S (nonexistent) +++ trunk/soc/sw/orpmon/reset.S (revision 20) @@ -0,0 +1,771 @@ +#include "spr_defs.h" +#include "board.h" +#include "mc.h" + + .extern _reset_support + .extern _eth_int + .extern _src_beg + .extern _dst_beg + .extern _dst_end + .extern _c_reset + .extern _int_main + .extern _tick_interrupt + .extern _crc32 + + /* Used by global.src_addr for default value */ + .extern _src_addr + + .global _align + .global _calc_mycrc32 + .global _mycrc32 + .global _mysize + + .section .stack, "aw", @nobits +.space STACK_SIZE +_stack: + .section .crc +_mycrc32: + .word 0xcccccccc +_mysize: + .word 0xdddddddd + +.if SELF_CHECK +_calc_mycrc32: + l.addi r3,r0,0 + l.movhi r4,hi(_calc_mycrc32) + l.ori r4,r4,lo(_calc_mycrc32) + l.movhi r5,hi(_mysize) + l.ori r5,r5,lo(_mysize) + l.lwz r5,0(r5) + l.addi r1,r1,-4 + l.sw 0(r1),r9 + + /* unsigned long crc32 (unsigned long crc, const unsigned char *buf, unsigned long len); */ + l.jal _crc32 + l.nop + + l.movhi r3,hi(_mycrc32) + l.ori r3,r3,lo(_mycrc32) + l.lwz r3,0(r3) + + l.xor r11,r3,r11 + l.lwz r9,0(r1) + l.jr r9 + l.addi r1,r1,4 +.endif + + .org 0x100 +.if IN_FLASH + .section .reset, "ax" +.else + .section .vectors, "ax" +.endif + +_reset: +.if IN_FLASH + l.movhi r3,hi(MC_BASE_ADDR) + l.ori r3,r3,MC_BA_MASK + l.addi r5,r0,0x00 + l.sw 0(r3),r5 +.endif + l.addi r3,r0,SPR_SR_SM + l.mtspr r0,r3,SPR_SR + l.movhi r3,hi(_start) + l.ori r3,r3,lo(_start) + l.jr r3 + l.nop + +.if IN_FLASH + .section .vectors, "ax" + .org 0x500 +.else + .org (0x500 - 0x100 + _reset) +.endif + + l.addi r1,r1,-128 + l.sw 0x4(r1),r2 + l.movhi r2,hi(_tick) + l.ori r2,r2,lo(_tick) + l.jr r2 + l.nop + +.if IN_FLASH + .section .vectors, "ax" + .org 0x600 +.else + .org (0x600 - 0x100 + _reset) +.endif + + l.addi r1,r1,-128 + l.sw 0x08(r1),r2 + l.movhi r2,hi(_align) + l.ori r2,r2,lo(_align) + l.jr r2 + l.nop + +.if IN_FLASH + .org 0x800 +.else + .org (0x800 - 0x100 + _reset) +.endif + + l.addi r1,r1,-128 + l.sw 0x4(r1),r2 + l.movhi r2,hi(_int_wrapper) + l.ori r2,r2,lo(_int_wrapper) + l.jr r2 + l.nop + + .section .text +_start: +.if IN_FLASH + l.jal _init_mc + l.nop + + /* Wait for SDRAM */ + l.addi r3,r0,0x1000 +1: l.sfeqi r3,0 + l.bnf 1b + l.addi r3,r3,-1 +.endif + /* Copy form flash to sram */ +.if IN_FLASH + l.movhi r3,hi(_src_beg) + l.ori r3,r3,lo(_src_beg) + l.movhi r4,hi(_vec_start) + l.ori r4,r4,lo(_vec_start) + l.movhi r5,hi(_vec_end) + l.ori r5,r5,lo(_vec_end) + l.sub r5,r5,r4 + l.sfeqi r5,0 + l.bf 2f + l.nop +1: l.lwz r6,0(r3) + l.sw 0(r4),r6 + l.addi r3,r3,4 + l.addi r4,r4,4 + l.addi r5,r5,-4 + l.sfgtsi r5,0 + l.bf 1b + l.nop +2: + l.movhi r4,hi(_dst_beg) + l.ori r4,r4,lo(_dst_beg) + l.movhi r5,hi(_dst_end) + l.ori r5,r5,lo(_dst_end) +1: l.sfgeu r4,r5 + l.bf 1f + l.nop + l.lwz r8,0(r3) + l.sw 0(r4),r8 + l.addi r3,r3,4 + l.bnf 1b + l.addi r4,r4,4 +1: + l.addi r3,r0,0 + l.addi r4,r0,0 +3: +.endif + +.if IC_ENABLE + l.jal _ic_enable + l.nop +.endif + +.if DC_ENABLE + l.jal _dc_enable + l.nop +.endif + + l.movhi r1,hi(_stack-4) + l.ori r1,r1,lo(_stack-4) + l.addi r2,r0,-3 + l.and r1,r1,r2 + + l.movhi r2,hi(_main) + l.ori r2,r2,lo(_main) + l.jr r2 + l.addi r2,r0,0 + +_ic_enable: + + /* Flush IC */ + l.addi r10,r0,0 + l.addi r11,r0,IC_SIZE +1: + l.mtspr r0,r10,SPR_ICBIR + l.sfne r10,r11 + l.bf 1b + l.addi r10,r10,16 + + /* Enable IC */ + l.mfspr r10,r0,SPR_SR + l.ori r10,r10,(SPR_SR_ICE|SPR_SR_SM) + l.mtspr r0,r10,SPR_SR + l.nop + l.nop + l.nop + l.nop + l.nop + + l.jr r9 + l.nop + +_dc_enable: + + /* Flush DC */ + l.addi r10,r0,0 + l.addi r11,r0,DC_SIZE +1: + l.mtspr r0,r10,SPR_DCBIR + l.sfne r10,r11 + l.bf 1b + l.addi r10,r10,16 + + /* Enable DC */ + l.mfspr r10,r0,SPR_SR + l.ori r10,r10,(SPR_SR_DCE|SPR_SR_SM) + l.mtspr r0,r10,SPR_SR + + l.jr r9 + l.nop + +.if IN_FLASH +#if CONFIG_OR32_MC_VERSION==1 +_init_mc: + + l.movhi r3,hi(MC_BASE_ADDR) + l.ori r3,r3,lo(MC_BASE_ADDR) + + l.addi r4,r3,MC_CSC(0) + l.movhi r5,hi(FLASH_BASE_ADDR) + l.srai r5,r5,6 + l.ori r5,r5,0x0025 + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(0) + l.movhi r5,hi(FLASH_TMS_VAL) + l.ori r5,r5,lo(FLASH_TMS_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_BA_MASK + l.addi r5,r0,MC_MASK_VAL + l.sw 0(r4),r5 + + l.addi r4,r3,MC_CSR + l.movhi r5,hi(MC_CSR_VAL) + l.ori r5,r5,lo(MC_CSR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(1) + l.movhi r5,hi(SDRAM_TMS_VAL) + l.ori r5,r5,lo(SDRAM_TMS_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_CSC(1) + l.movhi r5,hi(SDRAM_BASE_ADDR) + l.srai r5,r5,6 + l.ori r5,r5,0x0411 + l.sw 0(r4),r5 + +#ifdef ETH_DATA_BASE + l.addi r4,r3,MC_CSC(2) + l.movhi r5,hi(ETH_DATA_BASE) + l.srai r5,r5,6 + l.ori r5,r5,0x0005 + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(2) + l.movhi r5,0xffff + l.ori r5,r5,0xffff + l.sw 0(r4),r5 +#endif +#ifdef SANCHO_BASE_ADD + l.addi r4,r3,MC_CSC(2) + l.movhi r5,hi(SANCHO_BASE_ADD) + l.srai r5,r5,6 + l.ori r5,r5,0x0001 + l.sw 0(r4),r5 + + l.addi r4,r3,MC_TMS(2) + l.movhi r5,0x101 + l.ori r5,r5,0x101 + l.sw 0(r4),r5 +#endif + + l.jr r9 + l.nop +#elif CONFIG_OR32_MC_VERSION==2 +_init_mc: + + l.movhi r3,hi(MC_BASE_ADDR) + l.ori r3,r3,lo(MC_BASE_ADDR) + + l.addi r4,r3,MC_BAR_0 + l.movhi r5,hi(FLASH_BAR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_AMR_0 + l.movhi r5,hi(FLASH_AMR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_WTR_0 + l.movhi r5,hi(FLASH_WTR_VAL) + l.ori r5,r5,lo(FLASH_WTR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_RTR_0 + l.movhi r5,hi(FLASH_RTR_VAL) + l.ori r5,r5,lo(FLASH_RTR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_OSR + l.movhi r5,hi(0x40000000) + l.ori r5,r5,lo(0x40000000) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_BAR_4 + l.movhi r5,hi(SDRAM_BAR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_AMR_4 + l.movhi r5,hi(SDRAM_AMR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_CCR_4 + l.movhi r5,hi(0x00ef0004) + l.ori r5,r5,lo(0x00ef0004) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_RATR + l.movhi r5,hi(SDRAM_RATR_VAL) + l.ori r5,r5,lo(SDRAM_RATR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_RCDR + l.movhi r5,hi(SDRAM_RCDR_VAL) + l.ori r5,r5,lo(SDRAM_RCDR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_RCTR + l.movhi r5,hi(SDRAM_RCTR_VAL) + l.ori r5,r5,lo(SDRAM_RCTR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_REFCTR + l.movhi r5,hi(SDRAM_REFCTR_VAL) + l.ori r5,r5,lo(SDRAM_REFCTR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_PTR + l.movhi r5,hi(SDRAM_PTR_VAL) + l.ori r5,r5,lo(SDRAM_PTR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_RRDR + l.movhi r5,hi(SDRAM_RRDR_VAL) + l.ori r5,r5,lo(SDRAM_RRDR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_RIR + l.movhi r5,hi(SDRAM_RIR_VAL) + l.ori r5,r5,lo(SDRAM_RIR_VAL) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_OSR + l.movhi r5,hi(0x5e000000) + l.ori r5,r5,lo(0x5e000000) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_ORR + l.sw 0(r4),r5 + + l.addi r4,r3,MC_OSR + l.movhi r5,hi(0x6e000000) + l.ori r5,r5,lo(0x6e000000) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_ORR + l.sw 0(r4),r5 + l.sw 0(r4),r5 + l.sw 0(r4),r5 + l.sw 0(r4),r5 + l.sw 0(r4),r5 + l.sw 0(r4),r5 + l.sw 0(r4),r5 + l.sw 0(r4),r5 + + l.addi r4,r3,MC_OSR + l.movhi r5,hi(0x7e000023) + l.ori r5,r5,lo(0x7e000023) + l.sw 0(r4),r5 + + l.addi r4,r3,MC_ORR + l.sw 0(r4),r5 + +#ifdef FLASH_ORG_16_1 + l.addi r4,r3,MC_CCR_4 + l.movhi r5,hi(0xc0ae0004) + l.ori r5,r5,lo(0xc0ae0004) + l.sw 0(r4),r5 +#else +# error "no configuration for this data bus width" +#endif + l.jr r9 + l.nop +#else +# error "no memory controler chosen" +#endif + +.endif + +_tick: + l.sw 0x8(r1),r4 + l.sw 0xc(r1),r5 + l.sw 0x10(r1),r6 + l.sw 0x14(r1),r7 + l.sw 0x18(r1),r8 + l.sw 0x1c(r1),r9 + l.sw 0x20(r1),r10 + l.sw 0x24(r1),r11 + l.sw 0x28(r1),r12 + l.sw 0x2c(r1),r13 + l.sw 0x30(r1),r14 + l.sw 0x34(r1),r15 + l.sw 0x38(r1),r16 + l.sw 0x3c(r1),r17 + l.sw 0x40(r1),r18 + l.sw 0x44(r1),r19 + l.sw 0x48(r1),r20 + l.sw 0x4c(r1),r21 + l.sw 0x50(r1),r22 + l.sw 0x54(r1),r23 + l.sw 0x58(r1),r24 + l.sw 0x5c(r1),r25 + l.sw 0x60(r1),r26 + l.sw 0x64(r1),r27 + l.sw 0x68(r1),r28 + l.sw 0x6c(r1),r29 + l.sw 0x70(r1),r30 + l.sw 0x74(r1),r31 + l.sw 0x78(r1),r3 + + l.movhi r3,hi(_tick_interrupt) + l.ori r3,r3,lo(_tick_interrupt) + l.jalr r3 + l.nop + + l.lwz r2,0x4(r1) + l.lwz r4,0x8(r1) + l.lwz r5,0xc(r1) + l.lwz r6,0x10(r1) + l.lwz r7,0x14(r1) + l.lwz r8,0x18(r1) + l.lwz r9,0x1c(r1) + l.lwz r10,0x20(r1) + l.lwz r11,0x24(r1) + l.lwz r12,0x28(r1) + l.lwz r13,0x2c(r1) + l.lwz r14,0x30(r1) + l.lwz r15,0x34(r1) + l.lwz r16,0x38(r1) + l.lwz r17,0x3c(r1) + l.lwz r18,0x40(r1) + l.lwz r19,0x44(r1) + l.lwz r20,0x48(r1) + l.lwz r21,0x4c(r1) + l.lwz r22,0x50(r1) + l.lwz r23,0x54(r1) + l.lwz r24,0x58(r1) + l.lwz r25,0x5c(r1) + l.lwz r26,0x60(r1) + l.lwz r27,0x64(r1) + l.lwz r28,0x68(r1) + l.lwz r29,0x6c(r1) + l.lwz r30,0x70(r1) + l.mfspr r31,r0,0x40 + l.lwz r31,0x74(r1) + l.lwz r3,0x78(r1) + + l.addi r1,r1,128 + l.rfe + l.nop + +_int_wrapper: + l.sw 0x8(r1),r4 + l.sw 0xc(r1),r5 + l.sw 0x10(r1),r6 + l.sw 0x14(r1),r7 + l.sw 0x18(r1),r8 + l.sw 0x1c(r1),r9 + l.sw 0x20(r1),r10 + l.sw 0x24(r1),r11 + l.sw 0x28(r1),r12 + l.sw 0x2c(r1),r13 + l.sw 0x30(r1),r14 + l.sw 0x34(r1),r15 + l.sw 0x38(r1),r16 + l.sw 0x3c(r1),r17 + l.sw 0x40(r1),r18 + l.sw 0x44(r1),r19 + l.sw 0x48(r1),r20 + l.sw 0x4c(r1),r21 + l.sw 0x50(r1),r22 + l.sw 0x54(r1),r23 + l.sw 0x58(r1),r24 + l.sw 0x5c(r1),r25 + l.sw 0x60(r1),r26 + l.sw 0x64(r1),r27 + l.sw 0x68(r1),r28 + l.sw 0x6c(r1),r29 + l.sw 0x70(r1),r30 + l.sw 0x74(r1),r31 + l.sw 0x78(r1),r3 + + l.movhi r3,hi(_int_main) + l.ori r3,r3,lo(_int_main) + l.jalr r3 + l.nop + + l.lwz r2,0x4(r1) + l.lwz r4,0x8(r1) + l.lwz r5,0xc(r1) + l.lwz r6,0x10(r1) + l.lwz r7,0x14(r1) + l.lwz r8,0x18(r1) + l.lwz r9,0x1c(r1) + l.lwz r10,0x20(r1) + l.lwz r11,0x24(r1) + l.lwz r12,0x28(r1) + l.lwz r13,0x2c(r1) + l.lwz r14,0x30(r1) + l.lwz r15,0x34(r1) + l.lwz r16,0x38(r1) + l.lwz r17,0x3c(r1) + l.lwz r18,0x40(r1) + l.lwz r19,0x44(r1) + l.lwz r20,0x48(r1) + l.lwz r21,0x4c(r1) + l.lwz r22,0x50(r1) + l.lwz r23,0x54(r1) + l.lwz r24,0x58(r1) + l.lwz r25,0x5c(r1) + l.lwz r26,0x60(r1) + l.lwz r27,0x64(r1) + l.lwz r28,0x68(r1) + l.lwz r29,0x6c(r1) + l.lwz r30,0x70(r1) + l.lwz r31,0x74(r1) + l.lwz r3,0x78(r1) + + l.mtspr r0,r0,SPR_PICSR + + l.addi r1,r1,128 + l.rfe + l.nop + +_align: + l.sw 0x0c(r1),r3 + l.sw 0x10(r1),r4 + l.sw 0x14(r1),r5 + l.sw 0x18(r1),r6 + l.sw 0x1c(r1),r7 + l.sw 0x20(r1),r8 + l.sw 0x24(r1),r9 + l.sw 0x28(r1),r10 + l.sw 0x2c(r1),r11 + l.sw 0x30(r1),r12 + l.sw 0x34(r1),r13 + l.sw 0x38(r1),r14 + l.sw 0x3c(r1),r15 + l.sw 0x40(r1),r16 + l.sw 0x44(r1),r17 + l.sw 0x48(r1),r18 + l.sw 0x4c(r1),r19 + l.sw 0x50(r1),r20 + l.sw 0x54(r1),r21 + l.sw 0x58(r1),r22 + l.sw 0x5c(r1),r23 + l.sw 0x60(r1),r24 + l.sw 0x64(r1),r25 + l.sw 0x68(r1),r26 + l.sw 0x6c(r1),r27 + l.sw 0x70(r1),r28 + l.sw 0x74(r1),r29 + l.sw 0x78(r1),r30 + l.sw 0x7c(r1),r31 + + l.mfspr r2,r0,SPR_EEAR_BASE /* Load the efective addres */ + l.mfspr r5,r0,SPR_EPCR_BASE /* Load the insn address */ + + l.lwz r3,0(r5) /* Load insn */ + l.srli r4,r3,26 /* Shift left to get the insn opcode */ + + l.sfeqi r4,0x00 /* Check if the load/store insn is in delay slot */ + l.bf jmp + l.sfeqi r4,0x01 + l.bf jmp + l.sfeqi r4,0x03 + l.bf jmp + l.sfeqi r4,0x04 + l.bf jmp + l.sfeqi r4,0x11 + l.bf jr + l.sfeqi r4,0x12 + l.bf jr + l.nop + l.j 1f + l.addi r5,r5,4 /* Increment PC to get return insn address */ + +jmp: + l.slli r4,r3,6 /* Get the signed extended jump length */ + l.srai r4,r4,4 + + l.lwz r3,4(r5) /* Load the real load/store insn */ + + l.add r5,r5,r4 /* Calculate jump target address */ + + l.j 1f + l.srli r4,r3,26 /* Shift left to get the insn opcode */ + +jr: + l.slli r4,r3,9 /* Shift to get the reg nb */ + l.andi r4,r4,0x7c + + l.lwz r3,4(r5) /* Load the real load/store insn */ + + l.add r4,r4,r1 /* Load the jump register value from the stack */ + l.lwz r5,0(r4) + + l.srli r4,r3,26 /* Shift left to get the insn opcode */ + + +1: l.mtspr r0,r5,SPR_EPCR_BASE + + l.sfeqi r4,0x26 + l.bf lhs + l.sfeqi r4,0x25 + l.bf lhz + l.sfeqi r4,0x22 + l.bf lws + l.sfeqi r4,0x21 + l.bf lwz + l.sfeqi r4,0x37 + l.bf sh + l.sfeqi r4,0x35 + l.bf sw + l.nop + +1: l.j 1b /* I don't know what to do */ + l.nop + +lhs: l.lbs r5,0(r2) + l.slli r5,r5,8 + l.lbz r6,1(r2) + l.or r5,r5,r6 + l.srli r4,r3,19 + l.andi r4,r4,0x7c + l.add r4,r4,r1 + l.j align_end + l.sw 0(r4),r5 + +lhz: l.lbz r5,0(r2) + l.slli r5,r5,8 + l.lbz r6,1(r2) + l.or r5,r5,r6 + l.srli r4,r3,19 + l.andi r4,r4,0x7c + l.add r4,r4,r1 + l.j align_end + l.sw 0(r4),r5 + +lws: l.lbs r5,0(r2) + l.slli r5,r5,24 + l.lbz r6,1(r2) + l.slli r6,r6,16 + l.or r5,r5,r6 + l.lbz r6,2(r2) + l.slli r6,r6,8 + l.or r5,r5,r6 + l.lbz r6,3(r2) + l.or r5,r5,r6 + l.srli r4,r3,19 + l.andi r4,r4,0x7c + l.add r4,r4,r1 + l.j align_end + l.sw 0(r4),r5 + +lwz: l.lbz r5,0(r2) + l.slli r5,r5,24 + l.lbz r6,1(r2) + l.slli r6,r6,16 + l.or r5,r5,r6 + l.lbz r6,2(r2) + l.slli r6,r6,8 + l.or r5,r5,r6 + l.lbz r6,3(r2) + l.or r5,r5,r6 + l.srli r4,r3,19 + l.andi r4,r4,0x7c + l.add r4,r4,r1 + l.j align_end + l.sw 0(r4),r5 + +sh: + l.srli r4,r3,9 + l.andi r4,r4,0x7c + l.add r4,r4,r1 + l.lwz r5,0(r4) + l.sb 1(r2),r5 + l.srli r5,r5,8 + l.j align_end + l.sb 0(r2),r5 + +sw: + l.srli r4,r3,9 + l.andi r4,r4,0x7c + l.add r4,r4,r1 + l.lwz r5,0(r4) + l.sb 3(r2),r5 + l.srli r5,r5,8 + l.sb 2(r2),r5 + l.srli r5,r5,8 + l.sb 1(r2),r5 + l.srli r5,r5,8 + l.j align_end + l.sb 0(r2),r5 + +align_end: + l.lwz r2,0x08(r1) + l.lwz r3,0x0c(r1) + l.lwz r4,0x10(r1) + l.lwz r5,0x14(r1) + l.lwz r6,0x18(r1) + l.lwz r7,0x1c(r1) + l.lwz r8,0x20(r1) + l.lwz r9,0x24(r1) + l.lwz r10,0x28(r1) + l.lwz r11,0x2c(r1) + l.lwz r12,0x30(r1) + l.lwz r13,0x34(r1) + l.lwz r14,0x38(r1) + l.lwz r15,0x3c(r1) + l.lwz r16,0x40(r1) + l.lwz r17,0x44(r1) + l.lwz r18,0x48(r1) + l.lwz r19,0x4c(r1) + l.lwz r20,0x50(r1) + l.lwz r21,0x54(r1) + l.lwz r22,0x58(r1) + l.lwz r23,0x5c(r1) + l.lwz r24,0x60(r1) + l.lwz r25,0x64(r1) + l.lwz r26,0x68(r1) + l.lwz r27,0x6c(r1) + l.lwz r28,0x70(r1) + l.lwz r29,0x74(r1) + l.lwz r30,0x78(r1) + l.mfspr r31,r0,0x40 + l.lwz r31,0x7c(r1) + l.addi r1,r1,128 + l.rfe
trunk/soc/sw/orpmon/reset.S Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/mc.h =================================================================== --- trunk/soc/sw/orpmon/mc.h (nonexistent) +++ trunk/soc/sw/orpmon/mc.h (revision 20) @@ -0,0 +1,113 @@ +/* mc.h -- Simulation of Memory Controller + Copyright (C) 2001 by Marko Mlinar, markom@opencores.org + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +/* Prototypes */ +#ifndef __MC_H +#define __MC_H + +#define N_CE (8) + +#define MC_CSR (0x00) +#define MC_POC (0x04) +#define MC_BA_MASK (0x08) +#define MC_CSC(i) (0x10 + (i) * 8) +#define MC_TMS(i) (0x14 + (i) * 8) + +#define MC_ADDR_SPACE (MC_CSC(N_CE)) + +/* POC register field definition */ +#define MC_POC_EN_BW_OFFSET 0 +#define MC_POC_EN_BW_WIDTH 2 +#define MC_POC_EN_MEMTYPE_OFFSET 2 +#define MC_POC_EN_MEMTYPE_WIDTH 2 + +/* CSC register field definition */ +#define MC_CSC_EN_OFFSET 0 +#define MC_CSC_MEMTYPE_OFFSET 1 +#define MC_CSC_MEMTYPE_WIDTH 2 +#define MC_CSC_BW_OFFSET 4 +#define MC_CSC_BW_WIDTH 2 +#define MC_CSC_MS_OFFSET 6 +#define MC_CSC_MS_WIDTH 2 +#define MC_CSC_WP_OFFSET 8 +#define MC_CSC_BAS_OFFSET 9 +#define MC_CSC_KRO_OFFSET 10 +#define MC_CSC_PEN_OFFSET 11 +#define MC_CSC_SEL_OFFSET 16 +#define MC_CSC_SEL_WIDTH 8 + +#define MC_CSC_MEMTYPE_SDRAM 0 +#define MC_CSC_MEMTYPE_SSRAM 1 +#define MC_CSC_MEMTYPE_ASYNC 2 +#define MC_CSC_MEMTYPE_SYNC 3 + +#define MC_CSR_VALID 0xFF000703LU +#define MC_POC_VALID 0x0000000FLU +#ifndef MC_BA_MASK_VALID +#define MC_BA_MASK_VALID 0x000000FFLU +#endif +#define MC_CSC_VALID 0x00FF0FFFLU +#define MC_TMS_SDRAM_VALID 0x0FFF83FFLU +#define MC_TMS_SSRAM_VALID 0x00000000LU +#define MC_TMS_ASYNC_VALID 0x03FFFFFFLU +#define MC_TMS_SYNC_VALID 0x01FFFFFFLU +#define MC_TMS_VALID 0xFFFFFFFFLU /* reg test compat. */ + +/* TMS register field definition SDRAM */ +#define MC_TMS_SDRAM_TRFC_OFFSET 24 +#define MC_TMS_SDRAM_TRFC_WIDTH 4 +#define MC_TMS_SDRAM_TRP_OFFSET 20 +#define MC_TMS_SDRAM_TRP_WIDTH 4 +#define MC_TMS_SDRAM_TRCD_OFFSET 17 +#define MC_TMS_SDRAM_TRCD_WIDTH 4 +#define MC_TMS_SDRAM_TWR_OFFSET 15 +#define MC_TMS_SDRAM_TWR_WIDTH 2 +#define MC_TMS_SDRAM_WBL_OFFSET 9 +#define MC_TMS_SDRAM_OM_OFFSET 7 +#define MC_TMS_SDRAM_OM_WIDTH 2 +#define MC_TMS_SDRAM_CL_OFFSET 4 +#define MC_TMS_SDRAM_CL_WIDTH 3 +#define MC_TMS_SDRAM_BT_OFFSET 3 +#define MC_TMS_SDRAM_BL_OFFSET 0 +#define MC_TMS_SDRAM_BL_WIDTH 3 + +/* TMS register field definition ASYNC */ +#define MC_TMS_ASYNC_TWWD_OFFSET 20 +#define MC_TMS_ASYNC_TWWD_WIDTH 6 +#define MC_TMS_ASYNC_TWD_OFFSET 16 +#define MC_TMS_ASYNC_TWD_WIDTH 4 +#define MC_TMS_ASYNC_TWPW_OFFSET 12 +#define MC_TMS_ASYNC_TWPW_WIDTH 4 +#define MC_TMS_ASYNC_TRDZ_OFFSET 8 +#define MC_TMS_ASYNC_TRDZ_WIDTH 4 +#define MC_TMS_ASYNC_TRDV_OFFSET 0 +#define MC_TMS_ASYNC_TRDV_WIDTH 8 + +/* TMS register field definition SYNC */ +#define MC_TMS_SYNC_TTO_OFFSET 16 +#define MC_TMS_SYNC_TTO_WIDTH 9 +#define MC_TMS_SYNC_TWR_OFFSET 12 +#define MC_TMS_SYNC_TWR_WIDTH 4 +#define MC_TMS_SYNC_TRDZ_OFFSET 8 +#define MC_TMS_SYNC_TRDZ_WIDTH 4 +#define MC_TMS_SYNC_TRDV_OFFSET 0 +#define MC_TMS_SYNC_TRDV_WIDTH 8 + +#endif
trunk/soc/sw/orpmon/mc.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/load.c =================================================================== --- trunk/soc/sw/orpmon/cmds/load.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/load.c (revision 20) @@ -0,0 +1,594 @@ +#include "common.h" +#include "support.h" +#include "flash.h" +#include "net.h" +#include "uart.h" +#include "spr_defs.h" + +#ifndef MAX_IMAGES +#define MAX_IMAGES 20 +#endif + +extern unsigned long fprog_addr; +extern char *tftp_filename; + +static flash_cfg_struct __attribute__ ((section(".config"))) gcfg = { 0, 0, 0, 0 }; + +#define FLASH_IMAGES_BASE 0xf0300000 + +/* Buffer Address == for example internal RAM */ +#define BUF_BASE_ADDR 0x00400000 - 0x00042000 +#define BUF_LENGTH 4096 + + +#define ALIGN(addr,size) ((addr + (size-1))&(~(size-1))) + +void copy_and_boot(unsigned long src, + unsigned long dst, + unsigned long len, + int tx_next) +{ + __asm__ __volatile__(" ;\ + l.addi r8,r0,0x1 ;\ + l.mtspr r0,r8,0x11 ;\ + l.nop ;\ + l.nop ;\ + l.nop ;\ + l.nop ;\ + l.nop ;\ +2: ;\ + l.sfgeu r4,r5 ;\ + l.bf 1f ;\ + l.nop ;\ + l.lwz r8,0(r3) ;\ + l.sw 0(r4),r8 ;\ + l.addi r3,r3,4 ;\ + l.j 2b ;\ + l.addi r4,r4,4 ;\ +1: l.sw 0x0(r0),r6 ;\ + l.ori r8,r0,0x100 ;\ + l.jr r8 ;\ + l.nop"); +} + +/* WARNING: stack and non-const globals should not be used in this function -- it may corrupt what have we loaded; + start_addr should be 0xffffffff if only copying should be made + no return, when start_addr != 0xffffffff, if successful */ +int copy_memory_run (register unsigned long src_addr, register unsigned long dst_addr, register unsigned long length, register int erase, register unsigned long start_addr) +{ + unsigned long i, flags; + + register char *dst = (char *) dst_addr; + register const char *src = (const char *) src_addr; + + if (dst_addr >= FLASH_BASE_ADDR) { + if (dst_addr + length >= FLASH_BASE_ADDR + FLASH_SIZE) { + printf ("error: region does not fit into flash.\n"); + return 1; + } +#ifndef CFG_IN_FLASH + fl_program (src_addr, dst_addr, length, erase, 1 /* do verify */); +#else + /* we must disable interrupts! */ + flags=mfspr(SPR_SR); + mtspr(SPR_SR,flags & ~(SPR_SR_TEE | SPR_SR_IEE)); + + printf("Unlocking flash... "); + for(i = 0; i < length; i += FLASH_BLOCK_SIZE) + fl_ext_unlock(dst_addr + i); + printf("done\n"); + + printf("Erasing flash... "); + for(i = 0; i < length; i += FLASH_BLOCK_SIZE) + fl_ext_erase(dst_addr+i); + printf("done\n"); + + printf("Programing flash:\n\t"); + for (i = 0; i < length; i += INC_ADDR) { + if(((i+INC_ADDR) % 1000) == 0) + printf("#"); + if((i % (65*1000)) == 0) + printf("\n\t"); + if (fl_ext_program (dst_addr + i, reg_read(src_addr + i))) { + printf("error programing at 0x%08lx!\n", dst_addr+i); + return 1; + } + } + printf("Verifying flash... "); + for(i = 0; i < length; i += INC_ADDR) { + if( reg_read(dst_addr+i) != reg_read(src_addr + i)) { + printf ("error at %08lx: %08lx != %08lx\n", src_addr + i, reg_read(src_addr + i), reg_read(dst_addr + i)); + return 1; + } + } + printf("OK!\n"); + mtspr(SPR_SR, flags); +#endif + if(start_addr == 0xffffffff) + return 0; + } + else { + while (length--) *dst++ = *src++; + if (start_addr == 0xffffffff) + return 0; + } + /* Run the program */ + ((void (*)(void)) start_addr)(); + return 0; /* just to satisfy the cc */ +} + +void bf_jump(unsigned long addr) +{ + asm("l.jr r3"); + asm("l.nop 0x0"); +} + +int boot_flash_cmd(int argc, char *argv[]) +{ + unsigned long addr,val,jaddr; + addr = 17; + val = 0; + /* clear SR */ + + asm("l.mtspr %0,%1,0": : "r" (addr), "r" (val)); + /* jump */ + if(argc == 0) + bf_jump(FLASH_BASE_ADDR+0x100); + else { + jaddr = strtoul(argv[0], 0, 0); + bf_jump(jaddr); + } + return 0; +} + +void +init_load (void) +{ +#ifdef CFG_IN_FLASH + copy_memory_run((unsigned long)&fl_word_program, (unsigned long)&fprog_addr, + 95, 0, 0xffffffff); + copy_memory_run((unsigned long)&fl_block_erase, (unsigned long)&fprog_addr+96, + 119, 0, 0xffffffff); + copy_memory_run((unsigned long)&fl_unlock_one_block, + (unsigned long)&fprog_addr+96+120, + 115, 0, 0xffffffff); + + fl_ext_program = (t_fl_ext_program)&fprog_addr; + fl_ext_erase = (t_fl_erase)&fprog_addr+96; + fl_ext_unlock = (t_fl_erase)&fprog_addr+96+120; + +#if 0 + printf("fl_word_program(): 0x%x\tfl_ext_program(): 0x%x\n", + &fl_word_program, fl_ext_program); + printf("fl_block_erase: 0x%x\tfl_ext_erase(): 0x%x\n", + &fl_block_erase, fl_ext_erase); + printf("fl_unlock_one_block(): 0x%x\tfl_ext_unlock(): 0x%x\n", + &fl_unlock_one_block, fl_ext_unlock); +#endif + +#else /* not CFG_IN_FLASH */ + fl_ext_program = (t_fl_ext_program)&fl_word_program; + fl_ext_erase = (t_fl_erase)&fl_block_erase; + fl_ext_unlock = (t_fl_erase)&fl_unlock_one_block; +#endif /* CFG_IN_FLASH */ + + global.ip = gcfg.eth_ip; + global.gw_ip = gcfg.eth_gw; + global.mask = gcfg.eth_mask; + global.srv_ip = gcfg.tftp_srv_ip; + tftp_filename = "boot.img"; + /*memcpy(tftp_filename, gcfg.tftp_filename, strlen(gcfg.tftp_filename)); + tftp_filename[strlen(gcfg.tftp_filename)] = '\0';*/ +} + +int tftp_cmd (int argc, char *argv[]) +{ + switch (argc) { + case 0: tftp_filename = "boot.img"; + break; + case 3: global.src_addr = strtoul (argv[2], 0, 0); + case 2: global.srv_ip = parse_ip (argv[1]); + case 1: tftp_filename = &argv[0][0]; + break; + } + NetLoop(TFTP); + return 0; +} + +int tftp_conf_cmd(int argc, char *argv[]) +{ + switch(argc) { + case 0: + printf("Image filename: %s", tftp_filename); + printf("\nSrc addr: 0x%lx", global.src_addr); + printf("\nServer IP: %s", inet_ntoa(global.srv_ip)); + return 0; + case 3: + global.src_addr = strtoul(argv[2], 0, 0); + global.srv_ip = inet_aton(argv[1]); + tftp_filename = argv[0]; + tftp_filename[strlen(argv[0])] = '\0'; + break; + case 2: + global.srv_ip = inet_aton(argv[1]); + tftp_filename = argv[0]; + break; + case 1: + tftp_filename = argv[0]; + break; + } + return 0; +} + +void save_global_cfg(flash_cfg_struct cfg) +{ + unsigned long dst = (unsigned long)&gcfg, src = (unsigned long)&cfg; + unsigned long i, end, flags; + + end = (unsigned long)&cfg + sizeof(flash_cfg_struct); + + printf("Saving global cfg from 0x%lx (end: 0x%lx) to 0x%lx...", src, end, dst); + + /* we must disable interrupts! */ + flags=mfspr(SPR_SR); + mtspr(SPR_SR,flags & ~(SPR_SR_TEE | SPR_SR_IEE)); + /* printf("Unlocking... ");*/ + for(i = 0; (src+i <= end); i += FLASH_BLOCK_SIZE) { + fl_ext_unlock(dst+i); + } + /* printf("done\n");*/ + /* printf("Erasing... ");*/ + for(i = 0; (src+i <= end); i += FLASH_BLOCK_SIZE) + fl_ext_erase(dst); + /* printf("done\n");*/ + /* printf("Programing... ");*/ + for(i = 0; (src+i <= end); i +=INC_ADDR) { + if(fl_ext_program(dst+i, reg_read(src+i))) { + printf("Error ocurred while saving.\n"); + return; + } + } + printf("done\n"); + + /* and than enable it back */ + mtspr(SPR_SR, flags); + return; +} + +int save_conf_cmd(int argc, char *argv[]) +{ + flash_cfg_struct newCfg; + + newCfg = gcfg; + + newCfg.eth_ip = global.ip; + newCfg.eth_mask = global.mask; + newCfg.eth_gw = global.gw_ip; + newCfg.tftp_srv_ip = global.srv_ip; + /* memcpy(newCfg.tftp_filename, tftp_filename, strlen(tftp_filename));*/ + + save_global_cfg(newCfg); + return 0; +} +int copy_cmd (int argc, char *argv[]) +{ + switch (argc) { + case 3: global.src_addr = strtoul (argv[2], 0, 0); + case 2: global.length = strtoul (argv[2], 0, 0); + case 1: global.src_addr = strtoul (argv[2], 0, 0); + case 0: return copy_memory_run (global.src_addr, global.dst_addr, global.length, + global.erase_method, 0xffffffff); + } + return -1; +} + +void +images_info(void) +{ + int i; + printf("Number of images: 0x%lx\n", gcfg.img_number); + for(i = 0; i < gcfg.img_number; i++) + printf("%d. image size: 0x%lx (at 0x%08lx)\n", i+1, + gcfg.img_length[i], gcfg.img_start_addr[i]); +} + +/* + * get_good_addr() + * + * Here we try to find the most suitable place for our image. We search for + * a hole between images, that is big enough (but as small as possible). + * + */ +unsigned long +get_good_addr(unsigned int size) +{ + unsigned long start_addr[MAX_IMAGES], end_addr[MAX_IMAGES]; + unsigned long free[MAX_IMAGES], st_addr[MAX_IMAGES]; + unsigned long tmpval; + unsigned int i = 0, j; + + flash_cfg_struct myCfg; + myCfg = gcfg; + + /* we are full */ + if(gcfg.img_number == MAX_IMAGES) + return 0xffffffff; + + if(gcfg.img_number == 0) + return FLASH_IMAGES_BASE; + + for(i = 0; i < MAX_IMAGES; i++) { + start_addr[i] = 0; + end_addr[i] = 0; + free[i] = 0; + st_addr[i] = 0; + } + + for(i = 0; i < myCfg.img_number; i++) { + start_addr[i] = myCfg.img_start_addr[i]; + end_addr[i] = ALIGN((myCfg.img_start_addr[i] + myCfg.img_length[i]), + FLASH_BLOCK_SIZE); + } + /* printf("\n"); + for(i = 0; i < myCfg.img_number; i++) + printf("start: 0x%08x, end: 0x%08x\n", start_addr[i], end_addr[i]); + printf("\n");*/ + /* bubble sorting by start_addr */ + + for(j = myCfg.img_number - 1; j > 0; j--) + for(i = 0; i < j; i++) + if(start_addr[i] > start_addr[i+1]) { + tmpval = start_addr[i]; + start_addr[i] = start_addr[i+1]; + start_addr[i+1] = tmpval; + tmpval = end_addr[i]; + end_addr[i] = end_addr[i+1]; + end_addr[i+1] = tmpval; + } + + /* for(i = 0; i < myCfg.img_number; i++) + printf("start: 0x%08x, end: 0x%08x\n", start_addr[i], end_addr[i]); + printf("\n");*/ + + /* now we calculate free space betwens segments */ + for(i = 1; i < myCfg.img_number; i++) { + st_addr[i] = end_addr[i - 1]; + free[i] = start_addr[i] - end_addr[i - 1]; + } + + /* here we calcuta first position (starting with FLASH_IMAGES_BASE)... */ + st_addr[0] = FLASH_IMAGES_BASE + 0; + free[0] = start_addr[0] - FLASH_IMAGES_BASE; + /* ... and last one (ending with FLASH_IMAGES_BASE + FLASH_SIZE). */ + st_addr[myCfg.img_number] = end_addr[myCfg.img_number-1]; + free[myCfg.img_number] = (FLASH_IMAGES_BASE + FLASH_SIZE) - end_addr[myCfg.img_number-1]; + + /* for(i = 0; i < myCfg.img_number+1; i++) + printf("start: 0x%08x, free: %x\n", st_addr[i], free[i]); + printf("\n");*/ + + /* yet another bubble sort by free (space) */ + for(j = myCfg.img_number; j > 0; j--) + for(i = 0; i < j; i++) + if(free[i] > free[i+1]) { + tmpval = free[i]; + free[i] = free[i+1]; + free[i+1] = tmpval; + tmpval = st_addr[i]; + st_addr[i] = st_addr[i+1]; + st_addr[i+1] = tmpval; + } + + /* for(i = 0; i < myCfg.img_number+1; i++) + printf("start: 0x%08x, free: %x\n", st_addr[i], free[i]); + printf("\n");*/ + + /* now we pick the smallest but just big enough for our size */ + for(i = 0; i <= myCfg.img_number; i++) + if(free[i] >= size) + return st_addr[i]; + + /* there is not enough space (in one segment) left */ + return 0; +} + +unsigned long +prepare_img_data(unsigned int num, unsigned int size) +{ + int i; + unsigned long addr=0; + flash_cfg_struct newCfg; + + newCfg = gcfg; + + if(newCfg.img_number >= MAX_IMAGES) { + printf("Maximum images exceeded: %d\n", MAX_IMAGES); + return 0xffffffff; + } + + newCfg.img_number++; + + if((num > newCfg.img_number) || (num == 0)) + num = newCfg.img_number; + + addr = get_good_addr(size); + if(addr == 0x00) { + printf("Can not find suitable place in flash. (None of free segments are big enough)\n"); + return 0xffffffff; + } + + if(num < newCfg.img_number) + for(i=newCfg.img_number-1; i >= num; i--) { + newCfg.img_length[i] = newCfg.img_length[i-1]; + newCfg.img_start_addr[i] = newCfg.img_start_addr[i-1]; + } + + newCfg.img_length[num-1] = size; + newCfg.img_start_addr[num-1] = addr; + + save_global_cfg(newCfg); + return addr; +} + +int +del_image_cmd(int argc, char *argv[]) +{ + unsigned num, i; + flash_cfg_struct newCfg = gcfg; + + newCfg.img_number = gcfg.img_number; + for(i = 0; i < MAX_IMAGES; i++) + newCfg.img_length[i] = gcfg.img_length[i]; + + printf("Number of images available: 0x%lx\n", newCfg.img_number); + + if(argc == 0) { + newCfg.img_number = 0; + for(i = 0; i < MAX_IMAGES; i++) { + newCfg.img_length[i] = 0; + newCfg.img_start_addr[i] = 0; + } + save_global_cfg(newCfg); + return 0; + } + else { + num = strtoul(argv[0], 0, 0); + } + + if(newCfg.img_number == 0) { + printf("Nothing to delete!\n"); + return 0; + } + if((num == 0) || (num > newCfg.img_number)) + num = newCfg.img_number; + + for(i=num-1; i < newCfg.img_number; i++) { + newCfg.img_length[i] = newCfg.img_length[i+1]; + newCfg.img_start_addr[i] = newCfg.img_start_addr[i+1]; + } + + newCfg.img_number--; + save_global_cfg(newCfg); + return 0; +} + +int +boot_cmd(int argc, char *argv[]) +{ + int num; + extern int tx_next; + + if(argc == 0) { + images_info(); + return 0; + } + + num = strtoul(argv[0],0,0); + if(gcfg.img_number < num) { + printf("There are only %lu images, you requested %d!\n", gcfg.img_number, num); + return -1; + } + + printf("Copying image number %d from 0x%lx, size: 0x%lx...", + num, gcfg.img_start_addr[num-1], gcfg.img_length[num-1]); + + printf("booting...\n"); + copy_and_boot(gcfg.img_start_addr[num-1], 0x0, gcfg.img_length[num-1], tx_next); + return 0; +} + +int mGetData(unsigned long); + +int sboot_cmd (int argc, char *argv[]) +{ + int copied; + unsigned int num = 0xffffffff, addr = 0x0; + + switch(argc) { + case 0: + num = 0xffffffff; + break; + case 1: + num = strtoul(argv[0], 0, 0); + break; + } + + copied = mGetData(global.src_addr); + if(copied <= 0) { + printf("sboot: error while getting the image!"); + return -1; + } + printf("image size: 0x%x\n", copied); + + if(num != 0xffffffff) { + addr = prepare_img_data(num, copied); + if(addr == 0xffffffff) + printf("Image not written to flash!\n"); + else { + printf("Copying image to flash, image number: %d, dst_addr: 0x%x\n", + num, addr); + copy_memory_run(global.src_addr, gcfg.img_start_addr[num-1], copied, 2, 0xffffffff); + } + } + + return 0; +} + +int tboot_cmd (int argc, char *argv[]) +{ + int copied; + unsigned int num = 0xffffffff, addr = 0x0; + extern int tx_next; + + switch (argc) { + case 0: + num = 0xffffffff; + break; + case 1: + printf("argv[0] %p\n", argv[0]); + num = strtoul(argv[0], 0, 0); + printf("num %d\n", num); + break; + } + + // global.src_addr = (unsigned long)0x0; + + copied =NetLoop(TFTP); + if (copied <= 0) { + printf("tboot: error while getting the image '%s'", + tftp_filename); + return -1; + } + + if(num != 0xffffffff) { + addr = prepare_img_data(num, copied); + if(addr == 0xffffffff) + printf("Image not written to flash!\n"); + else { + printf("Copying image to flash, image number: %d, dst_addr: 0x%x\n", + num, addr); + copy_memory_run(global.src_addr, gcfg.img_start_addr[num-1], copied, 2, 0xffffffff); + } + } + /* the point of no return */ + printf("tboot: copying 0x%lx -> 0x0, image size 0x%x...\n", + global.src_addr, copied); + + printf("tboot: jumping to 0x100, booting image ...\n"); + copy_and_boot(global.src_addr, 0x0, 0x0 + copied, tx_next); + return 0; +} + +void module_load_init (void) +{ + register_command ("tftp", "[ [ []]]", "TFTP download", tftp_cmd); + register_command ("tftp_conf", "[ [ [ ]]]", "TFTP configuration", tftp_conf_cmd); + register_command ("copy", "[ []]]", "Copy memory", copy_cmd); + register_command ("tboot", "[]", "Bootstrap image downloaded via tftp", tboot_cmd); + register_command ("sboot", "[]", "Bootstrap image downloaded via serial (Y/X modem)", sboot_cmd); + register_command ("boot", "[]", "Bootstrap image copied from flash.", boot_cmd); + register_command ("del_image", "[]", "Delete image", del_image_cmd); + register_command ("save_conf", "", "Save current configuration into flash", save_conf_cmd); + register_command ("boot_flash", "[]", "Boot image from (default from flash)", boot_flash_cmd); + init_load(); +}
trunk/soc/sw/orpmon/cmds/load.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/eth.c =================================================================== --- trunk/soc/sw/orpmon/cmds/eth.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/eth.c (revision 20) @@ -0,0 +1,391 @@ +#include "common.h" +#include "uart.h" +#include "eth.h" +#include "support.h" +#include "spr_defs.h" +#include "net.h" + +#if 0 +extern int tx_pointer_index; +unsigned long dest_mac_addr[6]; + +void show_tx_bd(int start, int max) +{ + int i; + + for(i = start; i <= max; i++) { + /* Read Tx BD */ + printf ("LEN:%04lx", REG32(ETH_BD_BASE + (i << 3)) >> 16); + printf (" RD:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 15) & 0x1); + printf (" IRQ:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 14) & 0x1); + printf (" WR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 13) & 0x1); + printf (" PAD:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 12) & 0x1); + printf (" CRC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 11) & 0x1); + printf (" UR:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 8) & 0x1); + printf (" RTRY:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 4) & 0xf); + printf (" RL:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 3) & 0x1); + printf (" LC:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 2) & 0x1); + printf (" DF:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 1) & 0x1); + printf (" CS:%04lx", (REG32(ETH_BD_BASE + (i << 3)) >> 0) & 0x1); + printf ("\nTx Buffer Pointer: %08lx\n", REG32(ETH_BD_BASE + (i << 3) + 4)); + } +} + +void show_rx_bd (int start, int max) +{ + int i; + unsigned long rx_bd_base, rx_bd_num; + + rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM); + rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2); + + for(i = start; i <= max; i++){ + /* Read Rx BD */ + printf ("LEN:%04lx", REG32(rx_bd_base + (i << 3)) >> 16); + printf (" E:%04lx", (REG32(rx_bd_base + (i << 3)) >> 15) & 0x1); + printf (" IRQ:%04lx", (REG32(rx_bd_base + (i << 3)) >> 14) & 0x1); + printf (" WR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 13) & 0x1); + printf (" M:%04lx", (REG32(rx_bd_base + (i << 3)) >> 7) & 0x1); + printf (" OR:%04lx", (REG32(rx_bd_base + (i << 3)) >> 6) & 0x1); + printf (" IS:%04lx", (REG32(rx_bd_base + (i << 3)) >> 5) & 0x1); + printf (" DN:%04lx", (REG32(rx_bd_base + (i << 3)) >> 4) & 0x1); + printf (" TL:%04lx", (REG32(rx_bd_base + (i << 3)) >> 3) & 0x1); + printf (" SF:%04lx", (REG32(rx_bd_base + (i << 3)) >> 2) & 0x1); + printf (" CRC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 1) & 0x1); + printf (" LC:%04lx", (REG32(rx_bd_base + (i << 3)) >> 0) & 0x1); + printf ("\nRx Buffer Pointer: %08lx\n", REG32(rx_bd_base + (i << 3) + 4)); + } +} + +void show_buffer(unsigned long start_addr, unsigned long len) +{ + show_mem(start_addr, start_addr + len - 1); +} + +void show_rx_buffs(int max, int show_all) +{ + + int i; + unsigned long rx_bd_base, rx_bd_num; + + rx_bd_num = REG32(ETH_REG_BASE + ETH_RXBD_NUM); + rx_bd_base = ETH_BD_BASE + (rx_bd_num << 2); + + for(i=0; i<=max; i++) + { + if (!(REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_EMPTY) || show_all) + { + printf ("Rx BD No. %04x located at %08lx\n", i, rx_bd_base + (i << 3)); + show_rx_bd(i, i); + show_buffer(REG32(rx_bd_base + (i << 3) + 4), REG32(rx_bd_base + (i << 3)) >> 16); + printf ("\n"); + } + if (REG32(rx_bd_base + (i << 3)) & ETH_RX_BD_WRAP) + return; + } +} + +void show_tx_buffs(int max) +{ + int i; + + for(i=0; i<=max; i++) + { + if (1) + { + printf ("Tx BD No. %04x located at %08x\n", i, ETH_BD_BASE + (i << 3)); + show_tx_bd(i, i); + show_buffer(REG32(ETH_BD_BASE + (i << 3) + 4), REG32(ETH_BD_BASE + (i << 3)) >> 16); + printf ("\n"); + } + if (REG32(ETH_BD_BASE + (i << 3)) & ETH_TX_BD_WRAP) + return; + } +} + +void show_phy_reg (unsigned long start_addr, unsigned long stop_addr) +{ + + unsigned long addr; + + if (start_addr == stop_addr) + { + printf ("\nSet MII RGAD ADDRESS to %08lx", start_addr); + printf ("\nMII Command = Read Status\n"); + } + + for (addr = start_addr; addr <= stop_addr; addr++) + { + REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr<<8; + REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_RSTAT; + + printf ("PHY %04lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS) & 0x1f); + printf (", addr %04lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS) >> 8); + printf (": %08lx\n", REG32(ETH_REG_BASE + ETH_MIIRX_DATA)); + } +} + +void set_phy_reg (unsigned long addr, unsigned long val) +{ + printf ("\nSet MII RGAD ADDRESS to %08lx", addr); + + REG32(ETH_REG_BASE + ETH_MIIADDRESS) = addr<<8; + + printf ("\nMII Command = Write Control Data\n"); + REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_WCTRLDATA; + + REG32(ETH_REG_BASE + ETH_MIITX_DATA) = val; + + show_phy_reg(addr, addr); +} + +void send_packet (unsigned long len, unsigned long start_data, int num_of_packets) +{ + unsigned long i, TxBD; + + while (num_of_packets--) { + unsigned long *data = (unsigned long *)eth_get_tx_buf (); + + /* Set dest & src address */ + *data++ = dest_mac_addr[0] << 24 | + dest_mac_addr[1] << 16 | + dest_mac_addr[2] << 8 | + dest_mac_addr[3] << 0; + + *data++ = dest_mac_addr[4] << 24 | + dest_mac_addr[5] << 16 | + ETH_MACADDR0 << 8 | + ETH_MACADDR1 << 0; + + *data++ = ETH_MACADDR2 << 24 | + ETH_MACADDR3 << 16 | + ETH_MACADDR4 << 8 | + ETH_MACADDR5 << 0; + + /* Write data to buffer */ + for(i = 12; i < len; i += 4) + *data++ = (i + start_data - 12) << 24 | (i + start_data + 1 - 12) << 16 | + (i + start_data + 2 - 12) << 8 | (i + start_data + 3 - 12); + + eth_send (data, len); + printf ("."); + } +} + +int eth_init_cmd (int argc, char *argv[]) +{ + if (argc) return -1; + eth_init (0); + return 0; +} + +int show_txbd_cmd (int argc, char *argv[]) +{ + int i; + int start, max; + + if (argc == 1) show_tx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0)); + else if (argc == 2) show_tx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0)); + else show_tx_bd (0, 63); + return 0; +} + +int show_rxbd_cmd (int argc, char *argv[]) +{ + if (argc == 1) show_rx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0)); + else if (argc == 2) show_rx_bd (strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0)); + else show_rx_bd (0, 63); + return 0; +} + +int send_packet_cmd (int argc, char *argv[]) +{ + if (argc == 1) send_packet(strtoul (argv[0], NULL, 0), 31, 1); + else if (argc == 2) send_packet(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0), 1); + else if (argc == 3) send_packet(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0), strtoul (argv[2], NULL, 0)); + else return -1; + return 0; +} + +int set_dest_addr_cmd (int argc, char *argv[]) +{ + if (argc == 3) { + dest_mac_addr[0] = (strtoul (argv[0], NULL, 0) >> 8) & 0xff; + dest_mac_addr[1] = (strtoul (argv[0], NULL, 0) >> 0) & 0xff; + dest_mac_addr[2] = (strtoul (argv[1], NULL, 0) >> 8) & 0xff; + dest_mac_addr[3] = (strtoul (argv[1], NULL, 0) >> 0) & 0xff; + dest_mac_addr[4] = (strtoul (argv[2], NULL, 0) >> 8) & 0xff; + dest_mac_addr[5] = (strtoul (argv[2], NULL, 0) >> 0) & 0xff; + } else return -1; + return 0; +} + +int init_txbd_pool_cmd (int argc, char *argv[]) +{ +#if 0 + if (argc == 1) init_tx_bd_pool(strtoul (argv[0], NULL, 0)); + else return -1; +#endif + return 0; +} + +int init_rxbd_pool_cmd (int argc, char *argv[]) +{ + if (argc == 1) init_rx_bd_pool(strtoul (argv[0], NULL, 0)); + else return -1; + return 0; +} + +int show_phy_reg_cmd (int argc, char *argv[]) +{ + if (argc == 1) show_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[0], NULL, 0)); + else if (argc == 2) show_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0)); + else show_phy_reg(0, 30); + return 0; +} + +int set_phy_reg_cmd (int argc, char *argv[]) +{ + if (argc == 2) set_phy_reg(strtoul (argv[0], NULL, 0), strtoul (argv[1], NULL, 0)); + else return -1; + return 0; +} + +int show_mac_regs_cmd (int argc, char *argv[]) +{ + if (argc) return -1; + printf ("\n %08x", ETH_REG_BASE + ETH_MODER); + printf (" MODER: %08lx",REG32(ETH_REG_BASE + ETH_MODER)); + + printf ("\n %08x", ETH_REG_BASE + ETH_INT); + printf (" INT: %08lx", REG32(ETH_REG_BASE + ETH_INT)); + + printf ("\n %08x", ETH_REG_BASE + ETH_INT_MASK); + printf (" INT_MASK: %08lx", REG32(ETH_REG_BASE + ETH_INT_MASK)); + + printf ("\n %08x", ETH_REG_BASE + ETH_IPGT); + printf (" IPGT: %08lx", REG32(ETH_REG_BASE + ETH_IPGT)); + + printf ("\n %08x", ETH_REG_BASE + ETH_IPGR1); + printf (" IPGR1: %08lx", REG32(ETH_REG_BASE + ETH_IPGR1)); + + printf ("\n %08x", ETH_REG_BASE + ETH_IPGR2); + printf (" IPGR2: %08lx", REG32(ETH_REG_BASE + ETH_IPGR2)); + + printf ("\n %08x", ETH_REG_BASE + ETH_PACKETLEN); + printf (" PACKETLEN: %08lx", REG32(ETH_REG_BASE + ETH_PACKETLEN)); + + printf ("\n %08x", ETH_REG_BASE + ETH_COLLCONF); + printf (" COLLCONF: %08lx", REG32(ETH_REG_BASE + ETH_COLLCONF)); + + printf ("\n %08x", ETH_REG_BASE + ETH_RXBD_NUM); + printf (" RX_BD_NUM: %08lx", REG32(ETH_REG_BASE + ETH_RXBD_NUM)); + + printf ("\n %08x", ETH_REG_BASE + ETH_CTRLMODER); + printf (" CTRLMODER: %08lx", REG32(ETH_REG_BASE + ETH_CTRLMODER)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MIIMODER); + printf (" MIIMODER: %08lx", REG32(ETH_REG_BASE + ETH_MIIMODER)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MIICOMMAND); + printf (" MIICOMMAND: %08lx", REG32(ETH_REG_BASE + ETH_MIICOMMAND)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MIIADDRESS); + printf (" MIIADDRESS: %08lx", REG32(ETH_REG_BASE + ETH_MIIADDRESS)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MIITX_DATA); + printf (" MIITX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIITX_DATA)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MIIRX_DATA); + printf (" MIIRX_DATA: %08lx", REG32(ETH_REG_BASE + ETH_MIIRX_DATA)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MIISTATUS); + printf (" MIISTATUS: %08lx", REG32(ETH_REG_BASE + ETH_MIISTATUS)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR0); + printf (" MAC_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR0)); + + printf ("\n %08x", ETH_REG_BASE + ETH_MAC_ADDR1); + printf (" MAC_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_MAC_ADDR1)); + + printf ("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR0); + printf (" ETH_HASH_ADDR0: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR0)); + + printf ("\n %08x", ETH_REG_BASE + ETH_HASH_ADDR1); + printf (" ETH_HASH_ADDR1: %08lx", REG32(ETH_REG_BASE + ETH_HASH_ADDR1)); + + printf ("\n"); + return 0; +} + +int eth_int_enable_cmd (int argc, char *argv[]) +{ + if (argc) return -1; + eth_int_enable (); + return 0; +} +int show_rx_buffs_cmd (int argc, char *argv[]) +{ + if (argc == 0) show_rx_buffs(63, 0); + else if (argc == 1) show_rx_buffs(63, 1); + else return -1; + return 0; +} + +int show_tx_buffs_cmd (int argc, char *argv[]) +{ + if (argc == 0) show_tx_buffs(63); + else return -1; + return 0; +} +#endif + +int eth_conf_cmd(int argc, char *argv[]) +{ + switch(argc) { + case 0: + printf("IP: %s", inet_ntoa(global.ip)); + printf("\nmask: %s", inet_ntoa(global.mask)); + printf("\nGW: %s", inet_ntoa(global.gw_ip)); + return 0; + case 3: + global.gw_ip = inet_aton(argv[2]); + case 2: + global.mask = inet_aton(argv[1]); + case 1: + global.ip = inet_aton(argv[0]); + break; + } + printf("Restarting network with new parameters..."); + NetStartAgain(); + + return 0; +} + +void module_eth_init (void) +{ +#if 0 + register_command ("eth_init", "", "init ethernet", eth_init_cmd); + register_command ("show_txbd", "[] []", "show Tx buffer desc", show_txbd_cmd); + register_command ("show_rxbd", "[] []", "show Rx buffer desc", show_rxbd_cmd); + register_command ("send_packet", " [] []", "create & send packet(s)", send_packet_cmd); + register_command ("set_dest_addr", " ", "set destination address (for send_packet)", set_dest_addr_cmd); + register_command ("init_txbd_pool", "", "initialize Tx buffer descriptors", init_txbd_pool_cmd); + register_command ("init_rxbd_pool", "", "initialize Rx buffer descriptors", init_rxbd_pool_cmd); + register_command ("show_phy_reg", "[] []", "show PHY registers", show_phy_reg_cmd); + register_command ("set_phy_reg", " ", "set PHY register", set_phy_reg_cmd); + register_command ("show_mac_regs", "", "show all MAC registers", show_mac_regs_cmd); + register_command ("eth_int_enable", "", "enable ethernet interrupt", eth_int_enable_cmd); + register_command ("show_rx_buffs", "[]", "show receive buffers (optional arg will also show empty buffers)", show_rx_buffs_cmd); + register_command ("show_tx_buffs", "", "show transmit buffers", show_rx_buffs_cmd); +#endif + /* Initialize controller */ + register_command ("eth_conf", "[ [ []]]", "Get/set ethernet configuration", eth_conf_cmd); +#if 0 + eth_init(); + printf ("Ethernet not initialized (run eth_init command)\n"); + init_rx_bd_pool(0); + init_tx_bd_pool(3); +#endif +} +
trunk/soc/sw/orpmon/cmds/eth.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/global.c =================================================================== --- trunk/soc/sw/orpmon/cmds/global.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/global.c (revision 20) @@ -0,0 +1,90 @@ +#include "common.h" +#include "support.h" + +global_struct global; + +int src_addr_cmd (int argc, char *argv[]) +{ + if (argc == 1) { + global.src_addr = strtoul (argv[0], 0, 0); + return 0; + } else return -1; +} + +int dst_addr_cmd (int argc, char *argv[]) +{ + if (argc == 1) { + global.dst_addr = strtoul (argv[0], 0, 0); + return 0; + } else return -1; +} + +int length_cmd (int argc, char *argv[]) +{ + if (argc == 1) { + global.length = strtoul (argv[0], 0, 0); + return 0; + } else return -1; +} + +int ip_cmd (int argc, char *argv[]) +{ + if (argc == 1) { + global.ip = parse_ip (argv[0]); + return 0; + } else return -1; +} + +int srv_ip_cmd (int argc, char *argv[]) +{ + if (argc == 1) { + global.srv_ip = parse_ip (argv[0]); + return 0; + } else return -1; +} + +int erase_method_cmd (int argc, char *argv[]) +{ + if (argc == 1) { + int a = strtoul (argv[0], 0, 0); + if (a < 0 || a > 2) return -1; + global.erase_method = a; + return 0; + } else return -1; +} + +int start_addr_cmd (int argc, char *argv[]) +{ + if (argc == 1) { + global.start_addr = strtoul (argv[0], 0, 0); + return 0; + } else return -1; +} + +#if HELP_ENABLED +int globals_cmd (int argc, char *argv[]) +{ + const char *erase_method_desc[] = {"do not erase", "fully", "as needed"}; + if (argc) return -1; + printf ("src_addr = %08lx\n", global.src_addr); + printf ("dst_addr = %08lx\n", global.dst_addr); + printf ("start_addr = %08lx\n", global.start_addr); + printf ("length = %08lx\n", global.length); + printf ("ip = %08lx\n", global.ip); + printf ("srv_ip = %08lx\n", global.srv_ip); + printf ("erase_method = %i (%s)\n", (int)global.erase_method, erase_method_desc[global.erase_method]); + return 0; +} +#endif /* HELP_ENABLED */ + +void module_global_init (void) +{ + register_command ("src_addr", "", "sets global parameter source address", src_addr_cmd); + register_command ("dst_addr", "", "sets global parameter destination address", dst_addr_cmd); + register_command ("start_addr", "", "sets start address", start_addr_cmd); + register_command ("length", "", "sets global parameter length", length_cmd); + register_command ("ip", " ", "sets global parameter ip address", ip_cmd); + register_command ("srv_ip", " ", "sets global parameter server ip address", srv_ip_cmd); + register_command ("erase_method", " ", "sets flash erase method (0 = do not erase, 1 = fully, 2 = as needed)", erase_method_cmd); + if (HELP_ENABLED) register_command ("globals", "", "show globals", globals_cmd); +}
trunk/soc/sw/orpmon/cmds/global.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/touch.c =================================================================== --- trunk/soc/sw/orpmon/cmds/touch.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/touch.c (revision 20) @@ -0,0 +1,51 @@ +#include "common.h" +#include "support.h" +#include "spi.h" + +int touch_cmd (int argc, char *argv[]) +{ + unsigned long x, y, z1, z2; + float res; + + if (argc == 0) { + printf("usage: -r read coordinates\n"); + printf(" -c read coordinates in a loop (press any key to exit)\n"); + } + else if (argc == 1) { + if (!strcmp(argv[0], "-r")) { + spi_init(0, 1000000, 21, 0, 1, 0); + printf("X = %.3lx\n", spi_xmit(0xd3l << 13) & 0xfff); + printf("Y = %.3lx\n", spi_xmit(0x93l << 13) & 0xfff); + } + else if (!strcmp(argv[0], "-c")) { + spi_init(0, 1000000, 21, 0, 1, 0); + while (1) { + x = spi_xmit(0xd3l << 13) & 0xfff; + z1 = spi_xmit(0xb3l << 13) & 0xfff; + z2 = spi_xmit(0xc3l << 13) & 0xfff; + res = (z2/z1) - 1; + res = ((float)x * res)/4096; + if ((int)res < 20) { + y = spi_xmit(0x93l << 13) & 0xfff; + printf("X = %.3lx\n", x); + printf("Y = %.3lx\n\n", y); + } + if (testc()) + break; + } + } + } + else { + printf("usage: -r read coordinates\n"); + printf(" -c read coordinates in a loop (press any key to exit)\n"); + } + + return 0; +} + +void module_touch_init (void) +{ + register_command ("touch", "", "touch screen utility", touch_cmd); +} + +
trunk/soc/sw/orpmon/cmds/touch.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/atabug.c =================================================================== --- trunk/soc/sw/orpmon/cmds/atabug.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/atabug.c (revision 20) @@ -0,0 +1,682 @@ +/* + atabug.c -- ATA debugging + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + +#include "support.h" +#include "common.h" +#include "atabug.h" +#include "ata.h" + +#include + +static int ata_num_commands; +static command_struct ata_command[MAX_ATA_COMMANDS]; + +/* inode struct for ata */ +static struct inode _inode; +static struct inode *inode = &_inode; + +/* file struct for ata */ +static struct file _filp; +static struct file *filp = &_filp; + +/* buffer for ata-data */ +static unsigned char buf[512]; + + +/**********************************************************************/ +/* */ +/* A T A B U G */ +/* */ +/**********************************************************************/ +/* + A T A _ I N I T + + initializes the ATA core, and registers it with ORPmon +*/ +void module_ata_init (void) +{ + ata_num_commands = 0; + + register_command ("atabug", "", "ATA debugger. Type 'atabug help' for help", atabug); + + register_ata_command ("help", "", "Display this help message", atabug_help); + register_ata_command ("exit", "", "Exit atabug and return to ORPmon", atabug_exit); + register_ata_command ("open", " []", "Opens the requested device. Device=<0|1>, Mode=eadonly|readrite.", ata_open_cmd); + register_ata_command ("close", "", "Closes the device.", ata_close_cmd); + register_ata_command ("reset", "", "Reset ata device(s).", ata_reset_cmd); + register_ata_command ("enable", "", "Enables ATA host controller, clears all resets", ata_enable_cmd); + register_ata_command ("dump_dev_regs", "", "Dump the (readable) ata device registers.", ata_dump_device_regs_cmd); + register_ata_command ("dump_host_regs", "", "Dump the ata host registers.", ata_dump_host_regs_cmd); + register_ata_command ("exec_cmd", "", "Execute ata command (hex)", ata_exec_cmd_cmd); + register_ata_command ("identify_device", "", "Dumps device's IDENTIFY DEVICE block.", ata_identify_device_cmd); + register_ata_command ("program_timing", "", "Programs the device to the selected PIO mode.", ata_set_piomode_cmd); + register_ata_command ("read_sectors", " []", "Reads sector", ata_read_sectors_cmd); + register_ata_command ("read_mbr", "", "Reads the Master Boot Record.", ata_read_mbr_cmd); + register_ata_command ("read_dosboot", "", "Reads the device's bootsector (FAT).", ata_read_dosboot_cmd); + register_ata_command ("select_device", "", "Select ata device. device_no=<0|1>", ata_select_device_cmd); +} + + +int atabug(int argc, char **argv) +{ + + /* take care of commandline options */ + if (argc == 0) + { + /* start atabug */ + while ( !ata_mon_command() ); + } + else + return execute_ata_command(argv[0], argc -1, &argv[1]); + + return 0; +} + +int atabug_exit(int argc, char **argv) +{ + ata_close_cmd(argc, argv); + return -2; +} + +/* + The next code is graceously taken from the "common.c" file + and slightly modified to suit the big list of ATA commands + + Better would be if we could access the routines in 'common.c' + directly, using our own set of commands. +*/ + +/* Process command-line, generate arguments */ +int ata_mon_command(void) +{ + char c = '\0'; + char str[1000]; + char *pstr = str; + char *command_str; + char *argv[20]; + int argc = 0; + + + /* Show prompt */ + printf ("\natabug> "); + + + /* Get characters from UART */ + c = getc(); + while (c != '\r' && c != '\f' && c != '\n') + { + if (c == '\b') + pstr--; + else + *pstr++ = c; + putc(c); + c = getc(); + } + *pstr = '\0'; + printf ("\n"); + + /* Skip leading blanks */ + pstr = str; + while ( isspace(*pstr) ) pstr++; + + /* Get command from the string */ + command_str = pstr; + + while (1) { + /* Go to next argument */ + while ( isgraph(*pstr) ) pstr++; + if (*pstr) { + *pstr++ = '\0'; + while ( isspace(*pstr) ) pstr++; + argv[argc++] = pstr; + } + else + break; + } + + return execute_ata_command(command_str, argc, argv); +} + + +int execute_ata_command(char *command_str, int argc, char **argv) +{ + int i, found = 0; + + for (i = 0; i < ata_num_commands; i++) + if ( !strcmp(command_str, ata_command[i].name) ) + { + switch ( ata_command[i].func(argc, argv) ) + { + case -1: + printf ("Missing/wrong parameters, usage: %s %s\n", ata_command[i].name, ata_command[i].params); + break; + + case -2: + return -1; + } + + found++; + break; + } + + if (!found) + printf ("Unknown command. Type 'ata help' for help.\n"); + + return 0; +} + + +void register_ata_command (const char *name, const char *params, const char *help, int (*func)(int argc, char *argv[]) ) +{ + if (ata_num_commands < MAX_ATA_COMMANDS) + { + ata_command[ata_num_commands].name = name; + ata_command[ata_num_commands].params = params; + ata_command[ata_num_commands].help = help; + ata_command[ata_num_commands].func = func; + ata_num_commands++; + } + else + printf ("ata-command '%s' ignored; MAX_COMMANDS limit reached\n", name); +} + +int atabug_help(int argc, char **argv) +{ + int i; + + for (i = 0; i < ata_num_commands; i++) + printf ("%-15s %-17s -%s\n", ata_command[i].name, ata_command[i].params, ata_command[i].help); + + return 0; +} + + + + +/**********************************************************************/ +/* */ +/* A T A B U G C O M M A N D S E T */ +/* */ +/**********************************************************************/ + +/* + A T A _ C L O S E + + closes the ata_device +*/ +int ata_close_cmd(int argc, char **argv) +{ + inode->i_rdev = (ATA_BASE_ADDR >> 16) | (*argv[0] - '0'); + + return ata_release(inode, filp); +} + + +/* + A T A _ D U M P _ D E V I C E _ R E G S + + Dumps the (readable) ata-registers. + Exception: status register is not read, this could mask an interrupt +*/ +int ata_dump_device_regs_cmd(int argc, char **argv) +{ + if (argc) + printf("\nWARNING: Ignoring invalid argument(s)\n\n"); + + + printf("Alternate status register : 0x%02lX\n", REG32(ATA_BASE_ADDR + ATA_ASR) ); + printf("Cylinder high register : 0x%02lX\n", REG32(ATA_BASE_ADDR + ATA_CHR) ); + printf("Cylinder low register : 0x%02lX\n", REG32(ATA_BASE_ADDR + ATA_CLR) ); + printf("Device head register : 0x%02lX\n", REG32(ATA_BASE_ADDR + ATA_DHR) ); + printf("Error register : 0x%02lX\n", REG32(ATA_BASE_ADDR + ATA_ERR) ); + printf("Sector count register : 0x%02lX\n", REG32(ATA_BASE_ADDR + ATA_SCR) ); + printf("Sector number register : 0x%02lX\n", REG32(ATA_BASE_ADDR + ATA_SNR) ); + printf("Status register (see alternate status register)\n" ); + + return 0; +} + + +/* + A T A _ D U M P _ H O S T _ R E G S + + Dumps the ata-host registers +*/ +int ata_dump_host_regs_cmd(int argc, char **argv) +{ + if (argc) + printf("\nWARNING: Ignoring invalid argument(s)\n\n"); + + + printf("Control register CTRL : 0x%08lX\n", REG32(ATA_BASE_ADDR + ATA_CTRL) ); + printf("Status register STAT : 0x%08lX\n", REG32(ATA_BASE_ADDR + ATA_STAT) ); + printf("Pio command timing register PCTR : 0x%08lX\n", REG32(ATA_BASE_ADDR + ATA_PCTR) ); + printf("Pio fast timing register (device0) PFTR0: 0x%08lX\n", REG32(ATA_BASE_ADDR + ATA_PFTR0) ); + printf("Pio fast timing register (device1) PFTR1: 0x%08lX\n", REG32(ATA_BASE_ADDR + ATA_PFTR1) ); + printf("Dma timing register (device0) DTR0 : 0x%08lX\n", REG32(ATA_BASE_ADDR + ATA_DTR0) ); + printf("Dma timing register (device1) DTR1 : 0x%08lX\n", REG32(ATA_BASE_ADDR + ATA_DTR1) ); + + return 0; +} + + +/* + A T A _ E N A B L E + + clears reset bits +*/ +int ata_enable_cmd(int argc, char **argv) +{ + if (argc != 0) + printf("Ignoring invalid parameters\n"); + + inode->i_rdev = (ATA_BASE_ADDR >> 16); + + // clear hardware reset bit + if ( ata_ioctl(inode, filp, ATA_IOCTL_SET_RST, CLR | ARG_HW_RST) ) + return -1; + + // clear software reset bit + if ( ata_ioctl(inode, filp, ATA_IOCTL_SET_RST, CLR | ARG_SW_RST) ) + return -1; + + // enable ATA Hostcontroller core + if ( ata_ioctl(inode, filp, ATA_IOCTL_ENABLE_HOST, 0) ) + return -1; + + printf("ATA host controller enabled\n"); + + return 0; +} + + +/* + A T A _ E X E C _ C M D + + Executes the command; writes the command number in the command register +*/ +int ata_exec_cmd_cmd(int argc, char **argv) +{ + if (argc != 1) + return -1; + + inode->i_rdev = (ATA_BASE_ADDR >> 16); + + ata_ioctl(inode, filp, ATA_IOCTL_EXEC_CMD, strtoul(*argv, argv, 16) ); + return 0; +} + + +/* + A T A _ I D E N T I F Y _ D E V I C E + + Reads the identify_device block and dumps it to the screen +*/ +int ata_identify_device_cmd(int argc, char **argv) +{ + unsigned char checksum; + + if (argc != 0) + printf("Ignoring invalid parameters\n"); + + + /* check for busy flag */ + if ( ata_dev_busy(ATA_BASE_ADDR) ) + printf("Selected ata device busy, ignoring command\n"); + else + { + /* execute identify device */ + ata_ioctl(inode, filp, ATA_IOCTL_EXEC_CMD, IDENTIFY_DEVICE); + + /* read block from ata-device */ + buf[0] = 0; + buf[1] = 1; + ata_ioctl(inode, filp, ATA_IOCTL_READ, (unsigned long) buf); + + /* dump data to the screen */ + checksum = atabug_dump_data(buf, 512); + + if (buf[512] == 0xa5) + printf("Checksum = 0x%02X (%s)\n", checksum, checksum ? "error" : "OK"); + else + printf("No checksum supported\n"); + } + return 0; +} + + +/* + A T A _ O P E N + + opens the ata_device +*/ +int ata_open_cmd(int argc, char **argv) +{ + inode->i_rdev = (ATA_BASE_ADDR >> 16) | (*argv[0] - '0'); + + filp->f_mode = FMODE_READ; + + if (*argv[1] == 'w') + filp->f_mode |= FMODE_WRITE; + + switch( ata_open(inode, filp) ) { + case EOPENIDEV: + printf( "Error: Invalid device (invalid MINOR %02X)\n", MINOR(inode->i_rdev) ); + break; + + case EOPENNODEV: + printf( "Error: Requested device not found\n" ); + break; + + case EOPENIHOST: + printf( "Error: Invalid host (invalid MAJOR %02X)\n", MAJOR(inode->i_rdev) ); + default: + break; + } + + return 0; +} + + +/* + A T A _ S E T _ P I O M O D E + + Sets the device to the requested PIO mode +*/ +int ata_set_piomode_cmd(int argc, char **argv) +{ + return 0; +} + + +/* + A T A _ R E A D _ S E C T O R S + + Reads 1 sector from the device and dumps it to the screen +*/ +int ata_read_sectors_cmd(int argc, char **argv) +{ + struct request request; + unsigned long sector_cnt, sector; + + sector = strtoul(argv[0], argv, 10); + + switch (argc) { + case 2: + sector_cnt = strtoul(argv[1], argv, 10); + break; + + case 1: + sector_cnt = 1; + break; + + default: + return -1; + } + + if ( !sector_cnt ) + { + printf( "Invalid number of sectors.\n" ); + return 0; + } + + /* check for busy flag */ + if ( ata_dev_busy(ATA_BASE_ADDR) ) + printf("Selected ata device busy, ignoring command\n"); + else + { + /* fill the request structure */ + request.cmd = READ; + request.sector = sector; + request.nr_sectors = sector_cnt; + request.buffer = buf; + + if ( ata_request(inode, filp, &request) ) + { + printf("Error while executing READ_SECTOR(S) command\n"); + printf("Status register = 0x%02lX, error register = 0x%02lX\n", ata_astatus(ATA_BASE_ADDR), ata_error(ATA_BASE_ADDR) ); + } + else + { + /* dump data to the screen */ + atabug_dump_data(buf, 512 * sector_cnt); + } + } + return 0; +} + + +/* + A T A _ R E A D _ M B R + + Reads master boot record from the device and dumps it's contents to the screen +*/ +int ata_read_mbr_cmd(int argc, char **argv) +{ + struct request request; + unsigned int partition; + + // get requested partition number + partition = 0; + if (argc) + partition = strtoul(*argv, argv, 10); + + /* check for busy flag */ + if ( ata_dev_busy(ATA_BASE_ADDR) ) + printf("Selected ata device busy, ignoring command\n"); + else + { + /* fill the request structure */ + request.cmd = READ; + request.sector = 0; + request.nr_sectors = 1; + request.buffer = buf; + + if ( ata_request(inode, filp, &request) ) + { + printf("Error while reading master boot sector.\n"); + printf("Status register = 0x%02lX, error register = 0x%02lX\n", ata_astatus(ATA_BASE_ADDR), ata_error(ATA_BASE_ADDR) ); + } + else + { + printf( "Skipping bootloader (446bytes)\n" ); + printf( "Partition %1d:\n", partition); + + // abuse partitionnumber to get offset in MBR record + partition *= 16; + partition += 446; + + printf( "Bootindicator: 0x%2X (%s)\n", buf[partition], buf[partition] ? "bootable" : "non-bootable"); + printf( "Partition start (head: 0x%02X cyl: 0x%03X sect: 0x%02X)\n", + buf[partition +1], (buf[partition +2] & 0xc0) << 2 | buf[partition +3] ,buf[partition +2] & 0x3f ); + printf( "Systemindicator: 0x%02X (", buf[partition +4]); + + switch (buf[partition +4]) + { + case 0: printf ("Non DOS"); break; + case 1: printf ("DOS FAT12"); break; + case 4: printf ("DOS FAT16"); break; + case 5: printf ("DOS extended"); break; + case 6: printf ("DOS >32MByte"); break; + + default : printf ("unkown"); + }; + printf (")\n"); + printf( "Partition end (head: 0x%02X cyl: 0x%03X sect: 0x%02X)\n", + buf[partition +5], (buf[partition +6] & 0xc0) << 2 | buf[partition +7] ,buf[partition +6] & 0x3f ); + printf( "Physical Startsector: 0x%08X\n", buf[partition +11] << 24 | + buf[partition +10] << 16 | + buf[partition +9] << 8 | + buf[partition +8]); + printf( "Sector count: 0x%08X\n", buf[partition +15] << 24 | + buf[partition +14] << 16 | + buf[partition +13] << 8 | + buf[partition +12]); + } + } + return 0; +} + + +/* + A T A _ R E A D _ D O S B O O T + + Reads boot sector from the device and dumps it's contents to the screen +*/ +int ata_read_dosboot_cmd(int argc, char **argv) +{ + struct request request; + unsigned int sector; + char txt[8]; + + sector = 0; + if (argc) + sector = strtoul(*argv, argv, 0); + + /* check for busy flag */ + if ( ata_dev_busy(ATA_BASE_ADDR) ) + printf("Selected ata device busy, ignoring command\n"); + else + { + /* fill the request structure */ + request.cmd = READ; + request.sector = sector; + request.nr_sectors = 1; + request.buffer = buf; + + if ( ata_request(inode, filp, &request) ) + { + printf("Error whilereading boot sector 0x%02X.\n", sector); + printf("Status register = 0x%02lX, error register = 0x%02lX\n", ata_astatus(ATA_BASE_ADDR), ata_error(ATA_BASE_ADDR) ); + } + else + { + printf( "Reading boot sector 0x%02X\n", sector ); + printf( "ID number: 0x%2X%2X%2X\n", buf[0], buf[1], buf[2] ); + + printf( "OEM-name and number: " ); + memcpy(txt, &buf[3], 8); + txt[8] = '\0'; + printf( "%s\n", txt ); + + printf( "Bytes per sector: %5d\n", (buf[12]<<8) | buf[11] ); + printf( "Sectors per cluster: %3d\n", buf[13] ); + printf( "Reserved IM-sectors: %5d\n", (buf[15]<<8) | buf[14] ); + printf( "Number of FATs: %3d\n", buf[16] ); + printf( "Number of entries in the root-directory: %5d\n", (buf[18]<<8) | buf[17] ); + printf( "Number of logical sectors: %5d\n", (buf[20]<<8) | buf[19] ); + printf( "Medium descriptor byte: %02X\n", buf[21] ); + printf( "Sectors per FAT: %5d\n", (buf[23]<<8) | buf[22] ); + printf( "Sectors per track: %5d\n", (buf[25]<<8) | buf[24] ); + printf( "Number of heads: %5d\n", (buf[27]<<8) | buf[26] ); + printf( "Number of hidden sectors: %5d\n", (buf[29]<<8) | buf[28] ); + } + } + return 0; +} + + +/* + A T A _ R E S E T + + resets the ATA device, using the select method +*/ +int ata_reset_cmd(int argc, char **argv) +{ + if (argc != 1) + return -1; + + return ata_ioctl(inode, filp, ATA_IOCTL_SET_RST, SET | (**argv - '0') ); +} + + +/* + A T A _ S E L E C T _ D E V I C E + + selects the ATA device; sets the DEV bit in the device/head register +*/ +int ata_select_device_cmd(int argc, char **argv) +{ + if (argc != 1) + return -1; + + inode->i_rdev = (ATA_BASE_ADDR >> 16) | (*argv[0] - '0'); + + ata_ioctl(inode, filp, ATA_IOCTL_SELECT_DEVICE, **argv - '0'); + + printf("Ata device %1d selected.\n", REG32(ATA_BASE_ADDR + ATA_DHR) & ATA_DHR_DEV ? 1 : 0); + return 0; +} + + + + +/**********************************************************************/ +/* */ +/* A T A B U G T O O L S */ +/* */ +/**********************************************************************/ + +/* + D U M P _ D A T A + + dumps byte-data in a buffer of type short to the screen + and returns the byte-checksum + + *buffer = pointer to (short)buffer + cnt = number of bytes to display +*/ +unsigned char atabug_dump_data(unsigned char *buffer, int cnt) +{ + int i, n, bytes_per_line = 16; + unsigned char c, checksum; + unsigned char *buf_ptr; + + /* prepare stored data for display & calculate checksum */ + checksum = 0; + buf_ptr = buffer; + + /* display data */ + for (i=0; i < cnt; i += bytes_per_line) + { + printf("%3X ", i); + + /* print hexadecimal notation */ + for (n=0; n < bytes_per_line; n++) + printf("%02X ", *buf_ptr++); + + buf_ptr -= bytes_per_line; /* back to the start (of this block) */ + + /* print ASCII notation & calculate checksum */ + for (n=0; n < bytes_per_line; n++) + { + c = *buf_ptr++; + printf("%c", isprint(c) ? c : '.'); + checksum += c; + } + printf("\n"); + } + + return checksum; +} + +
trunk/soc/sw/orpmon/cmds/atabug.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/dhry.c =================================================================== --- trunk/soc/sw/orpmon/cmds/dhry.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/dhry.c (revision 20) @@ -0,0 +1,706 @@ +/* + **************************************************************************** + * + * "DHRYSTONE" Benchmark Program + * ----------------------------- + * + * Version: C, Version 2.1 + * + * File: dhry_1.c (part 2 of 3) + * + * Date: May 25, 1988 + * + * Author: Reinhold P. Weicker + * + **************************************************************************** + */ +#include "dhry.h" +#include "spr_defs.h" +#include "common.h" +#include "support.h" + +#define DLX_FREQ 200 /* in MHz */ +#define PROC_6 0 + +#define DETECTNULL(X) (((X) - 0x01010101) & ~(X) & 0x80808080) +#define UNALIGNED(X, Y) \ + (((long)X & (sizeof (long) - 1)) | ((long)Y & (sizeof (long) - 1))) + +void start_timer(void) +{ + unsigned long val; + + val = SPR_TTMR_SR | 0x0fffffff; + asm("l.mtspr r0,%0,%1": : "r" (val), "i" (SPR_TTMR)); + val = 0; + asm("l.mtspr r0,%0,%1": : "r" (val), "i" (SPR_TTCR)); +} + +unsigned long read_timer(void) +{ + unsigned long val; + + asm("l.mfspr %0,r0,%1": "=r" (val) : "i" (SPR_TTCR)); + return val; +} + +/* Global Variables: */ + +Rec_Pointer Ptr_Glob, + Next_Ptr_Glob; +int Int_Glob; +Boolean Bool_Glob; +char Ch_1_Glob, + Ch_2_Glob; +int Arr_1_Glob [50]; +int Arr_2_Glob [50] [50]; + + + /* forward declaration necessary since Enumeration may not simply be int */ + +#ifndef REG + Boolean Reg = false; +#define REG + /* REG becomes defined as empty */ + /* i.e. no register variables */ +#else + Boolean Reg = true; +#endif + +/* variables for time measurement: */ + +#if DLX || OR1K +#define Too_Small_Time DLX_FREQ +#else +#define Too_Small_Time 1 +#endif + +#define TIMER0 0 +#define TIMER1 1 + + + + + +unsigned int Begin_Time, + End_Time, + User_Time, + Microseconds, + Dhrystones_Per_Second; + +/* end of variables for time measurement */ + + +void Proc_1(REG Rec_Pointer Ptr_Val_Par); +void Proc_2(One_Fifty *Int_Par_Ref); +void Proc_3(Rec_Pointer *Ptr_Ref_Par); +void Proc_4(void); +void Proc_5(void); +void Proc_6( + Enumeration Enum_Val_Par, + Enumeration *Enum_Ref_Par); +void Proc_7( + One_Fifty Int_1_Par_Val, + One_Fifty Int_2_Par_Val, + One_Fifty *Int_Par_Ref); +void Proc_8( + Arr_1_Dim Arr_1_Par_Ref, + Arr_2_Dim Arr_2_Par_Ref, + int Int_1_Par_Val, + int Int_2_Par_Val); +Enumeration Func_1(Capital_Letter Ch_1_Par_Val, + Capital_Letter Ch_2_Par_Val); +Boolean Func_2(Str_30 Str_1_Par_Ref, Str_30 Str_2_Par_Ref); +Boolean Func_3(Enumeration Enum_Par_Val); + +int dhry_main (int num_runs) +/*****/ + + /* main program, corresponds to procedures */ + /* Main and Proc_0 in the Ada version */ +{ + One_Fifty Int_1_Loc; + REG One_Fifty Int_2_Loc; + One_Fifty Int_3_Loc; + REG char Ch_Index; + Enumeration Enum_Loc; + Str_30 Str_1_Loc; + Str_30 Str_2_Loc; + REG int Run_Index; + REG int Number_Of_Runs; + Rec_Type x, y; + + /* Initializations */ + + Next_Ptr_Glob = (Rec_Pointer) &x; + Ptr_Glob = (Rec_Pointer) &y; + + Ptr_Glob->Ptr_Comp = Next_Ptr_Glob; + Ptr_Glob->Discr = Ident_1; + Ptr_Glob->variant.var_1.Enum_Comp = Ident_3; + Ptr_Glob->variant.var_1.Int_Comp = 40; + strcpy (Ptr_Glob->variant.var_1.Str_Comp, + "DHRYSTONE PROGRAM, SOME STRING"); + strcpy (Str_1_Loc, "DHRYSTONE PROGRAM, 1'ST STRING"); + + Arr_2_Glob [8][7] = 10; + /* Was missing in published program. Without this statement, */ + /* Arr_2_Glob [8][7] would have an undefined value. */ + /* Warning: With 16-Bit processors and Number_Of_Runs > 32000, */ + /* overflow may occur for this array element. */ + +/* Initalize Data and Instruction Cache */ + + +/* printf ("\n"); + printf ("Dhrystone Benchmark, Version 2.1 (Language: C)\n"); + printf ("\n"); + if (Reg) + { + printf ("Program compiled with 'register' attribute\n"); + printf ("\n"); + } + else + { + printf ("Program compiled without 'register' attribute\n"); + printf ("\n"); + } + printf ("Please give the number of runs through the benchmark: "); + */ + { + int n; + /* scanf ("%d", &n); + */ + n = num_runs; + Number_Of_Runs = n; + } + printf ("\n"); + + printf ("Execution starts, %d runs through Dhrystone\n", Number_Of_Runs); + + + /***************/ + /* Start timer */ + /***************/ + +/* printf("%d", my_test2(Number_Of_Runs));*/ + start_timer(); + Begin_Time = read_timer(); + + for (Run_Index = 1; Run_Index <= Number_Of_Runs; ++Run_Index) + { + + Proc_5(); + Proc_4(); + /* Ch_1_Glob == 'A', Ch_2_Glob == 'B', Bool_Glob == true */ + Int_1_Loc = 2; + Int_2_Loc = 3; + strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 2'ND STRING"); + Enum_Loc = Ident_2; + + Bool_Glob = ! Func_2 (Str_1_Loc, Str_2_Loc); + /* Bool_Glob == 1 */ + while (Int_1_Loc < Int_2_Loc) /* loop body executed once */ + { + Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc; + /* Int_3_Loc == 7 */ + Proc_7 (Int_1_Loc, Int_2_Loc, &Int_3_Loc); + /* Int_3_Loc == 7 */ + Int_1_Loc += 1; + } /* while */ + /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ +#if DBG + printf("a) Int_1_Loc: %x\n", Int_1_Loc); + printf("a) Int_2_Loc: %x\n", Int_2_Loc); + printf("a) Int_3_Loc: %x\n\n", Int_3_Loc); +#endif + Proc_8 (Arr_1_Glob, Arr_2_Glob, Int_1_Loc, Int_3_Loc); + /* Int_Glob == 5 */ +#if DBG + printf("b) Int_1_Loc: %x\n", Int_1_Loc); + printf("b) Int_2_Loc: %x\n", Int_2_Loc); + printf("b) Int_3_Loc: %x\n\n", Int_3_Loc); +#endif + + Proc_1 (Ptr_Glob); +#if DBG + printf("c) Int_1_Loc: %x\n", Int_1_Loc); + printf("c) Int_2_Loc: %x\n", Int_2_Loc); + printf("c) Int_3_Loc: %x\n\n", Int_3_Loc); +#endif + + for (Ch_Index = 'A'; Ch_Index <= Ch_2_Glob; ++Ch_Index) + /* loop body executed twice */ + { + if (Enum_Loc == Func_1 (Ch_Index, 'C')) + /* then, not executed */ + { + Proc_6 (Ident_1, &Enum_Loc); + strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 3'RD STRING"); + Int_2_Loc = Run_Index; + Int_Glob = Run_Index; +#if DBG + printf("d) Int_1_Loc: %x\n", Int_1_Loc); + printf("d) Int_2_Loc: %x\n", Int_2_Loc); + printf("d) Int_3_Loc: %x\n\n", Int_3_Loc); +#endif + } + } + + /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ +#if DBG + printf("e) Int_1_Loc: %x\n", Int_1_Loc); + printf("e) Int_2_Loc: %x\n", Int_2_Loc); + printf("e) Int_3_Loc: %x\n", Int_3_Loc); + printf("e) Ch_1_Glob: %c\n\n", Ch_1_Glob); +#endif + Int_2_Loc = Int_2_Loc * Int_1_Loc; + Int_1_Loc = Int_2_Loc * Int_3_Loc; + Int_2_Loc = 7 * (Int_2_Loc - Int_3_Loc) - Int_1_Loc; + /* Int_1_Loc == 1, Int_2_Loc == 13, Int_3_Loc == 7 */ + Proc_2 (&Int_1_Loc); + + /* Int_1_Loc == 5 */ +#if DBG + printf("f) Int_1_Loc: %x\n", Int_1_Loc); + printf("f) Int_2_Loc: %x\n", Int_2_Loc); + printf("f) Int_3_Loc: %x\n\n", Int_3_Loc); +#endif + + } /* loop "for Run_Index" */ + + /**************/ + /* Stop timer */ + /**************/ + + End_Time = read_timer(); + +/* printf ("Execution ends\n"); + printf ("\n"); + printf ("Final values of the variables used in the benchmark:\n"); + printf ("\n"); + printf ("Int_Glob: %d\n", Int_Glob); + printf (" should be: %d\n", 5); + printf ("Bool_Glob: %d\n", Bool_Glob); + printf (" should be: %d\n", 1); + printf ("Ch_1_Glob: %c\n", Ch_1_Glob); + printf (" should be: %c\n", 'A'); + printf ("Ch_2_Glob: %c\n", Ch_2_Glob); + printf (" should be: %c\n", 'B'); + printf ("Arr_1_Glob[8]: %d\n", Arr_1_Glob[8]); + printf (" should be: %d\n", 7); + printf ("Arr_2_Glob[8][7]: %d\n", Arr_2_Glob[8][7]); + printf (" should be: Number_Of_Runs + 10\n"); + printf ("Ptr_Glob->\n"); + printf (" Ptr_Comp: %d\n", (int) Ptr_Glob->Ptr_Comp); + printf (" should be: (implementation-dependent)\n"); + printf (" Discr: %d\n", Ptr_Glob->Discr); + printf (" should be: %d\n", 0); + printf (" Enum_Comp: %d\n", Ptr_Glob->variant.var_1.Enum_Comp); + printf (" should be: %d\n", 2); + printf (" Int_Comp: %d\n", Ptr_Glob->variant.var_1.Int_Comp); + printf (" should be: %d\n", 17); + printf (" Str_Comp: %s\n", Ptr_Glob->variant.var_1.Str_Comp); + printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); + printf ("Next_Ptr_Glob->\n"); + printf (" Ptr_Comp: %d\n", (int) Next_Ptr_Glob->Ptr_Comp); + printf (" should be: (implementation-dependent), same as above\n"); + printf (" Discr: %d\n", Next_Ptr_Glob->Discr); + printf (" should be: %d\n", 0); + printf (" Enum_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Enum_Comp); + printf (" should be: %d\n", 1); + printf (" Int_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Int_Comp); + printf (" should be: %d\n", 18); + printf (" Str_Comp: %s\n", + Next_Ptr_Glob->variant.var_1.Str_Comp); + printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); + printf ("Int_1_Loc: %d\n", Int_1_Loc); + printf (" should be: %d\n", 5); + printf ("Int_2_Loc: %d\n", Int_2_Loc); + printf (" should be: %d\n", 13); + printf ("Int_3_Loc: %d\n", Int_3_Loc); + printf (" should be: %d\n", 7); + printf ("Enum_Loc: %d\n", Enum_Loc); + printf (" should be: %d\n", 1); + printf ("Str_1_Loc: %s\n", Str_1_Loc); + printf (" should be: DHRYSTONE PROGRAM, 1'ST STRING\n"); + printf ("Str_2_Loc: %s\n", Str_2_Loc); + printf (" should be: DHRYSTONE PROGRAM, 2'ND STRING\n"); + +*/ + + + User_Time = End_Time - Begin_Time; + /* microseconds */ + + printf("Begin Time = %d\n",Begin_Time); + printf("End Time = %d\n",End_Time); + + printf ("\nNumber of Runs %i", num_runs); + printf ("\nBegin Time %i", Begin_Time); + printf ("\nEnd Time %i\n", End_Time); + + if (User_Time < Too_Small_Time) + { + printf ("Measured time too small to obtain meaningful results\n"); + printf ("Please increase number of runs\n"); + printf ("\n"); + } + else + { +#if DLX || OR1K +// User_Time /= DLX_FREQ; +#if DLX + printf("DLX "); +#else +#if OR1K + printf("OR1K "); +#else + printf("Unknown CPU "); +#endif +#endif + printf("at %u MHz ", DLX_FREQ); + if (PROC_6) + printf("(+PROC_6)"); + printf("\n"); +#endif +// Microseconds = User_Time / Number_Of_Runs; +// Dhrystones_Per_Second = Number_Of_Runs * 1000 / User_Time; + printf ("Microseconds for one run through Dhrystone: "); + printf ("%d us / %d runs\n", User_Time,Number_Of_Runs); + printf ("Dhrystones per Second: "); + printf ("%d \n", Dhrystones_Per_Second); + } + return 0; +} + + +void Proc_1(Ptr_Val_Par) +/******************/ + + REG Rec_Pointer Ptr_Val_Par; + /* executed once */ +{ + REG Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp; + /* == Ptr_Glob_Next */ + /* Local variable, initialized with Ptr_Val_Par->Ptr_Comp, */ + /* corresponds to "rename" in Ada, "with" in Pascal */ + + + structassign(*Ptr_Val_Par->Ptr_Comp, *Ptr_Glob); + Ptr_Val_Par->variant.var_1.Int_Comp = 5; + Next_Record->variant.var_1.Int_Comp + = Ptr_Val_Par->variant.var_1.Int_Comp; + Next_Record->Ptr_Comp = Ptr_Val_Par->Ptr_Comp; + Proc_3(&Next_Record->Ptr_Comp); + /* + * Ptr_Val_Par->Ptr_Comp->Ptr_Comp == Ptr_Glob->Ptr_Comp + */ + if (Next_Record->Discr == Ident_1) + /* then, executed */ + { + Next_Record->variant.var_1.Int_Comp = 6; + Proc_6(Ptr_Val_Par->variant.var_1.Enum_Comp, + &Next_Record->variant.var_1.Enum_Comp); + Next_Record->Ptr_Comp = Ptr_Glob->Ptr_Comp; + Proc_7(Next_Record->variant.var_1.Int_Comp, 10, + &Next_Record->variant.var_1.Int_Comp); + } else /* not executed */ + structassign(*Ptr_Val_Par, *Ptr_Val_Par->Ptr_Comp); + +} /* Proc_1 */ + + +void + Proc_2(Int_Par_Ref) +/******************/ + /* executed once */ + /* *Int_Par_Ref == 1, becomes 4 */ + + One_Fifty *Int_Par_Ref; +{ + One_Fifty Int_Loc; + Enumeration Enum_Loc = 0; + + + Int_Loc = *Int_Par_Ref + 10; + do /* executed once */ + if (Ch_1_Glob == 'A') + /* then, executed */ + { + Int_Loc -= 1; + *Int_Par_Ref = Int_Loc - Int_Glob; + Enum_Loc = Ident_1; + } /* if */ + while (Enum_Loc != Ident_1);/* true */ +} /* Proc_2 */ + + +void + Proc_3(Ptr_Ref_Par) +/******************/ + /* executed once */ + /* Ptr_Ref_Par becomes Ptr_Glob */ + + Rec_Pointer *Ptr_Ref_Par; + +{ + + if (Ptr_Glob != Null) + /* then, executed */ + *Ptr_Ref_Par = Ptr_Glob->Ptr_Comp; + Proc_7(10, Int_Glob, &Ptr_Glob->variant.var_1.Int_Comp); +} /* Proc_3 */ + + +void + Proc_4() +{ /* without parameters */ + /*******/ + /* executed once */ + Boolean Bool_Loc; + + + Bool_Loc = Ch_1_Glob == 'A'; + Bool_Glob = Bool_Loc | Bool_Glob; + Ch_2_Glob = 'B'; +} /* Proc_4 */ + + +void + Proc_5() +{ /* without parameters */ + /*******/ + /* executed once */ + + Ch_1_Glob = 'A'; + Bool_Glob = false; +} /* Proc_5 */ + +/* @(#)dhry_2.c 1.2 92/05/28 14:44:54, AMD */ +/* + **************************************************************************** + * + * "DHRYSTONE" Benchmark Program + * ----------------------------- + * + * Version: C, Version 2.1 + * + * File: dhry_2.c (part 3 of 3) + * + * Date: May 25, 1988 + * + * Author: Reinhold P. Weicker + * + **************************************************************************** + */ + +#ifndef REG +#define REG + /* REG becomes defined as empty */ + /* i.e. no register variables */ +#ifdef _AM29K +#undef REG +#define REG register /* Define REG; saves room on 127-char MS-DOS cmd line */ +#endif +#endif + + +void + Proc_6(Enum_Val_Par, Enum_Ref_Par) +/*********************************/ + /* executed once */ + /* Enum_Val_Par == Ident_3, Enum_Ref_Par becomes Ident_2 */ + + Enumeration Enum_Val_Par; + Enumeration *Enum_Ref_Par; +{ +#if PROC_6 + + *Enum_Ref_Par = Enum_Val_Par; + if (!Func_3(Enum_Val_Par)) + /* then, not executed */ + *Enum_Ref_Par = Ident_4; + switch (Enum_Val_Par) { + case Ident_1: + *Enum_Ref_Par = Ident_1; + break; + case Ident_2: + if (Int_Glob > 100) + /* then */ + *Enum_Ref_Par = Ident_1; + else + *Enum_Ref_Par = Ident_4; + break; + case Ident_3: /* executed */ + *Enum_Ref_Par = Ident_2; + break; + case Ident_4: + break; + case Ident_5: + *Enum_Ref_Par = Ident_3; + break; + } /* switch */ +#endif + return; +} /* Proc_6 */ + +void + Proc_7(Int_1_Par_Val, Int_2_Par_Val, Int_Par_Ref) +/**********************************************/ + /* executed three times */ + /* first call: Int_1_Par_Val == 2, Int_2_Par_Val == 3, */ + /* Int_Par_Ref becomes 7 */ + /* second call: Int_1_Par_Val == 10, Int_2_Par_Val == 5, */ + /* Int_Par_Ref becomes 17 */ + /* third call: Int_1_Par_Val == 6, Int_2_Par_Val == 10, */ + /* Int_Par_Ref becomes 18 */ + One_Fifty Int_1_Par_Val; + One_Fifty Int_2_Par_Val; + One_Fifty *Int_Par_Ref; +{ + One_Fifty Int_Loc; + + + Int_Loc = Int_1_Par_Val + 2; + *Int_Par_Ref = Int_2_Par_Val + Int_Loc; +} /* Proc_7 */ + + +void + Proc_8(Arr_1_Par_Ref, Arr_2_Par_Ref, Int_1_Par_Val, Int_2_Par_Val) +/*********************************************************************/ + /* executed once */ + /* Int_Par_Val_1 == 3 */ + /* Int_Par_Val_2 == 7 */ + Arr_1_Dim Arr_1_Par_Ref; + Arr_2_Dim Arr_2_Par_Ref; + int Int_1_Par_Val; + int Int_2_Par_Val; +{ + REG One_Fifty Int_Index; + REG One_Fifty Int_Loc; + +#if DBG + printf("X) Int_1_Par_Val: %x\n", Int_1_Par_Val); + printf("X) Int_2_Par_Val: %x\n", Int_2_Par_Val); +#endif + + + Int_Loc = Int_1_Par_Val + 5; + Arr_1_Par_Ref[Int_Loc] = Int_2_Par_Val; + Arr_1_Par_Ref[Int_Loc + 1] = Arr_1_Par_Ref[Int_Loc]; + Arr_1_Par_Ref[Int_Loc + 30] = Int_Loc; + for (Int_Index = Int_Loc; Int_Index <= Int_Loc + 1; ++Int_Index) + Arr_2_Par_Ref[Int_Loc][Int_Index] = Int_Loc; + Arr_2_Par_Ref[Int_Loc][Int_Loc - 1] += 1; + Arr_2_Par_Ref[Int_Loc + 20][Int_Loc] = Arr_1_Par_Ref[Int_Loc]; + Int_Glob = 5; + +#if DBG + printf("Y) Int_1_Par_Val: %x\n", Int_1_Par_Val); + printf("Y) Int_2_Par_Val: %x\n", Int_2_Par_Val); +#endif + +} /* Proc_8 */ + + +Enumeration + Func_1(Ch_1_Par_Val, Ch_2_Par_Val) +/*************************************************/ + /* executed three times */ + /* first call: Ch_1_Par_Val == 'H', Ch_2_Par_Val == 'R' */ + /* second call: Ch_1_Par_Val == 'A', Ch_2_Par_Val == 'C' */ + /* third call: Ch_1_Par_Val == 'B', Ch_2_Par_Val == 'C' */ + + Capital_Letter Ch_1_Par_Val; + Capital_Letter Ch_2_Par_Val; +{ + Capital_Letter Ch_1_Loc; + Capital_Letter Ch_2_Loc; + + + Ch_1_Loc = Ch_1_Par_Val; + Ch_2_Loc = Ch_1_Loc; + if (Ch_2_Loc != Ch_2_Par_Val) + /* then, executed */ + return (Ident_1); + else { /* not executed */ + Ch_1_Glob = Ch_1_Loc; + return (Ident_2); + } +} /* Func_1 */ + + +Boolean + Func_2(Str_1_Par_Ref, Str_2_Par_Ref) +/*************************************************/ + /* executed once */ + /* Str_1_Par_Ref == "DHRYSTONE PROGRAM, 1'ST STRING" */ + /* Str_2_Par_Ref == "DHRYSTONE PROGRAM, 2'ND STRING" */ + + Str_30 Str_1_Par_Ref; + Str_30 Str_2_Par_Ref; +{ + REG One_Thirty Int_Loc; + Capital_Letter Ch_Loc = 0; + + + Int_Loc = 2; + while (Int_Loc <= 2) /* loop body executed once */ + if (Func_1(Str_1_Par_Ref[Int_Loc], + Str_2_Par_Ref[Int_Loc + 1]) == Ident_1) + /* then, executed */ + { + Ch_Loc = 'A'; + Int_Loc += 1; + } /* if, while */ + + if (Ch_Loc >= 'W' && Ch_Loc < 'Z') + /* then, not executed */ + Int_Loc = 7; + if (Ch_Loc == 'R') + /* then, not executed */ + return (true); + else { /* executed */ + if (strcmp(Str_1_Par_Ref, Str_2_Par_Ref) > 0) + /* then, not executed */ + { + Int_Loc += 7; + Int_Glob = Int_Loc; + return (true); + } else /* executed */ + return (false); + } /* if Ch_Loc */ +} /* Func_2 */ + + +Boolean + Func_3(Enum_Par_Val) +/***************************/ + /* executed once */ + /* Enum_Par_Val == Ident_3 */ + Enumeration Enum_Par_Val; +{ + Enumeration Enum_Loc; + + Enum_Loc = Enum_Par_Val; + if (Enum_Loc == Ident_3) + /* then, executed */ + return (true); + else /* not executed */ + return (false); +} /* Func_3 */ + +int dhry_cmd (int argc, char *argv[]) +{ + if (argc == 1) dhry_main(strtoul (argv[0], 0, 0)); + else if (argc == 0) dhry_main(20); + else return -1; + return 0; +} + +void module_dhry_init (void) +{ + register_command ("dhry", "[]", "run dhrystone", dhry_cmd); +}
trunk/soc/sw/orpmon/cmds/dhry.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/cpu.c =================================================================== --- trunk/soc/sw/orpmon/cmds/cpu.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/cpu.c (revision 20) @@ -0,0 +1,114 @@ +#include "common.h" +#include "support.h" +#include "spr_defs.h" + +int ic_enable_cmd (int argc, char *argv[]) +{ + unsigned long addr; + unsigned long sr; + + if (argc) return -1; + /* Invalidate IC */ + for (addr = 0; addr < 8192; addr += 16) + asm("l.mtspr r0,%0,%1": : "r" (addr), "i" (SPR_ICBIR)); + + /* Enable IC */ + asm("l.mfspr %0,r0,%1": "=r" (sr) : "i" (SPR_SR)); + sr |= SPR_SR_ICE; + asm("l.mtspr r0,%0,%1": : "r" (sr), "i" (SPR_SR)); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + return 0; +} + +int ic_disable_cmd (int argc, char *argv[]) +{ + unsigned long sr; + + if (argc) return -1; + /* Disable IC */ + asm("l.mfspr %0,r0,%1": "=r" (sr) : "i" (SPR_SR)); + sr &= ~SPR_SR_ICE; + asm("l.mtspr r0,%0,%1": : "r" (sr), "i" (SPR_SR)); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + return 0; +} + +int dc_enable_cmd (int argc, char *argv[]) +{ + unsigned long addr; + unsigned long sr; + + if (argc) return -1; + /* Invalidate DC */ + for (addr = 0; addr < 8192; addr += 16) + asm("l.mtspr r0,%0,%1": : "r" (addr), "i" (SPR_DCBIR)); + + /* Enable DC */ + asm("l.mfspr %0,r0,%1": "=r" (sr) : "i" (SPR_SR)); + sr |= SPR_SR_DCE; + asm("l.mtspr r0,%0,%1": : "r" (sr), "i" (SPR_SR)); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + return 0; +} + +int dc_disable_cmd (int argc, char *argv[]) +{ + unsigned long sr; + + if (argc) return -1; + /* Disable DC */ + asm("l.mfspr %0,r0,%1": "=r" (sr) : "i" (SPR_SR)); + sr &= ~SPR_SR_DCE; + asm("l.mtspr r0,%0,%1": : "r" (sr), "i" (SPR_SR)); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + asm("l.nop"); + return 0; +} + +int mfspr_cmd (int argc, char *argv[]) +{ + unsigned long val, addr; + + if (argc == 1) { + addr = strtoul (argv[0], 0, 0); + /* Read SPR */ + asm("l.mfspr %0,%1,0": "=r" (val) : "r" (addr)); + printf ("\nSPR %04lx: %08lx", addr, val); + } else return -1; + return 0; +} + +int mtspr_cmd (int argc, char *argv[]) +{ + unsigned long val, addr; + if (argc == 2) { + addr = strtoul (argv[0], 0, 0); + val = strtoul (argv[1], 0, 0); + /* Write SPR */ + asm("l.mtspr %0,%1,0": : "r" (addr), "r" (val)); + asm("l.mfspr %0,%1,0": "=r" (val) : "r" (addr)); + printf ("\nSPR %04lx: %08lx", addr, val); + } else return -1; + return 0; +} + +void module_cpu_init (void) +{ + register_command ("ic_enable", "", "enable instruction cache", ic_enable_cmd); + register_command ("ic_disable", "", "disable instruction cache", ic_disable_cmd); + register_command ("dc_enable", "", "enable data cache", dc_enable_cmd); + register_command ("dc_disable", "", "disable data cache", dc_disable_cmd); + register_command ("mfspr", "", "show SPR", mfspr_cmd); + register_command ("mtspr", " ", "set SPR", mtspr_cmd); +}
trunk/soc/sw/orpmon/cmds/cpu.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/memory.c =================================================================== --- trunk/soc/sw/orpmon/cmds/memory.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/memory.c (revision 20) @@ -0,0 +1,175 @@ +#include "common.h" +#include "support.h" +#include "spr_defs.h" + +void show_mem (int start, int stop) +{ + unsigned long i = start; + if ((i & 0xf) != 0x0) printf ("\n%08lx: ", i); + for(; i <= stop; i += 4) { + if ((i & 0xf) == 0x0) printf ("\n%08lx: ", i); + /* Read one word */ + printf ("%08lx ", REG32(i)); + } + printf ("\n"); +} + +void testram (unsigned long start_addr, unsigned long stop_addr, unsigned long testno) +{ + unsigned long addr; + unsigned long err_addr = 0; + unsigned long err_no = 0; + + /* Test 1: Write locations with their addresses */ + if ((testno == 1) || (testno == 0)) { + printf ("\n1. Writing locations with their addresses: "); + for (addr = start_addr; addr <= stop_addr; addr += 4) + REG32(addr) = addr; + + /* Verify */ + for (addr = start_addr; addr <= stop_addr; addr += 4) + if (REG32(addr) != addr) { + err_no++; + err_addr = addr; + } + if (err_no) printf ("%04lx times failed. Last at location %08lx", err_no, err_addr); + else printf ("Passed"); + err_no = 0; + } + + /* Test 2: Write locations with their inverse address */ + if ((testno == 2) || (testno == 0)) { + printf ("\n2. Writing locations with their inverse addresses: "); + for (addr = start_addr; addr <= stop_addr; addr += 4) + REG32(addr) = ~addr; + + /* Verify */ + for (addr = start_addr; addr <= stop_addr; addr += 4) + if (REG32(addr) != ~addr) { + err_no++; + err_addr = addr; + } + if (err_no) printf ("%04lx times failed. Last at location %08lx", err_no, err_addr); + else printf ("Passed"); + err_no = 0; + } + + /* Test 3: Write locations with walking ones */ + if ((testno == 3) || (testno == 0)) { + printf ("\n3. Writing locations with walking ones: "); + for (addr = start_addr; addr <= stop_addr; addr += 4) + REG32(addr) = 1 << (addr >> 2); + + /* Verify */ + for (addr = start_addr; addr <= stop_addr; addr += 4) + if (REG32(addr) != (1 << (addr >> 2))) { + err_no++; + err_addr = addr; + } + if (err_no) printf ("%04lx times failed. Last at location %08lx", err_no, err_addr); + else printf ("Passed"); + err_no = 0; + } + + /* Test 4: Write locations with walking zeros */ + if ((testno == 4) || (testno == 0)) { + printf ("\n4. Writing locations with walking zeros: "); + for (addr = start_addr; addr <= stop_addr; addr += 4) + REG32(addr) = ~(1 << (addr >> 2)); + + /* Verify */ + for (addr = start_addr; addr <= stop_addr; addr += 4) + if (REG32(addr) != ~(1 << (addr >> 2))) { + err_no++; + err_addr = addr; + } + if (err_no) printf ("%04lx times failed. Last at location %08lx", err_no, err_addr); + else printf ("Passed"); + err_no = 0; + } +} + +int dm_cmd (int argc, char *argv[]) +{ + unsigned long a1,a2; + a1 = strtoul(argv[0], 0, 0); + switch (argc) { + case 1: show_mem (a1, a1); return 0; + case 2: + a2 = strtoul(argv[1], 0, 0); + show_mem (a1, a2); return 0; + default: return -1; + } +} + +int pm_cmd (int argc, char *argv[]) +{ + unsigned long addr, stop_addr, value; + if ((argc == 3) || (argc == 2)) { + addr = strtoul (argv[0], 0, 0); + + if (argc == 2) { + stop_addr = strtoul (argv[0], 0, 0); + value = strtoul (argv[1], 0, 0); + } else { + stop_addr = strtoul (argv[1], 0, 0); + value = strtoul (argv[2], 0, 0); + } + + for (; addr <= stop_addr; addr += 4) REG32(addr) = value; + + /*show_mem(strtoul (argv[0], 0, 0), stop_addr);*/ + } else return -1; + return 0; +} + +int ram_test_cmd (int argc, char *argv[]) +{ + switch (argc) { + case 2: testram(strtoul (argv[0], 0, 0), strtoul (argv[1], 0, 0), 0); return 0; + case 3: testram(strtoul (argv[0], 0, 0), strtoul (argv[1], 0, 0), strtoul (argv[2], 0, 0)); return 0; + default: return -1; + } +} + +unsigned long crc32 (unsigned long crc, const unsigned char *buf, unsigned long len) +{ + /* Create bitwise CRC table first */ + unsigned long crc_table[256]; + int i, k; + for (i = 0; i < 256; i++) { + unsigned long c = (unsigned long)i; + for (k = 0; k < 8; k++) c = c & 1 ? 0xedb88320 ^ (c >> 1) : c >> 1; + crc_table[i] = c; + } + + /* Calculate crc on buf */ + crc = crc ^ 0xffffffffL; + while (len--) crc = crc_table[((int)crc ^ (*buf++)) & 0xff] ^ (crc >> 8); + return crc ^ 0xffffffffL; +} + +int crc_cmd (int argc, char *argv[]) +{ + unsigned long addr = global.src_addr; + unsigned long len = global.length; + unsigned long init_crc = 0; + + switch (argc) { + case 3: init_crc = strtoul (argv[2], 0, 0); + case 2: len = strtoul (argv[1], 0, 0); + case 1: addr = strtoul (argv[0], 0, 0); + case 0: + printf ("CRC [%08lx-%08lx] = %08lx\n", addr, addr + len - 1, crc32 (init_crc, (unsigned char *)addr, len)); + return 0; + } + return -1; +} + +void module_memory_init (void) +{ + register_command ("dm", " []", "display 32-bit memory location(s)", dm_cmd); + register_command ("pm", " [] ", "patch 32-bit memory location(s)", pm_cmd); + register_command ("ram_test", " []", "run a simple RAM test", ram_test_cmd); + register_command ("crc", "[ [ []]]", "Calculates a 32-bit CRC on specified memory region", crc_cmd); +}
trunk/soc/sw/orpmon/cmds/memory.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/camera.c =================================================================== --- trunk/soc/sw/orpmon/cmds/camera.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/camera.c (revision 20) @@ -0,0 +1,146 @@ +#include "common.h" +#include "support.h" +#include "spr_defs.h" + +/* Camera and CRT test. + Draws gray cross across the screen, few color boxes at top left and moves around camera captured screen left/right + in the middle. */ + +#define CAMERA_BASE 0x88000000 +#define CRT_BASE 0xc0000000 +#define VIDEO_RAM_START 0xa8000000 /* till including a83ffffc */ + +#define SCREEN_X 640 +#define SCREEN_Y 480 + +#define CAMERA_X 352 +#define CAMERA_Y 288 + +#define CAMERA_BUF(idx) (VIDEO_RAM_START + (idx) * CAMERA_X * CAMERA_Y) +#define FRAME_BUF (CAMERA_BUF(2)) + +#define CAMERA_POS (camera_pos_x + ((SCREEN_Y - CAMERA_Y) / 2) * SCREEN_X) + +#define MIN(x,y) ((x) < (y) ? (x) : (y)) + +#define set_mem32(addr,val) (*((unsigned long *) (addr)) = (val)) +#define get_mem32(addr) (*((unsigned long *) (addr))) +#define set_palette(idx,r,g,b) set_mem32 (CRT_BASE + 0x400 + (idx) * 4, (((r) >> 3) << 11) | (((g) >> 2) << 5) | (((b) >> 3) << 0)) +#define put_pixel(xx,yy,idx) (*(unsigned char *)(FRAME_BUF + (xx) + (yy) * SCREEN_X) = (idx)) + +int camera_pos_x; +int camera_move_speed = 1; +int current_buf; + +void camera_int (void) +{ + /* Change base addresse of camera */ + set_mem32 (CAMERA_BASE, CAMERA_BUF(current_buf)); /* Set address to store to */ + + /* Change base addresse of crt */ + set_mem32 (CRT_BASE + 8, CAMERA_BUF(1 - current_buf)); /* Tell CRT when camera buffer is */ + printf ("\n %08x\n ", CAMERA_BUF(current_buf)); + + current_buf = 1 - current_buf; + + /* move the camera screen around */ + camera_pos_x += camera_move_speed; + if (camera_pos_x >= SCREEN_X - CAMERA_X || camera_pos_x <= 0) + camera_move_speed = -camera_move_speed; + mtspr(SPR_PICSR, 0); +} + +int crt_enable_cmd (int argc, char *argv[]) +{ + int i, x, y; + + if (argc) return -1; + /* Init CRT */ + set_mem32 (CRT_BASE + 4, FRAME_BUF); /* Frame buffer start */ + set_mem32 (CRT_BASE, get_mem32 (CRT_BASE) | 1); /* Enable CRT only */ + + /* Init palette */ + for (i = 0; i < 32; i++) { + set_palette (8 * i + 0, 0x00, 0x00, 0x00); /* black */ + set_palette (8 * i + 1, 0xff, 0xff, 0xff); /* white */ + set_palette (8 * i + 2, 0x7f, 0x7f, 0x7f); /* gray */ + set_palette (8 * i + 3, 0xff, 0x00, 0x00); /* red */ + set_palette (8 * i + 4, 0x00, 0xff, 0x00); /* green */ + set_palette (8 * i + 5, 0x00, 0x00, 0xff); /* blue */ + set_palette (8 * i + 6, 0x00, 0xff, 0xff); /* cyan */ + set_palette (8 * i + 7, 0xff, 0x00, 0xff); /* purple */ + } + for (x = 0; x < SCREEN_X; x++) + for (y = 0; y < SCREEN_Y; y++) + put_pixel(x, y, 3); + return 0; +} + +int crt_test_cmd (int argc, char *argv[]) +{ + int i, x, y; + if (argc) return -1; + for (x = 0; x < SCREEN_X; x++) + for (y = 0; y < SCREEN_Y; y++) + put_pixel(x, y, 0); + /* Draw gray X */ + for (i = 0; i < SCREEN_Y; i++) { + put_pixel (i, i, 2); + put_pixel (SCREEN_X - i - 1, i, 1); + } + + /* Draw color boxes */ + for (y = 0; y < 50; y++) + for (x = 0; x < 50; x++) + for (i = 0; i < 8; i++) + put_pixel (i * 50 + x, y, i); + return 0; +} + +int crt_disable_cmd (int argc, char *argv[]) +{ + if (argc) return -1; + set_mem32 (CRT_BASE, get_mem32 (CRT_BASE) & ~1); /* Disable CRT */ + return 0; +} + +int camera_enable_cmd (int argc, char *argv[]) +{ + if (argc) return -1; + /* Init Camera */ + set_mem32 (CAMERA_BASE, CAMERA_BUF(current_buf = 0)); /* Set address to store to */ + set_mem32 (CAMERA_BASE + 4, 1); /* Enable it */ + + /* Init CRT to display camera */ + set_mem32 (CRT_BASE + 8, CAMERA_BUF(1 - current_buf)); /* Tell CRT when camera buffer is */ + camera_pos_x = 0; + set_mem32 (CRT_BASE + 0xc, CAMERA_POS); + set_mem32 (CRT_BASE, get_mem32 (CRT_BASE) | 2); /* Enable camera overlay */ + + /* Enable interrupts */ + mtspr (SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE); + mtspr (SPR_PICMR, mfspr(SPR_PICSR) | (1 << 13)); + return 0; +} + +int camera_disable_cmd (int argc, char *argv[]) +{ + if (argc) return -1; + /* Disable interrupts */ + mtspr (SPR_SR, mfspr(SPR_SR) & ~SPR_SR_IEE); + mtspr (SPR_PICMR, mfspr(SPR_PICSR) & ~(1 << 13)); + + /* Disable Camera */ + set_mem32 (CAMERA_BASE + 4, 1); /* Enable it */ + set_mem32 (CRT_BASE, get_mem32 (CRT_BASE) & ~2); /* Disable camera overlay */ + return 0; +} + +void module_camera_init (void) +{ + register_command ("crt_enable", "", "enables CRT", crt_enable_cmd); + register_command ("crt_disable", "", "disables CRT", crt_disable_cmd); + register_command ("crt_test", "", "enables CRT and displays some test patterns", crt_test_cmd); + register_command ("camera_enable", "", "enables camera", camera_enable_cmd); + register_command ("camera_disable", "", "disables camera", camera_disable_cmd); +}
trunk/soc/sw/orpmon/cmds/camera.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/hdbug.c =================================================================== --- trunk/soc/sw/orpmon/cmds/hdbug.c (nonexistent) +++ trunk/soc/sw/orpmon/cmds/hdbug.c (revision 20) @@ -0,0 +1,403 @@ +/* + hdbug.c -- harddisk debugging + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + +#include "support.h" +#include "common.h" +#include "dos.h" +#include "hdbug.h" +#include + + +static int hdbug_num_commands; +static command_struct hdbug_command[MAX_HDBUG_COMMANDS]; + +static struct dosparam _dos_params; +static struct dosparam *dos_params = &_dos_params; + + +/**********************************************************************/ +/* */ +/* H D B U G */ +/* */ +/**********************************************************************/ +/* + H D B U G _ I N I T + + initializes the ata core, mounts the DOS file system, and + provides methods for accessing DOS drives +*/ +void module_hdbug_init (void) +{ + hdbug_num_commands = 0; + + register_command ("hdbug", " []", "Opens ata device & mounts DOS filesystem", hdbug_mount_cmd); + register_hdbug_command ("umount", "", "Unmounts DOS filesystem & Closes device", hdbug_umount_cmd); + + register_hdbug_command ("dir", "", "dos 'dir' command.", hdbug_dir_cmd); + register_hdbug_command ("cd", "", "dos 'cd' command.", hdbug_cd_cmd); + register_hdbug_command ("help", "", "Display this help message", hdbug_help); + register_hdbug_command ("exit", "", "Exit hdbug and return to ORPmon", hdbug_umount_cmd); +} + + +/* + The next code is graceously taken from the "common.c" file + and slightly modified. + + Better would be if we could access the routines in 'common.c' + directly, using our own set of commands. +*/ + +/* Process command-line, generate arguments */ +int hdbug_mon_command(void) +{ + char c = '\0'; + char str[1000]; + char *pstr = str; + char *command_str; + char *argv[20]; + int argc = 0; + + + /* Show prompt */ + printf ("\nhdbug> "); + + + /* Get characters from UART */ + c = getc(); + while (c != '\r' && c != '\f' && c != '\n') + { + if (c == '\b') + pstr--; + else + *pstr++ = c; + putc(c); + c = getc(); + } + *pstr = '\0'; + printf ("\n"); + + /* Skip leading blanks */ + pstr = str; + while ( isspace(*pstr) ) pstr++; + + /* Get command from the string */ + command_str = pstr; + + while (1) { + /* Go to next argument */ + while ( isgraph(*pstr) ) pstr++; + if (*pstr) { + *pstr++ = '\0'; + while ( isspace(*pstr) ) pstr++; + argv[argc++] = pstr; + } + else + break; + } + + return execute_hdbug_command(command_str, argc, argv); +} + + +int execute_hdbug_command(char *command_str, int argc, char **argv) +{ + int i, found = 0; + + for (i = 0; i < hdbug_num_commands; i++) + if ( !strcmp(command_str, hdbug_command[i].name) ) + { + switch ( hdbug_command[i].func(argc, argv) ) + { + case -1: + printf ("Missing/wrong parameters, usage: %s %s\n", hdbug_command[i].name, hdbug_command[i].params); + break; + + case -2: + return -1; + } + + found++; + break; + } + + if (!found) + printf ("Unknown command. Type 'hdbug help' for help.\n"); + + return 0; +} + + +void register_hdbug_command (const char *name, const char *params, const char *help, int (*func)(int argc, char *argv[]) ) +{ + if (hdbug_num_commands < MAX_HDBUG_COMMANDS) + { + hdbug_command[hdbug_num_commands].name = name; + hdbug_command[hdbug_num_commands].params = params; + hdbug_command[hdbug_num_commands].help = help; + hdbug_command[hdbug_num_commands].func = func; + hdbug_num_commands++; + } + else + printf ("hdbug-command '%s' ignored; MAX_COMMANDS limit reached\n", name); +} + +int hdbug_help(int argc, char **argv) +{ + int i; + + for (i = 0; i < hdbug_num_commands; i++) + printf ("%-15s %-17s -%s\n", hdbug_command[i].name, hdbug_command[i].params, hdbug_command[i].help); + + return 0; +} + + + + +/**********************************************************************/ +/* */ +/* H D B U G C O M M A N D S E T */ +/* */ +/**********************************************************************/ + +/* + H D B U G _ M O U N T + + opens the ata-device and mounts the dos filesystem +*/ +int hdbug_mount_cmd(int argc, char **argv) +{ + int error; + + if (argc != 2) + return -1; + + + /* try to open the requested device (read-only) */ + dos_params->inode.i_rdev = (ATA_BASE_ADDR >> 16) | (**argv - '0'); + dos_params->filp.f_mode = FMODE_READ; + + /* open device */ + if ( (error = dos_open(dos_params)) ) + { + switch (error) { + case EINVAL: + printf( "Error, device busy.\n" ); /* standard response to EINVAL */ + break; + + case EIOCTLIARG: + printf( "Error, invalid IOCTL call.\n" ); + break; + + case EOPENIDEV: + printf( "Error, invalid device.\n" ); + break; + + case EOPENIHOST: + printf( "Error, ata host controller not found.\n" ); + break; + + case EOPENNODEV: + printf( "Error, ata-device not found.\n" ); + break; + + default: + printf( "Unkown error.\n" ); + break; + } + } + else + { + printf( "directory startsector: 0x%08lX\n", dos_params->ssector ); + printf( "cluster startsector : 0x%08lX\n", dos_params->csector ); + printf( "cluster startentry : 0x%08lX\n", dos_params->sentry ); + + /* device is opened, filesystem is mounted, start command prompt */ + while ( !hdbug_mon_command() ); + } + + return 0; +} + + +/* + H D B U G _ U M O U N T + + unmounts the dos filesystem and closes the ata-device +*/ +int hdbug_umount_cmd(int argc, char **argv) +{ + dos_release(dos_params); + + return -2; +} + + +/* + H D B U G _ C D +*/ +int hdbug_cd_cmd(int argc, char **argv) +{ + struct dos_dir_entry *entry; + + switch (argc) { + case 0: + /* display present working directory */ + printf( "FIXME: present working directory\n" ); + return 0; + + case 1: + break; + + default: + printf( "Too many arguments.\n" ); + return 0; + } + + /* search for the requested directory */ + if ( !(entry = dos_dir_find_entry(dos_params, *argv)) ) + { + printf( "The system cannot find the specified path.\n" ); + return 0; + } + + + return 0; +} + + +/* + H D B U G _ D I R +*/ +int hdbug_dir_cmd(int argc, char **argv) +{ + register int i; + + /* read the directory structures from the current directory + and display the results */ + + /* TODO: Add sub-directories */ + + /* get first cluster of current directory */ + dos_dir_cluster_reset(dos_params); + + for (i=0; i < dos_params->root_entries; i++) + hdbug_dir_print( dos_dir_get_entry(dos_params, i) ); + + return 0; +} + + +int hdbug_dir_print(struct dos_dir_entry *entry) +{ + unsigned long ltmp; + unsigned short stmp; + + char txt[9]; + + switch (entry->name[0]) { + case 0x00: + /* empty entry */ + break; + + case 0xe5: + /* deleted/removed entry */ + break; + + default: + /* check if entry is a label */ + if (entry->attribute & ATT_LAB) + { + printf( "LABEL: " ); + memcpy(txt, entry->name, 8); + txt[8] = '\0'; + printf( "%s", txt); + memcpy(txt, entry->ext, 3); + txt[3] = '\0'; + printf( "%s\n", txt); + } + else + { + /* display date & time */ + stmp = entry->date; + swap(&stmp, sizeof(short) ); + printf( "%02d-%02d-%4d ",stmp & 0x1f, (stmp >> 5) & 0xf, ((stmp >> 9) & 0xffff) +1980); + + stmp = entry->time; + swap(&stmp, sizeof(short) ); + printf( "%02d:%02d ", (stmp >> 11) & 0x1f, (stmp >> 5) & 0x3f ); + + /* display directory bit */ + printf( "%s ", entry->attribute & ATT_DIR ? "" : " " ); + + /* display filesize */ + ltmp = entry->size; + swap(<mp, sizeof(unsigned long) ); + printf( "%12ld ", ltmp ); + + /* replace the first 'space' in the name by an null char */ + *(char*)memchr(entry->name, 0x20, 8) = '\0'; + printf( "%s", entry->name); + + /* add extension */ + if (entry->ext[0] != 0x20) + { + printf( ".%3s", entry->ext); + } + + printf("\n"); + break; + } + } + + return 0; +} + + +/* + H D B U G T O O L S +*/ +inline void *swap(void *var, size_t size) +{ + switch(size) { + case 1: + return var; + + case 2: + { + unsigned short p = *(unsigned short*)var; + *(unsigned short*)var = (p << 8) | (p >> 8); + return var; + } + + case 4: + { + unsigned long *p = (unsigned long*)var; + *p = (*p << 24) | ( (*p & 0x0000ff00) << 8) | ( (*p & 0x00ff0000) >> 8) | (*p >> 24); + return var; + } + + default: + return NULL; + } +}
trunk/soc/sw/orpmon/cmds/hdbug.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/dhry.h =================================================================== --- trunk/soc/sw/orpmon/cmds/dhry.h (nonexistent) +++ trunk/soc/sw/orpmon/cmds/dhry.h (revision 20) @@ -0,0 +1,412 @@ +/* + **************************************************************************** + * + * "DHRYSTONE" Benchmark Program + * ----------------------------- + * + * Version: C, Version 2.1 + * + * File: dhry.h (part 1 of 3) + * + * Date: May 25, 1988 + * + * Author: Reinhold P. Weicker + * Siemens AG, AUT E 51 + * Postfach 3220 + * 8520 Erlangen + * Germany (West) + * Phone: [+49]-9131-7-20330 + * (8-17 Central European Time) + * Usenet: ..!mcsun!unido!estevax!weicker + * + * Original Version (in Ada) published in + * "Communications of the ACM" vol. 27., no. 10 (Oct. 1984), + * pp. 1013 - 1030, together with the statistics + * on which the distribution of statements etc. is based. + * + * In this C version, the following C library functions are used: + * - strcpy, strcmp (inside the measurement loop) + * - printf, scanf (outside the measurement loop) + * In addition, Berkeley UNIX system calls "times ()" or "time ()" + * are used for execution time measurement. For measurements + * on other systems, these calls have to be changed. + * + * Updated January, 1997 Rick Cramer, Galileo(R) to work with + * the i960jx and Galileo-5 Reference Design. + * + * + * Collection of Results: + * Reinhold Weicker (address see above) and + * + * Rick Richardson + * PC Research. Inc. + * 94 Apple Orchard Drive + * Tinton Falls, NJ 07724 + * Phone: (201) 389-8963 (9-17 EST) + * Usenet: ...!uunet!pcrat!rick + * + * Please send results to Rick Richardson and/or Reinhold Weicker. + * Complete information should be given on hardware and software used. + * Hardware information includes: Machine type, CPU, type and size + * of caches; for microprocessors: clock frequency, memory speed + * (number of wait states). + * Software information includes: Compiler (and runtime library) + * manufacturer and version, compilation switches, OS version. + * The Operating System version may give an indication about the + * compiler; Dhrystone itself performs no OS calls in the measurement loop. + * + * The complete output generated by the program should be mailed + * such that at least some checks for correctness can be made. + * + *************************************************************************** + * + * History: This version C/2.1 has been made for two reasons: + * + * 1) There is an obvious need for a common C version of + * Dhrystone, since C is at present the most popular system + * programming language for the class of processors + * (microcomputers, minicomputers) where Dhrystone is used most. + * There should be, as far as possible, only one C version of + * Dhrystone such that results can be compared without + * restrictions. In the past, the C versions distributed + * by Rick Richardson (Version 1.1) and by Reinhold Weicker + * had small (though not significant) differences. + * + * 2) As far as it is possible without changes to the Dhrystone + * statistics, optimizing compilers should be prevented from + * removing significant statements. + * + * This C version has been developed in cooperation with + * Rick Richardson (Tinton Falls, NJ), it incorporates many + * ideas from the "Version 1.1" distributed previously by + * him over the UNIX network Usenet. + * I also thank Chaim Benedelac (National Semiconductor), + * David Ditzel (SUN), Earl Killian and John Mashey (MIPS), + * Alan Smith and Rafael Saavedra-Barrera (UC at Berkeley) + * for their help with comments on earlier versions of the + * benchmark. + * + * Changes: In the initialization part, this version follows mostly + * Rick Richardson's version distributed via Usenet, not the + * version distributed earlier via floppy disk by Reinhold Weicker. + * As a concession to older compilers, names have been made + * unique within the first 8 characters. + * Inside the measurement loop, this version follows the + * version previously distributed by Reinhold Weicker. + * + * At several places in the benchmark, code has been added, + * but within the measurement loop only in branches that + * are not executed. The intention is that optimizing compilers + * should be prevented from moving code out of the measurement + * loop, or from removing code altogether. Since the statements + * that are executed within the measurement loop have NOT been + * changed, the numbers defining the "Dhrystone distribution" + * (distribution of statements, operand types and locality) + * still hold. Except for sophisticated optimizing compilers, + * execution times for this version should be the same as + * for previous versions. + * + * Since it has proven difficult to subtract the time for the + * measurement loop overhead in a correct way, the loop check + * has been made a part of the benchmark. This does have + * an impact - though a very minor one - on the distribution + * statistics which have been updated for this version. + * + * All changes within the measurement loop are described + * and discussed in the companion paper "Rationale for + * Dhrystone version 2". + * + * Because of the self-imposed limitation that the order and + * distribution of the executed statements should not be + * changed, there are still cases where optimizing compilers + * may not generate code for some statements. To a certain + * degree, this is unavoidable for small synthetic benchmarks. + * Users of the benchmark are advised to check code listings + * whether code is generated for all statements of Dhrystone. + * + * Version 2.1 is identical to version 2.0 distributed via + * the UNIX network Usenet in March 1988 except that it corrects + * some minor deficiencies that were found by users of version 2.0. + * The only change within the measurement loop is that a + * non-executed "else" part was added to the "if" statement in + * Func_3, and a non-executed "else" part removed from Proc_3. + * + *************************************************************************** + * + * Defines: The following "Defines" are possible: + * -DREG=register (default: Not defined) + * As an approximation to what an average C programmer + * might do, the "register" storage class is applied + * (if enabled by -DREG=register) + * - for local variables, if they are used (dynamically) + * five or more times + * - for parameters if they are used (dynamically) + * six or more times + * Note that an optimal "register" strategy is + * compiler-dependent, and that "register" declarations + * do not necessarily lead to faster execution. + * -DNOSTRUCTASSIGN (default: Not defined) + * Define if the C compiler does not support + * assignment of structures. + * -DNOENUMS (default: Not defined) + * Define if the C compiler does not support + * enumeration types. + * -DICACHEON (default: Not defined) + * Adjust performace by conditionally compiling + * these i960jx CACHE paramaters. + * -DICACHEOFF + * -DDCACHEON (default: Not defined) + * -DDCACHEOFF + * + * NOTE: Galileo-5 Board Frequency is set to 33Mhz in the + * file jx-timer.c. If the operating frequency is + * changed by replacing the crystal, then this #define + * must also be changed. + * + *************************************************************************** + * + * Compilation model and measurement (IMPORTANT): + * + * This C version of Dhrystone consists of four files: + * - dhry.h (this file, containing global definitions and comments) + * - dhry_1.c (containing the code corresponding to Ada package Pack_1) + * - dhry_2.c (containing the code corresponding to Ada package Pack_2) + * - jx-timer.c (containing the code to access the i960jx timer) + * + * The following "ground rules" apply for measurements: + * - No procedure merging + * - Otherwise, compiler optimizations are allowed but should be indicated + * - Default results are those without register declarations + * See the companion paper "Rationale for Dhrystone Version 2" for a more + * detailed discussion of these ground rules. + * + * For 16-Bit processors (e.g. 80186, 80286), times for all compilation + * models ("small", "medium", "large" etc.) should be given if possible, + * together with a definition of these models for the compiler system used. + * + * Example Intel 960jx compile syntax for Galileo-5. + * + * ic960 -AJA -Tgal5 -O2 -DREG=register dhry_1.c dhry_2.c jx-timer.c + * + ************************************************************************** + * + * Dhrystone (C version) statistics: + * + * [Comment from the first distribution, updated for version 2. + * Note that because of language differences, the numbers are slightly + * different from the Ada version.] + * + * The following program contains statements of a high level programming + * language (here: C) in a distribution considered representative: + * + * assignments 52 (51.0 %) + * control statements 33 (32.4 %) + * procedure, function calls 17 (16.7 %) + * + * 103 statements are dynamically executed. The program is balanced with + * respect to the three aspects: + * + * - statement type + * - operand type + * - operand locality + * operand global, local, parameter, or constant. + * + * The combination of these three aspects is balanced only approximately. + * + * 1. Statement Type: + * ----------------- number + * + * V1 = V2 9 + * (incl. V1 = F(..) + * V = Constant 12 + * Assignment, 7 + * with array element + * Assignment, 6 + * with record component + * -- + * 34 34 + * + * X = Y +|-|"&&"|"|" Z 5 + * X = Y +|-|"==" Constant 6 + * X = X +|- 1 3 + * X = Y *|/ Z 2 + * X = Expression, 1 + * two operators + * X = Expression, 1 + * three operators + * -- + * 18 18 + * + * if .... 14 + * with "else" 7 + * without "else" 7 + * executed 3 + * not executed 4 + * for ... 7 | counted every time + * while ... 4 | the loop condition + * do ... while 1 | is evaluated + * switch ... 1 + * break 1 + * declaration with 1 + * initialization + * -- + * 34 34 + * + * P (...) procedure call 11 + * user procedure 10 + * library procedure 1 + * X = F (...) + * function call 6 + * user function 5 + * library function 1 + * -- + * 17 17 + * --- + * 103 + * + * The average number of parameters in procedure or function calls + * is 1.82 (not counting the function values as implicit parameters). + * + * + * 2. Operators + * ------------ + * number approximate + * percentage + * + * Arithmetic 32 50.8 + * + * + 21 33.3 + * - 7 11.1 + * * 3 4.8 + * / (int div) 1 1.6 + * + * Comparison 27 42.8 + * + * == 9 14.3 + * /= 4 6.3 + * > 1 1.6 + * < 3 4.8 + * >= 1 1.6 + * <= 9 14.3 + * + * Logic 4 6.3 + * + * && (AND-THEN) 1 1.6 + * | (OR) 1 1.6 + * ! (NOT) 2 3.2 + * + * -- ----- + * 63 100.1 + * + * + * 3. Operand Type (counted once per operand reference): + * --------------- + * number approximate + * percentage + * + * Integer 175 72.3 % + * Character 45 18.6 % + * Pointer 12 5.0 % + * String30 6 2.5 % + * Array 2 0.8 % + * Record 2 0.8 % + * --- ------- + * 242 100.0 % + * + * When there is an access path leading to the final operand (e.g. a record + * component), only the final data type on the access path is counted. + * + * + * 4. Operand Locality: + * ------------------- + * number approximate + * percentage + * + * local variable 114 47.1 % + * global variable 22 9.1 % + * parameter 45 18.6 % + * value 23 9.5 % + * reference 22 9.1 % + * function result 6 2.5 % + * constant 55 22.7 % + * --- ------- + * 242 100.0 % + * + * + * The program does not compute anything meaningful, but it is syntactically + * and semantically correct. All variables have a value assigned to them + * before they are used as a source operand. + * + * There has been no explicit effort to account for the effects of a + * cache, or to balance the use of long or short displacements for code or + * data. + * + *************************************************************************** + */ + +/* Compiler and system dependent definitions: */ + + +#define Mic_secs_Per_Second 1000000.0 + /* Berkeley UNIX C returns process times in seconds/HZ */ + +#ifdef NOSTRUCTASSIGN +#define structassign(d, s) memcpy(&(d), &(s), sizeof(d)) +#else +#define structassign(d, s) d = s +#endif + +#define NOENUM +#ifdef NOENUM +#define Ident_1 0 +#define Ident_2 1 +#define Ident_3 2 +#define Ident_4 3 +#define Ident_5 4 + typedef int Enumeration; +#else + typedef enum {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5} + Enumeration; +#endif + /* for boolean and enumeration types in Ada, Pascal */ + +/* General definitions: */ + +/* #include */ + /* for strcpy, strcmp */ + +#define Null 0 + /* Value of a Null pointer */ +#define true 1 +#define false 0 + +typedef int One_Thirty; +typedef int One_Fifty; +typedef char Capital_Letter; +typedef int Boolean; +typedef char Str_30 [31]; +typedef int Arr_1_Dim [50]; +typedef int Arr_2_Dim [50] [50]; + +typedef struct record + { + struct record *Ptr_Comp; + Enumeration Discr; + union { + struct { + Enumeration Enum_Comp; + int Int_Comp; + char Str_Comp [31]; + } var_1; + struct { + Enumeration E_Comp_2; + char Str_2_Comp [31]; + } var_2; + struct { + char Ch_1_Comp; + char Ch_2_Comp; + } var_3; + } variant; + } Rec_Type, *Rec_Pointer; + +
trunk/soc/sw/orpmon/cmds/dhry.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/cmds/Makefile =================================================================== --- trunk/soc/sw/orpmon/cmds/Makefile (nonexistent) +++ trunk/soc/sw/orpmon/cmds/Makefile (revision 20) @@ -0,0 +1,12 @@ + +LIB = cmds.o +OBJS = dhry.o eth.o cpu.o camera.o load.o memory.o global.o touch.o atabug.o hdbug.o + +all: $(LIB) + +$(LIB): $(OBJS) + $(LD) -r -o $@ $(OBJS) + +.depend: Makefile $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ +sinclude .depend
trunk/soc/sw/orpmon/cmds/Makefile Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/sim.cfg =================================================================== --- trunk/soc/sw/orpmon/sim.cfg (nonexistent) +++ trunk/soc/sw/orpmon/sim.cfg (revision 20) @@ -0,0 +1,930 @@ +/* sim.cfg -- Simulator configuration script file + Copyright (C) 2001-2002, Marko Mlinar, markom@opencores.org + +This file is part of OpenRISC 1000 Architectural Simulator. +It contains the default configuration and help about configuring +the simulator. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + +/* INTRODUCTION + + The ork1sim has various parameters, that are set in configuration files + like this one. The user can switch between configurations at startup by + specifying the required configuration file with the -f option. + If no configuration file is specified or1ksim searches for the default + configuration file sim.cfg. First it searches for './sim.cfg'. If this + file is not found, it searches for '~/or1k/sim.cfg'. If this file is + not found too, it reverts to the built-in default configuration. + + NOTE: Users should not rely on the built-in configuration, since the + default configuration may differ between version. + Rather create a configuration file that sets all critical values. + + This file may contain (standard C) comments only - no // support. + + Configure files may be be included, using: + include "file_name_to_include" + + Like normal configuration files, the included file is divided into + sections. Each section is described in detail also. + + Some section have subsections. One example of such a subsection is: + + device + instance specific parameters... + enddevice + + which creates a device instance. +*/ + + +/* MEMORY SECTION + + This section specifies how the memory is generated and the blocks + it consists of. + + type = random/unknown/pattern + Specifies the initial memory values. + 'random' generates random memory using seed 'random_seed'. + 'pattern' fills memory with 'pattern'. + 'unknown' does not specify how memory should be generated, + leaving the memory in a undefined state. This is the fastest + option. + + random_seed = + random seed for randomizer, used if type = 'random'. + + pattern = + pattern to fill memory, used if type = 'pattern'. + + nmemories = + number of memory instances connected + + instance specific: + baseaddr = + memory start address + + size = + memory size + + name = "" + memory block name + + ce = + chip enable index of the memory instance + + delayr = + cycles, required for read access, -1 if instance does not support reading + + delayw = + cycles, required for write access, -1 if instance does not support writing + + log = "" + filename, where to log memory accesses to, no log, if log command is not specified +*/ + + +section memory + /*random_seed = 12345 + type = random*/ + pattern = 0x00 + type = unknown /* Fastest */ + + + nmemories = 3 + device 0 + name = "FLASH" + ce = 0 + baseaddr = 0xf0000000 + size = 0x00800000 + delayr = 10 + delayw = -1 + enddevice + + device 1 + name = "RAM" + ce = 1 + baseaddr = 0x00000000 + size = 0x00400000 + delayr = 1 + delayw = 2 + enddevice + + device 2 + name = "SRAM" + ce = 2 + baseaddr = 0x08000000 + size = 0x00400000 + delayr = 1 + delayw = 2 + enddevice +end + + +/* IMMU SECTION + + This section configures the Instruction Memory Manangement Unit + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of ITLB sets; must be power of two + + nways = + number of ITLB ways + + pagesize = + instruction page size; must be power of two + + entrysize = + instruction entry size in bytes + + ustates = + number of ITLB usage states (2, 3, 4 etc., max is 4) + + hitdelay = + number of cycles immu hit costs + + missdelay = + number of cycles immu miss costs +*/ + +section immu + enabled = 1 + nsets = 64 + nways = 1 + pagesize = 8192 + hitdelay = 0 + missdelay = 0 +end + + +/* DMMU SECTION + + This section configures the Data Memory Manangement Unit + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of DTLB sets; must be power of two + + nways = + number of DTLB ways + + pagesize = + data page size; must be power of two + + entrysize = + data entry size in bytes + + ustates = + number of DTLB usage states (2, 3, 4 etc., max is 4) + + hitdelay = + number of cycles dmmu hit costs + + missdelay = + number of cycles dmmu miss costs +*/ + +section dmmu + enabled = 1 + nsets = 64 + nways = 1 + pagesize = 8192 + hitdelay = 0 + missdelay = 0 +end + + +/* IC SECTION + + This section configures the Instruction Cache + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of IC sets; must be power of two + + nways = + number of IC ways + + blocksize = + IC block size in bytes; must be power of two + + ustates = + number of IC usage states (2, 3, 4 etc., max is 4) + + hitdelay = + number of cycles ic hit costs + + missdelay = + number of cycles ic miss costs +*/ + +section ic + enabled = 1 + nsets = 256 + nways = 1 + blocksize = 16 + hitdelay = 0 + missdelay = 0 +end + + +/* DC SECTION + + This section configures the Data Cache + + enabled = 0/1 + '0': disabled + '1': enabled + (NOTE: UPR bit is set) + + nsets = + number of DC sets; must be power of two + + nways = + number of DC ways + + blocksize = + DC block size in bytes; must be power of two + + ustates = + number of DC usage states (2, 3, 4 etc., max is 4) + + load_hitdelay = + number of cycles dc load hit costs + + load_missdelay = + number of cycles dc load miss costs + + store_hitdelay = + number of cycles dc load hit costs + + store_missdelay = + number of cycles dc load miss costs +*/ + +section dc + enabled = 1 + nsets = 256 + nways = 1 + blocksize = 16 + load_hitdelay = 0 + load_missdelay = 0 + store_hitdelay = 0 + store_missdelay = 0 +end + + +/* SIM SECTION + + This section specifies how or1ksim should behave. + + verbose = 0/1 + '0': don't print extra messages + '1': print extra messages + + debug = 0-9 + 0 : no debug messages + 1-9: debug message level. + higher numbers produce more messages + + profile = 0/1 + '0': don't generate profiling file 'sim.profile' + '1': don't generate profiling file 'sim.profile' + + prof_fn = "" + optional filename for the profiling file. + valid only if 'profile' is set + + mprofile = 0/1 + '0': don't generate memory profiling file 'sim.mprofile' + '1': generate memory profiling file 'sim.mprofile' + + mprof_fn = "" + optional filename for the memory profiling file. + valid only if 'mprofile' is set + + history = 0/1 + '0': don't track execution flow + '1': track execution flow + Execution flow can be tracked for the simulator's + 'hist' command. Useful for back-trace debugging. + + iprompt = 0/1 + '0': start in (so what do we start in ???) + '1': start in interactive prompt. + + exe_log = 0/1 + '0': don't generate execution log. + '1': generate execution log. + + exe_log = default/hardware/simple/software + type of execution log, default is used when not specified + + exe_log_start = + index of first instruction to start logging, default = 0 + + exe_log_end = + index of last instruction to end logging; not limited, if omitted + + exe_log_marker = + specifies number of instructions before horizontal marker is + printed; if zero, markers are disabled (default) + + exe_log_fn = "" + filename for the exection log file. + valid only if 'exe_log' is set + + spr_log = 0/1 + '0': log reads/writes to/from sprs + '1': don't log reads/write to/from sprs + + spr_log_fn = "" + filename for the sprs log file. + valid only if 'spr_log' is set + + clkcycle = [ps|ns|us|ms] + specifies time measurement for one cycle +*/ + +section sim + /* verbose = 1 */ + debug = 0 + profile = 0 + prof_fn = "sim.profile" + + history = 1 + /* iprompt = 0 */ + exe_log = 0 + exe_log_type = software + exe_log_start = 0 +/* exe_log_end = 20000000*/ + exe_log_marker = 10000 + exe_log_fn = "executed.log" + + spr_log = 0 + spr_log_fn = "spr.log" + clkcycle = 100ns +end + + +/* SECTION VAPI + + This section configures the Verification API, used for Advanced + Core Verification. + + enabled = 0/1 + '0': disbable VAPI server + '1': enable/start VAPI server + + server_port = + TCP/IP port to start VAPI server on + + log_enabled = 0/1 + '0': disable VAPI requests logging + '1': enable VAPI requests logging + + hide_device_id = 0/1 + '0': don't log device id (for compatability with old version) + '1': log device id + + + vapi_fn = + filename for the log file. + valid only if log_enabled is set +*/ + +section VAPI + enabled = 0 + server_port = 9998 + log_enabled = 0 + vapi_log_fn = "vapi.log" +end + + +/* CPU SECTION + + This section specifies various CPU parameters. + + ver = + rev = + specifies version and revision of the CPU used + + upr = + changes the upr register + + sr = + sets the initial Supervision Register value + + superscalar = 0/1 + '0': CPU is scalar + '1': CPU is superscalar + (modify cpu/or32/execute.c to tune superscalar model) + + hazards = 0/1 + '0': don't track data hazards in superscalar CPU + '1': track data hazards in superscalar CPU + If tracked, data hazards can be displayed using the + simulator's 'r' command. + + dependstats = 0/1 + '0': don't calculate inter-instruction dependencies. + '1': calculate inter-instruction dependencies. + If calculated, inter-instruction dependencies can be + displayed using the simulator's 'stat' command. + + sbuf_len = + length of store buffer (<= 256), 0 = disabled +*/ + +section cpu + ver = 0x1200 + rev = 0x0001 + /* upr = */ + superscalar = 0 + hazards = 0 + dependstats = 0 + sbuf_len = 0 +end + + +/* PM SECTION + + This section specifies Power Management parameters + + enabled = 0/1 + '0': disable power management + '1': enable power management +*/ + +section pm + enabled = 0 +end + + +/* BPB SECTION + + This section specifies how branch prediction should behave. + + enabled = 0/1 + '0': disable branch prediction + '1': enable branch prediction + + btic = 0/1 + '0': disable branch target instruction cache model + '1': enable branch target instruction cache model + + sbp_bf_fwd = 0/1 + Static branch prediction for 'l.bf' + '0': don't use forward prediction + '1': use forward prediction + + sbp_bnf_fwd = 0/1 + Static branch prediction for 'l.bnf' + '0': don't use forward prediction + '1': use forward prediction + + hitdelay = + number of cycles bpb hit costs + + missdelay = + number of cycles bpb miss costs +*/ + +section bpb + enabled = 0 + btic = 0 + sbp_bf_fwd = 0 + sbp_bnf_fwd = 0 + hitdelay = 0 + missdelay = 0 +end + + +/* DEBUG SECTION + + This sections specifies how the debug unit should behave. + + enabled = 0/1 + '0': disable debug unit + '1': enable debug unit + + gdb_enabled = 0/1 + '0': don't start gdb server + '1': start gdb server at port 'server_port' + + server_port = + TCP/IP port to start gdb server on + valid only if gdb_enabled is set + + vapi_id = + Used to create "fake" vapi log file containing the JTAG proxy messages. +*/ + +section debug + enabled = 0 + gdb_enabled = 0 + server_port = 9999 +end + + +/* MC SECTION + + This section configures the memory controller + + enabled = 0/1 + '0': disable memory controller + '1': enable memory controller + + baseaddr = + address of first MC register + + POC = + Power On Configuration register +*/ + +section mc + enabled = 0 + baseaddr = 0x93000000 + POC = 0x00000008 /* Power on configuration register */ +end + + +/* UART SECTION + + This section configures the UARTs + + enabled = <0|1> + Enable/disable the peripheral. By default if it is enabled. + + baseaddr = + address of first UART register for this device + + + channel = : + + The channel parameter indicates the source of received UART characters + and the sink for transmitted UART characters. + + The can be either "file", "xterm", "tcp", "fd", or "tty" + (without quotes). + + A) To send/receive characters from a pair of files, use a file + channel: + + channel=file:, + + B) To create an interactive terminal window, use an xterm channel: + + channel=xterm:[]* + + C) To create a bidirectional tcp socket which one could, for example, + access via telnet, use a tcp channel: + + channel=tcp: + + D) To cause the UART to read/write from existing numeric file + descriptors, use an fd channel: + + channel=fd:, + + E) To connect the UART to a physical serial port, create a tty + channel: + + channel=tty:device=/dev/ttyS0,baud=9600 + + irq = + irq number for this device + + 16550 = 0/1 + '0': this device is a UART16450 + '1': this device is a UART16550 + + jitter = + in msecs... time to block, -1 to disable it + + vapi_id = + VAPI id of this instance +*/ + +section uart + enabled = 1 + baseaddr = 0x90000000 + irq = 2 + channel = "file:uart0.rx,uart0.tx" + jitter = -1 /* async behaviour */ + 16550 = 1 +end + + +/* DMA SECTION + + This section configures the DMAs + + enabled = <0|1> + Enable/disable the peripheral. By default if it is enabled. + + baseaddr = + address of first DMA register for this device + + irq = + irq number for this device + + vapi_id = + VAPI id of this instance +*/ + +section dma + enabled = 1 + baseaddr = 0x9a000000 + irq = 11 +end + + +/* ETHERNET SECTION + + This section configures the ETHERNETs + + enabled = <0|1> + Enable/disable the peripheral. By default if it is enabled. + + baseaddr = + address of first ethernet register for this device + + dma = + which controller is this ethernet "connected" to + + irq = + ethernet mac IRQ level + + rtx_type = + use 0 - file interface, 1 - socket interface + + rx_channel = + DMA channel used for RX + + tx_channel = + DMA channel used for TX + + rxfile = "" + filename, where to read data from + + txfile = "" + filename, where to write data to + + sockif = "" + interface name of ethernet socket + + vapi_id = + VAPI id of this instance +*/ + +section ethernet + baseaddr = 0x92000000 + dma = 0 + irq = 4 + rtx_type = 0 + tx_channel = 0 + rx_channel = 1 + rxfile = "eth0.rx" + txfile = "eth0.tx" + sockif = "eth0" +end + + +/* GPIO SECTION + + This section configures the GPIOs + + enabled = <0|1> + Enable/disable the peripheral. By default if it is enabled. + + baseaddr = + address of first GPIO register for this device + + irq = + irq number for this device + + base_vapi_id = + first VAPI id of this instance + GPIO uses 8 consecutive VAPI IDs +*/ + +section gpio + enabled = 1 + baseaddr = 0x91000000 + irq = 3 + base_vapi_id = 0x0200 +end + +/* VGA SECTION + + This section configures the VGA/LCD controller + + enabled = <0|1> + Enable/disable the peripheral. By default if it is enabled. + + baseaddr = + address of first VGA register + + irq = + irq number for this device + + refresh_rate = + number of cycles between screen dumps + + filename = "" + template name for generated names (e.g. "primary" produces "primary0023.bmp") +*/ + +section vga + enabled = 1 + baseaddr = 0x97100000 + irq = 8 + refresh_rate = 100000 + filename = "primary" +end + + +/* TICK TIMER SECTION + + This section configures tick timer + + enabled = 0/1 + whether tick timer is enabled + + irq = + irq number +*/ +/* +section tick + enabled = 1 + irq = 0 +end +*/ + +/* FB SECTION + + This section configures the frame buffer + + enabled = <0|1> + Enable/disable the peripheral. By default if it is enabled. + + baseaddr = + base address of frame buffer + + paladdr = + base address of first palette entry + + refresh_rate = + number of cycles between screen dumps + + filename = "" + template name for generated names (e.g. "primary" produces "primary0023.bmp") +*/ + +section fb + enabled = 1 + baseaddr = 0x97000000 + refresh_rate = 1000000 + filename = "primary" +end + + +/* KBD SECTION + + This section configures the PS/2 compatible keyboard + + baseaddr = + base address of the keyboard device + + rxfile = "" + filename, where to read data from +*/ + +section kbd + enabled = 1 + irq = 5 + baseaddr = 0x94000000 + rxfile = "kbd.rx" +end + + +/* ATA SECTION + + This section configures the ATA/ATAPI host controller + + baseaddr = + address of first ATA register + + enabled = <0|1> + Enable/disable the peripheral. By default if it is enabled. + + irq = + irq number for this device + + debug = + debug level for ata models. + 0: no debug messages + 1: verbose messages + 3: normal messages (more messages than verbose) + 5: debug messages (normal debug messages) + 7: flow control messages (debug statemachine flows) + 9: low priority message (display everything the code does) + + dev_type0/1 = + ata device 0 type + 0: NO_CONNeCT: none (not connected) + 1: FILE : simulated harddisk + 2: LOCAL : local system harddisk + + dev_file0/1 = "" + filename for simulated ATA device + valid only if dev_type0 == 1 + + dev_size0/1 = + size of simulated hard-disk (in MBytes) + valid only if dev_type0 == 1 + + dev_packet0/1 = + 0: simulated ATA device does NOT implement PACKET command feature set + 1: simulated ATA device does implement PACKET command feature set + + FIXME: irq number +*/ + +section ata + enabled = 1 + baseaddr = 0x9e000000 + irq = 15 + + dev_type0 = 1 + dev_file0 = "/tmp/sim_atadev0" + dev_size0 = 1 + dev_packet0 = 0 + + dev_type1 = 0 + dev_file1 = "" + dev_size1 = 0 + dev_packet1 = 0 +end + + +/* CUC SECTION + + This section configures the OpenRISC Custom Unit Compiler + + memory_order = none/weak/strong/exact + none different memory ordering, even if there are dependencies, + burst can be made, width can change + weak different memory ordering, if there cannot be dependencies + burst can be made, width can change + strong same memory ordering, burst can be made, width can change + exact exacltly the same memory ordering and widths + + calling_convention = 0/1 + whether programs follow OpenRISC calling conventions + + enable_bursts = 0/1 + whether burst are detected + + no_multicycle = 0/1 + if selected no multicycle logic paths will be generated + + timings_fn = "" +*/ + +section cuc + memory_order = weak + calling_convention = 1 + enable_bursts = 1 + no_multicycle = 1 + timings_fn = "virtex.tim" +end +
trunk/soc/sw/orpmon/sim.cfg Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/screen.c =================================================================== --- trunk/soc/sw/orpmon/common/screen.c (nonexistent) +++ trunk/soc/sw/orpmon/common/screen.c (revision 20) @@ -0,0 +1,96 @@ +#include "common.h" +#include "support.h" +#include "screen.h" + +#if CRT_ENABLED +unsigned long fg_color = COLOR_WHITE; +unsigned long bg_color = COLOR_BLACK; +int cx = 0; +int cy = 0; + +extern unsigned char font[256][12]; +static char screen[CHARSY][CHARSX]; + +void put_char_xy (int x, int y, char c) { + int i, j; + screen[y][x] = c; + x *= CHAR_WIDTH; + y *= CHAR_HEIGHT; + for (i = 0; i < CHAR_HEIGHT; i++) { + int t = font[(unsigned char)c][i]; + for (j = 0; j < CHAR_WIDTH; j++) { + PUT_PIXEL(x + j, y + i, (t & 1) ? fg_color : bg_color); + t >>= 1; + } + } +} + +static void scroll (void) { + int x,y; +#if 1 + for (y = 1; y < CHARSY; y++) + for (x = 0; x < CHARSX; x++) + put_char_xy (x, y-1, screen[y][x]); +#else + memcpy ( (unsigned char *)FB_BASE_ADDR, ((unsigned char *)FB_BASE_ADDR) + RESX * CHAR_HEIGHT, (RESY - CHAR_HEIGHT) * RESX); + memcpy (&screen[0][0], &screen[1][0], (CHARSY - 1) * CHARSX); +#endif + for (x = 0; x < CHARSX; x++) + put_char_xy (x, CHARSY-1, ' '); + cy--; +} + +void screen_putc (char c) { + int t; + switch (c) { + case '\n': + cy++; + cx = 0; + if (cy >= CHARSY) + scroll(); + break; + case '\r': + cx = 0; + break; + case '\t': + for (t = 0; t < 8 - (cx & 7); t++) + screen_putc (' '); + break; + case '\b': + if (cx > 0) cx--; + put_char_xy(cx, cy, ' '); + break; + default: + put_char_xy(cx, cy, c); + cx++; + if(cx >= CHARSX) screen_putc ('\n'); + break; + } +} + +void screen_clear () { + memset ((unsigned char *)FB_BASE_ADDR, bg_color, RESX * RESY); + memset (&screen[0][0], ' ', CHARSX * CHARSY); + cx = cy = 0; +} + +void screen_puts (char *s) { + while (*s) { + screen_putc (*s); + s++; + } +} + +void screen_init () { + screen_clear (); + SET_PALLETE(COLOR_BLACK, 0, 0, 0); + SET_PALLETE(COLOR_WHITE, 127, 127, 127); + + /* Set screen offset */ + *((unsigned long *)CRT_BUFFER_REG) = FB_BASE_ADDR; + + /* Turn screen on */ + *((unsigned long *)CRT_REG) = 0x00000001; +} + +#endif /* CRT_ENABLED */
trunk/soc/sw/orpmon/common/screen.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/ctype.c =================================================================== --- trunk/soc/sw/orpmon/common/ctype.c (nonexistent) +++ trunk/soc/sw/orpmon/common/ctype.c (revision 20) @@ -0,0 +1,55 @@ +/* + ctype.c -- character types + Implements the usual ctype stuff (only valid for ASCII systems) + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include + +const unsigned char __ctype_table[256] = +{ + /* only the first 128 characters are really defined 0 1 2 3 4 5 6 7 */ + 0, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, /*0 NUL SOH STX ETX EOT ENQ ACK BEL */ + __CT_c, __CT_b, __CT_s, __CT_b, __CT_s, __CT_s, __CT_c, __CT_c, /*1 BS HT LF VT FF CR SO SI */ + __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, /*2 DLE DC1 DC2 DC3 DC4 NAK SYN ETB */ + __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, __CT_c, /*3 CAN EM SUB ESC FS GS RS US */ + __CT_b, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*4 SP ! " # $ % & ' */ + __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*5 ( ) * + , - . / */ + __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, __CT_d, /*6 0 1 2 3 4 5 6 7 */ + __CT_d, __CT_d, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*7 8 9 : ; < = > ? */ + __CT_p, __CT_ux, __CT_ux, __CT_ux, __CT_ux, __CT_ux, __CT_ux, __CT_u, /*8 @ A B C D E F G */ + __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, /*9 H I J K L M N O */ + __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, __CT_u, /*a P Q R S T U V W */ + __CT_u, __CT_u, __CT_u, __CT_p, __CT_p, __CT_p, __CT_p, __CT_p, /*b X Y Z [ \ ] ^ _ */ + __CT_p, __CT_lx, __CT_lx, __CT_lx, __CT_lx, __CT_lx, __CT_lx, __CT_l, /*c ` a b c d e f g */ + __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, /*d h i j k l m n o */ + __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, __CT_l, /*e p q r s t u v w */ + __CT_l, __CT_l, __CT_l, __CT_p, __CT_p, __CT_p, __CT_p, __CT_c, /*f x y z { | } ~ DEL */ + + /* The other 128 characters are system dependant */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +};
trunk/soc/sw/orpmon/common/ctype.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/or32.S =================================================================== --- trunk/soc/sw/orpmon/common/or32.S (nonexistent) +++ trunk/soc/sw/orpmon/common/or32.S (revision 20) @@ -0,0 +1,149 @@ + .align 4 + .global ___udivsi3 +___udivsi3: + l.addi r1,r1,-4 + l.sw 0(r1),r9 + l.addi r11,r0,0 + l.addi r8,r4,0 + l.addi r5,r3,0 + l.sfne r8,r11 + l.bnf 4f + l.addi r7,r0,0 + l.sfgtu r8,r5 + l.bf 5f + l.sfeq r8,r5 + l.bf 6f + l.sfltu r11,r8 + l.bnf 2f + l.addi r13,r0,32 + l.movhi r9,hi(0x80000000) + l.addi r6,r0,-1 +1: + l.and r3,r5,r9 + l.slli r4,r7,1 + l.addi r15,r5,0 + l.srli r3,r3,31 + l.add r13,r13,r6 + l.or r7,r4,r3 + l.sfltu r7,r8 + l.bf 1b + l.slli r5,r5,1 +2: + l.srli r7,r7,1 + l.addi r13,r13,1 + l.addi r9,r0,0 + l.sfltu r9,r13 + l.bnf 4f + l.addi r5,r15,0 + l.movhi r15,hi(0x80000000) + l.addi r17,r0,0 +3: + l.and r3,r5,r15 + l.slli r4,r7,1 + l.srli r3,r3,31 + l.or r7,r4,r3 + l.sub r6,r7,r8 + l.and r3,r6,r15 + l.srli r3,r3,31 + l.addi r4,r0,0 + l.sfne r3,r4 + l.bf 1f + l.slli r3,r11,1 + l.addi r4,r0,1 +1: + l.slli r5,r5,1 + l.sfne r4,r17 + l.bnf 2f + l.or r11,r3,r4 + l.addi r7,r6,0 +2: + l.addi r9,r9,1 + l.sfltu r9,r13 + l.bf 3b + l.nop 0 + l.j 4f + l.nop 0 +6: + l.j 4f + l.addi r11,r0,1 +5: + l.addi r7,r5,0 +4: + l.lwz r9,0(r1) + l.jr r9 + l.addi r1,r1,4 + + .align 4 + .global ___divsi3 +___divsi3: + l.addi r1,r1,-8 + l.sw 0(r1),r9 + l.sw 4(r1),r10 + l.addi r5,r3,0 + l.addi r10,r0,0 + l.sflts r5,r10 + l.bnf 1f + l.addi r3,r0,0 + l.addi r10,r0,1 + l.sub r5,r0,r5 +1: + l.sflts r4,r3 + l.bnf 1f + l.nop 0 + l.addi r10,r10,1 + l.sub r4,r0,r4 +1: + l.jal ___udivsi3 + l.addi r3,r5,0 + l.addi r3,r0,1 + l.sfeq r10,r3 + l.bnf 1f + l.nop 0 + l.sub r11,r0,r11 +1: + l.lwz r9,0(r1) + l.lwz r10,4(r1) + l.jr r9 + l.addi r1,r1,8 + + .align 4 + .global ___umodsi3 +___umodsi3: + l.addi r1,r1,-4 + l.sw 0(r1),r9 + l.jal ___udivsi3 + l.nop 0 + l.addi r11,r7,0 + l.lwz r9,0(r1) + l.jr r9 + l.addi r1,r1,4 + + .align 4 + .global ___modsi3 +___modsi3: + l.addi r1,r1,-8 + l.sw 0(r1),r9 + l.sw 4(r1),r10 + l.sflts r3,r0 + l.bnf 1f + l.nop 0 + l.addi r10,r0,1 + l.sub r3,r0,r3 +1: + l.sflts r4,r0 + l.bnf 1f + l.nop 0 + l.sub r4,r0,r4 +1: + l.jal ___udivsi3 + l.nop 0 + l.addi r3,r0,1 + l.sfeq r10,r3 + l.bnf 1f + l.addi r11,r7,0 + l.sub r11,r0,r11 +1: + l.lwz r9,0(r1) + l.lwz r10,4(r1) + l.jr r9 + l.addi r1,r1,8
trunk/soc/sw/orpmon/common/or32.S Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/cprintf.c =================================================================== --- trunk/soc/sw/orpmon/common/cprintf.c (nonexistent) +++ trunk/soc/sw/orpmon/common/cprintf.c (revision 20) @@ -0,0 +1,858 @@ +/* +FUNCTION +<>, <>, <>---format argument list + +INDEX + vprintf +INDEX + vfprintf +INDEX + vsprintf +INDEX + vsnprintf + +ANSI_SYNOPSIS + #include + #include + int vprintf(const char *<[fmt]>, va_list <[list]>); + int vfprintf(FILE *<[fp]>, const char *<[fmt]>, va_list <[list]>); + int vsprintf(char *<[str]>, const char *<[fmt]>, va_list <[list]>); + int vsnprintf(char *<[str]>, size_t <[size]>, const char *<[fmt]>, va_list <[list]>); + + int _vprintf_r(void *<[reent]>, const char *<[fmt]>, + va_list <[list]>); + int _vfprintf_r(void *<[reent]>, FILE *<[fp]>, const char *<[fmt]>, + va_list <[list]>); + int _vsprintf_r(void *<[reent]>, char *<[str]>, const char *<[fmt]>, + va_list <[list]>); + int _vsnprintf_r(void *<[reent]>, char *<[str]>, size_t <[size]>, const char *<[fmt]>, + va_list <[list]>); + +TRAD_SYNOPSIS + #include + #include + int vprintf( <[fmt]>, <[list]>) + char *<[fmt]>; + va_list <[list]>; + + int vfprintf(<[fp]>, <[fmt]>, <[list]>) + FILE *<[fp]>; + char *<[fmt]>; + va_list <[list]>; + + int vsprintf(<[str]>, <[fmt]>, <[list]>) + char *<[str]>; + char *<[fmt]>; + va_list <[list]>; + + int vsnprintf(<[str]>, <[size]>, <[fmt]>, <[list]>) + char *<[str]>; + size_t <[size]>; + char *<[fmt]>; + va_list <[list]>; + + int _vprintf_r(<[reent]>, <[fmt]>, <[list]>) + char *<[reent]>; + char *<[fmt]>; + va_list <[list]>; + + int _vfprintf_r(<[reent]>, <[fp]>, <[fmt]>, <[list]>) + char *<[reent]>; + FILE *<[fp]>; + char *<[fmt]>; + va_list <[list]>; + + int _vsprintf_r(<[reent]>, <[str]>, <[fmt]>, <[list]>) + char *<[reent]>; + char *<[str]>; + char *<[fmt]>; + va_list <[list]>; + + int _vsnprintf_r(<[reent]>, <[str]>, <[size]>, <[fmt]>, <[list]>) + char *<[reent]>; + char *<[str]>; + size_t <[size]>; + char *<[fmt]>; + va_list <[list]>; + +DESCRIPTION +<>, <>, <> and <> are (respectively) +variants of <>, <>, <> and <>. They differ +only in allowing their caller to pass the variable argument list as a +<> object (initialized by <>) rather than directly +accepting a variable number of arguments. + +RETURNS +The return values are consistent with the corresponding functions: +<> returns the number of bytes in the output string, +save that the concluding <> is not counted. +<> and <> return the number of characters transmitted. +If an error occurs, <> and <> return <>. No +error returns occur for <>. + +PORTABILITY +ANSI C requires all three functions. + +Supporting OS subroutines required: <>, <>, <>, +<>, <>, <>, <>. +*/ + +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Chris Torek. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#define INTEGER_ONLY +#define _HAVE_STDC_ +#define _NOLONGLONG +#define u_long unsigned long +#define u_short unsigned short +#define u_int unsigned int +#define _uquad_t u_long +#define _POINTER_INT int +#define _CONST const +#define NULL 0 + +#include "common.h" +#include "support.h" + +#if defined(LIBC_SCCS) && !defined(lint) +/*static char *sccsid = "from: @(#)vfprintf.c 5.50 (Berkeley) 12/16/92";*/ +static char *rcsid = "$Id: cprintf.c,v 1.2 2002-04-19 11:08:25 markom Exp $"; +#endif /* LIBC_SCCS and not lint */ + +/* + * Actual printf innards. + * + * This code is large and complicated... + */ + +#ifdef INTEGER_ONLY +#define VFPRINTF vfiprintf +#define _VFPRINTF_R _vfiprintf_r +#else +#define VFPRINTF vfprintf +#define _VFPRINTF_R _vfprintf_r +#define FLOATING_POINT +#endif + +#define _NO_LONGLONG +#if defined WANT_PRINTF_LONG_LONG && defined __GNUC__ +# undef _NO_LONGLONG +#endif + +#include + +#ifdef FLOATING_POINT +#include +#include +#include "floatio.h" + +#define BUF (MAXEXP+MAXFRACT+1) /* + decimal point */ +#define DEFPREC 6 + +static char *cvt _PARAMS((struct _reent *, double, int, int, char *, int *, int, int *)); +static int exponent _PARAMS((char *, int, int)); + +#else /* no FLOATING_POINT */ + +#define BUF 40 + +#endif /* FLOATING_POINT */ + +/* + * Macros for converting digits to letters and vice versa + */ +#define to_digit(c) ((c) - '0') +#define is_digit(c) ((unsigned)to_digit(c) <= 9) +#define to_char(n) ((n) + '0') + +/* + * Flags used during conversion. + */ +#define ALT 0x001 /* alternate form */ +#define HEXPREFIX 0x002 /* add 0x or 0X prefix */ +#define LADJUST 0x004 /* left adjustment */ +#define LONGDBL 0x008 /* long double; unimplemented */ +#define LONGINT 0x010 /* long integer */ +#define QUADINT 0x020 /* quad integer */ +#define SHORTINT 0x040 /* short integer */ +#define ZEROPAD 0x080 /* zero (as opposed to blank) pad */ +#define FPT 0x100 /* Floating point number */ + + /* + * Choose PADSIZE to trade efficiency vs. size. If larger printf + * fields occur frequently, increase PADSIZE and make the initialisers + * below longer. + */ +#define PADSIZE 16 /* pad chunk size */ + static _CONST char blanks[PADSIZE] = + {' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' '}; + static _CONST char zeroes[PADSIZE] = + {'0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0'}; + +inline void pc (_CONST char c) { +#ifdef OR1K + putc (c); +#else + printf ("%c", c); +#endif +} + /* + * BEWARE, these `goto error' on error, and PAD uses `n'. + */ +inline void PRINT(_CONST char *ptr, int len) { + int i; + for (i = 0; i < len; i++) + pc(*(ptr++)); +} + +inline void PAD(int howmany, _CONST char *with) { + int n; + if ((n = howmany) > 0) { + while (n > PADSIZE) { + PRINT(with, PADSIZE); + n -= PADSIZE; + } + PRINT(with, n); + } +} + +int printf(const char *fmt0, ...) +{ + register char *fmt; /* format string */ + register int ch; /* character from fmt */ + int n; /* handy integers (short term usage) */ + register char *cp; /* handy char pointer (short term usage) */ + register int flags; /* flags as above */ + int ret; /* return value accumulator */ + int width; /* width from format (%8d), or 0 */ + int prec; /* precision from format (%.3d), or -1 */ + char sign; /* sign prefix (' ', '+', '-', or \0) */ + va_list ap; + +#ifdef FLOATING_POINT + char *decimal_point = localeconv()->decimal_point; + char softsign; /* temporary negative sign for floats */ + /* + * Although it is natural to declare this double here, the + * declaration causes gcc to save FP registers even when not + * printing an FP number. This results in surprising use + * of FP registers to print integers or strings on at least the + * PowerPC. A more proper solution would be to move FP printing + * to another file, but this does seem to work. + */ +#if 0 + double _double; /* double precision arguments %[eEfgG] */ +#else + /* double precision arguments %[eEfgG] */ + union { int i; double d; } _double_ = {0}; +#define _double (_double_.d) +#endif + int expt; /* integer value of exponent */ + int expsize; /* character count for expstr */ + int ndig; /* actual number of digits returned by cvt */ + char expstr[7]; /* buffer for exponent string */ +#endif + +#ifndef _NO_LONGLONG +#define quad_t long long +#define u_quad_t unsigned long long +#endif + +#ifndef _NO_LONGLONG + u_quad_t _uquad; /* integer arguments %[diouxX] */ +#else + u_long _uquad; +#endif + enum { OCT, DEC, HEX } base;/* base for [diouxX] conversion */ + int dprec; /* a copy of prec if [diouxX], 0 otherwise */ + int realsz; /* field size expanded by dprec */ + int size; /* size of converted field or string */ + char *xdigs = (char *)0; /* digits for [xX] conversion */ +#define NIOV 8 + +char buf[BUF]; /* space for %c, %[diouxX], %[eEfgG] */ +char ox[2]; /* space for 0x hex-prefix */ + +#define FLUSH() + + /* + * To extend shorts properly, we need both signed and unsigned + * argument extraction methods. + */ +#ifndef _NO_LONGLONG +#define SARG() \ + (flags&QUADINT ? va_arg(ap, quad_t) : \ + flags&LONGINT ? va_arg(ap, long) : \ + flags&SHORTINT ? (long)(short)va_arg(ap, int) : \ + (long)va_arg(ap, int)) +#define UARG() \ + (flags&QUADINT ? va_arg(ap, u_quad_t) : \ + flags&LONGINT ? va_arg(ap, u_long) : \ + flags&SHORTINT ? (u_long)(u_short)va_arg(ap, int) : \ + (u_long)va_arg(ap, u_int)) +#else +#define SARG() \ + (flags&LONGINT ? va_arg(ap, long) : \ + flags&SHORTINT ? (long)(short)va_arg(ap, int) : \ + (long)va_arg(ap, int)) +#define UARG() \ + (flags&LONGINT ? va_arg(ap, u_long) : \ + flags&SHORTINT ? (u_long)(u_short)va_arg(ap, int) : \ + (u_long)va_arg(ap, u_int)) +#endif + + va_start (ap, fmt0); + fmt = (char *)fmt0; + ret = 0; + + /* + * Scan the format for conversions (`%' character). + */ + for (;;) { + + while (*fmt != 0 && *fmt != '%') { + pc (*fmt); + fmt++; + ret++; + } + if (!*fmt) + goto done; + + fmt++; /* Skip % */ + flags = 0; + dprec = 0; + width = 0; + prec = -1; + sign = '\0'; + +rflag: ch = *fmt++; +reswitch: switch (ch) { + case ' ': + /* + * ``If the space and + flags both appear, the space + * flag will be ignored.'' + * -- ANSI X3J11 + */ + if (!sign) + sign = ' '; + goto rflag; + case '#': + flags |= ALT; + goto rflag; + case '*': + /* + * ``A negative field width argument is taken as a + * - flag followed by a positive field width.'' + * -- ANSI X3J11 + * They don't exclude field widths read from args. + */ + if ((width = va_arg(ap, int)) >= 0) + goto rflag; + width = -width; + /* FALLTHROUGH */ + case '-': + flags |= LADJUST; + goto rflag; + case '+': + sign = '+'; + goto rflag; + case '.': + if ((ch = *fmt++) == '*') { + n = va_arg(ap, int); + prec = n < 0 ? -1 : n; + goto rflag; + } + n = 0; + while (is_digit(ch)) { + n = 10 * n + to_digit(ch); + ch = *fmt++; + } + prec = n < 0 ? -1 : n; + goto reswitch; + case '0': + /* + * ``Note that 0 is taken as a flag, not as the + * beginning of a field width.'' + * -- ANSI X3J11 + */ + flags |= ZEROPAD; + goto rflag; + case '1': case '2': case '3': case '4': + case '5': case '6': case '7': case '8': case '9': + n = 0; + do { + n = 10 * n + to_digit(ch); + ch = *fmt++; + } while (is_digit(ch)); + width = n; + goto reswitch; +#ifdef FLOATING_POINT + case 'L': + flags |= LONGDBL; + goto rflag; +#endif + case 'h': + flags |= SHORTINT; + goto rflag; + case 'l': + if (*fmt == 'l') { + fmt++; + flags |= QUADINT; + } else { + flags |= LONGINT; + } + goto rflag; + case 'q': + flags |= QUADINT; + goto rflag; + case 'c': + *(cp = buf) = va_arg(ap, int); + size = 1; + sign = '\0'; + break; + case 'D': + flags |= LONGINT; + /*FALLTHROUGH*/ + case 'd': + case 'i': + _uquad = SARG(); +#ifndef _NO_LONGLONG + if ((quad_t)_uquad < 0) +#else + if ((long) _uquad < 0) +#endif + { + + _uquad = -_uquad; + sign = '-'; + } + base = DEC; + goto number; +#ifdef FLOATING_POINT + case 'e': + case 'E': + case 'f': + case 'g': + case 'G': + if (prec == -1) { + prec = DEFPREC; + } else if ((ch == 'g' || ch == 'G') && prec == 0) { + prec = 1; + } + + if (flags & LONGDBL) { + _double = (double) va_arg(ap, long double); + } else { + _double = va_arg(ap, double); + } + + /* do this before tricky precision changes */ + if (isinf(_double)) { + if (_double < 0) + sign = '-'; + cp = "Inf"; + size = 3; + break; + } + if (isnan(_double)) { + cp = "NaN"; + size = 3; + break; + } + + flags |= FPT; + cp = cvt(data, _double, prec, flags, &softsign, + &expt, ch, &ndig); + if (ch == 'g' || ch == 'G') { + if (expt <= -4 || expt > prec) + ch = (ch == 'g') ? 'e' : 'E'; + else + ch = 'g'; + } + if (ch <= 'e') { /* 'e' or 'E' fmt */ + --expt; + expsize = exponent(expstr, expt, ch); + size = expsize + ndig; + if (ndig > 1 || flags & ALT) + ++size; + } else if (ch == 'f') { /* f fmt */ + if (expt > 0) { + size = expt; + if (prec || flags & ALT) + size += prec + 1; + } else /* "0.X" */ + size = prec + 2; + } else if (expt >= ndig) { /* fixed g fmt */ + size = expt; + if (flags & ALT) + ++size; + } else + size = ndig + (expt > 0 ? + 1 : 2 - expt); + + if (softsign) + sign = '-'; + break; +#endif /* FLOATING_POINT */ + case 'n': +#ifndef _NO_LONGLONG + if (flags & QUADINT) + *va_arg(ap, quad_t *) = ret; + else +#endif + if (flags & LONGINT) + *va_arg(ap, long *) = ret; + else if (flags & SHORTINT) + *va_arg(ap, short *) = ret; + else + *va_arg(ap, int *) = ret; + continue; /* no output */ + case 'O': + flags |= LONGINT; + /*FALLTHROUGH*/ + case 'o': + _uquad = UARG(); + base = OCT; + goto nosign; + case 'p': + /* + * ``The argument shall be a pointer to void. The + * value of the pointer is converted to a sequence + * of printable characters, in an implementation- + * defined manner.'' + * -- ANSI X3J11 + */ + /* NOSTRICT */ + _uquad = (u_long)(unsigned _POINTER_INT)va_arg(ap, void *); + base = HEX; + xdigs = "0123456789abcdef"; + flags |= HEXPREFIX; + ch = 'x'; + goto nosign; + case 's': + if ((cp = va_arg(ap, char *)) == NULL) + cp = "(null)"; + if (prec >= 0) { + /* + * can't use strlen; can only look for the + * NUL in the first `prec' characters, and + * strlen() will go further. + */ + char *p = (char *)memchr(cp, 0, prec); + + if (p != NULL) { + size = p - cp; + if (size > prec) + size = prec; + } else + size = prec; + } else + size = strlen(cp); + sign = '\0'; + break; + case 'U': + flags |= LONGINT; + /*FALLTHROUGH*/ + case 'u': + _uquad = UARG(); + base = DEC; + goto nosign; + case 'X': + xdigs = "0123456789ABCDEF"; + goto hex; + case 'x': + xdigs = "0123456789abcdef"; +hex: _uquad = UARG(); + base = HEX; + /* leading 0x/X only if non-zero */ + if (flags & ALT && _uquad != 0) + flags |= HEXPREFIX; + + /* unsigned conversions */ +nosign: sign = '\0'; + /* + * ``... diouXx conversions ... if a precision is + * specified, the 0 flag will be ignored.'' + * -- ANSI X3J11 + */ +number: if ((dprec = prec) >= 0) + flags &= ~ZEROPAD; + + /* + * ``The result of converting a zero value with an + * explicit precision of zero is no characters.'' + * -- ANSI X3J11 + */ + cp = buf + BUF; + if (_uquad != 0 || prec != 0) { + /* + * Unsigned mod is hard, and unsigned mod + * by a constant is easier than that by + * a variable; hence this switch. + */ + switch (base) { + case OCT: + do { + *--cp = to_char(_uquad & 7); + _uquad >>= 3; + } while (_uquad); + /* handle octal leading 0 */ + if (flags & ALT && *cp != '0') + *--cp = '0'; + break; + + case DEC: + /* many numbers are 1 digit */ + while (_uquad >= 10) { + *--cp = to_char(_uquad % 10); + _uquad /= 10; + } + *--cp = to_char(_uquad); + break; + + case HEX: + do { + *--cp = xdigs[_uquad & 15]; + _uquad >>= 4; + } while (_uquad); + break; + + default: + cp = "bug in vfprintf: bad base"; + size = strlen(cp); + goto skipsize; + } + } + size = buf + BUF - cp; + skipsize: + break; + default: /* "%?" prints ?, unless ? is NUL */ + if (ch == '\0') + goto done; + /* pretend it was %c with argument ch */ + cp = buf; + *cp = ch; + size = 1; + sign = '\0'; + break; + } + + /* + * All reasonable formats wind up here. At this point, `cp' + * points to a string which (if not flags&LADJUST) should be + * padded out to `width' places. If flags&ZEROPAD, it should + * first be prefixed by any sign or other prefix; otherwise, + * it should be blank padded before the prefix is emitted. + * After any left-hand padding and prefixing, emit zeroes + * required by a decimal [diouxX] precision, then print the + * string proper, then emit zeroes required by any leftover + * floating precision; finally, if LADJUST, pad with blanks. + * + * Compute actual size, so we know how much to pad. + * size excludes decimal prec; realsz includes it. + */ + realsz = dprec > size ? dprec : size; + if (sign) + realsz++; + else if (flags & HEXPREFIX) + realsz+= 2; + + /* right-adjusting blank padding */ + if ((flags & (LADJUST|ZEROPAD)) == 0) + PAD(width - realsz, blanks); + + /* prefix */ + if (sign) { + PRINT(&sign, 1); + } else if (flags & HEXPREFIX) { + ox[0] = '0'; + ox[1] = ch; + PRINT(ox, 2); + } + + /* right-adjusting zero padding */ + if ((flags & (LADJUST|ZEROPAD)) == ZEROPAD) + PAD(width - realsz, zeroes); + + /* leading zeroes from decimal precision */ + PAD(dprec - size, zeroes); + + /* the string or number proper */ +#ifdef FLOATING_POINT + if ((flags & FPT) == 0) { + PRINT(cp, size); + } else { /* glue together f_p fragments */ + if (ch >= 'f') { /* 'f' or 'g' */ + if (_double == 0) { + /* kludge for __dtoa irregularity */ + PRINT("0", 1); + if (expt < ndig || (flags & ALT) != 0) { + PRINT(decimal_point, 1); + PAD(ndig - 1, zeroes); + } + } else if (expt <= 0) { + PRINT("0", 1); + PRINT(decimal_point, 1); + PAD(-expt, zeroes); + PRINT(cp, ndig); + } else if (expt >= ndig) { + PRINT(cp, ndig); + PAD(expt - ndig, zeroes); + if (flags & ALT) + PRINT(".", 1); + } else { + PRINT(cp, expt); + cp += expt; + PRINT(".", 1); + PRINT(cp, ndig-expt); + } + } else { /* 'e' or 'E' */ + if (ndig > 1 || flags & ALT) { + ox[0] = *cp++; + ox[1] = '.'; + PRINT(ox, 2); + if (_double || flags & ALT == 0) { + PRINT(cp, ndig-1); + } else /* 0.[0..] */ + /* __dtoa irregularity */ + PAD(ndig - 1, zeroes); + } else /* XeYYY */ + PRINT(cp, 1); + PRINT(expstr, expsize); + } + } +#else + PRINT(cp, size); +#endif + /* left-adjusting padding (always blank) */ + if (flags & LADJUST) + PAD(width - realsz, blanks); + + /* finally, adjust ret */ + ret += width > realsz ? width : realsz; + + FLUSH(); /* copy out the I/O vectors */ + } +done: + va_end (ap); + FLUSH(); + return (ret); + /* NOTREACHED */ +} + +#ifdef FLOATING_POINT + +extern char *_dtoa_r _PARAMS((struct _reent *, double, int, + int, int *, int *, char **)); + +static char * +cvt(data, value, ndigits, flags, sign, decpt, ch, length) + struct _reent *data; + double value; + int ndigits, flags, *decpt, ch, *length; + char *sign; +{ + int mode, dsgn; + char *digits, *bp, *rve; + union double_union tmp; + + if (ch == 'f') { + mode = 3; /* ndigits after the decimal point */ + } else { + /* To obtain ndigits after the decimal point for the 'e' + * and 'E' formats, round to ndigits + 1 significant + * figures. + */ + if (ch == 'e' || ch == 'E') { + ndigits++; + } + mode = 2; /* ndigits significant digits */ + } + + tmp.d = value; + if (word0(tmp) & Sign_bit) { /* this will check for < 0 and -0.0 */ + value = -value; + *sign = '-'; + } else + *sign = '\000'; + digits = _dtoa_r(data, value, mode, ndigits, decpt, &dsgn, &rve); + if ((ch != 'g' && ch != 'G') || flags & ALT) { /* Print trailing zeros */ + bp = digits + ndigits; + if (ch == 'f') { + if (*digits == '0' && value) + *decpt = -ndigits + 1; + bp += *decpt; + } + if (value == 0) /* kludge for __dtoa irregularity */ + rve = bp; + while (rve < bp) + *rve++ = '0'; + } + *length = rve - digits; + return (digits); +} + +static int +exponent(p0, exp, fmtch) + char *p0; + int exp, fmtch; +{ + register char *p, *t; + char expbuf[MAXEXP]; + + p = p0; + *p++ = fmtch; + if (exp < 0) { + exp = -exp; + *p++ = '-'; + } + else + *p++ = '+'; + t = expbuf + MAXEXP; + if (exp > 9) { + do { + *--t = to_char(exp % 10); + } while ((exp /= 10) > 9); + *--t = to_char(exp); + for (; t < expbuf + MAXEXP; *p++ = *t++); + } + else { + *p++ = '0'; + *p++ = to_char(exp); + } + return (p - p0); +} +#endif /* FLOATING_POINT */
trunk/soc/sw/orpmon/common/cprintf.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/font.c =================================================================== --- trunk/soc/sw/orpmon/common/font.c (nonexistent) +++ trunk/soc/sw/orpmon/common/font.c (revision 20) @@ -0,0 +1,309 @@ +#include "common.h" +#if CRT_ENABLED + +unsigned char font[256][12] = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0, 00h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 1, 01h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 2, 02h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 3, 03h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 4, 04h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 5, 05h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 6, 06h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 7, 07h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 8, 08h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 9, 09h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 10, 0ah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 11, 0bh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 12, 0ch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 13, 0dh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 14, 0eh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 15, 0fh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 16, 10h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 17, 11h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 18, 12h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 19, 13h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 20, 14h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 21, 15h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 22, 16h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 23, 17h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 24, 18h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 25, 19h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 26, 1ah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 27, 1bh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 28, 1ch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 29, 1dh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 30, 1eh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 31, 1fh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 32, 20h, ' ' */ + {0x00, 0x0c, 0x1e, 0x1e, 0x1e, 0x0c, 0x0c, 0x00, 0x0c, 0x0c, 0x00, 0x00}, /* 33, 21h, '!' */ + {0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 34, 22h, '"' */ + {0x00, 0x36, 0x36, 0x7f, 0x36, 0x36, 0x36, 0x7f, 0x36, 0x36, 0x00, 0x00}, /* 35, 23h, '#' */ + {0x0c, 0x0c, 0x3e, 0x03, 0x03, 0x1e, 0x30, 0x30, 0x1f, 0x0c, 0x0c, 0x00}, /* 36, 24h, '$' */ + {0x00, 0x00, 0x00, 0x23, 0x33, 0x18, 0x0c, 0x06, 0x33, 0x31, 0x00, 0x00}, /* 37, 25h, '%' */ + {0x00, 0x0e, 0x1b, 0x1b, 0x0e, 0x5f, 0x7b, 0x33, 0x3b, 0x6e, 0x00, 0x00}, /* 38, 26h, '&' */ + {0x00, 0x0c, 0x0c, 0x0c, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 39, 27h, ''' */ + {0x00, 0x30, 0x18, 0x0c, 0x06, 0x06, 0x06, 0x0c, 0x18, 0x30, 0x00, 0x00}, /* 40, 28h, '(' */ + {0x00, 0x06, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x18, 0x0c, 0x06, 0x00, 0x00}, /* 41, 29h, ')' */ + {0x00, 0x00, 0x00, 0x66, 0x3c, 0xff, 0x3c, 0x66, 0x00, 0x00, 0x00, 0x00}, /* 42, 2ah, '*' */ + {0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 43, 2bh, '+' */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x1c, 0x06, 0x00}, /* 44, 2ch, ',' */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 45, 2dh, '-' */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x1c, 0x00, 0x00}, /* 46, 2eh, '.' */ + {0x00, 0x00, 0x40, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x03, 0x01, 0x00, 0x00}, /* 47, 2fh, '/' */ + {0x00, 0x3e, 0x63, 0x73, 0x7b, 0x6b, 0x6f, 0x67, 0x63, 0x3e, 0x00, 0x00}, /* 48, 30h, '0' */ + {0x00, 0x08, 0x0c, 0x0f, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x3f, 0x00, 0x00}, /* 49, 31h, '1' */ + {0x00, 0x1e, 0x33, 0x33, 0x30, 0x18, 0x0c, 0x06, 0x33, 0x3f, 0x00, 0x00}, /* 50, 32h, '2' */ + {0x00, 0x1e, 0x33, 0x30, 0x30, 0x1c, 0x30, 0x30, 0x33, 0x1e, 0x00, 0x00}, /* 51, 33h, '3' */ + {0x00, 0x30, 0x38, 0x3c, 0x36, 0x33, 0x7f, 0x30, 0x30, 0x78, 0x00, 0x00}, /* 52, 34h, '4' */ + {0x00, 0x3f, 0x03, 0x03, 0x03, 0x1f, 0x30, 0x30, 0x33, 0x1e, 0x00, 0x00}, /* 53, 35h, '5' */ + {0x00, 0x1c, 0x06, 0x03, 0x03, 0x1f, 0x33, 0x33, 0x33, 0x1e, 0x00, 0x00}, /* 54, 36h, '6' */ + {0x00, 0x7f, 0x63, 0x63, 0x60, 0x30, 0x18, 0x0c, 0x0c, 0x0c, 0x00, 0x00}, /* 55, 37h, '7' */ + {0x00, 0x1e, 0x33, 0x33, 0x37, 0x1e, 0x3b, 0x33, 0x33, 0x1e, 0x00, 0x00}, /* 56, 38h, '8' */ + {0x00, 0x1e, 0x33, 0x33, 0x33, 0x3e, 0x18, 0x18, 0x0c, 0x0e, 0x00, 0x00}, /* 57, 39h, '9' */ + {0x00, 0x00, 0x00, 0x1c, 0x1c, 0x00, 0x00, 0x1c, 0x1c, 0x00, 0x00, 0x00}, /* 58, 3ah, ':' */ + {0x00, 0x00, 0x00, 0x1c, 0x1c, 0x00, 0x00, 0x1c, 0x1c, 0x18, 0x0c, 0x00}, /* 59, 3bh, ';' */ + {0x00, 0x30, 0x18, 0x0c, 0x06, 0x03, 0x06, 0x0c, 0x18, 0x30, 0x00, 0x00}, /* 60, 3ch, '<' */ + {0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 61, 3dh, '=' */ + {0x00, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x00, 0x00}, /* 62, 3eh, '>' */ + {0x00, 0x1e, 0x33, 0x30, 0x18, 0x0c, 0x0c, 0x00, 0x0c, 0x0c, 0x00, 0x00}, /* 63, 3fh, '?' */ + {0x00, 0x3e, 0x63, 0x63, 0x7b, 0x7b, 0x7b, 0x03, 0x03, 0x3e, 0x00, 0x00}, /* 64, 40h, '@' */ + {0x00, 0x0c, 0x1e, 0x33, 0x33, 0x33, 0x3f, 0x33, 0x33, 0x33, 0x00, 0x00}, /* 65, 41h, 'A' */ + {0x00, 0x3f, 0x66, 0x66, 0x66, 0x3e, 0x66, 0x66, 0x66, 0x3f, 0x00, 0x00}, /* 66, 42h, 'B' */ + {0x00, 0x3c, 0x66, 0x63, 0x03, 0x03, 0x03, 0x63, 0x66, 0x3c, 0x00, 0x00}, /* 67, 43h, 'C' */ + {0x00, 0x1f, 0x36, 0x66, 0x66, 0x66, 0x66, 0x66, 0x36, 0x1f, 0x00, 0x00}, /* 68, 44h, 'D' */ + {0x00, 0x7f, 0x46, 0x06, 0x26, 0x3e, 0x26, 0x06, 0x46, 0x7f, 0x00, 0x00}, /* 69, 45h, 'E' */ + {0x00, 0x7f, 0x66, 0x46, 0x26, 0x3e, 0x26, 0x06, 0x06, 0x0f, 0x00, 0x00}, /* 70, 46h, 'F' */ + {0x00, 0x3c, 0x66, 0x63, 0x03, 0x03, 0x73, 0x63, 0x66, 0x7c, 0x00, 0x00}, /* 71, 47h, 'G' */ + {0x00, 0x33, 0x33, 0x33, 0x33, 0x3f, 0x33, 0x33, 0x33, 0x33, 0x00, 0x00}, /* 72, 48h, 'H' */ + {0x00, 0x1e, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x00, 0x00}, /* 73, 49h, 'I' */ + {0x00, 0x78, 0x30, 0x30, 0x30, 0x30, 0x33, 0x33, 0x33, 0x1e, 0x00, 0x00}, /* 74, 4ah, 'J' */ + {0x00, 0x67, 0x66, 0x36, 0x36, 0x1e, 0x36, 0x36, 0x66, 0x67, 0x00, 0x00}, /* 75, 4bh, 'K' */ + {0x00, 0x0f, 0x06, 0x06, 0x06, 0x06, 0x46, 0x66, 0x66, 0x7f, 0x00, 0x00}, /* 76, 4ch, 'L' */ + {0x00, 0x63, 0x77, 0x7f, 0x7f, 0x6b, 0x63, 0x63, 0x63, 0x63, 0x00, 0x00}, /* 77, 4dh, 'M' */ + {0x00, 0x63, 0x63, 0x67, 0x6f, 0x7f, 0x7b, 0x73, 0x63, 0x63, 0x00, 0x00}, /* 78, 4eh, 'N' */ + {0x00, 0x1c, 0x36, 0x63, 0x63, 0x63, 0x63, 0x63, 0x36, 0x1c, 0x00, 0x00}, /* 79, 4fh, 'O' */ + {0x00, 0x3f, 0x66, 0x66, 0x66, 0x3e, 0x06, 0x06, 0x06, 0x0f, 0x00, 0x00}, /* 80, 50h, 'P' */ + {0x00, 0x1c, 0x36, 0x63, 0x63, 0x63, 0x73, 0x7b, 0x3e, 0x30, 0x78, 0x00}, /* 81, 51h, 'Q' */ + {0x00, 0x3f, 0x66, 0x66, 0x66, 0x3e, 0x36, 0x66, 0x66, 0x67, 0x00, 0x00}, /* 82, 52h, 'R' */ + {0x00, 0x1e, 0x33, 0x33, 0x03, 0x0e, 0x18, 0x33, 0x33, 0x1e, 0x00, 0x00}, /* 83, 53h, 'S' */ + {0x00, 0x3f, 0x2d, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x00, 0x00}, /* 84, 54h, 'T' */ + {0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x1e, 0x00, 0x00}, /* 85, 55h, 'U' */ + {0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x1e, 0x0c, 0x00, 0x00}, /* 86, 56h, 'V' */ + {0x00, 0x63, 0x63, 0x63, 0x63, 0x6b, 0x6b, 0x36, 0x36, 0x36, 0x00, 0x00}, /* 87, 57h, 'W' */ + {0x00, 0x33, 0x33, 0x33, 0x1e, 0x0c, 0x1e, 0x33, 0x33, 0x33, 0x00, 0x00}, /* 88, 58h, 'X' */ + {0x00, 0x33, 0x33, 0x33, 0x33, 0x1e, 0x0c, 0x0c, 0x0c, 0x1e, 0x00, 0x00}, /* 89, 59h, 'Y' */ + {0x00, 0x7f, 0x73, 0x19, 0x18, 0x0c, 0x06, 0x46, 0x63, 0x7f, 0x00, 0x00}, /* 90, 5ah, 'Z' */ + {0x00, 0x3c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x3c, 0x00, 0x00}, /* 91, 5bh, '[' */ + {0x00, 0x00, 0x01, 0x03, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x40, 0x00, 0x00}, /* 92, 5ch, '\' */ + {0x00, 0x3c, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x3c, 0x00, 0x00}, /* 93, 5dh, ']' */ + {0x08, 0x1c, 0x36, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 94, 5eh, '^' */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00}, /* 95, 5fh, '_' */ + {0x0c, 0x0c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 96, 60h, '`' */ + {0x00, 0x00, 0x00, 0x00, 0x1e, 0x30, 0x3e, 0x33, 0x33, 0x6e, 0x00, 0x00}, /* 97, 61h, 'a' */ + {0x00, 0x07, 0x06, 0x06, 0x3e, 0x66, 0x66, 0x66, 0x66, 0x3b, 0x00, 0x00}, /* 98, 62h, 'b' */ + {0x00, 0x00, 0x00, 0x00, 0x1e, 0x33, 0x03, 0x03, 0x33, 0x1e, 0x00, 0x00}, /* 99, 63h, 'c' */ + {0x00, 0x38, 0x30, 0x30, 0x3e, 0x33, 0x33, 0x33, 0x33, 0x6e, 0x00, 0x00}, /* 100, 64h, 'd' */ + {0x00, 0x00, 0x00, 0x00, 0x1e, 0x33, 0x3f, 0x03, 0x33, 0x1e, 0x00, 0x00}, /* 101, 65h, 'e' */ + {0x00, 0x1c, 0x36, 0x06, 0x06, 0x1f, 0x06, 0x06, 0x06, 0x0f, 0x00, 0x00}, /* 102, 66h, 'f' */ + {0x00, 0x00, 0x00, 0x00, 0x6e, 0x33, 0x33, 0x33, 0x3e, 0x30, 0x33, 0x1e}, /* 103, 67h, 'g' */ + {0x00, 0x07, 0x06, 0x06, 0x36, 0x6e, 0x66, 0x66, 0x66, 0x67, 0x00, 0x00}, /* 104, 68h, 'h' */ + {0x00, 0x18, 0x18, 0x00, 0x1e, 0x18, 0x18, 0x18, 0x18, 0x7e, 0x00, 0x00}, /* 105, 69h, 'i' */ + {0x00, 0x30, 0x30, 0x00, 0x3c, 0x30, 0x30, 0x30, 0x30, 0x33, 0x33, 0x1e}, /* 106, 6ah, 'j' */ + {0x00, 0x07, 0x06, 0x06, 0x66, 0x36, 0x1e, 0x36, 0x66, 0x67, 0x00, 0x00}, /* 107, 6bh, 'k' */ + {0x00, 0x1e, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7e, 0x00, 0x00}, /* 108, 6ch, 'l' */ + {0x00, 0x00, 0x00, 0x00, 0x3f, 0x6b, 0x6b, 0x6b, 0x6b, 0x63, 0x00, 0x00}, /* 109, 6dh, 'm' */ + {0x00, 0x00, 0x00, 0x00, 0x1f, 0x33, 0x33, 0x33, 0x33, 0x33, 0x00, 0x00}, /* 110, 6eh, 'n' */ + {0x00, 0x00, 0x00, 0x00, 0x1e, 0x33, 0x33, 0x33, 0x33, 0x1e, 0x00, 0x00}, /* 111, 6fh, 'o' */ + {0x00, 0x00, 0x00, 0x00, 0x3b, 0x66, 0x66, 0x66, 0x66, 0x3e, 0x06, 0x0f}, /* 112, 70h, 'p' */ + {0x00, 0x00, 0x00, 0x00, 0x6e, 0x33, 0x33, 0x33, 0x33, 0x3e, 0x30, 0x78}, /* 113, 71h, 'q' */ + {0x00, 0x00, 0x00, 0x00, 0x37, 0x76, 0x6e, 0x06, 0x06, 0x0f, 0x00, 0x00}, /* 114, 72h, 'r' */ + {0x00, 0x00, 0x00, 0x00, 0x1e, 0x33, 0x06, 0x18, 0x33, 0x1e, 0x00, 0x00}, /* 115, 73h, 's' */ + {0x00, 0x00, 0x04, 0x06, 0x3f, 0x06, 0x06, 0x06, 0x36, 0x1c, 0x00, 0x00}, /* 116, 74h, 't' */ + {0x00, 0x00, 0x00, 0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x6e, 0x00, 0x00}, /* 117, 75h, 'u' */ + {0x00, 0x00, 0x00, 0x00, 0x33, 0x33, 0x33, 0x33, 0x1e, 0x0c, 0x00, 0x00}, /* 118, 76h, 'v' */ + {0x00, 0x00, 0x00, 0x00, 0x63, 0x63, 0x6b, 0x6b, 0x36, 0x36, 0x00, 0x00}, /* 119, 77h, 'w' */ + {0x00, 0x00, 0x00, 0x00, 0x63, 0x36, 0x1c, 0x1c, 0x36, 0x63, 0x00, 0x00}, /* 120, 78h, 'x' */ + {0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x30, 0x18, 0x0f}, /* 121, 79h, 'y' */ + {0x00, 0x00, 0x00, 0x00, 0x3f, 0x31, 0x18, 0x06, 0x23, 0x3f, 0x00, 0x00}, /* 122, 7ah, 'z' */ + {0x00, 0x38, 0x0c, 0x0c, 0x06, 0x03, 0x06, 0x0c, 0x0c, 0x38, 0x00, 0x00}, /* 123, 7bh, '{' */ + {0x00, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00}, /* 124, 7ch, '|' */ + {0x00, 0x07, 0x0c, 0x0c, 0x18, 0x30, 0x18, 0x0c, 0x0c, 0x07, 0x00, 0x00}, /* 125, 7dh, '}' */ + {0x00, 0xce, 0x5b, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 126, 7eh, '~' */ + {0x00, 0x00, 0x00, 0x08, 0x1c, 0x36, 0x63, 0x63, 0x7f, 0x00, 0x00, 0x00}, /* 127, 7fh, '' */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 128, 80h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 129, 81h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 130, 82h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 131, 83h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 132, 84h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 133, 85h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 134, 86h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 135, 87h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 136, 88h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 137, 89h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 138, 8ah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 139, 8bh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 140, 8ch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 141, 8dh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 142, 8eh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 143, 8fh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 144, 90h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 145, 91h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 146, 92h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 147, 93h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 148, 94h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 149, 95h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 150, 96h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 151, 97h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 152, 98h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 153, 99h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 154, 9ah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 155, 9bh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 156, 9ch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 157, 9dh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 158, 9eh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 159, 9fh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 160, a0h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 161, a1h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 162, a2h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 163, a3h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 164, a4h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 165, a5h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 166, a6h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 167, a7h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 168, a8h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 169, a9h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 170, aah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 171, abh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 172, ach */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 173, adh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 174, aeh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 175, afh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 176, b0h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 177, b1h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 178, b2h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 179, b3h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 180, b4h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 181, b5h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 182, b6h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 183, b7h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 184, b8h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 185, b9h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 186, bah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 187, bbh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 188, bch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 189, bdh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 190, beh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 191, bfh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 192, c0h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 193, c1h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 194, c2h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 195, c3h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 196, c4h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 197, c5h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 198, c6h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 199, c7h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 200, c8h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 201, c9h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 202, cah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 203, cbh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 204, cch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 205, cdh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 206, ceh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 207, cfh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 208, d0h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 209, d1h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 210, d2h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 211, d3h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 212, d4h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 213, d5h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 214, d6h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 215, d7h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 216, d8h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 217, d9h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 218, dah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 219, dbh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 220, dch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 221, ddh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 222, deh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 223, dfh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 224, e0h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 225, e1h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 226, e2h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 227, e3h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 228, e4h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 229, e5h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 230, e6h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 231, e7h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 232, e8h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 233, e9h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 234, eah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 235, ebh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 236, ech */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 237, edh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 238, eeh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 239, efh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 240, f0h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 241, f1h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 242, f2h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 243, f3h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 244, f4h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 245, f5h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 246, f6h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 247, f7h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 248, f8h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 249, f9h */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 250, fah */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 251, fbh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 252, fch */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 253, fdh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 254, feh */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}};/* 255, ffh */ + +#endif /* CRT_ENABLED */ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
trunk/soc/sw/orpmon/common/font.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/string.c =================================================================== --- trunk/soc/sw/orpmon/common/string.c (nonexistent) +++ trunk/soc/sw/orpmon/common/string.c (revision 20) @@ -0,0 +1,247 @@ +/* + string.h -- String manipulation + Implements (some) of the standard string routines + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include +#include "string.h" + +/* Basic string functions */ + +/* + s t r l e n + + returns number of characters in s (not including terminating null character) +*/ +size_t strlen(const char *s) +{ + size_t cnt = 0; + + /* count the length of string s, not including the \0 character */ + while (*s++) + cnt++; + + return cnt; +} + +/* + s t r c p y + + Copy 'src' to 'dest'. Strings may not overlap. +*/ +char *strcpy(char *dest, const char *src) +{ + char *d = dest; + + /* copy src to dest */ + while ( (*dest++ = *src++) ) + ; + + return d; +} + + +char *strncpy(char *dest, const char *src, size_t n) +{ + char *d = dest; + + /* copy src to dest */ + while ( *src && n ) { + *dest++ = *src++; + n--; + } + + /* fill the remainder of d with nulls */ + while (n--) + *dest++ = '\0'; + + return d; +} + + +char *strcat(char *dest, const char *src) +{ + char *d = dest; + + /* find the end of the destination string */ + while (*dest++) + ; + + /* append the source string to the destination string */ + while ( (*dest++ = *src++) ) + ; + + return d; +} + + +char *strncat(char *dest, const char *src, size_t n) +{ + char *d = dest; + + /* find the end of the destination string */ + while (*dest++) + ; + + /* copy src to dest */ + while ( (*dest = *src) && n-- ) { + dest++; + src++; + } + + + /* add terminating '\0' character */ + *dest = '\0'; + + return d; +} + + +int strcmp(const char *s1, const char *s2) +{ + while ( *s1 && (*s1 == *s2) ) { + s1++; + s2++; + } + + return *s1 - *s2; +} + + +int strncmp(const char *s1, const char *s2, size_t n) +{ + while ( *s1 && (*s1 == *s2) && n-- ) { + s1++; + s2++; + } + + return *s1 - *s2; +} + + +char *strchr(const char *s, int c) +{ + /* search for the character c */ + while (*s && (*s != c) ) + s++; + + return (char *)s; +} + + +char *strrchr(const char *s, int c) +{ + char *fnd = NULL; + + /* search for the character c */ + while (*s) { + if (*s == c) + fnd = (char *)s; + s++; + } + + return fnd; +} + + +/* Basic mem functions */ +void *memcpy(void *dest, const void *src, size_t n) +{ + /* check if 'src' and 'dest' are on LONG boundaries */ + if ( (sizeof(unsigned long) -1) & ((unsigned long)dest | (unsigned long)src) ) + { + /* no, do a byte-wide copy */ + char *cs = (char *) src; + char *cd = (char *) dest; + + while (n--) + *cd++ = *cs++; + } + else + { + /* yes, speed up copy process */ + /* copy as many LONGs as possible */ + long *ls = (long *)src; + long *ld = (long *)dest; + + size_t cnt = n >> 2; + while (cnt--) + *ld++ = *ls++; + + /* finally copy the remaining bytes */ + char *cs = (char *) (src + (n & ~0x03)); + char *cd = (char *) (dest + (n & ~0x03)); + + cnt = n & 0x3; + while (cnt--) + *cd++ = *cs++; + } + + return dest; +} + + +void *memmove(void *dest, void *src, size_t n) +{ + char *d = dest; + char *s = src; + + while (n--) + *d++ = *s++; + + return dest; +} + + +int memcmp(const void *s1, const void *s2, size_t n) +{ + char *p1 = (void *)s1; + char *p2 = (void *)s2; + + while ( (*p1 == *p2) && n-- ) { + p1++; + p2++; + } + + return *p1 - *p2; +} + + +void *memchr(const void *s, int c, size_t n) +{ + char *p = (void *)s; + + /* search for the character c */ + while ( (*p != c) && n-- ) + p++; + + return (*p == c) ? p : NULL; +} + + +void *memset(void *s, int c, size_t n) +{ + char *p = s; + + while (n--) + *p++ = c; + + return s; +}
trunk/soc/sw/orpmon/common/string.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/common.c =================================================================== --- trunk/soc/sw/orpmon/common/common.c (nonexistent) +++ trunk/soc/sw/orpmon/common/common.c (revision 20) @@ -0,0 +1,315 @@ +#include "common.h" +#include "uart.h" +#include "screen.h" +#include "support.h" +#include "keyboard.h" +#include "spr_defs.h" +#include "int.h" + +#include "build.h" + +#define MAX_COMMANDS 100 + +extern unsigned long src_addr; + +bd_t bd; + +int num_commands = 0; + +command_struct command[MAX_COMMANDS]; + +void putc (const char c) +{ + debug ("putc %i, %i = %c\n", bd.bi_console_type, c, c); + switch (bd.bi_console_type) { + case CT_NONE: + break; + case CT_UART: + uart_putc (c); + break; +#ifdef CRT_ENABLED + case CT_CRT: +#endif + screen_putc (c); + break; + case CT_SIM: + __printf ("%c", c); + break; + } +} + +int getc () +{ + int ch = 0; + debug ("getc %i\n", bd.bi_console_type); + switch (bd.bi_console_type) { +#if KBD_ENABLED + case CT_CRT: + while ((volatile int)kbd_head == (volatile int)kbd_tail); + ch = kbd_buf[kbd_tail]; + kbd_tail = (kbd_tail + 1) % KBDBUF_SIZE; + return ch; +#endif + case CT_UART: + return uart_getc (); + break; + case CT_NONE: /* just to satisfy the compiler */ + case CT_SIM: + break; + } + return -1; +} + +int testc () +{ + debug ("testc %i\n", bd.bi_console_type); + switch (bd.bi_console_type) { +#if KBD_ENABLED + case CT_CRT: + if (kbd_head == kbd_tail) return 0; + else return getc (); +#endif + case CT_UART: + return uart_testc (); + break; + case CT_NONE: /* just to satisfy the compiler */ + case CT_SIM: + break; + } + return -1; +} + +int ctrlc () +{ + if (testc ()) { + switch (getc ()) { + case 0x03: /* ^C - Control C */ + return 1; + default: + break; + } + } + return 0; +} + +unsigned long parse_ip (char *ip) +{ + unsigned long num; + num = strtoul (ip, &ip, 10) & 0xff; + if (*ip++ != '.') return 0; + num = (num << 8) | (strtoul (ip, &ip, 10) & 0xff); + if (*ip++ != '.') return 0; + num = (num << 8) | (strtoul (ip, &ip, 10) & 0xff); + if (*ip++ != '.') return 0; + num = (num << 8) | (strtoul (ip, &ip, 10) & 0xff); + return num; +} + +void change_console_type (enum bi_console_type_t con_type) +{ + debug ("Console change %i -> %i\n", bd.bi_console_type, con_type); + /* Close previous */ + switch (bd.bi_console_type) { + case CT_NONE: + case CT_UART: + case CT_CRT: + case CT_SIM: + break; + } + bd.bi_console_type = con_type; + /* Initialize new */ + switch (bd.bi_console_type) { + case CT_NONE: + break; + case CT_UART: + uart_init (); + break; + case CT_CRT: +#if CRT_ENABLED + screen_init (); +#endif +#if KBD_ENABLED + kbd_init (); +#endif + break; + case CT_SIM: + break; + } +} + +void register_command_func (const char *name, const char *params, const char *help, int (*func)(int argc, char *argv[])) +{ + debug ("register_command '%s'\n", name); + if (num_commands < MAX_COMMANDS) { + command[num_commands].name = name; + command[num_commands].params = params; + command[num_commands].help = help; + command[num_commands].func = func; + num_commands++; + } else printf ("Command '%s' ignored; MAX_COMMANDS limit reached\n", name); +} + +/* Process command and arguments by executing + specific function. */ +void mon_command(void) +{ + char c = '\0'; + char str[1000]; + char *pstr = str; + char *command_str; + char *argv[20]; + int argc = 0; + + /* Show prompt */ +#ifdef XESS + printf ("\norp-xsv> "); +#else + printf ("\n" BOARD_DEF_NAME"> "); +#endif + + /* Get characters from UART */ + c = getc(); + while (c != '\r' && c != '\f' && c != '\n') + { + if (c == '\b') + pstr--; + else + *pstr++ = c; + putc(c); + c = getc(); + } + *pstr = '\0'; + printf ("\n"); + + /* Skip leading blanks */ + pstr = str; + while (*pstr == ' ' && *pstr != '\0') pstr++; + + /* Get command from the string */ + command_str = pstr; + + while (1) { + /* Go to next argument */ + while (*pstr != ' ' && *pstr != '\0') pstr++; + if (*pstr) { + *pstr++ = '\0'; + while (*pstr == ' ') pstr++; + argv[argc++] = pstr; + } + else + break; + } + + { + int i, found = 0; + + for (i = 0; i < num_commands; i++) + if (strcmp (command_str, command[i].name) == 0) + { + switch ( command[i].func(argc, &argv[0]) ) + { + case -1: + printf ("Missing/wrong parameters, usage: %s %s\n", command[i].name, command[i].params); + break; + } + + found++; + break; + } + /* 'built-in' build command */ + if(strcmp(command_str, "build") == 0) { + printf("Build tag: %s", BUILD_VERSION); + found++; + } + if (!found) + printf ("Unknown command. Type 'help' for help.\n"); + } + +} + +#if HELP_ENABLED +/* Displays help screen */ +int help_cmd (int argc, char *argv[]) +{ + int i; + for (i = 0; i < num_commands; i++) + printf ("%-10s %-20s - %s\n", command[i].name, command[i].params, command[i].help); + return 0; +} +#endif /* HELP_ENABLED */ + +void module_cpu_init (void); +void module_memory_init (void); +void module_eth_init (void); +void module_dhry_init (void); +void module_camera_init (void); +void module_load_init (void); +void tick_init(void); +void module_touch_init (void); +void module_ata_init (void); +void module_hdbug_init (void); + + +/* List of all initializations */ +void mon_init (void) +{ + /* Set defaults */ + global.erase_method = 2; /* as needed */ + global.src_addr = (unsigned long)&src_addr; + global.dst_addr = FLASH_BASE_ADDR; + global.eth_add[0] = ETH_MACADDR0; + global.eth_add[1] = ETH_MACADDR1; + global.eth_add[2] = ETH_MACADDR2; + global.eth_add[3] = ETH_MACADDR3; + global.eth_add[4] = ETH_MACADDR4; + global.eth_add[5] = ETH_MACADDR5; + global.ip = BOARD_DEF_IP; + global.gw_ip = BOARD_DEF_GW; + global.mask = BOARD_DEF_MASK; + + /* Init modules */ + module_cpu_init (); + module_memory_init (); + module_eth_init (); + module_dhry_init (); + module_camera_init (); + module_load_init (); + module_touch_init (); + module_ata_init (); + module_hdbug_init (); + + tick_init(); +} + +/* Main shell loop */ +int main(int argc, char **argv) +{ + extern unsigned long calc_mycrc32 (void); +#if 0 + extern unsigned long mycrc32, mysize; +#endif + + int_init (); + change_console_type (CONSOLE_TYPE); + mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE); + +#if SELF_CHECK + printf ("Self check... "); + if ((t = calc_mycrc32 ())) + printf ("FAILED!!!\n"); + else + printf ("OK\n"); +#endif /* SELF_CHECK */ + + mon_init (); + + if (HELP_ENABLED) register_command ("help", "", "shows this help", help_cmd); + +#ifdef XESS + printf ("\nORP-XSV Monitor (type 'help' for help)\n"); +#else + printf ("\n" BOARD_DEF_NAME " Monitor (type 'help' for help)\n"); +#endif + + while(1) mon_command(); +}
trunk/soc/sw/orpmon/common/common.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/Makefile =================================================================== --- trunk/soc/sw/orpmon/common/Makefile (nonexistent) +++ trunk/soc/sw/orpmon/common/Makefile (revision 20) @@ -0,0 +1,22 @@ + +# CFLAGS += -DET_DEBUG -DDEBUG + +LIB = common_o.o + +OBJS = common.o support.o cprintf.o screen.o font.o ctype.o string.o +SOBJS = or32.o + +all: $(LIB) + +$(LIB): $(OBJS) $(SOBJS) + $(LD) -r -o $@ $(OBJS) $(SOBJS) + +######################################################################### + +.depend: Makefile $(OBJS:.o=.c) $(SOBJS:.o=.S) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ + $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) > $@ + +sinclude .depend + +#########################################################################
trunk/soc/sw/orpmon/common/Makefile Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/common/support.c =================================================================== --- trunk/soc/sw/orpmon/common/support.c (nonexistent) +++ trunk/soc/sw/orpmon/common/support.c (revision 20) @@ -0,0 +1,128 @@ +/* Support */ + +#include "spr_defs.h" +#include "support.h" +#include "common.h" +#include "int.h" + +#include + +volatile unsigned long timestamp = 0; + +void int_main(void); + +/* return value by making a syscall */ +void exit (int i) +{ + asm("l.add r3,r0,%0": : "r" (i)); + asm("l.nop %0": :"K" (NOP_EXIT)); + while (1); +} + +/* activate printf support in simulator */ +void __printf(const char *fmt, ...) +{ + + va_list args; + va_start(args, fmt); + __asm__ __volatile__ (" l.addi\tr3,%1,0\n \ + l.addi\tr4,%2,0\n \ + l.nop %0": :"K" (NOP_PRINTF), "r" (fmt), "r" (args) : "r3", "r4"); +} + +/* print long */ +void report(unsigned long value) +{ + asm("l.addi\tr3,%0,0": :"r" (value)); + asm("l.nop %0": :"K" (NOP_REPORT)); +} + +/* just to satisfy linker */ +void __main(void) +{ +} + +/* For writing into SPR. */ +void mtspr(unsigned long spr, unsigned long value) +{ + asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value)); +} + +/* For reading SPR. */ +unsigned long mfspr(unsigned long spr) +{ + unsigned long value; + asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr)); + return value; +} + + + +/* Parses hex or decimal number */ +unsigned long strtoul (const char *str, char **endptr, int base) +{ + + { + + unsigned long number = 0; + char *pos = (char *) str; + char *fail_char = (char *) str; + + + while (isspace(*pos)) pos++; /* skip leading whitespace */ + + if ((base == 16) && (*pos == '0')) { /* handle option prefix */ + ++pos; + fail_char = pos; + if ((*pos == 'x') || (*pos == 'X')) ++pos; + } + + if (base == 0) { /* dynamic base */ + base = 10; /* default is 10 */ + if (*pos == '0') { + ++pos; + base -= 2; /* now base is 8 (or 16) */ + fail_char = pos; + if ((*pos == 'x') || (*pos == 'X')) { + base += 8; /* base is 16 */ + ++pos; + } + } + } + + /* check for illegal base */ + if ( !((base < 2) || (base > 36)) ) + while (1) { + int digit = 40; + if ((*pos >= '0') && (*pos <= '9')) { + digit = (*pos - '0'); + } else if (*pos >= 'a') { + digit = (*pos - 'a' + 10); + } else if (*pos >= 'A') { + digit = (*pos - 'A' + 10); + } else break; + + if (digit >= base) break; + + fail_char = ++pos; + number = number * base + digit; + } + + if (endptr) *endptr = fail_char; { + return number; + } + } +} + +unsigned long get_timer (unsigned long base) +{ +__printf("%s - %s: %d\n", __FILE__, __FUNCTION__, __LINE__); +__printf(" timestamp = %.8lx base = %.8lx\n", timestamp, base); + return (timestamp - base); +} + +void set_timer (unsigned long t) +{ + timestamp = t; +} +
trunk/soc/sw/orpmon/common/support.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/flash.ld =================================================================== --- trunk/soc/sw/orpmon/flash.ld (nonexistent) +++ trunk/soc/sw/orpmon/flash.ld (revision 20) @@ -0,0 +1,78 @@ +MEMORY + { + flash : ORIGIN = 0xf0000000, LENGTH = 0x04000000 + vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000 + ram : ORIGIN = 0x00002000, LENGTH = 0x04000000 - 0x00002000 + } + +SECTIONS +{ + .reset : + { + *(.crc) + *(.reset) + } > flash + + .text ALIGN(0x04): + { + *(.text) + } > flash + + .rodata : + { + *(.rodata) + *(.rodata.*) + } > flash + + .monitor ALIGN(0x40000) : + { + *(.monitor) + } > flash + + . += 0x100000; + + .config ALIGN(0x40000) : + { + _config_end = .; + *(.config) + } > flash + + .dummy ALIGN(0x40000): + { + _src_beg = .; + } > flash + + .vectors : + AT ( ADDR (.dummy) ) + { + _vec_start = .; + *(.vectors) + _vec_end = .; + } > vectors + + .data : + AT ( ADDR (.dummy) + SIZEOF (.vectors) ) + { + _dst_beg = .; + *(.data) + _dst_end = .; + } > ram + + .bss : + { + *(.bss) + } > ram + + .stack : + { + *(.stack) + } > ram + + .mytext : + { + _fprog_addr = .; + *(.mytext) + . += 0x500; + _src_addr = .; + } > ram +}
trunk/soc/sw/orpmon/flash.ld Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/README =================================================================== --- trunk/soc/sw/orpmon/README (nonexistent) +++ trunk/soc/sw/orpmon/README (revision 20) @@ -0,0 +1,58 @@ + + +ORPmon Documentation + + + +INTRODUCTION + + ORPmon is user friendly open source TFTP loader program with a lot of +useful utilities and extra functions -- e.g. memory dump, flash loading, +crc calculation... + + Its small size and scallability makes it useful and fast to load in most +applications. ORPmon is accessible using serial port or VGA terminal. +In former case it should be connected to some tty device. + + Although it is primary use for program loading and executing, it can +also be used for board/device testing. Numerous tests are already included, +while custom can be easily added. + + When ORPmon displays prompt, e.g. 'orpmon>', it is waiting for input. +Valid command should be entered. For more information about commands +type 'help' in the ORPmon command prompt. + + + +TODO + - (uc)Linux command line support + - disassembly + - easy platform support + - PS/2 keyboard support + + + +INSTALLATION + +ORPmon is configured by editing include/board.h. 'make all' afterwards builds +the ORPmon according to the given configuration. Two binaries are produced, +orpmon.or32, orpmon-flash.or32. They are basically the same, except the +latter starts from flash. ORP monitor quick reference in Adobe Portable +Document Format is available by 'make docs' in doc directory. + + + +LICENSE + +ORPmon is distributed under GNU General Public License. See COPYING for more +details. + + + +AUTHORS + +Damjan Lampret, lampret@opencores.org +Simon Srot, simons@opencores.org +Igor Mohor, igorm@opencores.org +Marko Mlinar, markom@opencores.org +
trunk/soc/sw/orpmon/README Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/doc/ORPmref.pdf =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: trunk/soc/sw/orpmon/doc/ORPmref.pdf =================================================================== --- trunk/soc/sw/orpmon/doc/ORPmref.pdf (nonexistent) +++ trunk/soc/sw/orpmon/doc/ORPmref.pdf (revision 20)
trunk/soc/sw/orpmon/doc/ORPmref.pdf Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: trunk/soc/sw/orpmon/doc/ORPmref.tex =================================================================== --- trunk/soc/sw/orpmon/doc/ORPmref.tex (nonexistent) +++ trunk/soc/sw/orpmon/doc/ORPmref.tex (revision 20) @@ -0,0 +1,64 @@ +\documentstyle[10pt]{letter} +\topmargin -2cm +\textwidth 19cm +\textheight 28cm +\hoffset -2cm + +\begin{document} + +\newcommand{\addorpcmd}[3]{{\small\tt#1}\hfil&{\small\tt #2}\hfil&{\small\rm#3}\hfil\\} +\thispagestyle{empty} +\begin{centering} +\noindent{\large{\bf ORP Monitor Quick Reference}\\\ \\} +\noindent +\begin{tabular}{lp{5cm}p{7cm}}\hline +{\bf Command} & {\bf Parameters} & {\bf Description} \\ \hline\hline +\addorpcmd{help}{}{shows help} +\addorpcmd{dm}{$<$start addr$>$ [$<$end addr$>$]}{display 32-bit memory location(s)} +\addorpcmd{pm}{$<$addr$>$ [$<$stop\_addr$>$] $<$value$>$}{patch 32-bit memory location(s)} +\addorpcmd{copy}{[$<$dst\_addr$>$ [$<$src\_addr [$<$length$>$]]]}{copy memory} +\addorpcmd{mfspr}{$<$spr\_addr$>$}{show SPR} +\addorpcmd{mtspr}{$<$spr\_addr$>$ $<$value$>$}{set SPR} +\hline +\addorpcmd{crc}{[$<$src\_addr$>$ [$<$length$>$ [$<$init\_crc$>$]]]}{calculates a 32-bit CRC on specified memory region} +\addorpcmd{tftp}{[$<$file$>$ [$<$srv\_ip$>$ [$<$src\_addr$>$]]]}{TFTP download} +\addorpcmd{ic\_enable}{}{enable instruction cache} +\addorpcmd{ic\_disable}{}{disable instruction cache} +\addorpcmd{dc\_enable}{}{enable data cache} +\addorpcmd{dc\_disable}{}{disable data cache} +\addorpcmd{ram\_test}{$<$start\_addr$>$ $<$stop\_addr$>$ [$<$test\_no$>$]}{run a simple RAM test} +\addorpcmd{dhry}{[$<$num\_runs$>$]}{run dhrystone} +\hline +\addorpcmd{globals}{}{show globals and their current values} +\addorpcmd{src\_addr}{$<$value$>$}{sets global parameter source address} +\addorpcmd{dst\_addr}{$<$value$>$}{sets global parameter destination address} +\addorpcmd{start\_addr}{$<$value$>$}{sets global parameter start address} +\addorpcmd{length}{$<$value$>$}{sets global parameter {\tt length}} +\addorpcmd{erase\_method}{$<$value$>$ $<$value$>$ $<$value$>$}{sets flash erase method global parameter (0=do~not~erase, 1=fully, 2=as~needed)} +\addorpcmd{set\_dest\_addr}{$<$addrhi$>$ $<$addrmid$>$ $<$addrlo$>$}{set destination address global parameter} +\addorpcmd{ip}{$<$value$>$ $<$value$>$ $<$value$>$}{sets {\tt ip} address global parameter} +\addorpcmd{srv\_ip}{$<$value$>$ $<$value$>$ $<$value$>$}{sets server ip address global parameter} +\hline +\addorpcmd{eth\_init}{}{init ethernet} +\addorpcmd{show\_txbd}{[$<$start BD$>$] [$<$max$>$]}{show Tx buffer desc} +\addorpcmd{show\_rxbd}{[$<$start BD$>$] [$<$max$>$]}{show Rx buffer desc} +\addorpcmd{send\_packet}{$<$length$>$ [$<$start data$>$] [$<$num\_of\_packets$>$]}{create and send packet(s)} +\addorpcmd{init\_txbd\_pool}{$<$max$>$}{initialize Tx buffer descriptors} +\addorpcmd{init\_rxbd\_pool}{$<$max$>$}{initialize Rx buffer descriptors} +\addorpcmd{show\_phy\_reg}{[$<$start\_addr$>$] [$<$end addr$>$]}{show PHY registers} +\addorpcmd{set\_phy\_reg}{$<$addr$>$ $<$value$>$}{set PHY register} +\addorpcmd{show\_mac\_regs}{}{show all MAC registers} +\addorpcmd{eth\_int\_enable}{}{enable ethernet interrupt} +\addorpcmd{show\_rx\_buffs}{[$<$show\_all$>$]}{show receive buffers (optional argument will also show empty buffers)} +\addorpcmd{show\_tx\_buffs}{}{show transmit buffers} +\hline +\addorpcmd{crt\_enable}{}{enables CRT} +\addorpcmd{crt\_disable}{}{disables CRT} +\addorpcmd{crt\_test}{}{enables CRT and displays some test patterns} +\addorpcmd{camera\_enable}{}{enables camera} +\addorpcmd{camera\_disable}{}{disables camera} +\hline +\end{tabular} +\end{centering} +\end{document} +
trunk/soc/sw/orpmon/doc/ORPmref.tex Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/doc/Makefile =================================================================== --- trunk/soc/sw/orpmon/doc/Makefile (nonexistent) +++ trunk/soc/sw/orpmon/doc/Makefile (revision 20) @@ -0,0 +1,11 @@ +docs: ORPmref.pdf + +ORPmref.pdf: ORPmref.tex + pdflatex ORPmref.tex + +clean distclean: + rm -f ORPmref.aux ORPmref.pdf ORPmref.log + +######################################################################### + +.depend:
trunk/soc/sw/orpmon/doc/Makefile Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/COPYING =================================================================== --- trunk/soc/sw/orpmon/COPYING (nonexistent) +++ trunk/soc/sw/orpmon/COPYING (revision 20) @@ -0,0 +1,340 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc. + 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. 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trunk/soc/sw/orpmon/COPYING Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/config.mk =================================================================== --- trunk/soc/sw/orpmon/config.mk (nonexistent) +++ trunk/soc/sw/orpmon/config.mk (revision 20) @@ -0,0 +1,61 @@ +######################################################################### + +CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ + else if [ -x /bin/bash ]; then echo /bin/bash; \ + else echo sh; fi ; fi) + +HOSTCC = cc +HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer + +# +# Specify the path to the tool chain +# +TOOL_PREFIX = /tools/or32-uclinux + +######################################################################### + +# +# Include the make variables (CC, etc...) +# +AS = $(CROSS_COMPILE)as +LD = $(CROSS_COMPILE)ld +CC = $(CROSS_COMPILE)gcc +AR = $(CROSS_COMPILE)ar +NM = $(CROSS_COMPILE)nm +STRIP = $(CROSS_COMPILE)strip +OBJCOPY = $(CROSS_COMPILE)objcopy +OBJDUMP = $(CROSS_COMPILE)objdump +RANLIB = $(CROSS_COMPILE)ranlib + +CFLAGS += -I$(TOPDIR)/include -DOR1K -Wall -Wstrict-prototypes +CFLAGS += -Werror-implicit-function-declaration -fomit-frame-pointer +CFLAGS += -fno-strength-reduce -O2 -g -pipe -fno-builtin +#CFLAGS += -msoft-mul -msoft-div -nostdlib +CFLAGS += -nostdlib + +LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) +LDFLAGS+= $(LIBGCC) + +######################################################################### + +export CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE \ + AS LD CC AR NM STRIP OBJCOPY OBJDUMP \ + MAKE CFLAGS ASFLAGS + +######################################################################### + +%.o: %.S + $(CC) $(CFLAGS) -c -o $@ $(CURDIR)/$< +%.o: %.c + $(CC) $(CFLAGS) -c -o $@ $< + +%.bin: %.or32 + or32-rtems-objcopy -O binary $< $@ + +%.img: %.bin + utils/bin2flimg 1 $< > $@ + +%.srec: %.bin + utils/bin2srec $< > $@ + +#########################################################################
trunk/soc/sw/orpmon/config.mk Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/ram.ld =================================================================== --- trunk/soc/sw/orpmon/ram.ld (nonexistent) +++ trunk/soc/sw/orpmon/ram.ld (revision 20) @@ -0,0 +1,68 @@ +MEMORY + { + vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000 + ram : ORIGIN = 0x00002000, LENGTH = 0x00400000 - 0x00002000 + flash : ORIGIN = 0xf0000000, LENGTH = 0x04000000 + } + +SECTIONS +{ + .vectors : + { + *(.crc) + *(.vectors) + } > vectors + + .text : + { + _text_begin = .; + *(.text) + _text_end = .; + } > ram + + .mytext : + { + *(.mytext) + _fprog_addr = .; + . += 0x500; + } > ram + + .data : + AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext)) + { + *(.data) + } > ram + + .rodata : + { + *(.rodata) + *(.rodata.*) + } > ram + + .bss : + { + *(.bss) + } > ram + + .stack : + { + *(.stack) + _src_addr = .; + } > ram + + . = 0xf0000100; + + .monitor ALIGN(0x40000) : + { + *(.monitor) + } > flash + + . += 0x100000; + + .config ALIGN(0x40000) : + { + _cfg_start = .; + *(.config) + _cfg_end = .; + } > flash +}
trunk/soc/sw/orpmon/ram.ld Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/Makefile =================================================================== --- trunk/soc/sw/orpmon/Makefile (nonexistent) +++ trunk/soc/sw/orpmon/Makefile (revision 20) @@ -0,0 +1,82 @@ +ifndef CROSS_COMPILE +CROSS_COMPILE = or32-elf- +endif + +export CROSS_COMPILE + +######################################################################### + +TOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi) +export TOPDIR + +include $(TOPDIR)/config.mk + +# order is important here: +SUBDIRS = drivers common cmds services doc + +LIBS = common/common_o.o cmds/cmds.o services/services.o drivers/drivers.o + +######################################################################### + + +all: build.h orpmon.or32 orpmon-flash.or32 + +build.h: + echo "#define BUILD_VERSION \"`date`\"" > $(TOPDIR)/include/build.h + +docs: Makefile + $(MAKE) -C doc docs || exit 1 + +reset.o: reset.S Makefile + $(CC) -c -o $@ $< $(CFLAGS) -DIN_FLASH=0 + +reset-flash.o: reset.S Makefile + $(CC) -c -o $@ $< $(CFLAGS) -DIN_FLASH=1 + +orpmon.or32: depend subdirs reset.o $(LIBS) Makefile gencrc + $(LD) -Tram.ld -o $@ reset.o $(LIBS) $(LDFLAGS) +# $(OBJCOPY) -j .text -O binary $@ $@.tmp +#-S -j .vectors -j .text -j .data -j .rodata +# ./gencrc $@.tmp $@ + +orpmon-flash.or32: depend subdirs reset-flash.o $(LIBS) Makefile gencrc + $(LD) -Tflash.ld -o $@ reset-flash.o $(LIBS) $(LDFLAGS) + $(OBJCOPY) -O binary $@ $@.tmp + +# ../utils/bin2flimg 4 $@.tmp > $@.mem + +gencrc: gencrc.c + $(HOSTCC) -o gencrc -g gencrc.c + +System.map: orpmon.or32 + @$(NM) $< | \ + grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ + sort > System.map + +######################################################################### + +depend dep: + @for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir .depend ; done + +subdirs: + @for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir || exit 1 ; done + +clean: + find . -type f \ + \( -name 'core' -o -name '*.bak' -o -name '*~' \ + -o -name '*.o' -o -name '*.tmp' \ + -o -name '*.or32' -o -name '*.bin' -o -name '*.srec' \ + -o -name '*.mem' -o -name '*.img' -o -name '*.out' \ + -o -name '*.aux' -o -name '*.log' \) -print \ + | xargs rm -f + rm -f System.map + +distclean: clean + find . -type f \ + \( -name .depend -o -name '*.srec' -o -name '*.bin' \ + -o -name '*.pdf' \) \ + -print | xargs rm -f + rm -f $(OBJS) *.bak tags TAGS + rm -fr *.*~ + rm -f gencrc +#########################################################################
trunk/soc/sw/orpmon/Makefile Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/smc91111.c =================================================================== --- trunk/soc/sw/orpmon/drivers/smc91111.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/smc91111.c (revision 20) @@ -0,0 +1,810 @@ +/*------------------------------------------------------------------------ + . smc91111.c + . This is a driver for SMSC's 91C111 single-chip Ethernet device. + . + . (C) Copyright 2005 + . + . Copyright (C) 2001 Standard Microsystems Corporation (SMSC) + . Developed by Simple Network Magic Corporation (SNMC) + . Copyright (C) 1996 by Erik Stahlman (ES) + . + . This program is free software; you can redistribute it and/or modify + . it under the terms of the GNU General Public License as published by + . the Free Software Foundation; either version 2 of the License, or + . (at your option) any later version. + . + . This program is distributed in the hope that it will be useful, + . but WITHOUT ANY WARRANTY; without even the implied warranty of + . MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + . GNU General Public License for more details. + . + . You should have received a copy of the GNU General Public License + . along with this program; if not, write to the Free Software + . Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + . + . Information contained in this file was obtained from the LAN91C111 + . manual from SMC. To get a copy, if you really want one, you can find + . information under www.smsc.com. + . + . + . author: + . Javier Castillo ( javier.castillo@urjc.es ) + . + . Sources: + . o smc91111.c by Erik Stahlman + . + . History: + . 06/05/05 Javier Castillo Modified smc91111.c to work with OR1200 + ----------------------------------------------------------------------------*/ + +#include "board.h" + +#if SMC91111_LAN==1 + +#include "common.h" +#include "smc91111.h" +#include "support.h" +#include "net.h" + +#ifndef CONFIG_SMC_AUTONEG_TIMEOUT +#define CONFIG_SMC_AUTONEG_TIMEOUT 10 +#endif + +#define ETH_ZLEN 60 +#define MEMORY_WAIT_TIME 16 +#define SMC_ALLOC_MAX_TRY 5 +#define SMC_TX_TIMEOUT 30 +#define SWAP16(x) ((((x) & 0x00ff) << 8) | ( (x) >> 8)) + + +typedef unsigned char byte; +typedef unsigned short word; + +//Do nothing but needed to compile +int tx_next; +int rx_next; + +void (*receive)(volatile unsigned char *add, int len); /* Pointer to function to be called + when frame is received */ + +static void __delay(unsigned long loops) +{ + __asm__ __volatile__ ("1: l.sfeqi %0,0; \ + l.bnf 1b; \ + l.addi %0,%0,-1;" + : "=r" (loops) : "0" (loops)); +} + +static void udelay(unsigned long usecs) +{ + /* Sigh */ + __delay(usecs); +} + +static void smc_wait_ms(unsigned int ms){ + udelay(ms*1000); +} + +static void +print_packet(unsigned long add, int len) +{ + int i; + + printf("ipacket: add = %lx len = %d\n", add, len); + for(i = 0; i < len; i++) { + if(!(i % 16)) + printf("\n"); + printf(" %.2x", *(((unsigned char *)add) + i)); + } + printf("\n"); +} + +/*------------------------------------------------------------ + . Reads a register from the MII Management serial interface + .-------------------------------------------------------------*/ +static word smc_read_phy_register(byte phyreg) +{ + int oldBank; + int i; + byte mask; + word mii_reg; + byte bits[64]; + int clk_idx = 0; + int input_idx; + word phydata; + byte phyaddr=SMC_PHY_ADDR; + + // 32 consecutive ones on MDO to establish sync + for (i = 0; i < 32; ++i) + bits[clk_idx++] = MII_MDOE | MII_MDO; + + // Start code <01> + bits[clk_idx++] = MII_MDOE; + bits[clk_idx++] = MII_MDOE | MII_MDO; + + // Read command <10> + bits[clk_idx++] = MII_MDOE | MII_MDO; + bits[clk_idx++] = MII_MDOE; + + // Output the PHY address, msb first + mask = (byte)0x10; + for (i = 0; i < 5; ++i) + { + if (phyaddr & mask) + bits[clk_idx++] = MII_MDOE | MII_MDO; + else + bits[clk_idx++] = MII_MDOE; + + // Shift to next lowest bit + mask >>= 1; + } + + // Output the phy register number, msb first + mask = (byte)0x10; + for (i = 0; i < 5; ++i) + { + if (phyreg & mask) + bits[clk_idx++] = MII_MDOE | MII_MDO; + else + bits[clk_idx++] = MII_MDOE; + + // Shift to next lowest bit + mask >>= 1; + } + + // Tristate and turnaround (2 bit times) + bits[clk_idx++] = 0; + //bits[clk_idx++] = 0; + + // Input starts at this bit time + input_idx = clk_idx; + + // Will input 16 bits + for (i = 0; i < 16; ++i) + bits[clk_idx++] = 0; + + // Final clock bit + bits[clk_idx++] = 0; + + // Save the current bank + oldBank = REG16(ETH_BASE+BANK_SELECT); + + // Select bank 3 + SMC_SELECT_BANK( 3 ); + + // Get the current MII register value + mii_reg = REG16(ETH_BASE+MII_REG); + + // Turn off all MII Interface bits + mii_reg &= ~(MII_MDOE|MII_MCLK|MII_MDI|MII_MDO); + + // Clock all 64 cycles + for (i = 0; i < sizeof bits; ++i) + { + // Clock Low - output data + REG16(ETH_BASE+MII_REG)= mii_reg | bits[i]; + udelay(500); + + + // Clock Hi - input data + REG16(ETH_BASE+MII_REG)= mii_reg | bits[i] | MII_MCLK; + udelay(500); + bits[i] |= REG16(ETH_BASE+MII_REG) & MII_MDI; + } + + // Return to idle state + // Set clock to low, data to low, and output tristated + REG16(ETH_BASE+MII_REG)=mii_reg; + udelay(500); + + // Restore original bank select + SMC_SELECT_BANK( oldBank ); + + // Recover input data + phydata = 0; + for (i = 0; i < 16; ++i) + { + phydata <<= 1; + + if (bits[input_idx++] & MII_MDI) + phydata |= 0x0001; + } + + return(phydata); +} + +static void smc_write_phy_register(byte phyreg, word phydata){ + + int oldBank; + int i; + word mask; + word mii_reg; + byte bits[65]; + int clk_idx=0; + byte phyaddr=SMC_PHY_ADDR; + + /*32 consecutives ones on MDO to establish sync*/ + for(i=0; i<32;i++) + bits[clk_idx++]=MII_MDOE | MII_MDO; + + // Start code <01> + bits[clk_idx++] = MII_MDOE; + bits[clk_idx++] = MII_MDOE | MII_MDO; + + // Write command <01> + bits[clk_idx++] = MII_MDOE; + bits[clk_idx++] = MII_MDOE | MII_MDO; + + // Output the PHY address, msb first + mask = (byte)0x10; + for (i = 0; i < 5; ++i) + { + if (phyaddr & mask) + bits[clk_idx++] = MII_MDOE | MII_MDO; + else + bits[clk_idx++] = MII_MDOE; + + // Shift to next lowest bit + mask >>= 1; + } + + // Output the phy register number, msb first + mask = (byte)0x10; + for (i = 0; i < 5; ++i) + { + if (phyreg & mask) + bits[clk_idx++] = MII_MDOE | MII_MDO; + else + bits[clk_idx++] = MII_MDOE; + + // Shift to next lowest bit + mask >>= 1; + } + + // Tristate and turnaround (2 bit times) + bits[clk_idx++] = 0; + bits[clk_idx++] = 0; + + // Write out 16 bits of data, msb first + mask = 0x8000; + for (i = 0; i < 16; ++i) + { + if (phydata & mask) + bits[clk_idx++] = MII_MDOE | MII_MDO; + else + bits[clk_idx++] = MII_MDOE; + + // Shift to next lowest bit + mask >>= 1; + } + + // Final clock bit (tristate) + bits[clk_idx++] = 0; + + // Save the current bank + oldBank = REG16(ETH_BASE+BANK_SELECT); + + // Select bank 3 + SMC_SELECT_BANK( 3 ); + + // Get the current MII register value + mii_reg = REG16(ETH_BASE+MII_REG); + + // Turn off all MII Interface bits + mii_reg &= ~(MII_MDOE|MII_MCLK|MII_MDI|MII_MDO); + + // Clock all cycles + for (i = 0; i < sizeof bits; ++i) + { + // Clock Low - output data + REG16(ETH_BASE+MII_REG)= mii_reg | bits[i]; + udelay(50); + + + // Clock Hi - input data + REG16(ETH_BASE+MII_REG)= mii_reg | bits[i] | MII_MCLK; + udelay(50); + bits[i] |= REG16(ETH_BASE+MII_REG) & MII_MDI; + } + + // Return to idle state + // Set clock to low, data to low, and output tristated + REG16(ETH_BASE+MII_REG)=mii_reg; + udelay(50); + + // Restore original bank select + SMC_SELECT_BANK( oldBank ); + +} + + +static void smc_phy_configure (void){ + int timeout; + byte phyaddr; + word my_phy_caps; /* My PHY capabilities */ + word my_ad_caps; /* My Advertised capabilities */ + word status = 0; /*;my status = 0 */ + int failed = 0; + + /* Get the detected phy address */ + phyaddr = SMC_PHY_ADDR; + + /* Reset the PHY, setting all other bits to zero */ + smc_write_phy_register (PHY_CNTL_REG, PHY_CNTL_RST); + + /* Wait for the reset to complete, or time out */ + timeout = 6; /* Wait up to 3 seconds */ + while (timeout--) { + if (!(smc_read_phy_register (PHY_CNTL_REG) + & PHY_CNTL_RST)) { + /* reset complete */ + break; + } + + smc_wait_ms (500); /* wait 500 millisecs */ + } + + if (timeout < 1) { + printf ("PHY reset timed out\n"); + goto smc_phy_configure_exit; + } + + /* Read PHY Register 18, Status Output */ + /* lp->lastPhy18 = smc_read_phy_register(PHY_INT_REG); */ + + /* Enable PHY Interrupts (for register 18) */ + /* Interrupts listed here are disabled */ + smc_write_phy_register (PHY_MASK_REG, 0xffff); + + /* Configure the Receive/Phy Control register */ + SMC_SELECT_BANK (0); + REG16(ETH_BASE+RPC_REG)=RPC_DEFAULT; + + /* Copy our capabilities from PHY_STAT_REG to PHY_AD_REG */ + my_phy_caps = smc_read_phy_register (PHY_STAT_REG); + my_ad_caps = PHY_AD_CSMA; /* I am CSMA capable */ + + if (my_phy_caps & PHY_STAT_CAP_T4) + my_ad_caps |= PHY_AD_T4; + + if (my_phy_caps & PHY_STAT_CAP_TXF) + my_ad_caps |= PHY_AD_TX_FDX; + + if (my_phy_caps & PHY_STAT_CAP_TXH) + my_ad_caps |= PHY_AD_TX_HDX; + + if (my_phy_caps & PHY_STAT_CAP_TF) + my_ad_caps |= PHY_AD_10_FDX; + + if (my_phy_caps & PHY_STAT_CAP_TH) + my_ad_caps |= PHY_AD_10_HDX; + + /* Update our Auto-Neg Advertisement Register */ + smc_write_phy_register (PHY_AD_REG, my_ad_caps); + + /* Read the register back. Without this, it appears that when */ + /* auto-negotiation is restarted, sometimes it isn't ready and */ + /* the link does not come up. */ + smc_read_phy_register(PHY_AD_REG); + + /* Restart auto-negotiation process in order to advertise my caps */ + smc_write_phy_register (PHY_CNTL_REG, + PHY_CNTL_ANEG_EN | PHY_CNTL_ANEG_RST); + + /* Wait for the auto-negotiation to complete. This may take from */ + /* 2 to 3 seconds. */ + /* Wait for the reset to complete, or time out */ + timeout = CONFIG_SMC_AUTONEG_TIMEOUT * 2; + while (timeout--) { + + status = smc_read_phy_register (PHY_STAT_REG); + if (status & PHY_STAT_ANEG_ACK) { + /* auto-negotiate complete */ + break; + } + + smc_wait_ms (500); /* wait 500 millisecs */ + + /* Restart auto-negotiation if remote fault */ + if (status & PHY_STAT_REM_FLT) { + printf ("PHY remote fault detected\n"); + + /* Restart auto-negotiation */ + printf ("PHY restarting auto-negotiation\n"); + smc_write_phy_register (PHY_CNTL_REG, + PHY_CNTL_ANEG_EN | + PHY_CNTL_ANEG_RST | + PHY_CNTL_SPEED | + PHY_CNTL_DPLX); + } + } + + if (timeout < 1) { + printf ("PHY auto-negotiate timed out\n"); + failed = 1; + } + + /* Fail if we detected an auto-negotiate remote fault */ + if (status & PHY_STAT_REM_FLT) { + printf ("PHY remote fault detected\n"); + failed = 1; + } + + /* Re-Configure the Receive/Phy Control register */ + REG16(ETH_BASE+RPC_REG)=RPC_DEFAULT; + +smc_phy_configure_exit: ; + +} + +static inline void smc_wait_mmu_release_complete (void) +{ + int count = 0; + + /* assume bank 2 selected */ + while (REG16(ETH_BASE+MMU_CMD_REG) & MC_BUSY) { + udelay (1); /* Wait until not busy */ + if (++count > 200) + break; + } +} + +static void eth_reset(){ + + /* This resets the registers mostly to defaults, but doesn't + affect EEPROM. That seems unnecessary */ + SMC_SELECT_BANK (0); + REG16(ETH_BASE+RCR_REG)=RCR_SOFTRST; + + /* Setup the Configuration Register */ + /* This is necessary because the CONFIG_REG is not affected */ + /* by a soft reset */ + + SMC_SELECT_BANK (1); + REG16(ETH_BASE+CONFIG_REG)=CONFIG_DEFAULT; + + /* Release from possible power-down state */ + /* Configuration register is not affected by Soft Reset */ + REG16(ETH_BASE+CONFIG_REG)=REG16(ETH_BASE+CONFIG_REG) | CONFIG_EPH_POWER_EN; + + SMC_SELECT_BANK (0); + + /* this should pause enough for the chip to be happy */ + udelay (100); + + /* Disable transmit and receive functionality */ + REG16(ETH_BASE+RCR_REG)=RCR_CLEAR; + REG16(ETH_BASE+TCR_REG)=TCR_CLEAR; + + /* set the control register */ + SMC_SELECT_BANK (1); + REG16(ETH_BASE+CTL_REG)=CTL_DEFAULT; + + /* Reset the MMU */ + SMC_SELECT_BANK (2); + smc_wait_mmu_release_complete (); + REG16(ETH_BASE+MMU_CMD_REG)=MC_RESET; + while (REG16(ETH_BASE+MMU_CMD_REG) & MC_BUSY) + udelay (1); /* Wait until not busy */ + + /* Note: It doesn't seem that waiting for the MMU busy is needed here, + but this is a place where future chipsets _COULD_ break. Be wary + of issuing another MMU command right after this */ + + /* Disable all interrupts */ + REG8(ETH_BASE+IM_REG)=0; +} + +void eth_init (void (*rec)(volatile unsigned char *, int)){ + + receive = rec; + + /*First make a SW reset of the chip*/ + eth_reset(); + + /*Enable TX and Rx*/ + SMC_SELECT_BANK(0x0); + REG16(ETH_BASE+TCR_REG)=TCR_DEFAULT; + REG16(ETH_BASE+RCR_REG)=RCR_DEFAULT; + REG16(ETH_BASE+RPC_REG)=RPC_DEFAULT; + + /*Configure PHY with autoneg*/ + smc_phy_configure(); + + /*Set MAC address*/ + SMC_SELECT_BANK(0x1); + REG8(ETH_BASE+ADDR0_REG)=ETH_MACADDR0; + REG8(ETH_BASE+ADDR0_REG+1)=ETH_MACADDR1; + REG8(ETH_BASE+ADDR0_REG+2)=ETH_MACADDR2; + REG8(ETH_BASE+ADDR0_REG+3)=ETH_MACADDR3; + REG8(ETH_BASE+ADDR0_REG+4)=ETH_MACADDR4; + REG8(ETH_BASE+ADDR0_REG+5)=ETH_MACADDR5; + +} + +void eth_halt(void) { + /* no more interrupts for me */ + SMC_SELECT_BANK( 2 ); + REG8(ETH_BASE+IM_REG)=0; + + /* and tell the card to stay away from that nasty outside world */ + SMC_SELECT_BANK( 0 ); + REG8(ETH_BASE+RCR_REG)=RCR_CLEAR; + REG8(ETH_BASE+TCR_REG)=TCR_CLEAR; +} + +unsigned long eth_rx (void){ + + int packet_number; + word status; + word packet_length; + word packet_length_loop; + int is_error = 0; + byte saved_pnr; + word saved_ptr; + word word_readed; + byte *data; + + SMC_SELECT_BANK(2); + /* save PTR and PTR registers */ + saved_pnr = REG8(ETH_BASE+PN_REG ); + saved_ptr = REG16(ETH_BASE+PTR_REG ); + + packet_number = REG16(ETH_BASE+RXFIFO_REG ); + + if ( packet_number & RXFIFO_REMPTY ) { + return 0; + } + + /* start reading from the start of the packet */ + REG16(ETH_BASE+PTR_REG)=PTR_READ | PTR_RCV | PTR_AUTOINC; + + /* First two words are status and packet_length */ + status = REG16(ETH_BASE+SMC91111_DATA_REG ); + packet_length = REG16(ETH_BASE+SMC91111_DATA_REG ); + + packet_length &= 0x07ff; /* mask off top bits */ + + #ifdef DEBUG + printf("RCV: STATUS %4x LENGTH %4x\n", status, packet_length ); + #endif + if ( !(status & RS_ERRORS ) ){ + /* Adjust for having already read the first two words */ + packet_length -= 4; /*4; */ + + /* set odd length for bug in LAN91C111, */ + /* which never sets RS_ODDFRAME */ + /* TODO ? */ + #ifdef DEBUG + printf(" Reading %d words and %d byte(s) \n",(packet_length >> 1 ), packet_length & 1 ); + #endif + packet_length_loop=packet_length>>1; + + data=(byte*)NetRxPackets[0]; + while(packet_length_loop-->0){ + word_readed=REG16(ETH_BASE+SMC91111_DATA_REG); + *((word*)data)=SWAP16(word_readed); + data+=sizeof(word); + } + + } else { + /* error ... */ + /* TODO ? */ + is_error = 1; + } + + while ( REG16(ETH_BASE+MMU_CMD_REG) & MC_BUSY ) + udelay(1); /* Wait until not busy */ + + /* error or good, tell the card to get rid of this packet */ + REG16(ETH_BASE+MMU_CMD_REG)=MC_RELEASE; + + while ( REG16(ETH_BASE+MMU_CMD_REG) & MC_BUSY ) + udelay(1); /* Wait until not busy */ + + /* restore saved registers */ + + REG8(ETH_BASE+PN_REG)=saved_pnr; + + REG16(ETH_BASE+PTR_REG)=saved_ptr; + + if (!is_error) { + /* Pass the packet up to the protocol layers. */ + receive(NetRxPackets[0], packet_length); + return packet_length; + } else { + return 0; + } +} + +#define CFG_HZ 1000 +static int poll4int (byte mask, int timeout) +{ + int tmo = get_timer (0) + timeout * CFG_HZ; + int is_timeout = 0; + word old_bank = REG16(ETH_BASE+BSR_REG); + #ifdef DEBUG + printf ("Polling...\n"); + #endif + SMC_SELECT_BANK (2); + while ((REG16(ETH_BASE+SMC91111_INT_REG) & mask) == 0) { + if (get_timer (0) >= tmo) { + is_timeout = 1; + break; + } + } + + /* restore old bank selection */ + SMC_SELECT_BANK (old_bank); + + if (is_timeout) + return 1; + else + return 0; +} + +void eth_send(void *buf, unsigned long len) { + + byte packet_no; + byte *bufb; + int length; + int lengtht; + int numPages; + int try = 0; + int time_out; + byte status; + byte saved_pnr; + word saved_ptr; + + /* save PTR and PNR registers before manipulation */ + SMC_SELECT_BANK (2); + saved_pnr = REG8( ETH_BASE+PN_REG ); + saved_ptr = REG16( ETH_BASE+PTR_REG ); + #ifdef DEBUG + printf ("smc_hardware_send_packet\n"); + #endif + length = ETH_ZLEN < len ? len : ETH_ZLEN; + + /* allocate memory + ** The MMU wants the number of pages to be the number of 256 bytes + ** 'pages', minus 1 ( since a packet can't ever have 0 pages :) ) + ** + ** The 91C111 ignores the size bits, but the code is left intact + ** for backwards and future compatibility. + ** + ** Pkt size for allocating is data length +6 (for additional status + ** words, length and ctl!) + ** + ** If odd size then last byte is included in this header. + */ + numPages = ((length & 0xfffe) + 6); + numPages >>= 8; /* Divide by 256 */ + + if (numPages > 7) { + printf ("Far too big packet error. \n"); + return; + } + + /* now, try to allocate the memory */ + SMC_SELECT_BANK (2); + REG16( ETH_BASE+MMU_CMD_REG)=MC_ALLOC | numPages; + + /* FIXME: the ALLOC_INT bit never gets set * + * so the following will always give a * + * memory allocation error. * + * same code works in armboot though * + * -ro + */ + +again: + try++; + time_out = MEMORY_WAIT_TIME; + do { + status = REG8( ETH_BASE+SMC91111_INT_REG); + if (status & IM_ALLOC_INT) { + /* acknowledge the interrupt */ + REG8( ETH_BASE+SMC91111_INT_REG)=IM_ALLOC_INT; + break; + } + } while (--time_out); + + if (!time_out) { + if (try < SMC_ALLOC_MAX_TRY) + goto again; + else + return; + } + + /* I can send the packet now.. */ + + bufb = (byte *) buf; + + /* If I get here, I _know_ there is a packet slot waiting for me */ + packet_no = REG8( ETH_BASE+AR_REG); + if (packet_no & AR_FAILED) { + /* or isn't there? BAD CHIP! */ + printf ("Memory allocation failed. \n"); + return; + } + + /* we have a packet address, so tell the card to use it */ + REG8( ETH_BASE+PN_REG)=packet_no; + /* do not write new ptr value if Write data fifo not empty */ + while ( saved_ptr & PTR_NOTEMPTY ) + printf ("Write data fifo not empty!\n"); + + /* point to the beginning of the packet */ + REG16( ETH_BASE+PTR_REG)=PTR_AUTOINC; + + + /* send the packet length ( +6 for status, length and ctl byte ) + and the status word ( set to zeros ) */ + REG16(ETH_BASE+SMC91111_DATA_REG)=0; + /* send the packet length ( +6 for status words, length, and ctl */ + REG16(ETH_BASE+SMC91111_DATA_REG)=length + 6; + + + /* send the actual data */ + lengtht=length>>1; + while(lengtht-->0){ + REG16(ETH_BASE+SMC91111_DATA_REG)=SWAP16(*((word*)bufb)); + bufb+=sizeof(word); + } + + + /* Send the last byte, if there is one. */ + if ((length & 1) == 0) { + REG16(ETH_BASE+SMC91111_DATA_REG)=0; + } else { + REG16(ETH_BASE+SMC91111_DATA_REG)=bufb[length - 1] | 0x2000; + } + + /* and let the chipset deal with it */ + REG16(ETH_BASE+MMU_CMD_REG)=MC_ENQUEUE; + + /* poll for TX INT */ + /* if (poll4int (IM_TX_INT, SMC_TX_TIMEOUT)) { */ + /* poll for TX_EMPTY INT - autorelease enabled */ + if (poll4int(IM_TX_EMPTY_INT, SMC_TX_TIMEOUT)) { + /* sending failed */ + printf ("TX timeout, sending failed...\n"); + + /* release packet */ + /* no need to release, MMU does that now */ + + /* wait for MMU getting ready (low) */ + while (REG16(ETH_BASE+MMU_CMD_REG) & MC_BUSY) { + udelay (10); + } + + printf ("MMU ready\n"); + + + return; + } else { + /* ack. int */ + REG8(ETH_BASE+SMC91111_INT_REG)=IM_TX_EMPTY_INT; + /* SMC_outb (IM_TX_INT, SMC91111_INT_REG); */ + #ifdef DEBUG + printf ("Sent packet of length %u\n",length); + #endif + + /* release packet */ + /* no need to release, MMU does that now */ + + /* wait for MMU getting ready (low) */ + while (REG16(ETH_BASE+MMU_CMD_REG) & MC_BUSY) { + udelay (10); + } + + } + + /* restore previously saved registers */ + REG8(ETH_BASE+PN_REG)=saved_pnr; + REG16(ETH_BASE+PTR_REG)=saved_ptr, PTR_REG; + + return; + +} + +#endif
trunk/soc/sw/orpmon/drivers/smc91111.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/keyboard.c =================================================================== --- trunk/soc/sw/orpmon/drivers/keyboard.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/keyboard.c (revision 20) @@ -0,0 +1,187 @@ +#include "common.h" +#include "board.h" +#include "support.h" +#include "int.h" +#include "keyboard.h" + +#if KBD_ENABLED + +volatile int kbd_tail = 0; +volatile int kbd_head = 0; +volatile int kbd_buf[KBDBUF_SIZE]; + +static const unsigned char scan2ascii[2][0x40] = { + {0x1f, 0x00, '1', '2', '3', '4', '5', '6', /* 0x00 */ + '7', '8', '9', '0', '-', '=', '\b', '\t', + 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', /* 0x10 */ + 'o', 'p', '[', ']', '\n', 0x00, 'a', 's', + 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', /* 0x20 */ + '\'', '`', 0xff, '\\', 'z', 'x', 'c', 'v', + 'b', 'n', 'm', ',', '.', '/', 0xff, 0x00, /* 0x30 */ + 0x00, ' ', 0x00, 0x00, 0x00, 0x00,0x00,0x00}, + + {0x00, 0x00, '!', '@', '#', '$', '%', '^', /* 0x00 */ + '&', '*', '(', ')', '_', '+', 0x00,0x00, + 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', /* 0X10 */ + 'O', 'P', '{', '}', '\n', 0x00, 'A', 'S', + 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', /* 0X20 */ + '"', '~', 0xff, '|', 'Z', 'X', 'C', 'V', + 'B', 'N', 'M', '<', '>', '?', 0xff, 0x00,/* 0x30 */ + 0x00, ' ', 0x00, 0x00, 0x00, 0x00,0x00,0x00}}; + +static int shift_state = 0; + +static void put_queue(int ch) +{ + //putc (ch); + debug ("put_queue %c (%i,%i)\n", ch, kbd_head, kbd_tail); + kbd_buf[kbd_head] = ch; + kbd_head = (kbd_head + 1) % KBDBUF_SIZE; +} + +static void handle_scancode (unsigned char scan) +{ + unsigned char c; + if (scan >= 0x40) { + scan &= 0x7f; + if (scan >= 0x40) return; + c = scan2ascii[shift_state][scan]; + if (c == 0xff) shift_state = 0; + return; + } + c = scan2ascii[shift_state][scan]; + if (c == 0xff) shift_state = 1; + else put_queue (c); +} + +static void keyboard_interrupt(void) +{ + unsigned char status = REG8(KBD_BASE_ADD + 0x4); + debug ("keyboard_interrupt\n"); + do { + if (status & 0x01) handle_scancode(REG8(KBD_BASE_ADD + 0x0)); + status = REG8(KBD_BASE_ADD + 0x4); + } while (status & 0x01); +} + +static int kbd_wait_for_input(void) +{ + int n; + int status, data; + + n = TIMEOUT_CONST; + do { + status = REG8(KBD_STATUS_REG); + /* + * Wait for input data to become available. This bit will + * then be cleared by the following read of the DATA + * register. + */ + + if (!(status & KBD_OBF)) continue; + + data = REG8(KBD_DATA_REG); + + /* + * Check to see if a timeout error has occurred. This means + * that transmission was started but did not complete in the + * normal time cycle. PERR is set when a parity error occurred + * in the last transmission. + */ + if (status & (KBD_GTO | KBD_PERR)) continue; + + return (data & 0xff); + } while (--n); + return (-1); /* timed-out if fell through to here... */ +} + +static void kbd_write (int address, int data) +{ + int status; + do { + status = REG8(KBD_STATUS_REG); /* spin until input buffer empty*/ + } while (status & KBD_IBF); + REG8 (address) = data; /* write out the data*/ +} + +int kbd_init(void) +{ + int_add (KBD_IRQ, keyboard_interrupt); + + /* Flush any pending input. */ + while (kbd_wait_for_input() != -1) continue; + + /* + * Test the keyboard interface. + * This seems to be the only way to get it going. + * If the test is successful a x55 is placed in the input buffer. + */ + kbd_write(KBD_CNTL_REG, KBD_SELF_TEST); + if (kbd_wait_for_input() != 0x55) { + printf ("initialize_kbd: keyboard failed self test.\n"); + return(-1); + } + + /* + * Perform a keyboard interface test. This causes the controller + * to test the keyboard clock and data lines. The results of the + * test are placed in the input buffer. + */ + kbd_write(KBD_CNTL_REG, KBD_SELF_TEST2); + if (kbd_wait_for_input() != 0x00) { + printf ("initialize_kbd: keyboard failed self test 2.\n"); + return(-1); + } + + /* Enable the keyboard by allowing the keyboard clock to run. */ + kbd_write(KBD_CNTL_REG, KBD_CNTL_ENABLE); + + /* + * Reset keyboard. If the read times out + * then the assumption is that no keyboard is + * plugged into the machine. + * This defaults the keyboard to scan-code set 2. + */ + kbd_write(KBD_DATA_REG, KBD_RESET); + if (kbd_wait_for_input() != KBD_ACK) { + printf ("initialize_kbd: reset kbd failed, no ACK.\n"); + return(-1); + } + + if (kbd_wait_for_input() != KBD_POR) { + printf ("initialize_kbd: reset kbd failed, not POR.\n"); + return(-1); + } + + /* + * now do a DEFAULTS_DISABLE always + */ + kbd_write(KBD_DATA_REG, KBD_DISABLE); + if (kbd_wait_for_input() != KBD_ACK) { + printf ("initialize_kbd: disable kbd failed, no ACK.\n"); + return(-1); + } + + /* + * Enable keyboard interrupt, operate in "sys" mode, + * enable keyboard (by clearing the disable keyboard bit), + * disable mouse, do conversion of keycodes. + */ + kbd_write(KBD_CNTL_REG, KBD_WRITE_MODE); + kbd_write(KBD_DATA_REG, KBD_EKI|KBD_SYS|KBD_DMS|KBD_KCC); + + /* + * now ENABLE the keyboard to set it scanning... + */ + kbd_write(KBD_DATA_REG, KBD_ENABLE); + if (kbd_wait_for_input() != KBD_ACK) { + printf ("initialize_kbd: keyboard enable failed.\n"); + return(-1); + } + + int_enable (KBD_IRQ); + printf ("PS/2 keyboard initialized at 0x%x (irq = %d).\n", KBD_BASE_ADD, KBD_IRQ); + return (1); +} + +#endif /* KBD_ENABLED */
trunk/soc/sw/orpmon/drivers/keyboard.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/eth.c =================================================================== --- trunk/soc/sw/orpmon/drivers/eth.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/eth.c (revision 20) @@ -0,0 +1,284 @@ +#include "board.h" +#if OC_LAN==1 + +#include "common.h" +#include "support.h" +#include "uart.h" +#include "eth.h" +#include "int.h" +#include "spr_defs.h" + +extern int printf (const char *fmt, ...); +extern void lolev_ie(void); +extern void lolev_idis(void); + +int tx_next; /* Next buffer to be given to the user */ +int tx_last; /* Next buffer to be checked if packet sent */ +int tx_full; +int rx_next; /* Next buffer to be checked for new packet and given to the user */ +void (*receive)(volatile unsigned char *add, int len); /* Pointer to function to be called + when frame is received */ + +unsigned long eth_data[((ETH_TXBD_NUM + ETH_RXBD_NUM) * ETH_MAXBUF_LEN)/4] = {0}; +#undef ETH_DATA_BASE +#define ETH_DATA_BASE ((unsigned long)eth_data) + +static void +print_packet(unsigned long add, int len) +{ + int i; + + printf("ipacket: add = %lx len = %d\n", add, len); + for(i = 0; i < len; i++) { + if(!(i % 16)) + printf("\n"); + printf(" %.2x", *(((unsigned char *)add) + i)); + } + printf("\n"); +} + +void init_tx_bd_pool(void) +{ + eth_bd *bd; + int i; + + bd = (eth_bd *)ETH_BD_BASE; + + for(i = 0; i < ETH_TXBD_NUM; i++) { + /* Set Tx BD status */ + bd[i].len_status = 0 << 16 | ETH_TX_BD_PAD | ETH_TX_BD_CRC | ETH_RX_BD_IRQ; + + /* Initialize Tx buffer pointer */ + bd[i].addr = ETH_DATA_BASE + (i * ETH_MAXBUF_LEN); + } + + bd[i-1].len_status |= ETH_TX_BD_WRAP; // Last Tx BD - Wrap +} + +void init_rx_bd_pool(void) +{ + eth_bd *bd; + int i; + + bd = (eth_bd *)ETH_BD_BASE + ETH_TXBD_NUM; + + for(i = 0; i < ETH_RXBD_NUM; i++){ + + /* Set Rx BD status */ + bd[i].len_status = 0 << 16 | ETH_RX_BD_EMPTY | ETH_RX_BD_IRQ; + + /* Initialize Rx buffer pointer */ + bd[i].addr = ETH_DATA_BASE + ((ETH_TXBD_NUM + i) * ETH_MAXBUF_LEN); + } + + bd[i-1].len_status |= ETH_RX_BD_WRAP; // Last Rx BD - Wrap +} + +/* Ethernet interrupt handler */ +void eth_int (void) +{ +} + +void eth_init (void (*rec)(volatile unsigned char *, int)) +{ + /* Reset ethernet core */ + REG32(ETH_REG_BASE + ETH_MODER) = ETH_MODER_RST; /* Reset ON */ + REG32(ETH_REG_BASE + ETH_MODER) &= ~ETH_MODER_RST; /* Reset OFF */ + + /* Setting TX BD number */ + REG32(ETH_REG_BASE + ETH_TX_BD_NUM) = ETH_TXBD_NUM; + + // Set PHY to 10 Mbps full duplex + REG32(ETH_REG_BASE + ETH_MIIADDRESS) = 0<<8; + REG32(ETH_REG_BASE + ETH_MIITX_DATA) = 0x0100; + REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_WCTRLDATA; + while(REG32(ETH_REG_BASE + ETH_MIISTATUS) & ETH_MIISTATUS_BUSY); + + while(1){ + REG32(ETH_REG_BASE + ETH_MIIADDRESS) = 1<<8; + REG32(ETH_REG_BASE + ETH_MIICOMMAND) = ETH_MIICOMMAND_RSTAT; + while(REG32(ETH_REG_BASE + ETH_MIISTATUS) & ETH_MIISTATUS_BUSY); + if(REG32(ETH_REG_BASE + ETH_MIIRX_DATA) & 0x04) + break; + } + + /* Set min/max packet length */ + REG32(ETH_REG_BASE + ETH_PACKETLEN) = 0x00400600; + + /* Set IPGT register to recomended value */ + REG32(ETH_REG_BASE + ETH_IPGT) = 0x00000012; + + /* Set IPGR1 register to recomended value */ + REG32(ETH_REG_BASE + ETH_IPGR1) = 0x0000000c; + + /* Set IPGR2 register to recomended value */ + REG32(ETH_REG_BASE + ETH_IPGR2) = 0x00000012; + + /* Set COLLCONF register to recomended value */ + REG32(ETH_REG_BASE + ETH_COLLCONF) = 0x000f003f; + +#if 0 + REG32(ETH_REG_BASE + ETH_CTRLMODER) = OETH_CTRLMODER_TXFLOW | OETH_CTRLMODER_RXFLOW; +#else + REG32(ETH_REG_BASE + ETH_CTRLMODER) = 0; +#endif + + /* Initialize RX and TX buffer descriptors */ + init_rx_bd_pool(); + init_tx_bd_pool(); + + /* Initialize tx pointers */ + tx_next = 0; + tx_last = 0; + tx_full = 0; + + /* Initialize rx pointers */ + rx_next = 0; + receive = rec; + + /* Set local MAC address */ + REG32(ETH_REG_BASE + ETH_MAC_ADDR1) = ETH_MACADDR0 << 8 | + ETH_MACADDR1; + REG32(ETH_REG_BASE + ETH_MAC_ADDR0) = ETH_MACADDR2 << 24 | + ETH_MACADDR3 << 16 | + ETH_MACADDR4 << 8 | + ETH_MACADDR5; + + /* Clear all pending interrupts */ + REG32(ETH_REG_BASE + ETH_INT) = 0xffffffff; + + /* Promisc, IFG, CRCEn */ + REG32(ETH_REG_BASE + ETH_MODER) |= ETH_MODER_PAD | ETH_MODER_IFG | ETH_MODER_CRCEN; + + /* Enable interrupt sources */ +#if 0 + regs->int_mask = ETH_INT_MASK_TXB | + ETH_INT_MASK_TXE | + ETH_INT_MASK_RXF | + ETH_INT_MASK_RXE | + ETH_INT_MASK_BUSY | + ETH_INT_MASK_TXC | + ETH_INT_MASK_RXC; +#else + REG32(ETH_REG_BASE + ETH_INT_MASK) = 0x00000000; +#endif + + /* Enable receiver and transmiter */ + REG32(ETH_REG_BASE + ETH_MODER) |= ETH_MODER_RXEN | ETH_MODER_TXEN; + + /* Register interrupt handler */ + int_add (ETH_IRQ, eth_int); +} + +/* Returns pointer to next free buffer; NULL if none available */ +void *eth_get_tx_buf () +{ + eth_bd *bd; + unsigned long add; + + if(tx_full) + return (void *)0; + + bd = (eth_bd *)ETH_BD_BASE; + + if(bd[tx_next].len_status & ETH_TX_BD_READY) + return (void *)0; + + add = bd[tx_next].addr; + + tx_next = (tx_next + 1) & ETH_TXBD_NUM_MASK; + + if(tx_next == tx_last) + tx_full = 1; + + return (void *)add; +} + +/* Send a packet at address */ +void eth_send (void *buf, unsigned long len) +{ + eth_bd *bd; + + bd = (eth_bd *)ETH_BD_BASE; + + bd[tx_last].addr = (unsigned long)buf; + bd[tx_last].len_status &= 0x0000ffff & ~ETH_TX_BD_STATS; + bd[tx_last].len_status |= len << 16 | ETH_TX_BD_READY; + + tx_last = (tx_last + 1) & ETH_TXBD_NUM_MASK; + tx_full = 0; +} + +/* Waits for packet and pass it to the upper layers */ +unsigned long eth_rx (void) +{ + eth_bd *bd; + unsigned long len = 0; + + bd = (eth_bd *)ETH_BD_BASE + ETH_TXBD_NUM; + + while(1) { + + int bad = 0; + + if(bd[rx_next].len_status & ETH_RX_BD_EMPTY) + return len; + + if(bd[rx_next].len_status & ETH_RX_BD_OVERRUN) { + printf("eth rx: ETH_RX_BD_OVERRUN\n"); + bad = 1; + } + if(bd[rx_next].len_status & ETH_RX_BD_INVSIMB) { + printf("eth rx: ETH_RX_BD_INVSIMB\n"); + bad = 1; + } + if(bd[rx_next].len_status & ETH_RX_BD_DRIBBLE) { + printf("eth rx: ETH_RX_BD_DRIBBLE\n"); + bad = 1; + } + if(bd[rx_next].len_status & ETH_RX_BD_TOOLONG) { + printf("eth rx: ETH_RX_BD_TOOLONG\n"); + bad = 1; + } + if(bd[rx_next].len_status & ETH_RX_BD_SHORT) { + printf("eth rx: ETH_RX_BD_SHORT\n"); + bad = 1; + } + if(bd[rx_next].len_status & ETH_RX_BD_CRCERR) { + printf("eth rx: ETH_RX_BD_CRCERR\n"); + bad = 1; + } + if(bd[rx_next].len_status & ETH_RX_BD_LATECOL) { + printf("eth rx: ETH_RX_BD_LATECOL\n"); + bad = 1; + } + + if(!bad) { + receive((void *)bd[rx_next].addr, bd[rx_next].len_status >> 16); + len += bd[rx_next].len_status >> 16; + } + + bd[rx_next].len_status &= ~ETH_RX_BD_STATS; + bd[rx_next].len_status |= ETH_RX_BD_EMPTY; + + rx_next = (rx_next + 1) & ETH_RXBD_NUM_MASK; + } +} + +void eth_int_enable(void) +{ + REG32(ETH_REG_BASE + ETH_INT_MASK) = ETH_INT_MASK_TXB | + ETH_INT_MASK_TXE | + ETH_INT_MASK_RXF | + ETH_INT_MASK_RXE | + ETH_INT_MASK_BUSY | + ETH_INT_MASK_TXC | + ETH_INT_MASK_RXC; +} + +void eth_halt(void) +{ + /* Enable receiver and transmiter */ + REG32(ETH_REG_BASE + ETH_MODER) &= ~(ETH_MODER_RXEN | ETH_MODER_TXEN); +} +#endif
trunk/soc/sw/orpmon/drivers/eth.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/ata.c =================================================================== --- trunk/soc/sw/orpmon/drivers/ata.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/ata.c (revision 20) @@ -0,0 +1,571 @@ +/* + ata.c -- ATA driver + Copyright (C) 2002 Richard Herveille, rherveille@opencores.org + + This file is part of OpenRISC 1000 Reference Platform Monitor (ORPmon) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include + +/* get prototype for 'printf' + get IN_CLOCK (from 'board.h') +*/ +#include "common.h" +#include "ata.h" + + +/* + static constants (yuck, yuck, yuck) +*/ +static int usage[2] = {0, 0}; +static int hardsect_size[2] = {512, 512}; +static int current_pio_mode = 9999; + +/* + local defines +*/ +#define TYPE(devid) (devid >> 4) +#define REV(devid) (devid & 0xf) + +#define BASE(inode) ( (unsigned long) (MAJOR(inode->i_rdev) << 24) ) +#define DEVICE(inode) ( MINOR(inode->i_rdev) ) + +#define IN_CLK_MHZ (IN_CLK / 1000000) +#define TO_TICKS(time) ( ((time + (IN_CLK_MHZ >> 1)) / IN_CLK_MHZ) -1 ) + + +/* + A T A _ O P E N + + opens ata device; + - identifies ata-device-id + - programs ata-host + + MAJOR: atahost identification (base address) + MINOR: atadevice identification (MSB=0: device0, MSB=1: device1) +*/ +int ata_open(struct inode *inode, struct file *filp) +{ + unsigned int atahost, device; + unsigned short buf[256]; + unsigned short dev_pio; + unsigned long sectors; + + char txt[41]; + +printf( "Checking device-id\n" ); + /* check device-id (MINOR number) */ + if ( (device = DEVICE(inode)) > 1 ) + return EOPENIDEV; + +printf( "Searching for hostcontroller: " ); + /* get atahost id */ + atahost = ata_ioctl(inode, filp, ATA_IOCTL_IDENTIFY_HOST, 0); + if (atahost) + { + printf( "OCIDEC-%1d, revision 0x%02X found at 0x%08lX.\n", TYPE(atahost), REV(atahost), BASE(inode) ); + } + else + { + printf( "No OCIDEC device found.\n" ); + return EOPENIHOST; + } + + + /* check if the host has been opened already */ + if (!usage[device]++) + { +printf( "Opening device for the first time\n" ); + /* no, take device out of reset */ + ata_ioctl(inode, filp, ATA_IOCTL_SET_RST, CLR | ARG_HW_RST); + ata_ioctl(inode, filp, ATA_IOCTL_SET_RST, CLR | ARG_SW_RST); + + /* program PIO timing registers (set to PIO mode 0) */ + ata_ioctl(inode, filp, ATA_IOCTL_SET_PIO, ARG_PIO0); + + /* enable host controller (for old OCIDEC cores) */ + ata_ioctl(inode, filp, ATA_IOCTL_ENABLE_HOST, 0); + } + + /* select requested device */ + ata_ioctl(inode, filp, ATA_IOCTL_SELECT_DEVICE, 0); + +printf( "Executing IdentifyDevice command\n" ); + /* identify requested ata-devices */ + ata_ioctl(inode, filp, ATA_IOCTL_EXEC_CMD, IDENTIFY_DEVICE); + + /* read block from ata-device */ + buf[0] = 256; + ata_ioctl(inode, filp, ATA_IOCTL_READ, (unsigned long) buf); + + /* check if a valid device was found */ + /* bit 15 in identify_device word0 must be '0', + or be equal to 0x848a (CFA feature set) */ + if ( (buf[0] & 0x8000) && (buf[0] != 0x848a) ) + { + ata_release(inode, filp); + return EOPENNODEV; + } + + /* Then check specific configuration word */ + if (buf[0] == 0x848a) + printf( "Found CompactFLASH device.\n" ); + else + switch(buf[2]) { + case 0x37c8: + /* device does require SET_FEATURES + IDENTIFY_DEVICE response is incomplete */ + case 0x738c: + /* device does require SET_FEATURES + IDENTIFY_DEVICE response is complete */ + ata_ioctl(inode, filp, ATA_IOCTL_SET_FEATURES, 0); //FIXME + break; + case 0x8c73: + /* device does not require SET_FEATURES + IDENTIFY_DEVICE response is incomplete */ + case 0xc837: + /* device does not require SET_FEATURES + IDENTIFY_DEVICE response is complete */ + break; + + default: + ata_release(inode, filp); + return EOPENNODEV; + } + + /* checks ok */ + + /* display device model, serialnumber, and firmware revision */ + memcpy(txt, &buf[27], 40); + txt[40] = '\0'; + printf( "Model : %s\n", txt ); + + memcpy(txt, &buf[10], 20); + txt[20] = '\0'; + printf( "Serial : %s\n", txt ); + + memcpy( txt, &buf[23], 8); + txt[8] = '\0'; + printf( "Firmware rev: %s\n", txt ); + + /* display size in MBytes */ + sectors = (buf[61] << 16) | buf[60]; + printf( " %ld MBytes ", sectors >> 11 ); /* assuming 512bytes per sector */ + + /* get supported pio modes */ + dev_pio = buf[64]; + + /* program ocidec timing registers to highest possible pio mode */ + if (dev_pio & PIO4) + { + printf("PIO-4 supported\n"); + ata_ioctl(inode, filp, ATA_IOCTL_SET_PIO, ARG_PIO4); + } + else if (dev_pio & PIO3) + { + printf("PIO-3 supported\n"); + ata_ioctl(inode, filp, ATA_IOCTL_SET_PIO, ARG_PIO3); + } + else + { + printf("PIO-2 supported\n"); + ata_ioctl(inode, filp, ATA_IOCTL_SET_PIO, ARG_PIO2); + } + + return 0; +} + + +/* + A T A _ R E L E A S E + + closes ata device; +*/ +int ata_release(struct inode *inode, struct file *filp) +{ + /* decrease usage count */ + if (!--usage[DEVICE(inode)]) + { + /* reset atahost */ + ata_ioctl(inode, filp, ATA_IOCTL_SET_RST, SET | ARG_HW_RST); + } + + return 0; +} + + +/* + A T A _ R E A D _ D P O R T + + closes ata device; +*/ +int ata_read_dport(unsigned long base) +{ + /* device ready to transfer data ?? */ + while ( !ata_dev_datrdy(base) ); + + return REG32(base + ATA_DR); +} + + +/* + A T A _ I O C T L +*/ +int ata_ioctl(struct inode *inode, struct file *filp, unsigned command, unsigned long argument) +{ + unsigned long base = BASE(inode); + + switch (command) + { + case ATA_IOCTL_ENABLE_HOST: + /* enables the ATA host controller (sets IDE_EN bit) */ + { + REG32(base + ATA_CTRL) |= ATA_IDE_EN; + return 0; + } + + + case ATA_IOCTL_EXEC_CMD: + /* sends a command to the ATA device */ + { + while( ata_dev_busy(base) ); // wait for device ready + ata_cmd(base) = argument & 0xff; + return 0; + } + + + case ATA_IOCTL_READ: + { + unsigned short *buf_ptr = (short *)argument; + int n, cnt; + + cnt = buf_ptr[0]; + for (n=0; n < cnt; n++) + { + while( !ata_dev_datrdy(base) ); // wait for data + *buf_ptr++ = ata_read_dport(base); // read data + } + + return 0; + } + + + case ATA_IOCTL_IDENTIFY_HOST: + /* reads OCIDEC status register configuration bits */ + return (REG32(base + ATA_STAT) >> 24); + + + case ATA_IOCTL_SELECT_DEVICE: + /* selects ATA device */ + { + while( ata_dev_busy(base) ); // wait for device ready + + /* sets the DEV bit in the device/head register */ + if ( DEVICE(inode) ) + REG32(base + ATA_DHR) |= ATA_DHR_DEV; /* select device1 */ + else + REG32(base + ATA_DHR) &= ~ATA_DHR_DEV; /* select device0 */ + + return 0; + } + + + case ATA_IOCTL_SET_FTE: + { + /* set FTE bits */ + if ( MINOR(inode->i_rdev) ) + if (argument) + REG32(base + ATA_CTRL) |= ATA_IORDY_FTE0; + else + REG32(base + ATA_CTRL) &= ~ATA_IORDY_FTE0; + else + if (argument) + REG32(base + ATA_CTRL) |= ATA_IORDY_FTE1; + else + REG32(base + ATA_CTRL) &= ~ATA_IORDY_FTE1; + + return 0; + } + + + case ATA_IOCTL_SET_PIO: + /* programs the PIO timing registers */ + { + unsigned long timing; + unsigned short buf[256]; + + /* do we need to read the identify_device block ?? */ + if (argument & (ARG_PIO4 | ARG_PIO3) ) + { + /* identify requested ata-devices */ + ata_ioctl(inode, filp, ATA_IOCTL_EXEC_CMD, IDENTIFY_DEVICE); + + /* read block from ata-device */ + buf[0] = 256; + ata_ioctl(inode, filp, ATA_IOCTL_READ, (unsigned long) buf); + } + + /* program register transfer timing registers */ + /* set the slowest pio mode for register transfers */ + if (argument < current_pio_mode) + { + switch (argument) + { + case ARG_PIO4: + if ( (buf[53] & 0x01) && buf[68] ) + timing = ata_calc_pio_timing(buf[68], PIO4_RT1, PIO4_RT2, PIO4_RT4, PIO4_RT2I, PIO4_RT9); + else + timing = ata_calc_pio_timing(PIO4_RT0, PIO4_RT1, PIO4_RT2, PIO4_RT4, PIO4_RT2I, PIO4_RT9); + break; + + case ARG_PIO3: + if ( (buf[53] & 0x01) && buf[68] ) + timing = ata_calc_pio_timing(buf[68], PIO3_RT1, PIO3_RT2, PIO3_RT4, PIO3_RT2I, PIO3_RT9); + else + timing = ata_calc_pio_timing(PIO3_RT0, PIO3_RT1, PIO3_RT2, PIO3_RT4, PIO3_RT2I, PIO3_RT9); + break; + + case ARG_PIO2: + timing = ata_calc_pio_timing(PIO2_RT0, PIO2_RT1, PIO2_RT2, PIO2_RT4, PIO2_RT2I, PIO2_RT9); + break; + + case ARG_PIO1: + timing = ata_calc_pio_timing(PIO1_RT0, PIO1_RT1, PIO1_RT2, PIO1_RT4, PIO1_RT2I, PIO1_RT9); + break; + + default: /* PIO mode 0 */ + timing = ata_calc_pio_timing(PIO0_RT0, PIO0_RT1, PIO0_RT2, PIO0_RT4, PIO0_RT2I, PIO0_RT9); + break; + } + + /* program IORDY bit */ + if (argument & (ARG_PIO4 | ARG_PIO3) ) + REG32(base + ATA_CTRL) |= ATA_IORDY; + else + REG32(base + ATA_CTRL) &= ~ATA_IORDY; + + /* program register transfer timing registers */ + REG32(base + ATA_PCTR) = timing; + + current_pio_mode = argument; + } + + /* Program data transfer timing registers */ + if ( TYPE(ata_ioctl(inode, filp, ATA_IOCTL_IDENTIFY_HOST, 0)) > 1 ) + { + switch (argument) + { + case ARG_PIO4: + if ( (buf[53] & 0x01) && buf[68] ) + timing = ata_calc_pio_timing(buf[68], PIO4_DT1, PIO4_DT2, PIO4_DT4, PIO4_DT2I, PIO4_DT9); + else + timing = ata_calc_pio_timing(PIO4_DT0, PIO4_DT1, PIO4_DT2, PIO4_DT4, PIO4_DT2I, PIO4_DT9); + break; + + case ARG_PIO3: + if ( (buf[53] & 0x01) && buf[68] ) + timing = ata_calc_pio_timing(buf[68], PIO3_DT1, PIO3_DT2, PIO3_DT4, PIO3_DT2I, PIO3_DT9); + else + timing = ata_calc_pio_timing(PIO3_DT0, PIO3_DT1, PIO3_DT2, PIO3_DT4, PIO3_DT2I, PIO3_DT9); + break; + + case ARG_PIO2: + timing = ata_calc_pio_timing(PIO2_DT0, PIO2_DT1, PIO2_DT2, PIO2_DT4, PIO2_DT2I, PIO2_DT9); + break; + + case ARG_PIO1: + timing = ata_calc_pio_timing(PIO1_DT0, PIO1_DT1, PIO1_DT2, PIO1_DT4, PIO1_DT2I, PIO1_DT9); + break; + + default: /* PIO mode 0 */ + timing = ata_calc_pio_timing(PIO0_DT0, PIO0_DT1, PIO0_DT2, PIO0_DT4, PIO0_DT2I, PIO0_DT9); + break; + } + + /* program data transfer timing registers, set IORDY bit */ + if ( MINOR(inode->i_rdev) ) + { + REG32(base + ATA_PFTR1) = timing; + + /* program IORDY bit */ + if ( argument & (ARG_PIO4 | ARG_PIO3) ) + REG32(base + ATA_CTRL) |= ATA_IORDY_FTE1; + else + REG32(base + ATA_CTRL) &= ~ATA_IORDY_FTE1; + } + else + { + REG32(base + ATA_PFTR0) = timing; + + /* program IORDY bit */ + if ( argument & (ARG_PIO4 | ARG_PIO3) ) + REG32(base + ATA_CTRL) |= ATA_IORDY_FTE1; + else + REG32(base + ATA_CTRL) &= ~ATA_IORDY_FTE1; + } + + /* enable data transfer timing */ + ata_ioctl(inode, filp, ATA_IOCTL_SET_FTE, 1); + } + + return 0; + } + + + case ATA_IOCTL_SET_RST: + /* sets or clears reset bits */ + if (argument & SET) + switch (argument & ~SET) { + case ARG_HW_RST: /* ata hardware reset */ + REG32(base + ATA_CTRL) |= ATA_RST; + return 0; + + case ARG_SW_RST: /* ata software reset */ + REG32(base + ATA_DCR) |= ATA_DCR_RST; + return 0; + + case ARG_DEV_RST: /* ata device reset */ + REG32(base + ATA_CR) = DEVICE_RESET; + return 0; + + default: + return EIOCTLIARG; + } + else + { + switch(argument & ~SET) { + case ARG_HW_RST: /* ata hardware reset */ + REG32(base + ATA_CTRL) &= ~ATA_RST; + return 0; + + case ARG_SW_RST: /* ata software reset */ + REG32(base + ATA_DCR) &= ~ATA_DCR_RST; + return 0; + + case ARG_DEV_RST: /* ata device reset */ + return 0; + + default: + return EIOCTLIARG; + } + } + + + default: + printf( "FIXME: Unsupported IOCTL call %1d\n", command ); + return EINVAL; + } +} + + +unsigned long ata_calc_pio_timing(short t0, short t1, short t2, short t4, short t2i, short t9) +{ + int teoc; + + teoc = t0 - t1 - t2; + + if (teoc < 0) + teoc = 0; + + if (t9 > teoc) + teoc = t9; + + if (t2i > teoc) + teoc = t2i; + + t1 = TO_TICKS(t1); + t2 = TO_TICKS(t2); + t4 = TO_TICKS(t4); + teoc = TO_TICKS(teoc); + + return (teoc << ATA_TEOC) | (t4 << ATA_T4) | (t2 << ATA_T2) | (t1 << ATA_T1); +} + + +/* + A T A _ R E Q U E S T +*/ +int ata_request(struct inode *inode, struct file *filp, struct request *request) +{ + unsigned int device = MINOR(inode->i_rdev); + unsigned long base = BASE(inode); + unsigned int sector_size; + + /* get the sector size for the current device */ + sector_size = hardsect_size[device] >> 1; + + /* set the device */ + ata_ioctl(inode, filp, ATA_IOCTL_SELECT_DEVICE, device); + + /* get the base address */ + base = BASE(inode); + + switch (request->cmd) { + case READ: + { + register unsigned long i, n; + register unsigned short rd_data; + register char *buf_ptr; + + /* program ata-device registers */ + REG32(base + ATA_DHR) = ((request->sector >> 24) & ATA_DHR_H) | ATA_DHR_LBA; + REG32(base + ATA_CHR) = (request->sector >> 16) & 0xff; + REG32(base + ATA_CLR) = (request->sector >> 8) & 0xff; + REG32(base + ATA_SNR) = request->sector & 0xff; + + REG32(base + ATA_SCR) = request->nr_sectors; + + /* send 'read_sector(s)' command */ + REG32(base + ATA_CR) = READ_SECTORS; + + /* check status & error registers */ + if ( ata_astatus(base) & ATA_SR_ERR) + return -1; + + /* read data from devices and store it in the buffer */ + buf_ptr = request->buffer; + + for (n=0; n < request->nr_sectors; n++) + for (i=0; i < sector_size; i++) + { + rd_data = ata_read_dport(base); + + /* the data is byte reversed, swap high & low bytes */ + *buf_ptr++ = rd_data; + *buf_ptr++ = rd_data >> 8; + } + + return 0; + } + + + case WRITE: + /* check if device may be written to */ + if (filp->f_mode & FMODE_WRITE) + { + /* do the write stuff */ + } + else + return EINVAL; + + + default: + return EINVAL; + } + + return 0; +}
trunk/soc/sw/orpmon/drivers/ata.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/tick.c =================================================================== --- trunk/soc/sw/orpmon/drivers/tick.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/tick.c (revision 20) @@ -0,0 +1,30 @@ + +#include "common.h" +#include "support.h" +#include "spr_defs.h" + +void tick_init(void) +{ + mtspr(SPR_SR, SPR_SR_TEE | mfspr(SPR_SR)); + mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD)); +} + +void tick_interrupt(void) +{ + timestamp++; + mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD)); +} + +/* + sleep for n timer-ticks +*/ +void sleep(unsigned long sleep_time) +{ + unsigned long start_time; + + start_time = timestamp; + + while ( (timestamp - start_time) < sleep_time) + ; /* do nothing */ +} +
trunk/soc/sw/orpmon/drivers/tick.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/int.c =================================================================== --- trunk/soc/sw/orpmon/drivers/int.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/int.c (revision 20) @@ -0,0 +1,76 @@ +/* This file is part of test microkernel for OpenRISC 1000. */ +/* (C) 2001 Simon Srot, srot@opencores.org */ + +#include "common.h" +#include "support.h" +#include "spr_defs.h" +#include "int.h" + +#ifdef OR1K + +/* Interrupt handlers table */ +struct ihnd int_handlers[MAX_INT_HANDLERS]; + +/* Initialize routine */ +int int_init() +{ + int i; + + for(i = 0; i < MAX_INT_HANDLERS; i++) { + int_handlers[i].handler = 0; + } + + return 0; +} + +/* Add interrupt handler */ +int int_add(unsigned long vect, void (* handler)(void)) +{ + if(vect >= MAX_INT_HANDLERS) return -1; + + int_handlers[vect].handler = handler; + debug ("int_add %i: %08lx\n", vect, int_handlers[vect].handler); + + mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect)); + return 0; +} + +/* Disable interrupt */ +int int_disable(unsigned long vect) +{ + if(vect >= MAX_INT_HANDLERS) return -1; + + mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect)); + + return 0; +} + +/* Enable interrupt */ +int int_enable(unsigned long vect) +{ + if(vect >= MAX_INT_HANDLERS) return -1; + + mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect)); + + return 0; +} + +/* Main interrupt handler */ +void int_main(void) +{ + unsigned long picsr = mfspr(SPR_PICSR); + unsigned long i = 0; + + mtspr(SPR_PICSR, 0); + // printf ("int :%08lx\n", picsr); + + while(i < 32) { + if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) { + (*int_handlers[i].handler)(); + mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i)); + } + i++; + } +} + +#endif
trunk/soc/sw/orpmon/drivers/int.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/spi.c =================================================================== --- trunk/soc/sw/orpmon/drivers/spi.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/spi.c (revision 20) @@ -0,0 +1,33 @@ +#include "support.h" +#include "board.h" +#include "spi.h" + + +#define SPI_XMIT() \ + REG32(SPI_BASE + SPI_CTRL) |= SPI_CTRL_GO; \ + while(REG32(SPI_BASE + SPI_CTRL) & SPI_CTRL_BSY) + +void spi_init (int slave, int fq, int bit_nb, int lsb, int tx_pol, int rx_pol) +{ + int ctrl = 0; + + /* Set devider register to obtain desired serial clock frequency */ + REG32(SPI_BASE + SPI_DEVIDER) = IN_CLK/(fq*2) - 1; + + /* Set control register */ + ctrl = bit_nb << 3; + ctrl |= lsb ? SPI_CTRL_LSB : 0; + ctrl |= tx_pol ? SPI_CTRL_TX_NEGEDGE : 0; + ctrl |= rx_pol ? SPI_CTRL_RX_NEGEDGE : 0; + REG32(SPI_BASE + SPI_CTRL) = ctrl; + + /* Activate desired slave device */ + REG32(SPI_BASE + SPI_SS) = 1 << slave; +} + +unsigned long spi_xmit (unsigned long val) +{ + REG32(SPI_BASE + SPI_TX) = val; + SPI_XMIT(); + return REG32(SPI_BASE + SPI_RX); +}
trunk/soc/sw/orpmon/drivers/spi.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/uart.c =================================================================== --- trunk/soc/sw/orpmon/drivers/uart.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/uart.c (revision 20) @@ -0,0 +1,80 @@ +#include "support.h" +#include "board.h" +#include "uart.h" + +#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) + +#define WAIT_FOR_XMITR \ + do { \ + lsr = REG8(UART_BASE + UART_LSR); \ + } while ((lsr & BOTH_EMPTY) != BOTH_EMPTY) + +#define WAIT_FOR_THRE \ + do { \ + lsr = REG8(UART_BASE + UART_LSR); \ + } while ((lsr & UART_LSR_THRE) != UART_LSR_THRE) + +#define CHECK_FOR_CHAR (REG8(UART_BASE + UART_LSR) & UART_LSR_DR) + +#define WAIT_FOR_CHAR \ + do { \ + lsr = REG8(UART_BASE + UART_LSR); \ + } while ((lsr & UART_LSR_DR) != UART_LSR_DR) + +#define UART_TX_BUFF_LEN 32 +#define UART_TX_BUFF_MASK (UART_TX_BUFF_LEN -1) + +char tx_buff[UART_TX_BUFF_LEN]; +volatile int tx_level, rx_level; + +void uart_init(void) +{ + int divisor; + + /* Reset receiver and transmiter */ + REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_4; + + /* Disable all interrupts */ + REG8(UART_BASE + UART_IER) = 0x00; + + /* Set 8 bit char, 1 stop bit, no parity */ + REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY); + + /* Set baud rate */ + divisor = IN_CLK/(16 * UART_BAUD_RATE); + REG8(UART_BASE + UART_LCR) |= UART_LCR_DLAB; + REG8(UART_BASE + UART_DLL) = divisor & 0x000000ff; + REG8(UART_BASE + UART_DLM) = (divisor >> 8) & 0x000000ff; + REG8(UART_BASE + UART_LCR) &= ~(UART_LCR_DLAB); +} + +void uart_putc(char c) +{ + unsigned char lsr; + + WAIT_FOR_THRE; + REG8(UART_BASE + UART_TX) = c; + if(c == '\n') { + WAIT_FOR_THRE; + REG8(UART_BASE + UART_TX) = '\r'; + } + WAIT_FOR_XMITR; +} + +char uart_getc(void) +{ + unsigned char lsr; + char c; + + WAIT_FOR_CHAR; + c = REG8(UART_BASE + UART_RX); + return c; +} + +char uart_testc(void) +{ + if((REG8(UART_BASE + UART_LSR) & UART_LSR_DR) == UART_LSR_DR) + return REG8(UART_BASE + UART_RX); + else + return 0; +}
trunk/soc/sw/orpmon/drivers/uart.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/Makefile =================================================================== --- trunk/soc/sw/orpmon/drivers/Makefile (nonexistent) +++ trunk/soc/sw/orpmon/drivers/Makefile (revision 20) @@ -0,0 +1,12 @@ + +LIB = drivers.o +OBJS = int.o eth.o uart.o tick.o flash.o keyboard.o spi.o ata.o smc91111.o + +all: $(LIB) + +$(LIB): $(OBJS) + $(LD) -r -o $@ $(OBJS) + +.depend: Makefile $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ +sinclude .depend
trunk/soc/sw/orpmon/drivers/Makefile Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/soc/sw/orpmon/drivers/flash.c =================================================================== --- trunk/soc/sw/orpmon/drivers/flash.c (nonexistent) +++ trunk/soc/sw/orpmon/drivers/flash.c (revision 20) @@ -0,0 +1,215 @@ +#include "common.h" +#include "support.h" +#include "flash.h" + +int fl_init (void) +{ + unsigned long tmp; + reg_write(FLASH_BASE_ADDR, 0x00ff00ff); + reg_write(FLASH_BASE_ADDR, 0x00900090); + tmp = reg_read(FLASH_BASE_ADDR) << 8; + reg_write(FLASH_BASE_ADDR, 0x00900090); + tmp = tmp | reg_read(FLASH_BASE_ADDR + 4); + + debug("id = %08x ", tmp); + /* if (tmp != 0x89188918) { + printf ("bad ID\n"); + return 1; + } else debug ("good ID\n");*/ + reg_write(FLASH_BASE_ADDR, 0x00ff00ff); + + return 0; +} + +int check_error (unsigned long sr, unsigned long addr) +{ + if(check_error_bit(sr, FL_SR_ERASE_ERR)) { + printf ("erase error at %08lx\n", addr); + /* Clear status register */ + reg_write(FLASH_BASE_ADDR, 0x05D00050); + return 1; + } else if (check_error_bit(sr, FL_SR_PROG_ERR)) { + printf ("program error at %08lx\n", addr); + /* Clear status register */ + reg_write(FLASH_BASE_ADDR, 0x05D00050); + return 1; + } else if (check_error_bit(sr, FL_SR_PROG_LV)) { + printf ("low voltage error\n"); + /* Clear status register */ + reg_write(FLASH_BASE_ADDR, 0x05D00050); + return 1; + } else if (check_error_bit(sr, FL_SR_LOCK)) { + printf ("lock bit error at %08lx\n", addr); + /* Clear status register */ + reg_write(FLASH_BASE_ADDR, 0x05D00050); + return 1; + } + return 0; +} + +int fl_block_erase (unsigned long addr) +{ + unsigned long sr; + + reg_write(addr & ~(FLASH_BLOCK_SIZE - 1), 0x00200020); + reg_write(addr & ~(FLASH_BLOCK_SIZE - 1), 0x00D000D0); + + do { +#if 0 + reg_write(FLASH_BASE_ADDR, 0x00700070); +#endif + sr = reg_read(addr & ~(FLASH_BLOCK_SIZE - 1)); + } while (fl_wait_busy(sr)); + + /* Clear status register */ + reg_write(FLASH_BASE_ADDR, 0x00500050); + reg_write(FLASH_BASE_ADDR, 0x00ff00ff); +#ifndef CFG_IN_FLASH + return check_error(sr, addr); +#else + return 0; +#endif +} + +int fl_unlock_one_block (unsigned long addr) +{ + unsigned long sr = 0x0; + + reg_write((addr & ~(FLASH_BLOCK_SIZE - 1)), 0x00600060); + reg_write((addr & ~(FLASH_BLOCK_SIZE - 1)), 0x00d000d0); + + do { +#if 0 + reg_write(FLASH_BASE_ADDR, 0x00700070); +#endif + sr = reg_read(addr & ~(FLASH_BLOCK_SIZE - 1)); + } while (fl_wait_busy(sr)); + + /* Clear status register */ + reg_write(FLASH_BASE_ADDR, 0x00500050); + reg_write(FLASH_BASE_ADDR, 0x00ff00ff); + +#ifndef CFG_IN_FLASH + return check_error(sr, addr); +#else + return 0; +#endif +} + +int fl_unlock_blocks (void) +{ + unsigned long c; + unsigned int i; + + for (i = 0, c = FLASH_BASE_ADDR; i < (FLASH_SIZE / FLASH_BLOCK_SIZE); + i++, c += FLASH_BLOCK_SIZE) + if (fl_unlock_one_block (c)) return -1; + + return 0; +} + +int fl_word_program (unsigned long addr, unsigned long val) +{ + unsigned long sr; + + reg_write(addr, 0x00400040); + reg_write(addr, val); + do { +#if FLASH_ORG_16_1 /* bender */ + reg_write(FLASH_BASE_ADDR, 0x00700070); +#endif + sr = reg_read(addr & ~(FLASH_BLOCK_SIZE - 1)); + } while (fl_wait_busy(sr)); + /* Clear status register */ + + reg_write(FLASH_BASE_ADDR, 0x00500050); + reg_write(FLASH_BASE_ADDR, 0x00ff00ff); +#ifndef CFG_IN_FLASH + return check_error(sr, addr); +#else + return 0; +#endif +} + +/* erase = 1 (whole chip), erase = 2 (required only) */ +int fl_program (unsigned long src_addr, unsigned long dst_addr, unsigned long len, int erase, int verify) +{ + unsigned long tmp, taddr, tlen; + unsigned long i; + + if (erase) { + fl_unlock_blocks (); + + if (erase == 2) { + taddr = dst_addr & ~(FLASH_BLOCK_SIZE - 1); + tlen = (dst_addr + len + FLASH_BLOCK_SIZE - 1) / FLASH_BLOCK_SIZE; + } else { + taddr = FLASH_BASE_ADDR; + tlen = FLASH_SIZE / FLASH_BLOCK_SIZE; + } + + printf ("Erasing flash... "); + for (i = 0, tmp = taddr; i < tlen; i++, tmp += FLASH_BLOCK_SIZE) + if (fl_block_erase (tmp)) + return 1; + + printf ("done\n"); + + if (verify) { + printf ("Writing test pattern... "); + for (tmp = taddr; tmp < taddr + tlen * FLASH_BLOCK_SIZE; i++, tmp += INC_ADDR) + if (fl_word_program (tmp, tmp)) + return 1; + + printf ("done\n"); + + printf ("Checking... "); + + for (tmp = taddr; tmp < taddr + tlen * FLASH_BLOCK_SIZE; i++, tmp += INC_ADDR) + if (reg_read(tmp) != tmp) { + printf ("failed on location %08lx: %08lx\n", tmp, REG32(tmp)); + return 1; + } + printf ("done\n"); + } + } + + reg_write(FLASH_BASE_ADDR, 0x00ff00ff); + + printf ("Copying from %08lx-%08lx to %08lx-%08lx\n", src_addr, src_addr + len - 1, dst_addr, dst_addr + len - 1); + + tlen = len / 8; + tmp = 0; + + printf ("Programing"); + for (i = 0; i < len; i += INC_ADDR) { + if (fl_word_program (dst_addr + i, reg_read(src_addr + i))) + return 1; + + if (i > tmp) { + printf ("."); + tmp += tlen; + } + } + + printf (" done\n"); + + if (verify) { + printf ("Verifying"); + tmp = 0; + for (i = 0; i < len; i += INC_ADDR) { + if(reg_read(src_addr + i) != reg_read(dst_addr + i)) { + printf ("error at %08lx: %lx != %lx\n", src_addr + i, + reg_read(src_addr + i), reg_read(dst_addr + i)); + return 1; + } + if (i > tmp) { + printf ("."); + tmp += tlen; + } + } + } + + printf (" done\n"); + return 0; +}
trunk/soc/sw/orpmon/drivers/flash.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property

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