URL
https://opencores.org/ocsvn/pci/pci/trunk
Subversion Repositories pci
Compare Revisions
- This comparison shows the changes necessary to convert path
/pci/tags/rel_3/rtl/verilog
- from Rev 154 to Rev 74
- ↔ Reverse comparison
Rev 154 → Rev 74
/pci_target32_sm.v
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/pci_user_constants.v
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/pci_master32_sm.v
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/pci_target32_interface.v
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/wb_master.v
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/fifo_control.v
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/wbr_fifo_control.v
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/pciw_fifo_control.v
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/wbw_fifo_control.v
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/pci_bridge32.v
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/pci_tpram.v
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/wbw_wbr_fifos.v
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/top.v
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/pciw_pcir_fifos.v
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/wb_tpram.v
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/pci_target_unit.v
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/wb_slave_unit.v
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/meta_flop.v
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/delayed_sync.v
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/bus_commands.v
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/wb_addr_mux.v
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/wb_slave.v
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/pci_ram_16x40d.v
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/async_reset_flop.v
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/conf_space.v
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/pci_parity_check.v
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/mas_ch_state_crit.v
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/frame_crit.v
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/perr_en_crit.v
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/synchronizer_flop.v
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/mas_ad_en_crit.v
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/pci_target32_devs_crit.v
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/perr_crit.v
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/pci_io_mux.v
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/serr_crit.v
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/pci_target32_clk_en.v
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/decoder.v
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/pci_master32_sm_if.v
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/frame_load_crit.v
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/pci_target32_stop_crit.v
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/cur_out_reg.v
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/delayed_write_reg.v
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/serr_en_crit.v
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/irdy_out_crit.v
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/conf_cyc_addr_dec.v
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/cbe_en_crit.v
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/frame_en_crit.v
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/pci_in_reg.v
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/pci_decoder.v
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/par_crit.v
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/out_reg.v
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/timescale.v
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/pci_target32_trdy_crit.v
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/pci_rst_int.v
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/sync_module.v
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/pci_io_mux_ad_en_crit.v
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/pci_io_mux_ad_load_crit.v
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/mas_ad_load_crit.v
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/pci_constants.v
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