OpenCores
URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /pcie_ds_dma/trunk/soft/linux/application/wb_test
    from Rev 6 to Rev 19
    ↔ Reverse comparison
  •

Rev 6 → Rev 19

/src/work/wb_teststrm.h
173,7 → 173,7
 
bool isFirstCallStep;
 
void PrepareAdm( void );
void PrepareWb( void );
 
void PrepareAdmReg( char* fname );
 
/src/work/main.cpp
59,13 → 59,23
//#include "tf_teststrm.h"
//#include "tf_teststrmout.h"
//#include "useful.h"
#include "wb_teststrm.h"
#include "wb_teststrmout.h"
 
CL_WBPEX g_Board;
 
U32 isTwoTest=0;
 
void ShowPldInfo( CL_WBPEX *pBrd );
static volatile int exit_flag = 0;
 
void signa_handler(int signo)
{
exit_flag = 1;
}
 
 
void ShowWishboneInfo( CL_WBPEX *pBrd );
 
//
//=== Console
//
77,8 → 87,8
// анализ командной строки
setlocale( LC_ALL, "Russian" );
 
//TF_Test *pTest=NULL;
//TF_Test *pTest2=NULL;
TF_Test *pTest=NULL;
TF_Test *pTest2=NULL;
 
BRDCHAR* fname = argv[1];
BRDCHAR* fname2=NULL;
93,7 → 103,7
 
 
//printf( "Файл инициализации: %s\n", fname );
// try
try
{
CL_WBPEX *pBrd = &g_Board;
 
101,7 → 111,7
 
if( 0==ret )
{
BRDC_fprintf( stderr, _BRDC("Модуль AMBPEX открыт успешно\n") );
BRDC_fprintf( stderr, _BRDC("Board PEXDRV open succesfully\n") );
 
 
/*
118,21 → 128,21
 
} else
{
BRDC_fprintf( stderr, _BRDC("Ошибка при открытии модуля AMBPEX: ret=0x%.8X\n"), ret );
BRDC_fprintf( stderr, _BRDC("Error during open PEXDRV: ret=0x%.8X\n"), ret );
//getch();
exit(-1);
}
 
printf( "\nShowPldInfo\n" );
ShowPldInfo( pBrd );
}
}
//printf( "\nShowPldInfo\n" );
ShowWishboneInfo( pBrd );
//}
 
#if 0
 
//#if 0
if( fname[0]=='o' )
pTest = new TF_TestStrmOut( fname, &g_AMBPEX );
pTest = new WB_TestStrmOut( fname, pBrd );
else
pTest = new TF_TestStrm( fname, &g_AMBPEX );
pTest = new WB_TestStrm( fname, pBrd );
 
Sleep( 10 );
 
140,9 → 150,9
{
isTwoTest=1;
if( fname2[0]=='o' )
pTest2 = new TF_TestStrmOut( fname2, &g_AMBPEX );
pTest2 = new WB_TestStrmOut( fname2, pBrd );
else
pTest2 = new TF_TestStrm( fname2, &g_AMBPEX );
pTest2 = new WB_TestStrm( fname2, pBrd );
}
 
pTest->Prepare();
157,60 → 167,46
 
//int key;
int isFirstCallStep=1;
int isStopped = 0;
for( ; ; )
{
if( kbhit() )
{
int key=getch();
if( key==0x1B )
{
 
 
if( exit_flag )
{
if(!isStopped) {
pTest->Stop();
if( pTest2 )
if( pTest2 ) {
pTest2->Stop();
BRDC_fprintf( stderr, _BRDC("\n\nОтмена\n") );
}
BRDC_fprintf( stderr, _BRDC("\n\nCancel\n") );
isStopped = 1;
}
}
 
if( key=='i' )
{
pBrd->RegPokeInd( 4, TRDIND_DELAY_CTRL, 0x12 );
pBrd->RegPokeInd( 4, TRDIND_DELAY_CTRL, 0x10 );
g_DelayCnt--; BRDC_fprintf( stderr, "\n\ng_DelayCnt = %d ", g_DelayCnt );
}
if( exit_flag )
{
if(isStopped) {
 
if( key=='o' )
{
pBrd->RegPokeInd( 4, TRDIND_DELAY_CTRL, 0x13 );
pBrd->RegPokeInd( 4, TRDIND_DELAY_CTRL, 0x11 );
g_DelayCnt++; BRDC_fprintf( stderr, "\n\ng_DelayCnt = %d ", g_DelayCnt );
}
if( pTest->isComplete() ) {
 
}
ret=pTest->isComplete();
if( ret )
{
if( pTest2 )
{
ret=pTest2->isComplete();
if( ret )
break;
} else
{
break;
if( pTest2 ) {
if( pTest2->isComplete() )
break;
} else {
break;
}
}
}
 
}
 
 
 
 
//SetConsoleCursorPosition(hConsoleOut, rCursorPosition);
if( isFirstCallStep || isTwoTest )
{
 
BRDC_fprintf( stderr, _BRDC("%10s %10s %10s %10s %10s %10s %10s %10s\n"), _BRDC(""), _BRDC("BLOCK_WR"), _BRDC("BLOCK_RD"), _BRDC("BLOCK_OK"), _BRDC("BLOCK_ERR"), _BRDC("SPD_CURR"), _BRDC("SPD_AVR"), _BRDC("STATUS"));
BRDC_fprintf( stderr, _BRDC("\n"));
BRDC_fprintf( stdout, _BRDC("%10s %10s %10s %10s %10s %10s %10s %10s\n"), _BRDC(""), _BRDC("BLOCK_WR"), _BRDC("BLOCK_RD"), _BRDC("BLOCK_OK"), _BRDC("BLOCK_ERR"), _BRDC("SPD_CURR"), _BRDC("SPD_AVR"), _BRDC("STATUS"));
BRDC_fprintf( stdout, _BRDC("\n"));
}
 
if (isFirstCallStep)
259,11 → 255,12
 
//}
return 0;
#endif
//#endif
}
 
 
 
void ShowPldInfo( CL_WBPEX *pBrd )
void ShowWishboneInfo( CL_WBPEX *pBrd )
{
 
 
273,7 → 270,7
U32 block_ver_major, block_ver_minor;
const char *str;
 
BRDC_fprintf( stderr, _BRDC("Прошивка ПЛИС WB\r\n") );
BRDC_fprintf( stderr, _BRDC("FPGA WB\r\n") );
 
 
/*
297,7 → 294,7
d=pBrd->RegPeekInd( 0, 0x114 ); BRDC_fprintf( stderr, " Номер сборки прошивки ПЛИС: 0x%.4X\n", d );
*/
 
BRDC_fprintf( stderr, "\nИнформация о блоках управления:\n\n" );
BRDC_fprintf( stderr, "\nWB block info:\n\n" );
for( ii=0; ii<2; ii++ ) {
 
d= pBrd->wb_block_read( ii, 0 );
320,9 → 317,11
 
default: str="UNKNOW "; break;
}
//BRDC_fprintf( stderr, " %d 0x%.8X 0x%.8X \n", ii, d, d1 );
BRDC_fprintf( stderr, " %d 0x%.4X %s ", ii, block_id, str );
if( block_id>0 ) {
BRDC_fprintf( stderr, " MOD: %-2d VER: %d.%d ", block_id_mod, block_ver_major, block_ver_minor );
BRDC_fprintf( stderr, " MOD: %-2d VER: %d.%d \n", block_id_mod, block_ver_major, block_ver_minor );
} else {
BRDC_fprintf( stderr, "\n" );
}
/src/work/wb_teststrm.cpp
64,14 → 64,14
{
 
 
PrepareAdm();
PrepareWb();
 
rd0.trd=trdNo;
rd0.Strm=strmNo;
pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
// pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
 
bufIsvi = new U32[SizeBlockOfWords*2];
//pBrd->StreamInit( strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, 0, 0 );
pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, U32(0x3000),U32(1), 0, 1, U32(0) );
}
 
void WB_TestStrm::Start( void )
135,11 → 135,13
//BRDC_fprintf( stderr, "%10s %10d %10d %10d %10d\n", "FIFO_1 :", tr1.BlockWr, rd1.BlockRd, rd1.BlockOk, rd1.BlockError );
 
U32 status = 0; //pBrd->RegPeekDir( rd0.trd, 0 ) & 0xFFFF;
BRDC_fprintf( stderr, "%6s %3d %10d %10d %10d %10d %9.1f %10.1f 0x%.4X %d %4d %4f\r", "TRD :", rd0.trd, rd0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, IsviStatus, IsviCnt, rd0.fftTime_us );
rd0.BlockWr=pBrd->wb_block_read( 1, 0x11 );
 
BRDC_fprintf( stdout, "%6s %3d %10d %10d %10d %10d %9.1f %10.1f 0x%.4X %d %4d %4f\r", "TRD :", rd0.trd, rd0.BlockWr, rd0.BlockRd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, IsviStatus, IsviCnt, rd0.fftTime_us );
 
 
 
 
}
 
int WB_TestStrm::isComplete( void )
289,6 → 291,24
 
pBrd->RegPokeInd( 4, 0, 0x2038 );
*/
pBrd->StreamStart( rd0.Strm );
 
U32 val;
val=pBrd->wb_block_read( 1, 0 );
BRDC_fprintf( stderr, "ID=0x%.4X \n", val );
 
val=pBrd->wb_block_read( 1, 1 );
BRDC_fprintf( stderr, "VER=0x%.4X \n", val );
 
val=pBrd->wb_block_read( 1, 8 );
BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
 
pBrd->wb_block_write( 1, 9, 5 );
pBrd->wb_block_write( 1, 8, 0x6A0 );
 
val=pBrd->wb_block_read( 1, 8 );
BRDC_fprintf( stderr, "GEN_CTRL=0x%.4X \n", val );
 
rd0.time_last=rd0.time_start=0 ;//GetTickCount();
 
 
334,6 → 354,7
for( kk=0; kk<16; kk++ )
{
ret=pBrd->StreamGetBuf( pr->Strm, &ptr );
//ret=0;
if( ret )
{ // Проверка буфера стрима
 
395,40 → 416,22
}
 
 
void WB_TestStrm::PrepareAdm( void )
void WB_TestStrm::PrepareWb( void )
{
/*
U32 trd=trdNo;
U32 id, id_mod, ver;
BRDC_fprintf( stderr, "\nПодготовка тетрады\n" );
 
BRDC_fprintf( stderr, "\nPrepare TEST_GENERATE\n" );
 
id = pBrd->RegPeekInd( trd, 0x100 );
id_mod = pBrd->RegPeekInd( trd, 0x101 );
ver = pBrd->RegPeekInd( trd, 0x102 );
 
//pBrd->RegPokeInd( trd, 0, 0x2038 );
 
BRDC_fprintf( stderr, "\nТетрада %d ID: 0x%.2X MOD: %d VER: %d.%d \n\n",
trd, id, id_mod, (ver>>8) & 0xFF, ver&0xFF );
 
 
//if( fnameDDS )
// PrepareDDS();
 
 
if( isMainTest )
PrepareMain();
 
 
BlockMode = DataType <<8;
BlockMode |= DataFix <<7;
 
if( isTestCtrl )
PrepareTestCtrl();
//if( isTestCtrl )
{
pBrd->wb_block_write( 1, 9, 1 );
pBrd->wb_block_write( 1, 9, BlockMode );
}
 
if( isAdmReg )
PrepareAdmReg( fnameAdmReg );
 
 
IsviStatus=0;
440,7 → 443,6
isIsvi=1;
}
 
*/
}
 
 

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