OpenCores
URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /pcie_ds_dma/trunk/soft/linux/driver/pexdrv
    from Rev 19 to Rev 30
    ↔ Reverse comparison
  •

Rev 19 → Rev 30

/pexmodule.c
382,7 → 382,8
//err_msg(err_trace, "%s(%d)\n", __FUNCTION__, atomic_read(&pDevice->m_TotalIRQ));
 
flag = NextDmaTransfer(pDevice->m_DmaChannel[NumberOfChannel]);
if(!flag)
//if(!flag)
if( 0 )
{
DMA_CTRL_EXT CtrlExt;
CtrlExt.AsWhole = 0;
443,48 → 444,7
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = INSYS_VENDOR_ID,
.device = AMBPEX8_DEVID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = INSYS_VENDOR_ID,
.device = ADP201X1AMB_DEVID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = INSYS_VENDOR_ID,
.device = ADP201X1DSP_DEVID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = INSYS_VENDOR_ID,
.device = AMBPEXARM_DEVID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = INSYS_VENDOR_ID,
.device = AMBFMC106P_DEVID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = INSYS_VENDOR_ID,
.device = AMBFMC114V_DEVID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.vendor = INSYS_VENDOR_ID,
.device = AMBKU_SSCOS_DEVID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
 
{ },
};
 
/hardware.c
16,6 → 16,8
#include "ambpexregs.h"
#include "memory.h"
 
 
int g_isAdm=0;
//--------------------------------------------------------------------
 
int set_device_name(struct pex_device *brd, u16 dev_id, int index)
25,13 → 27,7
 
switch(dev_id) {
case AMBPEX5_DEVID: snprintf(brd->m_name, 128, "%s%d", "AMBPEX5", index); break;
case AMBPEX8_DEVID: snprintf(brd->m_name, 128, "%s%d", "AMBPEX8", index); break;
case ADP201X1AMB_DEVID: snprintf(brd->m_name, 128, "%s%d", "ADP201X1AMB", index); break;
case ADP201X1DSP_DEVID: snprintf(brd->m_name, 128, "%s%d", "ADP201X1DSP", index); break;
case AMBPEXARM_DEVID: snprintf(brd->m_name, 128, "%s%d", "D2XT005", index); break;
case AMBFMC106P_DEVID: snprintf(brd->m_name, 128, "%s%d", "AMBFMC106P", index); break;
case AMBFMC114V_DEVID: snprintf(brd->m_name, 128, "%s%d", "AMBFMC114V", index); break;
case AMBKU_SSCOS_DEVID: snprintf(brd->m_name, 128, "%s%d", "AMBKU_SSCOS", index); break;
 
default:
snprintf(brd->m_name, sizeof(brd->m_name), "%s%d", "Unknown", index); break;
}
83,15 → 79,7
 
dbg_msg(dbg_trace, "%s(): DeviceID = 0x%X, DeviceRev = 0x%X.\n", __FUNCTION__, deviceID, deviceRev);
 
if((AMBPEX8_DEVID != deviceID) &&
(ADP201X1AMB_DEVID != deviceID) &&
(AMBPEX5_DEVID != deviceID) &&
(AMBPEXARM_DEVID != deviceID) &&
(AMBFMC114V_DEVID != deviceID)) {
 
dbg_msg(dbg_trace, "%s(): Unsupported device id: 0x%X.\n", __FUNCTION__, deviceID);
return -ENODEV;
}
 
temp = ReadOperationWordReg(brd, PEMAINadr_PLD_VER);
 
139,6 → 127,7
 
dbg_msg(dbg_trace, "%s(): m_DmaChanMask = 0x%X\n", __FUNCTION__, brd->m_DmaChanMask);
 
 
// подготовим к работе ПЛИС ADM
dbg_msg(dbg_trace, "%s(): Prepare ADM PLD.\n", __FUNCTION__);
WriteOperationWordReg(brd,PEMAINadr_BRD_MODE, 0);
457,11 → 446,11
int DmaEnable(struct pex_device *brd, u32 AdmNumber, u32 TetrNumber)
{
int Status = 0;
u32 Value = 0;
Status = ReadRegData(brd, AdmNumber, TetrNumber, 0, &Value);
if(Status != 0) return Status;
Value |= 0x8; // DRQ enable
Status = WriteRegData(brd, AdmNumber, TetrNumber, 0, Value);
//u32 Value = 0;
//Status = ReadRegData(brd, AdmNumber, TetrNumber, 0, &Value);
//if(Status != 0) return Status;
//Value |= 0x8; // DRQ enable
//Status = WriteRegData(brd, AdmNumber, TetrNumber, 0, Value);
//err_msg(err_trace, "%s: MODE0 = 0x%X.\n", __FUNCTION__, Value);
return Status;
}
471,11 → 460,11
int DmaDisable(struct pex_device *brd, u32 AdmNumber, u32 TetrNumber)
{
int Status = 0;
u32 Value = 0;
Status = ReadRegData(brd, AdmNumber, TetrNumber, 0, &Value);
if(Status != 0) return Status;
Value &= 0xfff7; // DRQ disable
Status = WriteRegData(brd, AdmNumber, TetrNumber, 0, Value);
//u32 Value = 0;
//Status = ReadRegData(brd, AdmNumber, TetrNumber, 0, &Value);
//if(Status != 0) return Status;
//Value &= 0xfff7; // DRQ disable
//Status = WriteRegData(brd, AdmNumber, TetrNumber, 0, Value);
return Status;
}
 
615,7 → 604,7
brd->m_DmaIrqEnbl = enbl;
 
tetr_num = GetTetrNum(brd->m_DmaChannel[NumberOfChannel]);
Status = DmaDisable(brd, 0, tetr_num);
//Status = DmaDisable(brd, 0, tetr_num);
CompleteDmaTransfer(brd->m_DmaChannel[NumberOfChannel]);
 
return Status;

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