OpenCores
URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /pcie_ds_dma/trunk/soft/linux/driver/pexdrv
    from Rev 9 to Rev 19
    Reverse comparison

Rev 9 → Rev 19

/ioctlrw.c
291,9 → 291,9
TetrNumber = pKernMemDscr->LocalAddr & 0xff;
Address = AdmNumber*ADM_SIZE + TetrNumber*TETRAD_SIZE + TRDadr_DATA*REG_SIZE;
 
SetDmaLocalAddress(dma, Address);
SetAdmTetr(dma, AdmNumber, TetrNumber);
error = SetDmaMode(brd, i, AdmNumber, TetrNumber);
//SetDmaLocalAddress(dma, Address);
//SetAdmTetr(dma, AdmNumber, TetrNumber);
//error = SetDmaMode(brd, i, AdmNumber, TetrNumber);
 
dbg_msg(dbg_trace, "%s(): 4\n", __FUNCTION__);
 
367,6 → 367,7
AMB_START_DMA_CHANNEL StartDscr;
PAMB_START_DMA_CHANNEL pStartDscr = &StartDscr;
 
printk("<0>ioctl_start_mem: Entered.\n");
down(&brd->m_BoardSem);
 
if( copy_from_user((void *)&StartDscr, (void *)arg, sizeof(AMB_START_DMA_CHANNEL))) {
391,6 → 392,7
Status = HwStartDmaTransfer(brd, pStartDscr->DmaChanNum);
 
up(&brd->m_BoardSem);
printk("<0>ioctl_start_mem: exit Status=0x%.8X \n", Status );
 
return Status;
}
508,7 → 510,7
AMB_SET_DMA_CHANNEL MemDscr;
PAMB_SET_DMA_CHANNEL pMemDscr = &MemDscr;
 
//printk("<0>IoctlSetDirMem: Entered.\n");
printk("<0>IoctlSetDirMem: Entered.\n");
down(&brd->m_BoardSem);
 
// get the user buffer
545,6 → 547,7
AMB_SET_DMA_CHANNEL MemDscr;
PAMB_SET_DMA_CHANNEL pMemDscr = &MemDscr;
 
printk("<0>IoctlSetSrcMem: Entered.\n");
down(&brd->m_BoardSem);
 
// get the user buffer
562,12 → 565,17
}
 
i = pMemDscr->DmaChanNum;
AdmNumber = pMemDscr->Param >> 16;
TetrNumber = pMemDscr->Param & 0xff;
Address = AdmNumber * ADM_SIZE + TetrNumber * TETRAD_SIZE + TRDadr_DATA * REG_SIZE;
//AdmNumber = pMemDscr->Param >> 16;
//TetrNumber = pMemDscr->Param & 0xff;
//Address = AdmNumber * ADM_SIZE + TetrNumber * TETRAD_SIZE + TRDadr_DATA * REG_SIZE;
 
AdmNumber=0;
TetrNumber=0;
Address = pMemDscr->Param;
SetDmaLocalAddress(brd->m_DmaChannel[i], Address);
SetAdmTetr(brd->m_DmaChannel[i], AdmNumber, TetrNumber);
Status = SetDmaMode(brd, i, AdmNumber, TetrNumber);
//Status = SetDmaMode(brd, i, AdmNumber, TetrNumber);
Status=0;
 
up(&brd->m_BoardSem);
 
/dmachan.c
875,7 → 875,7
 
int SetDmaDirection(struct CDmaChannel *dma, u32 DmaDirection)
{
//printk("<0>%s()\n", __FUNCTION__);
printk("<0>%s()\n", __FUNCTION__);
switch(DmaDirection)
{
case 1:
/hardware.c
565,6 → 565,7
ModeExt.AsWhole = ReadOperationWordReg(brd, PEFIFOadr_FIFO_CTRL + FifoAddr);
ModeExt.ByBits.SGModeEnbl = 1;
ModeExt.ByBits.DemandMode = 1;
//ModeExt.ByBits.DemandMode = 0;
ModeExt.ByBits.IntEnbl = 1;
ModeExt.ByBits.Dir = DmaDirection;
WriteOperationWordReg(brd, PEFIFOadr_FIFO_CTRL + FifoAddr, ModeExt.AsWhole);
578,7 → 579,7
 
adm_num = GetAdmNum(brd->m_DmaChannel[NumberOfChannel]);
tetr_num = GetTetrNum(brd->m_DmaChannel[NumberOfChannel]);
Status = DmaEnable(brd, adm_num, tetr_num);
//Status = DmaEnable(brd, adm_num, tetr_num);
 
return Status;
}

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