URL
https://opencores.org/ocsvn/phr/phr/trunk
Subversion Repositories phr
Compare Revisions
- This comparison shows the changes necessary to convert path
/phr/trunk/codigo/demos
- from Rev 427 to Rev 428
- ↔ Reverse comparison
Rev 427 → Rev 428
/pong/pong_top.unroutes
File deleted
/pong/ps2_cntrl.v
File deleted
pong/ps2_cntrl.v
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## -1 +0,0 ##
-*
\ No newline at end of property
Index: pong/pongPHR.cfi
===================================================================
--- pong/pongPHR.cfi (revision 427)
+++ pong/pongPHR.cfi (nonexistent)
@@ -1,11 +0,0 @@
-# PROMGEN: Xilinx Prom Generator M.70d
-# Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
-
-SOFTWARE_VERSION M.70d
-DATE 5/ 7/2014 - 20:16
-SOURCE /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/pongPHR.mcs
-DEVICE XCF02S
-DATA_WIDTH 8
-FILL_DATA 0xFF
-SIGNATURE 0x01BE497E
-START_ADDRESS 0x00000000 END_ADDRESS 0x00024831 DIRECTION_UP "/home/lguanuco/opencores/phr/trunk/codigo/demos/pong/pong_top.bit" 3s200avq100
Index: pong/vga_interface.vhd
===================================================================
--- pong/vga_interface.vhd (revision 427)
+++ pong/vga_interface.vhd (nonexistent)
@@ -1,82 +0,0 @@
-------------------------------------------------------------------
--- Copyright (c) 1995-2005 Xilinx, Inc.
--- All Right Reserved.
-------------------------------------------------------------------
--- ____ ____
--- / /\/ /
--- /___/ \ / Vendor: Xilinx
--- \ \ \/ Version : 8.1i
--- \ \ Application :
--- / / Filename : vga_interface.vhd
--- /___/ /\ Timestamp : 9/20/2005 11:15:08
--- \ \ / \
--- \___\/\___\
---
---
--- This Entity interprets the color output to the VGA monitor
-
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-use IEEE.STD_LOGIC_ARITH.ALL;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
-entity vga_int is Port (
- CLK : in std_logic;
- COLOR: in std_logic_vector ( 1 downto 0 );
- VSYNCH_IN: in std_logic;
- HSYNCH_IN: in std_logic;
- RED: out std_logic;
- BLUE: out std_logic;
- GREEN: out std_logic;
- VSYNCH_OUT: out std_logic;
- HSYNCH_OUT: out std_logic
- );
-end vga_int;
-
-architecture behavioral of vga_int is
-
-signal VSYNCH_PIPE: std_logic;
-signal HSYNCH_PIPE: std_logic;
-
-begin
-
-PIPELINE: process (CLK)
-begin
- if ( CLK = '1' and CLK'event ) then
- VSYNCH_OUT <= VSYNCH_PIPE;
- HSYNCH_OUT <= HSYNCH_PIPE;
- HSYNCH_PIPE <= HSYNCH_IN;
- VSYNCH_PIPE <= VSYNCH_IN;
- end if;
-end process;
-
-COLOR_LUT: process (CLK)
-begin
- if ( CLK = '1' and CLK'event ) then
- RED <= '0';
- GREEN <= '0';
- BLUE <= '0';
-
- case COLOR is
- when "00" =>
- RED <= '0';
- GREEN <= '0';
- BLUE <= '0';
- when "01" =>
- RED <= '1';
- GREEN <= '0';
- BLUE <= '0';
- when "10" =>
- RED <= '0';
- GREEN <= '0';
- BLUE <= '1';
- when "11" =>
- RED <= '1';
- GREEN <= '1';
- BLUE <= '1';
- when others => NULL;
- end case;
- end if;
-end process;
-
-end behavioral;
\ No newline at end of file
pong/vga_interface.vhd
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-*
\ No newline at end of property
Index: pong/xst/work/sub00/vhpl06.vho
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Index: pong/xst/work/sub00/vhpl06.vho
===================================================================
--- pong/xst/work/sub00/vhpl06.vho (revision 427)
+++ pong/xst/work/sub00/vhpl06.vho (nonexistent)
pong/xst/work/sub00/vhpl06.vho
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Index: pong/xst/work/sub00/vhpl07.vho
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Index: pong/xst/work/sub00/vhpl07.vho
===================================================================
--- pong/xst/work/sub00/vhpl07.vho (revision 427)
+++ pong/xst/work/sub00/vhpl07.vho (nonexistent)
pong/xst/work/sub00/vhpl07.vho
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Index: pong/xst/work/sub00/vhpl00.vho
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Index: pong/xst/work/sub00/vhpl00.vho
===================================================================
--- pong/xst/work/sub00/vhpl00.vho (revision 427)
+++ pong/xst/work/sub00/vhpl00.vho (nonexistent)
pong/xst/work/sub00/vhpl00.vho
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Index: pong/xst/work/sub00/vhpl01.vho
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Index: pong/xst/work/sub00/vhpl01.vho
===================================================================
--- pong/xst/work/sub00/vhpl01.vho (revision 427)
+++ pong/xst/work/sub00/vhpl01.vho (nonexistent)
pong/xst/work/sub00/vhpl01.vho
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Index: pong/xst/work/sub00/vhpl02.vho
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Index: pong/xst/work/sub00/vhpl02.vho
===================================================================
--- pong/xst/work/sub00/vhpl02.vho (revision 427)
+++ pong/xst/work/sub00/vhpl02.vho (nonexistent)
pong/xst/work/sub00/vhpl02.vho
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-application/octet-stream
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Index: pong/xst/work/sub00/vhpl03.vho
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Index: pong/xst/work/sub00/vhpl03.vho
===================================================================
--- pong/xst/work/sub00/vhpl03.vho (revision 427)
+++ pong/xst/work/sub00/vhpl03.vho (nonexistent)
pong/xst/work/sub00/vhpl03.vho
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-application/octet-stream
\ No newline at end of property
Index: pong/xst/work/sub00/vhpl04.vho
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Index: pong/xst/work/sub00/vhpl04.vho
===================================================================
--- pong/xst/work/sub00/vhpl04.vho (revision 427)
+++ pong/xst/work/sub00/vhpl04.vho (nonexistent)
pong/xst/work/sub00/vhpl04.vho
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Index: pong/xst/work/sub00/vhpl05.vho
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Index: pong/xst/work/sub00/vhpl05.vho
===================================================================
--- pong/xst/work/sub00/vhpl05.vho (revision 427)
+++ pong/xst/work/sub00/vhpl05.vho (nonexistent)
pong/xst/work/sub00/vhpl05.vho
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\ No newline at end of property
Index: pong/xst/work/hdllib.ref
===================================================================
--- pong/xst/work/hdllib.ref (revision 427)
+++ pong/xst/work/hdllib.ref (nonexistent)
@@ -1,12 +0,0 @@
-MO PS2_CTRL NULL ps2_cntrl.v vlg15/_p_s2___c_t_r_l.bin 1399504478
-AR testram behavioral /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/testram.vhd sub00/vhpl03 1399504481
-AR vga_int behavioral /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vga_interface.vhd sub00/vhpl07 1399504485
-MO game_title NULL game_title.v vlg13/game__title.bin 1399504478
-EN cntrl NULL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/pong_cntrl.vhd sub00/vhpl04 1399504482
-AR cntrl static_display /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/pong_cntrl.vhd sub00/vhpl05 1399504483
-EN vga_int NULL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vga_interface.vhd sub00/vhpl06 1399504484
-AR vgacore behavioral /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vgacore_multi.vhd sub00/vhpl01 1399504479
-MO pong_top NULL pong_top.vf vlg26/pong__top.bin 1399504478
-MO read_ps2 NULL read_ps2.v vlg14/read__ps2.bin 1399504478
-EN testram NULL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/testram.vhd sub00/vhpl02 1399504480
-EN vgacore NULL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vgacore_multi.vhd sub00/vhpl00 1399504478
Index: pong/xst/work/vlg13/game__title.bin
===================================================================
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svn:mime-type = application/octet-stream
Index: pong/xst/work/vlg13/game__title.bin
===================================================================
--- pong/xst/work/vlg13/game__title.bin (revision 427)
+++ pong/xst/work/vlg13/game__title.bin (nonexistent)
pong/xst/work/vlg13/game__title.bin
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## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: pong/xst/work/vlg14/read__ps2.bin
===================================================================
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Index: pong/xst/work/vlg14/read__ps2.bin
===================================================================
--- pong/xst/work/vlg14/read__ps2.bin (revision 427)
+++ pong/xst/work/vlg14/read__ps2.bin (nonexistent)
pong/xst/work/vlg14/read__ps2.bin
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-application/octet-stream
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Index: pong/xst/work/vlg15/_p_s2___c_t_r_l.bin
===================================================================
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Index: pong/xst/work/vlg15/_p_s2___c_t_r_l.bin
===================================================================
--- pong/xst/work/vlg15/_p_s2___c_t_r_l.bin (revision 427)
+++ pong/xst/work/vlg15/_p_s2___c_t_r_l.bin (nonexistent)
pong/xst/work/vlg15/_p_s2___c_t_r_l.bin
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-application/octet-stream
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Index: pong/xst/work/vlg26/pong__top.bin
===================================================================
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Index: pong/xst/work/vlg26/pong__top.bin
===================================================================
--- pong/xst/work/vlg26/pong__top.bin (revision 427)
+++ pong/xst/work/vlg26/pong__top.bin (nonexistent)
pong/xst/work/vlg26/pong__top.bin
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Index: pong/xst/work/hdpdeps.ref
===================================================================
--- pong/xst/work/hdpdeps.ref (revision 427)
+++ pong/xst/work/hdpdeps.ref (nonexistent)
@@ -1,33 +0,0 @@
-V3 14
-FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/pong_cntrl.vhd 2005/09/23.19:47:51 M.70d
-EN work/cntrl 1399504482 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/pong_cntrl.vhd \
- PB ieee/std_logic_1164 1284609568 PB ieee/std_logic_arith 1284609569 \
- PB ieee/STD_LOGIC_UNSIGNED 1284609570
-AR work/cntrl/static_display 1399504483 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/pong_cntrl.vhd \
- EN work/cntrl 1399504482 CP vgacore CP testram
-FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/testram.vhd 2005/09/23.19:47:51 M.70d
-EN work/testram 1399504480 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/testram.vhd \
- PB ieee/std_logic_1164 1284609568 PB ieee/std_logic_arith 1284609569 \
- PB ieee/STD_LOGIC_UNSIGNED 1284609570
-AR work/testram/behavioral 1399504481 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/testram.vhd \
- EN work/testram 1399504480
-FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vgacore_multi.vhd 2005/09/23.19:47:51 M.70d
-EN work/vgacore 1399504478 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vgacore_multi.vhd \
- PB ieee/std_logic_1164 1284609568 PB ieee/std_logic_arith 1284609569 \
- PB ieee/STD_LOGIC_UNSIGNED 1284609570
-AR work/vgacore/behavioral 1399504479 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vgacore_multi.vhd \
- EN work/vgacore 1399504478
-FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vga_interface.vhd 2005/09/23.19:47:51 M.70d
-EN work/vga_int 1399504484 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vga_interface.vhd \
- PB ieee/std_logic_1164 1284609568 PB ieee/std_logic_arith 1284609569 \
- PB ieee/STD_LOGIC_UNSIGNED 1284609570
-AR work/vga_int/behavioral 1399504485 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/pong/vga_interface.vhd \
- EN work/vga_int 1399504484
Index: pong/pong_top.prj
===================================================================
--- pong/pong_top.prj (revision 427)
+++ pong/pong_top.prj (nonexistent)
@@ -1,8 +0,0 @@
-vhdl work "vgacore_multi.vhd"
-vhdl work "testram.vhd"
-verilog work "ps2_cntrl.v"
-vhdl work "vga_interface.vhd"
-verilog work "read_ps2.v"
-vhdl work "pong_cntrl.vhd"
-verilog work "game_title.v"
-verilog work "pong_top.vf"
Index: pong/webtalk_pn.xml
===================================================================
--- pong/webtalk_pn.xml (revision 427)
+++ pong/webtalk_pn.xml (nonexistent)
@@ -1,47 +0,0 @@
-
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Index: pong/pong_top.ptwx
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--- pong/pong_top.ptwx (revision 427)
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-Autotimespec constraint for clock net clk_ic4_BUFGP Autotimespec constraint for clock net cntrl_inst/VGA1/VCLK Autotimespec constraint for clock net cntrl_inst/VCLK Autotimespec constraint for clock net read_ps2_inst/ps2_ctrl/filter_clk 0 INFO:Timing:2761 - N/A entries in the Constraints List may indicate that the constraint is not analyzed due to the following: No paths covered by this constraint; Other constraints intersect with this constraint; or This constraint was disabled by a Path Tracing Control. Please run the Timespec Interaction Report (TSI) via command line (trce tsi) or Timing Analyzer GUI.
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Index: pong/pong_top.bgn
===================================================================
--- pong/pong_top.bgn (revision 427)
+++ pong/pong_top.bgn (nonexistent)
@@ -1,120 +0,0 @@
-Release 12.3 - Bitgen M.70d (lin)
-Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
-Loading device for application Rf_Device from file '3s200a.nph' in environment
-/opt/Xilinx/12.3/ISE_DS/ISE/.
- "pong_top" is an NCD, version 3.2, device xc3s200a, package vq100, speed -4
-Opened constraints file pong_top.pcf.
-
-Wed May 7 20:15:19 2014
-
-/opt/Xilinx/12.3/ISE_DS/ISE/bin/lin/unwrapped/bitgen -intstyle ise -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g Reset_on_err:No -g ConfigRate:25 -g ProgPin:PullUp -g DonePin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No -g en_sw_gsr:No -g en_porb:Yes -g drive_awake:No -g sw_clk:Startupclk -g sw_gwe_cycle:5 -g sw_gts_cycle:4 pong_top.ncd
-
-Summary of Bitgen Options:
-+----------------------+----------------------+
-| Option Name | Current Setting |
-+----------------------+----------------------+
-| Compress | (Not Specified)* |
-+----------------------+----------------------+
-| Readback | (Not Specified)* |
-+----------------------+----------------------+
-| CRC | Enable** |
-+----------------------+----------------------+
-| DebugBitstream | No** |
-+----------------------+----------------------+
-| ConfigRate | 25 |
-+----------------------+----------------------+
-| StartupClk | Cclk** |
-+----------------------+----------------------+
-| DonePin | Pullup** |
-+----------------------+----------------------+
-| ProgPin | Pullup** |
-+----------------------+----------------------+
-| TckPin | Pullup** |
-+----------------------+----------------------+
-| TdiPin | Pullup** |
-+----------------------+----------------------+
-| TdoPin | Pullup** |
-+----------------------+----------------------+
-| TmsPin | Pullup** |
-+----------------------+----------------------+
-| UnusedPin | Pulldown** |
-+----------------------+----------------------+
-| GWE_cycle | 6** |
-+----------------------+----------------------+
-| GTS_cycle | 5** |
-+----------------------+----------------------+
-| LCK_cycle | NoWait** |
-+----------------------+----------------------+
-| DONE_cycle | 4** |
-+----------------------+----------------------+
-| Persist | No* |
-+----------------------+----------------------+
-| DriveDone | No** |
-+----------------------+----------------------+
-| DonePipe | No** |
-+----------------------+----------------------+
-| Security | None** |
-+----------------------+----------------------+
-| UserID | 0xFFFFFFFF** |
-+----------------------+----------------------+
-| ActivateGclk | No* |
-+----------------------+----------------------+
-| ActiveReconfig | No* |
-+----------------------+----------------------+
-| PartialMask0 | (Not Specified)* |
-+----------------------+----------------------+
-| PartialMask1 | (Not Specified)* |
-+----------------------+----------------------+
-| PartialMask2 | (Not Specified)* |
-+----------------------+----------------------+
-| PartialGclk | (Not Specified)* |
-+----------------------+----------------------+
-| PartialLeft | (Not Specified)* |
-+----------------------+----------------------+
-| PartialRight | (Not Specified)* |
-+----------------------+----------------------+
-| drive_awake | No** |
-+----------------------+----------------------+
-| Reset_on_err | No** |
-+----------------------+----------------------+
-| suspend_filter | Yes* |
-+----------------------+----------------------+
-| en_sw_gsr | No** |
-+----------------------+----------------------+
-| en_suspend | No* |
-+----------------------+----------------------+
-| en_porb | Yes** |
-+----------------------+----------------------+
-| sw_clk | Startupclk** |
-+----------------------+----------------------+
-| sw_gwe_cycle | 5** |
-+----------------------+----------------------+
-| sw_gts_cycle | 4** |
-+----------------------+----------------------+
-| glutmask | Yes* |
-+----------------------+----------------------+
-| next_config_addr | 0x00000000* |
-+----------------------+----------------------+
-| next_config_new_mode | No* |
-+----------------------+----------------------+
-| next_config_boot_mode | 001* |
-+----------------------+----------------------+
-| next_config_register_write | Enable* |
-+----------------------+----------------------+
-| ICAP_Enable | Auto* |
-+----------------------+----------------------+
-| IEEE1532 | No* |
-+----------------------+----------------------+
-| Binary | No** |
-+----------------------+----------------------+
- * Default setting.
- ** The specified setting matches the default setting.
-
-There were 0 CONFIG constraint(s) processed from pong_top.pcf.
-
-
-Running DRC.
-DRC detected 0 errors and 0 warnings.
-Creating bit map...
-Saving bit stream in "pong_top.bit".
-Bitstream generation is complete.
Index: pong/pong_top.ngc
===================================================================
--- pong/pong_top.ngc (revision 427)
+++ pong/pong_top.ngc (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
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