URL
https://opencores.org/ocsvn/phr/phr/trunk
Subversion Repositories phr
Compare Revisions
- This comparison shows the changes necessary to convert path
/phr/trunk/codigo/demos
- from Rev 430 to Rev 431
- ↔ Reverse comparison
Rev 430 → Rev 431
/projects/BtnDemo/BtnDemo_map.map
File deleted
/projects/BtnDemo/BtnDemo.dhp
File deleted
\ No newline at end of file
/projects/BtnDemo/BtnDemo.syr
File deleted
/projects/BtnDemo/BtnDemo.xst
File deleted
/projects/BtnDemo/BtnDemo.vhd
File deleted
/projects/BtnDemo/xst/work/sub00/vhpl00.vho
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
projects/BtnDemo/xst/work/sub00/vhpl00.vho
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Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/xst/work/sub00/vhpl01.vho
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: projects/BtnDemo/xst/work/sub00/vhpl01.vho
===================================================================
--- projects/BtnDemo/xst/work/sub00/vhpl01.vho (revision 430)
+++ projects/BtnDemo/xst/work/sub00/vhpl01.vho (nonexistent)
projects/BtnDemo/xst/work/sub00/vhpl01.vho
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/xst/work/hdllib.ref
===================================================================
--- projects/BtnDemo/xst/work/hdllib.ref (revision 430)
+++ projects/BtnDemo/xst/work/hdllib.ref (nonexistent)
@@ -1,2 +0,0 @@
-EN btndemo NULL /home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd sub00/vhpl00 1398896049
-AR btndemo behavioral /home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd sub00/vhpl01 1398896050
Index: projects/BtnDemo/xst/work/hdpdeps.ref
===================================================================
--- projects/BtnDemo/xst/work/hdpdeps.ref (revision 430)
+++ projects/BtnDemo/xst/work/hdpdeps.ref (nonexistent)
@@ -1,9 +0,0 @@
-V3 4
-FL /home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd 2004/07/06.17:44:56 M.70d
-EN work/BtnDemo 1398896049 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd \
- PB ieee/std_logic_1164 1284609568 PB ieee/std_logic_arith 1284609569 \
- PB ieee/STD_LOGIC_UNSIGNED 1284609570
-AR work/BtnDemo/Behavioral 1398896050 \
- FL /home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd \
- EN work/BtnDemo 1398896049 CP IBUFG
Index: projects/BtnDemo/btndemo_last_par.ncd
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: projects/BtnDemo/btndemo_last_par.ncd
===================================================================
--- projects/BtnDemo/btndemo_last_par.ncd (revision 430)
+++ projects/BtnDemo/btndemo_last_par.ncd (nonexistent)
projects/BtnDemo/btndemo_last_par.ncd
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/BtnDemo.ptf
===================================================================
--- projects/BtnDemo/BtnDemo.ptf (revision 430)
+++ projects/BtnDemo/BtnDemo.ptf (nonexistent)
@@ -1,4 +0,0 @@
-[btndemo]
-Design Entry Utilities=true
-Generate Programming File=true
-User Constraints=true
Index: projects/BtnDemo/btndemo.prj
===================================================================
--- projects/BtnDemo/btndemo.prj (revision 430)
+++ projects/BtnDemo/btndemo.prj (nonexistent)
@@ -1 +0,0 @@
-vhdl work BtnDemo.vhd
Index: projects/BtnDemo/btndemo_ngdbuild.nav
===================================================================
--- projects/BtnDemo/btndemo_ngdbuild.nav (revision 430)
+++ projects/BtnDemo/btndemo_ngdbuild.nav (nonexistent)
@@ -1,2 +0,0 @@
-
-
projects/BtnDemo/btndemo.ncd
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/btndemo.bgn
===================================================================
--- projects/BtnDemo/btndemo.bgn (revision 430)
+++ projects/BtnDemo/btndemo.bgn (nonexistent)
@@ -1,103 +0,0 @@
-Release 6.2.03i - Bitgen G.31a
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
-
-Loading device database for application Bitgen from file "btndemo.ncd".
- "btndemo" is an NCD, version 2.38, device xc2s200, package pq208, speed -5
-Loading device for application Bitgen from file 'v200.nph' in environment
-C:/Xilinx.
-Opened constraints file btndemo.pcf.
-
-Wed Jul 07 09:50:55 2004
-
-C:/Xilinx/bin/nt/bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g Gclkdel0:11111 -g Gclkdel1:11111 -g Gclkdel2:11111 -g Gclkdel3:11111 -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g StartUpClk:JtagClk -g DONE_cycle:4 -g GTS_cycle:5 -g GSR_cycle:6 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No btndemo.ncd
-
-Summary of Bitgen Options:
-+----------------------+----------------------+
-| Option Name | Current Setting |
-+----------------------+----------------------+
-| Compress | (Not Specified)* |
-+----------------------+----------------------+
-| Readback | (Not Specified)* |
-+----------------------+----------------------+
-| DebugBitstream | No** |
-+----------------------+----------------------+
-| ConfigRate | 4** |
-+----------------------+----------------------+
-| StartupClk | JtagClk |
-+----------------------+----------------------+
-| CclkPin | Pullup** |
-+----------------------+----------------------+
-| DonePin | Pullup** |
-+----------------------+----------------------+
-| M0Pin | Pullup** |
-+----------------------+----------------------+
-| M1Pin | Pullup** |
-+----------------------+----------------------+
-| M2Pin | Pullup** |
-+----------------------+----------------------+
-| ProgPin | Pullup** |
-+----------------------+----------------------+
-| TckPin | Pullup** |
-+----------------------+----------------------+
-| TdiPin | Pullup** |
-+----------------------+----------------------+
-| TdoPin | Pullup |
-+----------------------+----------------------+
-| TmsPin | Pullup** |
-+----------------------+----------------------+
-| UnusedPin | Pulldown** |
-+----------------------+----------------------+
-| GSR_cycle | 6** |
-+----------------------+----------------------+
-| GWE_cycle | 6** |
-+----------------------+----------------------+
-| GTS_cycle | 5** |
-+----------------------+----------------------+
-| LCK_cycle | NoWait** |
-+----------------------+----------------------+
-| DONE_cycle | 4** |
-+----------------------+----------------------+
-| Persist | No* |
-+----------------------+----------------------+
-| DriveDone | No** |
-+----------------------+----------------------+
-| DonePipe | No** |
-+----------------------+----------------------+
-| Security | None** |
-+----------------------+----------------------+
-| UserID | 0xFFFFFFFF** |
-+----------------------+----------------------+
-| Gclkdel0 | 11111** |
-+----------------------+----------------------+
-| Gclkdel1 | 11111** |
-+----------------------+----------------------+
-| Gclkdel2 | 11111** |
-+----------------------+----------------------+
-| Gclkdel3 | 11111** |
-+----------------------+----------------------+
-| ActiveReconfig | No* |
-+----------------------+----------------------+
-| ActivateGclk | No* |
-+----------------------+----------------------+
-| PartialMask0 | (Not Specified)* |
-+----------------------+----------------------+
-| PartialMask1 | (Not Specified)* |
-+----------------------+----------------------+
-| PartialGclk | (Not Specified)* |
-+----------------------+----------------------+
-| PartialLeft | (Not Specified)* |
-+----------------------+----------------------+
-| PartialRight | (Not Specified)* |
-+----------------------+----------------------+
-| IEEE1532 | No* |
-+----------------------+----------------------+
-| Binary | No** |
-+----------------------+----------------------+
- * Default setting.
- ** The specified setting matches the default setting.
-
-Running DRC.
-DRC detected 0 errors and 0 warnings.
-Creating bit map...
-Saving bit stream in "btndemo.bit".
-Bitstream generation is complete.
Index: projects/BtnDemo/btndemo.ngc
===================================================================
--- projects/BtnDemo/btndemo.ngc (revision 430)
+++ projects/BtnDemo/btndemo.ngc (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.2e
-$0cx=>EHEDC_XHJ8;BPFEQCC=2M%?;H78MGSAO>1GCJGLAM58J@RPG[A:7B:4OCWE0>VFZ]<0_B[]CD68P\VB:2_:o6[\ES]UMVOEDL30ZDKX_U[SA4b{R3951<5289:on><:3:713}i9;0:7c?<:39'544;09567dk991>5::6:&f>0=#13;27o?9:181>7<4s-h1=;5Gd:k21?6=3f;<6=44bb83>7<729q/n7:4He9K55=n;3:17b950;9~f4>=8381<7>t$c8;?Mb<@8:0e>4?::m4>5<6=4={_36?8e=;2wx=54?:3y>g?1<5821?6s|1683>7}Y9>16=548;|m55<728qCh6sa1083>4}Ol2we=?4?:0yK`>{zutJKOv?9:cag7<04itJKNv>r@ARxyEF
\ No newline at end of file
Index: projects/BtnDemo/btndemo.pcf
===================================================================
--- projects/BtnDemo/btndemo.pcf (revision 430)
+++ projects/BtnDemo/btndemo.pcf (nonexistent)
@@ -1,5 +0,0 @@
-SCHEMATIC START ;
-// created by map version G.31a on Wed Jul 07 09:50:09 2004
-COMP "led" LOCATE = SITE "P71" LEVEL 1;
-COMP "btn" LOCATE = SITE "P77" LEVEL 1;
-SCHEMATIC END ;
Index: projects/BtnDemo/btndemo.ngd
===================================================================
--- projects/BtnDemo/btndemo.ngd (revision 430)
+++ projects/BtnDemo/btndemo.ngd (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.2e
-$26x50=#Zl|bdaa:!3-=5(3&:*/o6<|212su76?%<90NXH>0:@VMIBX\HXLIYO]CI78GNDRN01HC@CFTUGG3>EUMH^NHh5KRB]PQFEB[ZL^@55JXQCM@@B?3OXDAR[LF49D*67f92C>7DLZFF08MK>2CDXT^J7:NJFWGUQ?1GCLJJD29OKF1I33FH^J>5@UU18T2743Y=3_CN[RZVPD3g?]OKAGR&TIL/0/3#WQSE(9$:,L]LIH48\VRKAK<0TilPIea8\anXX{cfXt~jf:ZglZVuad\n~~g`n028\akXEh`d~[k}shmm55=_ldUFeca}Vdppmjh43Qy?6l{n69apkbbef90`hj7;mgg[JDRN11ekilzimf;?vvfz}ke>k5wc3q145+2%y{9<564xhnjj}siuIJ{=i5O@y0g>C<328qX:74=i:h097)<9:368yV3=:k0j6<=>cb20>7>3=>1X=?4<0;29567dk991>5::c:Q6>66=83;8=nm?3;0;0=?7d=i3;8=nm?3;0;000<,:08=6F8;wV;>5<62808w^852c8b>456kj:86?6;579'66<6<2\947s6>3:0q)?j:09a6a<72;0?6>u+2181`>N5:2c9o7>5;n0f>5<6F=5:&13?2<,8:1h6Fi;%32>65=83.9;7?n;:a6c<72;0;6=u+2182=>N5:2B996*=7;08Lc=#990:m6*>1;10?ld=83.9;7j4;n3;>5<#:>0:m65rb3a94?7=83:p(?951e9K67=Om2.:<7j4$0195f=n9m0;6)<8:0f8?xd5m3:1=7>50z&13?7c3A897Ek4$0295d=#9:0:n6a>d;29 71=9m10q~{t:o0;6?u22082<>;5n3h0q~{I01?L7c28q:6pT6:0y27?{zf821<7?tH308yk7>290:wE<=;H3g>4}52tP263;~yx{GHJq:h7:l092f<7{GHKq;qMN_{|BC
\ No newline at end of file
Index: projects/BtnDemo/iseconfig/BtnDemo.projectmgr
===================================================================
--- projects/BtnDemo/iseconfig/BtnDemo.projectmgr (revision 430)
+++ projects/BtnDemo/iseconfig/BtnDemo.projectmgr (nonexistent)
@@ -1,63 +0,0 @@
-
-
-
-
-
-
-
-
- 2
-
-
- BtnDemo - Behavioral (/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd)
-
- 0
- 0
- 000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000147000000020000000000000000000000000000000064ffffffff000000810000000000000002000001470000000100000000000000000000000100000000
- false
- BtnDemo - Behavioral (/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd)
-
-
-
- 1
- Configure Target Device
- Design Utilities
- Implement Design
- Synthesize - XST
- User Constraints
-
-
- Implement Design
-
- 0
- 0
- 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f4000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f40000000100000000
- false
- Implement Design
-
-
-
- 1
-
- 0
- 0
- 000000ff0000000000000001000000000000000001000000000000000000000000000000000000039f000000040101000100000000000000000000000064ffffffff0000008100000000000000040000007400000001000000000000005c00000001000000000000008400000001000000000000024b0000000100000000
- false
- BtnDemo.vhd
-
-
-
- 1
- work
-
- 0
- 0
- 000000ff00000000000000010000000000000000010000000000000000000000000000000000000124000000010001000100000000000000000000000064ffffffff000000810000000000000001000001240000000100000000
- false
- work
-
- 000000ff0000000000000002000001440000011d01000000060100000002
- Implementation
-
Index: projects/BtnDemo/iseconfig/BtnDemo.xreport
===================================================================
--- projects/BtnDemo/iseconfig/BtnDemo.xreport (revision 430)
+++ projects/BtnDemo/iseconfig/BtnDemo.xreport (nonexistent)
@@ -1,217 +0,0 @@
-
-
-
- 2014-04-30T19:48:38
- BtnDemo
- Unknown
- /home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/iseconfig/BtnDemo.xreport
- /home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/
- 2014-04-30T19:13:54
- false
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Index: projects/BtnDemo/btndemo.ngm
===================================================================
--- projects/BtnDemo/btndemo.ngm (revision 430)
+++ projects/BtnDemo/btndemo.ngm (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.2e
-$40x50=#Zl|bdaa:!3-53(?&8*/=85+Rdtjwlii2);%5= ;.2"'g>4t:9:{}?>7-418FP@682H^EAJPT@PDAQGUKA?0OFLZF89@KHKN\]OO;6M]E@VF@`=CZJUXYNMJSRDVH==BPYKEHHJ;;GPBCg=AZHMHC[K]EEc8BWG@WKKXIIo4FSCD[FIRF]20J_AB_TAE55=AzhmGeo ctm8JTDB682LymjBfb/nwh?IE]O;;7K|ngMka*irk2FZJH<64FscdHld)d}f1T[EPGBNHMGSA=2M%?4:EFJ@TF\LN+\B][-GNJJQ753NOEI_O[EE"SKVR*O:::7D;4ICWEC7=NF11BBKK]RDF5?LIDGDZ=7DA[YQG7?LVFL>1GEO\NRX48HJGCMM90@BM8;MMDMFGK02FoaRZvpd`8IDVBPYKEHHJ9;LCST@Bf3DK[S@AKUMGg?HGWW]CFI^ZNMQ`8IDVX^LXXEB@l;LcikwPbzzcdbn5BiomqR`ttafd<7CK[WNPH5>I33FH^J95@P@F0?JSS;2Z<=>5_7618TDB33YKYX55_HXQJGDJ>3ZCLSNAZNU18WKM13ZE^^NK<;RP@b>RFZNO_S]O]TU[SA1=SQYO97X?l;TQFVZPN[@HGI45YIDU\P\VB9m1SEAGAX,ZGF%6)9)Y_YO.?.0"BWFON>2RXXAGMc:ZUOZADDBCIYK84Xe`\Mac^c`VZye`Zvpdd8\anXX{cfZh||inl4?]boW]kln6Vkm^@jjaoio8:0TicPM`hlvScu{`ee==5Wdl]Nmkiu^lxxeb`<;Yqw7>dsf>1ixcjjmn18h`b?3eooSBLZF29neu>0?47?<:012gf642;2?9;ua4782?k202;1/?k4?lc1196=22?2Y:i7:j:08274ed8:0949;l;R490`<6289:on><:3:7<<=T9l0?h7>5123`g55=:1>3h6]=3;6g>45=9:;ho==5296;b>U12=n1<7?<1ba37?4?<1l0h9o50;396~U02=21=>4>30a`46<50=?=7):54g9K<>h5=3>;in<6be9'61<3n2.9:7?<;wV16?6=93;1?v]8:5:956<6;8ih<>4=8575?!5e2;:0Z9=52zw13?7<};21<6s+3081?g2f2909694<{%1;>1g<@:k0b9:50:k7=?6=3f>i6=44b2;95?4=83:p(>65169K7d=O;m1/8?4:;%3a>4><@8k0(=h:h0:6):=:3f8?xd3k3;1>7>50z&06=O9h1/=o4=d:&2`?363g>?6?5f1782>!2528207bf;0e?k232:1b?=4>:%61>66<3th?n7?51;294~"3:39;7E=n;I3:?!7e2;n0(=z{=31<7=t^5;896?=9?16844<0:p0f<72;q6?44=a:?7g?713ty?n7>53z\7f>;3k38j70:m:228yxh6i3:1=vFc;295~N4i2C8<7?t2;Ya?7|9o0vb9:52:~rQd=83;1=7=tS687`?6=9:;ho==5296;a>"4j3997)=>:39K51=O9<1i8l4?:387>6}Ok2.8;7<4ne87?k542:1e894?;h6:>5<7<729q/?54=:k1/=o4=d:Jb?k232;1/><4>0:k22?7=3f8j6<44}c6:>4<6290;w)=7:0a8 4d=911/=k4=f:Jb?k232:1/><4i;n15>4<i6<4>:183!5?2;i0(602;k019m5179~w1d=839p19m52`9>0g<4<2T?n6srn3d94?7|f=>1<6sa3183>4}i<=0:7p`<1;295~h3<380qpsr@AAx70<>::o=597r@A@x55}383:1<7<524824>{|<80;6=4=:34954=zs=;1<7>52;04>44;6=4?:38150;096<<6<2wp8<4?:181>7g=9<1vw9>50;296?4e28<0qv:>:183>7<5k3;<7pu;0;294?4=:m0:46st4083>5<52;o1=45r}ABSxFG
\ No newline at end of file
Index: projects/BtnDemo/BtnDemo_summary.html
===================================================================
--- projects/BtnDemo/BtnDemo_summary.html (revision 430)
+++ projects/BtnDemo/BtnDemo_summary.html (nonexistent)
@@ -1,86 +0,0 @@
-Xilinx Design Summary
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Date Generated: 04/30/2014 - 19:48:37
-EHEDC_XHJ8;BPFEQCC=2M%?;H78MGSAO>1GCJGLAM38K1=WI[^87_ZC4:VZT@4<]830ZDKX_U[SA7b7}ABs57=GHq;>6K4=:0yP5?742;0:?3;09567dk991>5::4:f21?6=93;p_<4>3;09567dk991>5::3:tE:0196?749ji;?7<74418 g<23k;>6=4=:081!?=9<1Gi7?t$682=>{Kn3;p(<95c:j51<722e::7>5;cc94?4=83:p(44;;Md95~h603>=7pg<:188k3<722wx=94?:3y]51=:i390q~?9:181[7134k1:6sr}|CDF}6:3im>hj>c1CDG}7uIJ[wpNO
\ No newline at end of file
Index: projects/BtnDemo/_impact.cmd
===================================================================
--- projects/BtnDemo/_impact.cmd (revision 430)
+++ projects/BtnDemo/_impact.cmd (nonexistent)
@@ -1,15 +0,0 @@
-setpreference -novice
-setpreference -stop_on_failure
-setPreference -fixClock
-setPreference -PC4_200K
-setMode -bs
-setMode -bs
-setMode -bs
-setCable -port auto
-setMode -bs
-setMode -bs
-Identify
-setAttribute -position 1 -attr configFileName -value E:\Engineering\Projects\web5.1\D2\BtnDemo\btndemo.bit
-setMode -bs
-setMode -bs
-Program -p 1
Index: projects/BtnDemo/btndemo.cup
===================================================================
--- projects/BtnDemo/btndemo.cup (revision 430)
+++ projects/BtnDemo/btndemo.cup (nonexistent)
@@ -1 +0,0 @@
-cleaned up XST temp files
Index: projects/BtnDemo/btndemo._prj
===================================================================
--- projects/BtnDemo/btndemo._prj (revision 430)
+++ projects/BtnDemo/btndemo._prj (nonexistent)
@@ -1,2 +0,0 @@
-plslib
-pls BtnDemo.vhd
Index: projects/BtnDemo/BtnDemo_map.mrp
===================================================================
--- projects/BtnDemo/BtnDemo_map.mrp (revision 430)
+++ projects/BtnDemo/BtnDemo_map.mrp (nonexistent)
@@ -1,37 +0,0 @@
-Release 12.3 Map M.70d (lin)
-Xilinx Mapping Report File for Design 'BtnDemo'
-
-Design Information
-------------------
-Command Line : map -intstyle ise -p xc3s1000-fg320-4 -cm area -ir off -pr off
--c 100 -o BtnDemo_map.ncd BtnDemo.ngd BtnDemo.pcf
-Target Device : xc3s1000
-Target Package : fg320
-Target Speed : -4
-Mapper Version : spartan3 -- $Revision: 1.52 $
-Mapped Date : Wed Apr 30 19:14:28 2014
-
-Design Summary
---------------
-Number of errors : 1
-Number of warnings : 0
-
-Section 1 - Errors
-------------------
-ERROR:Security:9 - No 'ISE' nor 'WebPack' feature was available for part
-'xc3s1000'.
-ERROR:Map:258 - A problem was encountered attempting to get the license for this
- architecture.
-
-Section 2 - Warnings
---------------------
-WARNING:Security:43 - No license file was found in the standard Xilinx license
-directory.
-WARNING:Security:44 - No license file was found.
-
-Section 3 - Informational
--------------------------
-INFO:Security:51 - The XILINXD_LICENSE_FILE environment variable is not set.
-INFO:Security:53 - The LM_LICENSE_FILE environment variable is not set.
-INFO:Security:54 - 'xc3s1000' is a WebPack part.
-INFO:Security:68 - Please run the Xilinx License Configuration Manager
Index: projects/BtnDemo/_ngo/netlist.lst
===================================================================
--- projects/BtnDemo/_ngo/netlist.lst (revision 430)
+++ projects/BtnDemo/_ngo/netlist.lst (nonexistent)
@@ -1,2 +0,0 @@
-/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.ngc 1398896055
-OK
Index: projects/BtnDemo/BtnDemo_xst.xrpt
===================================================================
--- projects/BtnDemo/BtnDemo_xst.xrpt (revision 430)
+++ projects/BtnDemo/BtnDemo_xst.xrpt (nonexistent)
@@ -1,137 +0,0 @@
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Index: projects/BtnDemo/btndemo.lso
===================================================================
--- projects/BtnDemo/btndemo.lso (revision 430)
+++ projects/BtnDemo/btndemo.lso (nonexistent)
@@ -1 +0,0 @@
-work
Index: projects/BtnDemo/BtnDemo_envsettings.html
===================================================================
--- projects/BtnDemo/BtnDemo_envsettings.html (revision 430)
+++ projects/BtnDemo/BtnDemo_envsettings.html (nonexistent)
@@ -1,391 +0,0 @@
-Xilinx System Settings Report
-
-System Settings
- -
-
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-
\ No newline at end of file
Index: projects/BtnDemo/webtalk_pn.xml
===================================================================
--- projects/BtnDemo/webtalk_pn.xml (revision 430)
+++ projects/BtnDemo/webtalk_pn.xml (nonexistent)
@@ -1,43 +0,0 @@
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Index: projects/BtnDemo/btndemo.bld
===================================================================
--- projects/BtnDemo/btndemo.bld (revision 430)
+++ projects/BtnDemo/btndemo.bld (nonexistent)
@@ -1,23 +0,0 @@
-Release 6.2.03i - ngdbuild G.31a
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
-
-Command Line: ngdbuild -intstyle ise -dd x:\barron\config\d2\basic\btndemo/_ngo
--uc btndemo.ucf -p xc2s200-pq208-5 btndemo.ngc btndemo.ngd
-
-Reading NGO file "X:/Barron/config/D2/BASIC/BtnDemo/btndemo.ngc" ...
-Reading component libraries for design expansion...
-
-Annotating constraints to design from file "btndemo.ucf" ...
-
-Checking timing specifications ...
-Checking expanded design ...
-
-NGDBUILD Design Results Summary:
- Number of errors: 0
- Number of warnings: 0
-
-Total memory usage is 39036 kilobytes
-
-Writing NGD file "btndemo.ngd" ...
-
-Writing NGDBUILD log file "btndemo.bld"...
Index: projects/BtnDemo/btndemo_map.ncd
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: projects/BtnDemo/btndemo_map.ncd
===================================================================
--- projects/BtnDemo/btndemo_map.ncd (revision 430)
+++ projects/BtnDemo/btndemo_map.ncd (nonexistent)
| BtnDemo Project Status | |||
| Project File: | -BtnDemo.xise | -Parser Errors: | -No Errors | -
| Module Name: | -BtnDemo | -Implementation State: | -Mapped | -
| Target Device: | -xc3s1000-4fg320 | -
|
--X -1 Error (1 new) | -
| Product Version: | ISE 12.3 | -
|
-1 Warning (1 new) | -
| Design Goal: | -Balanced | -
|
-- | -
| Design Strategy: | -Xilinx Default (unlocked) | -
|
-- |
| Environment: | -- -System Settings - | -
|
-- |
| Device Utilization Summary | [-] | ||||
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | -Errors | Warnings | Infos | |
| Synthesis Report | Current | mié abr 30 19:14:15 2014 | 0 | 1 Warning (1 new) | 1 Info (1 new) | |
| Translation Report | Current | mié abr 30 19:14:23 2014 | 0 | 0 | 0 | |
| Map Report | Current | mié abr 30 19:14:28 2014 | X 1 Error (1 new) | 0 | 0 | |
| Place and Route Report | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
- -
| Environment Settings | -||||
| Environment Variable | -xst | -ngdbuild | -map | -par | -
| LD_LIBRARY_PATH | -/opt/Xilinx/12.3/ISE_DS/ISE//lib/lin | -/opt/Xilinx/12.3/ISE_DS/ISE//lib/lin | -< data not available > | -< data not available > | -
| PATH | -/opt/Xilinx/12.3/ISE_DS/ISE//bin/lin: /usr/local/bin: /usr/bin: /bin: /usr/local/games: /usr/games |
-/opt/Xilinx/12.3/ISE_DS/ISE//bin/lin: /usr/local/bin: /usr/bin: /bin: /usr/local/games: /usr/games |
-< data not available > | -< data not available > | -
| XILINX | -/opt/Xilinx/12.3/ISE_DS/ISE/ | -/opt/Xilinx/12.3/ISE_DS/ISE/ | -< data not available > | -< data not available > | -
| Synthesis Property Settings | -|||
| Switch Name | -Property Name | -Value | -Default Value | -
| -ifn | -- | BtnDemo.prj | -- |
| -ifmt | -- | mixed | -MIXED | -
| -ofn | -- | BtnDemo | -- |
| -ofmt | -- | NGC | -NGC | -
| -p | -- | xc3s1000-4-fg320 | -- |
| -top | -- | BtnDemo | -- |
| -opt_mode | -Optimization Goal | -Speed | -Speed | -
| -opt_level | -Optimization Effort | -1 | -1 | -
| -iuc | -Use synthesis Constraints File | -NO | -NO | -
| -keep_hierarchy | -Keep Hierarchy | -No | -NO | -
| -netlist_hierarchy | -Netlist Hierarchy | -As_Optimized | -As_Optimized | -
| -rtlview | -Generate RTL Schematic | -Yes | -NO | -
| -glob_opt | -Global Optimization Goal | -AllClockNets | -AllClockNets | -
| -read_cores | -Read Cores | -YES | -YES | -
| -write_timing_constraints | -Write Timing Constraints | -NO | -NO | -
| -cross_clock_analysis | -Cross Clock Analysis | -NO | -NO | -
| -bus_delimiter | -Bus Delimiter | -<> | -<> | -
| -slice_utilization_ratio | -Slice Utilization Ratio | -100 | -100% | -
| -bram_utilization_ratio | -BRAM Utilization Ratio | -100 | -100% | -
| -verilog2001 | -Verilog 2001 | -YES | -YES | -
| -fsm_extract | -- | YES | -YES | -
| -fsm_encoding | -- | Auto | -AUTO | -
| -safe_implementation | -- | No | -NO | -
| -fsm_style | -- | LUT | -LUT | -
| -ram_extract | -- | Yes | -YES | -
| -ram_style | -- | Auto | -AUTO | -
| -rom_extract | -- | Yes | -YES | -
| -shreg_extract | -- | YES | -YES | -
| -rom_style | -- | Auto | -AUTO | -
| -auto_bram_packing | -- | NO | -NO | -
| -resource_sharing | -- | YES | -YES | -
| -async_to_sync | -- | NO | -NO | -
| -mult_style | -- | Auto | -AUTO | -
| -iobuf | -- | YES | -YES | -
| -max_fanout | -- | 500 | -500 | -
| -bufg | -- | 8 | -8 | -
| -register_duplication | -- | YES | -YES | -
| -register_balancing | -- | No | -NO | -
| -optimize_primitives | -- | NO | -NO | -
| -use_clock_enable | -- | Yes | -YES | -
| -use_sync_set | -- | Yes | -YES | -
| -use_sync_reset | -- | Yes | -YES | -
| -iob | -- | Auto | -AUTO | -
| -equivalent_register_removal | -- | YES | -YES | -
| -slice_utilization_ratio_maxmargin | -- | 5 | -0% | -
| Translation Property Settings | -|||
| Switch Name | -Property Name | -Value | -Default Value | -
| -intstyle | -- | ise | -None | -
| -dd | -- | _ngo | -None | -
| -p | -- | xc3s1000-fg320-4 | -None | -
| Operating System Information | -||||
| Operating System Information | -xst | -ngdbuild | -map | -par | -
| CPU Architecture/Speed | -AMD Athlon(tm) II X2 255 Processor/3100.000 MHz | -AMD Athlon(tm) II X2 255 Processor/3100.000 MHz | -< data not available > | -< data not available > | -
| Host | -cudar75 | -cudar75 | -< data not available > | -< data not available > | -
| OS Name | -Debian | -Debian | -< data not available > | -< data not available > | -
| OS Release | -Debian GNU/Linux 7.4 (wheezy) | -Debian GNU/Linux 7.4 (wheezy) | -< data not available > | -< data not available > | -
projects/BtnDemo/btndemo_map.ncd
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/BtnDemo.zip
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: projects/BtnDemo/BtnDemo.zip
===================================================================
--- projects/BtnDemo/BtnDemo.zip (revision 430)
+++ projects/BtnDemo/BtnDemo.zip (nonexistent)
projects/BtnDemo/BtnDemo.zip
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/btndemo_pad.txt
===================================================================
--- projects/BtnDemo/btndemo_pad.txt (revision 430)
+++ projects/BtnDemo/btndemo_pad.txt (nonexistent)
@@ -1,232 +0,0 @@
-Release 6.2.03i - Par G.31a
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
-
-Wed Jul 07 09:50:35 2004
-
-
-INPUT FILE: btndemo_map.ncd
-OUTPUT FILE: btndemo_pad.txt
-PART TYPE: xc2s200
-SPEED GRADE: -5
-PACKAGE: pq208
-
-Pinout by Pin Number:
-
------ |----- |----- |----- |----- |----- |----- |----- |----- |----- |----- |----- |----- |
-Pin Number|Signal Name|Pin Usage|Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage|Constraint|
-P1 | | |GND | | | | | | | | | |
-P2 | | |TMS | | | | | | | | | |
-P3 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P4 | |IOB |IO_VREF_7 |UNUSED | |(0,7)*** | | | | | | |
-P5 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P6 | |IOB |IO_VREF_7 |UNUSED | |(0,7)*** | | | | | | |
-P7 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P8 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P9 | |IOB |IO_VREF_7 |UNUSED | |(0,7)*** | | | | | | |
-P10 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P11 | | |GND | | | | | | | | | |
-P12 | | |VCCO | | |0 | | | | |na | |
-P13 | | |VCCINT | | | | | | | |2.5 | |
-P14 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P15 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P16 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P17 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P18 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P19 | | |GND | | | | | | | | | |
-P20 | |IOB |IO_VREF_7 |UNUSED | |(0,7)*** | | | | | | |
-P21 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P22 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P23 | |IOB | |UNUSED | |(0,7)*** | | | | | | |
-P24 | |PCIIOB |IO_IRDY |UNUSED | |(0,7)*** | | | | | | |
-P25 | | |GND | | | | | | | | | |
-P26 | | |VCCO | | |0 | | | | |na | |
-P27 | |PCIIOB |IO_TRDY |UNUSED | |(0,6)*** | | | | | | |
-P28 | | |VCCINT | | | | | | | |2.5 | |
-P29 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P30 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P31 | |IOB |IO_VREF_6 |UNUSED | |(0,6)*** | | | | | | |
-P32 | | |GND | | | | | | | | | |
-P33 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P34 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P35 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P36 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P37 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P38 | | |VCCINT | | | | | | | |2.5 | |
-P39 | | |VCCO | | |0 | | | | |na | |
-P40 | | |GND | | | | | | | | | |
-P41 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P42 | |IOB |IO_VREF_6 |UNUSED | |(0,6)*** | | | | | | |
-P43 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P44 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P45 | |IOB |IO_VREF_6 |UNUSED | |(0,6)*** | | | | | | |
-P46 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P47 | |IOB |IO_VREF_6 |UNUSED | |(0,6)*** | | | | | | |
-P48 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P49 | |IOB | |UNUSED | |(0,6)*** | | | | | | |
-P50 | | |M1 | | | | | | | | | |
-P51 | | |GND | | | | | | | | | |
-P52 | | |M0 | | | | | | | | | |
-P53 | | |VCCO | | |0 | | | | |na | |
-P54 | | |M2 | | | | | | | | | |
-P55 | | |NC | | | | | | | | | |
-P56 | | |NC | | | | | | | | | |
-P57 | |IOB |IO_VREF_5 |UNUSED | |(0,5)*** | | | | | | |
-P58 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P59 | |IOB |IO_VREF_5 |UNUSED | |(0,5)*** | | | | | | |
-P60 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P61 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P62 | |IOB |IO_VREF_5 |UNUSED | |(0,5)*** | | | | | | |
-P63 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P64 | | |GND | | | | | | | | | |
-P65 | | |VCCO | | |0 | | | | |na | |
-P66 | | |VCCINT | | | | | | | |2.5 | |
-P67 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P68 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P69 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P70 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P71 |led |IOB | |OUTPUT |LVTTL |(0,5)*** |12 |SLOW |NONE** | | |LOCATED |
-P72 | | |GND | | | | | | | | | |
-P73 | |IOB |IO_VREF_5 |UNUSED | |(0,5)*** | | | | | | |
-P74 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P75 | |IOB | |UNUSED | |(0,5)*** | | | | | | |
-P76 | | |VCCINT | | | | | | | |2.5 | |
-P77 |btn |GCLKIOB |GCK1 |INPUT |LVTTL |(0,5)*** | | | | | |LOCATED |
-P78 | | |VCCO | | |0 | | | | |na | |
-P79 | | |GND | | | | | | | | | |
-P80 | |GCLKIOB |GCK0 |UNUSED | |(0,4)*** | | | | | | |
-P81 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P82 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P83 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P84 | |IOB |IO_VREF_4 |UNUSED | |(0,4)*** | | | | | | |
-P85 | | |GND | | | | | | | | | |
-P86 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P87 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P88 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P89 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P90 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P91 | | |VCCINT | | | | | | | |2.5 | |
-P92 | | |VCCO | | |0 | | | | |na | |
-P93 | | |GND | | | | | | | | | |
-P94 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P95 | |IOB |IO_VREF_4 |UNUSED | |(0,4)*** | | | | | | |
-P96 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P97 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P98 | |IOB |IO_VREF_4 |UNUSED | |(0,4)*** | | | | | | |
-P99 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P100 | |IOB |IO_VREF_4 |UNUSED | |(0,4)*** | | | | | | |
-P101 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P102 | |IOB | |UNUSED | |(0,4)*** | | | | | | |
-P103 | | |GND | | | | | | | | | |
-P104 | | |DONE | | | | | | | | | |
-P105 | | |VCCO | | |0 | | | | |na | |
-P106 | | |PROGRAM | | | | | | | | | |
-P107 | |IOB |IO_INIT |UNUSED | |(0,3)*** | | | | | | |
-P108 | |IOB |IO_D7 |UNUSED | |(0,3)*** | | | | | | |
-P109 | |IOB |IO_VREF_3 |UNUSED | |(0,3)*** | | | | | | |
-P110 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P111 | |IOB |IO_VREF_3 |UNUSED | |(0,3)*** | | | | | | |
-P112 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P113 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P114 | |IOB |IO_VREF_3 |UNUSED | |(0,3)*** | | | | | | |
-P115 | |IOB |IO_D6 |UNUSED | |(0,3)*** | | | | | | |
-P116 | | |GND | | | | | | | | | |
-P117 | | |VCCO | | |0 | | | | |na | |
-P118 | | |VCCINT | | | | | | | |2.5 | |
-P119 | |IOB |IO_D5 |UNUSED | |(0,3)*** | | | | | | |
-P120 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P121 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P122 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P123 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P124 | | |GND | | | | | | | | | |
-P125 | |IOB |IO_VREF_3 |UNUSED | |(0,3)*** | | | | | | |
-P126 | |IOB |IO_D4 |UNUSED | |(0,3)*** | | | | | | |
-P127 | |IOB | |UNUSED | |(0,3)*** | | | | | | |
-P128 | | |VCCINT | | | | | | | |2.5 | |
-P129 | |PCIIOB |IO_TRDY |UNUSED | |(0,3)*** | | | | | | |
-P130 | | |VCCO | | |0 | | | | |na | |
-P131 | | |GND | | | | | | | | | |
-P132 | |PCIIOB |IO_IRDY |UNUSED | |(0,2)*** | | | | | | |
-P133 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P134 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P135 | |IOB |IO_D3 |UNUSED | |(0,2)*** | | | | | | |
-P136 | |IOB |IO_VREF_2 |UNUSED | |(0,2)*** | | | | | | |
-P137 | | |GND | | | | | | | | | |
-P138 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P139 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P140 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P141 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P142 | |IOB |IO_D2 |UNUSED | |(0,2)*** | | | | | | |
-P143 | | |VCCINT | | | | | | | |2.5 | |
-P144 | | |VCCO | | |0 | | | | |na | |
-P145 | | |GND | | | | | | | | | |
-P146 | |IOB |IO_D1 |UNUSED | |(0,2)*** | | | | | | |
-P147 | |IOB |IO_VREF_2 |UNUSED | |(0,2)*** | | | | | | |
-P148 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P149 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P150 | |IOB |IO_VREF_2 |UNUSED | |(0,2)*** | | | | | | |
-P151 | |IOB | |UNUSED | |(0,2)*** | | | | | | |
-P152 | |IOB |IO_VREF_2 |UNUSED | |(0,2)*** | | | | | | |
-P153 | |IOB |IO_DIN_D0 |UNUSED | |(0,2)*** | | | | | | |
-P154 | |IOB |IO_DOUT_BUSY|UNUSED | |(0,2)*** | | | | | | |
-P155 | | |CCLK | | | | | | | | | |
-P156 | | |VCCO | | |0 | | | | |na | |
-P157 | | |TDO | | | | | | | | | |
-P158 | | |GND | | | | | | | | | |
-P159 | | |TDI | | | | | | | | | |
-P160 | |IOB |IO_CS |UNUSED | |(0,1)*** | | | | | | |
-P161 | |IOB |IO_WRITE |UNUSED | |(0,1)*** | | | | | | |
-P162 | |IOB |IO_VREF_1 |UNUSED | |(0,1)*** | | | | | | |
-P163 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P164 | |IOB |IO_VREF_1 |UNUSED | |(0,1)*** | | | | | | |
-P165 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P166 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P167 | |IOB |IO_VREF_1 |UNUSED | |(0,1)*** | | | | | | |
-P168 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P169 | | |GND | | | | | | | | | |
-P170 | | |VCCO | | |0 | | | | |na | |
-P171 | | |VCCINT | | | | | | | |2.5 | |
-P172 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P173 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P174 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P175 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P176 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P177 | | |GND | | | | | | | | | |
-P178 | |IOB |IO_VREF_1 |UNUSED | |(0,1)*** | | | | | | |
-P179 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P180 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P181 | |IOB | |UNUSED | |(0,1)*** | | | | | | |
-P182 | |GCLKIOB |GCK2 |UNUSED | |(0,1)*** | | | | | | |
-P183 | | |GND | | | | | | | | | |
-P184 | | |VCCO | | |0 | | | | |na | |
-P185 | |GCLKIOB |GCK3 |UNUSED | |0 | | | | | | |
-P186 | | |VCCINT | | | | | | | |2.5 | |
-P187 | |IOB | |UNUSED | |0 | | | | | | |
-P188 | |IOB | |UNUSED | |0 | | | | | | |
-P189 | |IOB |IO_VREF_0 |UNUSED | |0 | | | | | | |
-P190 | | |GND | | | | | | | | | |
-P191 | |IOB | |UNUSED | |0 | | | | | | |
-P192 | |IOB | |UNUSED | |0 | | | | | | |
-P193 | |IOB | |UNUSED | |0 | | | | | | |
-P194 | |IOB | |UNUSED | |0 | | | | | | |
-P195 | |IOB | |UNUSED | |0 | | | | | | |
-P196 | | |VCCINT | | | | | | | |2.5 | |
-P197 | | |VCCO | | |0 | | | | |na | |
-P198 | | |GND | | | | | | | | | |
-P199 | |IOB | |UNUSED | |0 | | | | | | |
-P200 | |IOB |IO_VREF_0 |UNUSED | |0 | | | | | | |
-P201 | |IOB | |UNUSED | |0 | | | | | | |
-P202 | |IOB | |UNUSED | |0 | | | | | | |
-P203 | |IOB |IO_VREF_0 |UNUSED | |0 | | | | | | |
-P204 | |IOB | |UNUSED | |0 | | | | | | |
-P205 | |IOB |IO_VREF_0 |UNUSED | |0 | | | | | | |
-P206 | |IOB | |UNUSED | |0 | | | | | | |
-P207 | | |TCK | | | | | | | | | |
-P208 | | |VCCO | | |0 | | | | |na | |
-
------ |----- |----- |----- |----- |----- |----- |----- |----- |----- |----- |----- |----- |
-
-* Default value.
-** This default Pullup/Pulldown value can be overridden in Bitgen.
-*** In some smaller packages, the VCCO bank number of a pin may trail
- the VREF bank number (VCCO,VREF).
-
Index: projects/BtnDemo/btndemo.cmd_log
===================================================================
--- projects/BtnDemo/btndemo.cmd_log (revision 430)
+++ projects/BtnDemo/btndemo.cmd_log (nonexistent)
@@ -1,25 +0,0 @@
-xst -quiet -ifn __projnav/btndemo.xst -ofn btndemo.syr
-ngdbuild -quiet -dd f:\engineering\projects\web5.1\d2\btndemo/_ngo -uc btndemo.ucf -insert_keep_hierarchy -p xc2s200-pq208-5 btndemo.ngc btndemo.ngd
-map -quiet -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-par -w -ol 2 -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-trce -quiet -e 3 -l 3 -xml btndemo btndemo.ncd -o btndemo.twr btndemo.pcf
-bitgen -f btndemo.ut btndemo.ncd
-bitgen -f btndemo.ut btndemo.ncd
-xst -quiet -ifn __projnav/btndemo.xst -ofn btndemo.syr
-ngdbuild -quiet -dd e:\engineering\projects\web5.1\d2\btndemo/_ngo -uc btndemo.ucf -insert_keep_hierarchy -p xc2s200-pq208-5 btndemo.ngc btndemo.ngd
-map -quiet -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-par -w -ol 2 -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-trce -quiet -e 3 -l 3 -xml btndemo btndemo.ncd -o btndemo.twr btndemo.pcf
-bitgen -f btndemo.ut btndemo.ncd
-xst -intstyle ise -ifn __projnav/btndemo.xst -ofn btndemo.syr
-ngdbuild -intstyle ise -dd x:\barron\config\d2\basic\btndemo/_ngo -uc btndemo.ucf -p xc2s200-pq208-5 btndemo.ngc btndemo.ngd
-map -intstyle ise -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-par -w -intstyle ise -ol std -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-trce -intstyle ise -e 3 -l 3 -xml btndemo btndemo.ncd -o btndemo.twr btndemo.pcf
-bitgen -intstyle ise -f btndemo.ut btndemo.ncd
-xst -intstyle ise -ifn __projnav/btndemo.xst -ofn btndemo.syr
-ngdbuild -intstyle ise -dd x:\barron\config\d2\basic\btndemo/_ngo -uc btndemo.ucf -p xc2s200-pq208-5 btndemo.ngc btndemo.ngd
-map -intstyle ise -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-par -w -intstyle ise -ol std -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-trce -intstyle ise -e 3 -l 3 -xml btndemo btndemo.ncd -o btndemo.twr btndemo.pcf
-bitgen -intstyle ise -f btndemo.ut btndemo.ncd
Index: projects/BtnDemo/_impact.log
===================================================================
--- projects/BtnDemo/_impact.log (revision 430)
+++ projects/BtnDemo/_impact.log (nonexistent)
@@ -1,60 +0,0 @@
-iMPACT Version: F.23
-iMPACT log file Started on 2003/05/29 12:20:14
-// *** BATCH CMD : setpreference -novice
-// *** BATCH CMD : setpreference -stop_on_failure
-// *** BATCH CMD : setPreference -fixClock
-// *** BATCH CMD : setPreference -PC4_200K
-GUI --- Boundary Scan Mode selected
-// *** BATCH CMD : setMode -bs
-// *** BATCH CMD : setMode -bs
-// *** BATCH CMD : setMode -bs
-GUI --- Auto connect to cable...
-AutoDetecting cable. Please wait.
-CB_PROGRESS_START - Starting Operation.
-Connecting to cable (USB Port).
-Cable connection failed.
-Connecting to cable (Parallel Port - LPT1).
-Checking cable driver.
- Driver Version = 505.
-Cable connection established.
-CB_PROGRESS_END - End Operation.
-Elapsed time = 0 sec.
-// *** BATCH CMD : setCable -port auto
-// *** BATCH CMD : setMode -bs
-// *** BATCH CMD : setMode -bs
-PROGRESS_START - Starting Operation.
-Identifying chain contents ....Identified xc2s200.
-INFO:iMPACT:1366 -
- Reading C:/XilinxISE/spartan2/data\xc2s200.bsd...
- Reading C:/XilinxISE/spartan2/data\xc2s200.bsd...
-INFO:iMPACT:501 - '1': Added Device xc2s200 successfully.
-----------------------------------------------------------------------
-----------------------------------------------------------------------
-done.
-PROGRESS_END - End Operation.
-Elapsed time = 1 sec.
-// *** BATCH CMD : Identify
-'1': Loading file 'E:\Engineering\Projects\web5.1\D2\BtnDemo\btndemo.bit' ...
-done.
-INFO:iMPACT:1366 -
- Reading C:/XilinxISE/spartan2/data\xc2s200.bsd...
- Reading C:/XilinxISE/spartan2/data\xc2s200.bsd...
-INFO:iMPACT:501 - '1': Added Device xc2s200 successfully.
-----------------------------------------------------------------------
-----------------------------------------------------------------------
-----------------------------------------------------------------------
-----------------------------------------------------------------------
-// *** BATCH CMD : setAttribute -position 1 -attr configFileName -valueE:\Engineering\Projects\web5.1\D2\BtnDemo\btndemo.bit
-// *** BATCH CMD : setMode -bs
-// *** BATCH CMD : setMode -bs
-PROGRESS_START - Starting Operation.
-Validating chain...
-Boundary-scan chain validated successfully.
-'1':Programming device...done.
-INFO:iMPACT:579 - '1': Completed downloading bit file to device.
-INFO:iMPACT:580 - '1':Checking done pin ....done.
-'1': Programmed successfully.
-PROGRESS_END - End Operation.
-Elapsed time = 8 sec.
-// *** BATCH CMD : Program -p 1
-***** Closing iMPACT program. *****
Index: projects/BtnDemo/BtnDemo.xise
===================================================================
--- projects/BtnDemo/BtnDemo.xise (revision 430)
+++ projects/BtnDemo/BtnDemo.xise (nonexistent)
@@ -1,334 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Index: projects/BtnDemo/btndemo.twr
===================================================================
--- projects/BtnDemo/btndemo.twr (revision 430)
+++ projects/BtnDemo/btndemo.twr (nonexistent)
@@ -1,39 +0,0 @@
---------------------------------------------------------------------------------
-Release 6.2.03i Trace G.28
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
-
-C:/Xilinx/bin/nt/trce.exe -intstyle ise -e 3 -l 3 -xml btndemo btndemo.ncd -o
-btndemo.twr btndemo.pcf
-
-
-Design file: btndemo.ncd
-Physical constraint file: btndemo.pcf
-Device,speed: xc2s200,-5 (PRODUCTION 1.27 2003-12-13)
-Report level: error report
-
-Environment Variable Effect
--------------------- ------
-NONE No environment variables were set
---------------------------------------------------------------------------------
-
-INFO:Timing:2698 - No timing constraints found, doing default enumeration.
-INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
- option. All paths that are not constrained will be reported in the
- unconstrained paths section(s) of the report.
-
-
-Data Sheet report:
------------------
-All values displayed in nanoseconds (ns)
-
-Pad to Pad
----------------+---------------+---------+
-Source Pad |Destination Pad| Delay |
----------------+---------------+---------+
-btn |led | 7.273|
----------------+---------------+---------+
-
-Analysis completed Wed Jul 07 09:50:48 2004
---------------------------------------------------------------------------------
-
-Peak Memory Usage: 47 MB
Index: projects/BtnDemo/btndemo.syr
===================================================================
--- projects/BtnDemo/btndemo.syr (revision 430)
+++ projects/BtnDemo/btndemo.syr (nonexistent)
@@ -1,214 +0,0 @@
-Release 6.2.03i - xst G.31a
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
---> Parameter TMPDIR set to __projnav
-CPU : 0.02 / 2.23 s | Elapsed : 0.00 / 2.00 s
-
---> Parameter xsthdpdir set to ./xst
-CPU : 0.01 / 2.27 s | Elapsed : 0.00 / 2.00 s
-
---> Reading design: btndemo.prj
-
-TABLE OF CONTENTS
- 1) Synthesis Options Summary
- 2) HDL Compilation
- 3) HDL Analysis
- 4) HDL Synthesis
- 5) Advanced HDL Synthesis
- 5.1) HDL Synthesis Report
- 6) Low Level Synthesis
- 7) Final Report
- 7.1) Device utilization summary
- 7.2) TIMING REPORT
-
-
-=========================================================================
-* Synthesis Options Summary *
-=========================================================================
----- Source Parameters
-Input File Name : btndemo.prj
-Input Format : mixed
-Ignore Synthesis Constraint File : NO
-Verilog Include Directory :
-
----- Target Parameters
-Output File Name : btndemo
-Output Format : NGC
-Target Device : xc2s200-5-pq208
-
----- Source Options
-Top Module Name : btndemo
-Automatic FSM Extraction : YES
-FSM Encoding Algorithm : Auto
-FSM Style : lut
-RAM Extraction : Yes
-RAM Style : Auto
-ROM Extraction : Yes
-ROM Style : Auto
-Mux Extraction : YES
-Mux Style : Auto
-Decoder Extraction : YES
-Priority Encoder Extraction : YES
-Shift Register Extraction : YES
-Logical Shifter Extraction : YES
-XOR Collapsing : YES
-Resource Sharing : YES
-Multiplier Style : lut
-Automatic Register Balancing : No
-
----- Target Options
-Add IO Buffers : YES
-Global Maximum Fanout : 100
-Add Generic Clock Buffer(BUFG) : 4
-Register Duplication : YES
-Equivalent register Removal : YES
-Slice Packing : YES
-Pack IO Registers into IOBs : auto
-
----- General Options
-Optimization Goal : Speed
-Optimization Effort : 1
-Keep Hierarchy : NO
-Global Optimization : AllClockNets
-RTL Output : Yes
-Write Timing Constraints : NO
-Hierarchy Separator : _
-Bus Delimiter : <>
-Case Specifier : maintain
-Slice Utilization Ratio : 100
-Slice Utilization Ratio Delta : 5
-
----- Other Options
-lso : btndemo.lso
-Read Cores : YES
-cross_clock_analysis : NO
-verilog2001 : YES
-Optimize Instantiated Primitives : NO
-tristate2logic : No
-
-=========================================================================
-
-
-=========================================================================
-* HDL Compilation *
-=========================================================================
-Compiling vhdl file X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd in Library work.
-Architecture behavioral of Entity btndemo is up to date.
-
-=========================================================================
-* HDL Analysis *
-=========================================================================
-Analyzing Entity (Architecture ).
-WARNING:Xst:766 - X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd line 70: Generating a Black Box for component .
-Entity analyzed. Unit generated.
-
-
-=========================================================================
-* HDL Synthesis *
-=========================================================================
-
-Synthesizing Unit .
- Related source file is X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd.
-Unit synthesized.
-
-
-=========================================================================
-* Advanced HDL Synthesis *
-=========================================================================
-
-Advanced RAM inference ...
-Advanced multiplier inference ...
-Advanced Registered AddSub inference ...
-Dynamic shift register inference ...
-
-=========================================================================
-HDL Synthesis Report
-
-Found no macro
-=========================================================================
-
-=========================================================================
-* Low Level Synthesis *
-=========================================================================
-
-Optimizing unit ...
-Loading device for application Xst from file 'v200.nph' in environment C:/Xilinx.
-
-Mapping all equations...
-Building and optimizing final netlist ...
-Found area constraint ratio of 100 (+ 5) on block btndemo, actual ratio is 0.
-
-=========================================================================
-* Final Report *
-=========================================================================
-Final Results
-RTL Top Level Output File Name : btndemo.ngr
-Top Level Output File Name : btndemo
-Output Format : NGC
-Optimization Goal : Speed
-Keep Hierarchy : NO
-
-Design Statistics
-# IOs : 2
-
-Cell Usage :
-# IO Buffers : 2
-# IBUFG : 1
-# OBUF : 1
-=========================================================================
-
-Device utilization summary:
----------------------------
-
-Selected Device : 2s200pq208-5
-
- Number of bonded IOBs: 2 out of 144 1%
-
-
-=========================================================================
-TIMING REPORT
-
-NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
- FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
- GENERATED AFTER PLACE-and-ROUTE.
-
-Clock Information:
-------------------
-No clock signals found in this design
-
-Timing Summary:
----------------
-Speed Grade: -5
-
- Minimum period: No path found
- Minimum input arrival time before clock: No path found
- Maximum output required time after clock: No path found
- Maximum combinational path delay: 8.404ns
-
-Timing Detail:
---------------
-All values displayed in nanoseconds (ns)
-
--------------------------------------------------------------------------
-Timing constraint: Default path analysis
-Delay: 8.404ns (Levels of Logic = 2)
- Source: btn (PAD)
- Destination: led (PAD)
-
- Data Path: btn to led
- Gate Net
- Cell:in->out fanout Delay Delay Logical Name (Net Name)
- ---------------------------------------- ------------
- IBUFG:I->O 1 1.697 1.150 U1 (led_OBUF)
- OBUF:I->O 5.557 led_OBUF (led)
- ----------------------------------------
- Total 8.404ns (7.254ns logic, 1.150ns route)
- (86.3% logic, 13.7% route)
-
-=========================================================================
-CPU : 8.38 / 12.41 s | Elapsed : 8.00 / 12.00 s
-
--->
-
-Total memory usage is 58968 kilobytes
-
-
Index: projects/BtnDemo/btndemo.sprj
===================================================================
--- projects/BtnDemo/btndemo.sprj (revision 430)
+++ projects/BtnDemo/btndemo.sprj (nonexistent)
@@ -1 +0,0 @@
-work BtnDemo.vhd
Index: projects/BtnDemo/btndemo.xst
===================================================================
--- projects/BtnDemo/btndemo.xst (revision 430)
+++ projects/BtnDemo/btndemo.xst (nonexistent)
@@ -1,41 +0,0 @@
-set -tmpdir .
-set -overwrite YES
-set -xsthdpdir ./xst
-run
--ifmt VHDL
--ent btndemo
--p xc2s200-pq208-5
--ifn btndemo.prj
--opt_mode Speed
--opt_level 1
--check_attribute_syntax YES
--keep_hierarchy No
--glob_opt AllClockNets
--write_timing_constraints No
--fsm_extract YES -fsm_encoding Auto
--fsm_fftype D
--mux_extract YES
--resource_sharing YES
--complex_clken YES
--rom_extract Yes
--ram_extract Yes
--ram_style Auto
--mux_style Auto
--decoder_extract YES
--priority_extract YES
--shreg_extract YES
--shift_extract YES
--xor_collapse YES
--iobuf YES
--equivalent_register_removal YES
--bufg 4
--max_fanout 100
--incremental_synthesis NO
--register_duplication YES
--register_balancing No
--move_first_stage YES
--move_last_stage YES
--slice_packing YES
--iob auto
--ofn btndemo
--ofmt NGC
Index: projects/BtnDemo/btndemo_map.ngm
===================================================================
--- projects/BtnDemo/btndemo_map.ngm (revision 430)
+++ projects/BtnDemo/btndemo_map.ngm (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.2e
-$40x50=#Zl|bdaa:!3-53(?&8*/=85+Rdtjwlii2);%5= ;.2"'g>4t:9:{}?>7-418FP@682H^EAJPT@PDAQGUKA?0OFLZF89@KHKN\]OO;6M]E@VF@`=CZJUXYNMJSRDVH==BPYKEHHJ;;GPBCg=AZHMHC[K]EEc8BWG@WKKXIIo4FSCD[FIRF]20J_AB_TAE55=AzhmGeo ctm8JTDB682LymjBfb/nwh?IE]O;;7K|ngMka*irk2FZJH<64FscdHld)d}f1T[EPGBNHMGSA=2M%?4:EFJ@TF\LN+\B][-GNJJQ753NOEI_O[EE"SKVR*O:::7D;4ICWEC7=NF11BBKK]RDF5?LIDGDZ=7DA[YQG7?LVFL>1GEO\NRX48HJGCMM90@BM8;MMDMFGK02FoaRZvpd`8IDVBPYKEHHJ9;LCST@Bf3DK[S@AKUMGg?HGWW]CFI^ZNMQ`8IDVX^LXXEB@l;LcikwPbzzcdbn5BiomqR`ttafd<7CK[WNPH5>I33FH^J95@P@F0?JSS;2Z<=>5_7618TDB33YKYX55_HXQJGDJ>3ZCLSNAZNU18WKM13ZE^^NK<;RP@b>RFZNO_S]O]TU[SA1=SQYO97X?l;TQFVZPN[@HGI45YIDU\P\VB9m1SEAGAX,ZGF%6)9)Y_YO.?.0"BWFON>2RXXAGMc:ZUOZADDBCIYK84Xe`\Mac^c`VZye`Zvpdd8\anXX{cfZh||inl4?]boW]kln6Vkm^@jjaoio8:0TicPM`hlvScu{`ee==5Wdl]Nmkiu^lxxeb`<;Yqw7>dsf>1ixcjjmn18h`b?3eooSBLZF29neu>0?47?<:012gf642;2?9;ua4782?k202;1/?k4?lc1196=22?2Y:i7:j:08274ed8:0949;l;R490`<6289:on><:3:7<<=T9l0?h7>5123`g55=:1>3h6]=3;6g>45=9:;ho==5296;b>U12=n1<7?<1ba37?4?<1l0h9o50;396~U02=21=>4>30a`46<50=?=7):54g9K<>h5=3>;in<6be9'61<3n2.9:7?<;wV16?6=93;1?v]8:5:956<6;8ih<>4=8575?!5e2;:0Z9=52zw13?7<};21<6s+3081?g2f2909694<{%1;>1g<@:k0b9:50:k7=?6=3f>i6=44b2;95?4=83:p(>65169K7d=O;m1/8?4:;%3a>4><@8k0(=h:h0:6):=:3f8?xd3k3;1>7>50z&06=O9h1/=o4=d:&2`?363g>?6?5f1782>!2528207bf;0e?k232:1b?=4>:%61>66<3th?n7?51;294~"3:39;7E=n;I3:?!7e2;n0(=z{=31<7=t^5;896?=9?16844<0:p0f<72;q6?44=a:?7g?713ty?n7>53z\7f>;3k38j70:m:228yxh6i3:1=vFc;295~N4i2C8<7?t2;Ya?7|9o0vb9:52:~rQd=83;1=7=tS687`?6=9:;ho==5296;a>"4j3997)=>:39K51=O9<1i8l4?:387>6}Ok2.8;7<4ne87?k542:1e894?;h6:>5<7<729q/?54=:k1/=o4=d:Jb?k232;1/><4>0:k22?7=3f8j6<44}c6:>4<6290;w)=7:0a8 4d=911/=k4=f:Jb?k232:1/><4i;n15>4<i6<4>:183!5?2;i0(602;k019m5179~w1d=839p19m52`9>0g<4<2T?n6srn3d94?7|f=>1<6sa3183>4}i<=0:7p`<1;295~h3<380qpsr@AAx70<>::o=597r@A@x55}383:1<7<524824>{|<80;6=4=:34954=zs=;1<7>52;04>44;6=4?:38150;096<<6<2wp8<4?:181>7g=9<1vw9>50;296?4e28<0qv:>:183>7<5k3;<7pu;0;294?4=:m0:46st4083>5<52;o1=45r}ABSxFG
\ No newline at end of file
Index: projects/BtnDemo/btndemo_pad.csv
===================================================================
--- projects/BtnDemo/btndemo_pad.csv (revision 430)
+++ projects/BtnDemo/btndemo_pad.csv (nonexistent)
@@ -1,237 +0,0 @@
-Release 6.2.03i - Par G.31a
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
-
-Wed Jul 07 09:50:22 2004
-
-
-NOTE: This file is designed to be imported into a spreadsheet program
-such as Microsoft Excel for viewing, printing and sorting. The ,
-character is used as the data field separator. This file is also designed
-to support parsing.
-
-INPUT FILE: btndemo_map.ncd
-OUTPUT FILE: btndemo_pad.csv
-PART TYPE: xc2s200
-SPEED GRADE: -5
-PACKAGE: pq208
-
-Pinout by Pin Number:
-
------,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
-Pin Number,Signal Name,Pin Usage,Pin Name,Direction,IO Standard,IO Bank Number,Drive (mA),Slew Rate,Termination,IOB Delay,Voltage,Constraint,
-P1,,,GND,,,,,,,,,,
-P2,,,TMS,,,,,,,,,,
-P3,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P4,,IOB,IO_VREF_7,UNUSED,,(0,7)***,,,,,,,
-P5,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P6,,IOB,IO_VREF_7,UNUSED,,(0,7)***,,,,,,,
-P7,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P8,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P9,,IOB,IO_VREF_7,UNUSED,,(0,7)***,,,,,,,
-P10,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P11,,,GND,,,,,,,,,,
-P12,,,VCCO,,,0,,,,,na,,
-P13,,,VCCINT,,,,,,,,2.5,,
-P14,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P15,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P16,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P17,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P18,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P19,,,GND,,,,,,,,,,
-P20,,IOB,IO_VREF_7,UNUSED,,(0,7)***,,,,,,,
-P21,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P22,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P23,,IOB,,UNUSED,,(0,7)***,,,,,,,
-P24,,PCIIOB,IO_IRDY,UNUSED,,(0,7)***,,,,,,,
-P25,,,GND,,,,,,,,,,
-P26,,,VCCO,,,0,,,,,na,,
-P27,,PCIIOB,IO_TRDY,UNUSED,,(0,6)***,,,,,,,
-P28,,,VCCINT,,,,,,,,2.5,,
-P29,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P30,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P31,,IOB,IO_VREF_6,UNUSED,,(0,6)***,,,,,,,
-P32,,,GND,,,,,,,,,,
-P33,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P34,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P35,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P36,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P37,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P38,,,VCCINT,,,,,,,,2.5,,
-P39,,,VCCO,,,0,,,,,na,,
-P40,,,GND,,,,,,,,,,
-P41,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P42,,IOB,IO_VREF_6,UNUSED,,(0,6)***,,,,,,,
-P43,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P44,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P45,,IOB,IO_VREF_6,UNUSED,,(0,6)***,,,,,,,
-P46,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P47,,IOB,IO_VREF_6,UNUSED,,(0,6)***,,,,,,,
-P48,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P49,,IOB,,UNUSED,,(0,6)***,,,,,,,
-P50,,,M1,,,,,,,,,,
-P51,,,GND,,,,,,,,,,
-P52,,,M0,,,,,,,,,,
-P53,,,VCCO,,,0,,,,,na,,
-P54,,,M2,,,,,,,,,,
-P55,,,NC,,,,,,,,,,
-P56,,,NC,,,,,,,,,,
-P57,,IOB,IO_VREF_5,UNUSED,,(0,5)***,,,,,,,
-P58,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P59,,IOB,IO_VREF_5,UNUSED,,(0,5)***,,,,,,,
-P60,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P61,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P62,,IOB,IO_VREF_5,UNUSED,,(0,5)***,,,,,,,
-P63,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P64,,,GND,,,,,,,,,,
-P65,,,VCCO,,,0,,,,,na,,
-P66,,,VCCINT,,,,,,,,2.5,,
-P67,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P68,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P69,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P70,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P71,led,IOB,,OUTPUT,LVTTL,(0,5)***,12,SLOW,NONE**,,,LOCATED,
-P72,,,GND,,,,,,,,,,
-P73,,IOB,IO_VREF_5,UNUSED,,(0,5)***,,,,,,,
-P74,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P75,,IOB,,UNUSED,,(0,5)***,,,,,,,
-P76,,,VCCINT,,,,,,,,2.5,,
-P77,btn,GCLKIOB,GCK1,INPUT,LVTTL,(0,5)***,,,,,,LOCATED,
-P78,,,VCCO,,,0,,,,,na,,
-P79,,,GND,,,,,,,,,,
-P80,,GCLKIOB,GCK0,UNUSED,,(0,4)***,,,,,,,
-P81,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P82,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P83,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P84,,IOB,IO_VREF_4,UNUSED,,(0,4)***,,,,,,,
-P85,,,GND,,,,,,,,,,
-P86,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P87,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P88,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P89,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P90,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P91,,,VCCINT,,,,,,,,2.5,,
-P92,,,VCCO,,,0,,,,,na,,
-P93,,,GND,,,,,,,,,,
-P94,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P95,,IOB,IO_VREF_4,UNUSED,,(0,4)***,,,,,,,
-P96,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P97,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P98,,IOB,IO_VREF_4,UNUSED,,(0,4)***,,,,,,,
-P99,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P100,,IOB,IO_VREF_4,UNUSED,,(0,4)***,,,,,,,
-P101,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P102,,IOB,,UNUSED,,(0,4)***,,,,,,,
-P103,,,GND,,,,,,,,,,
-P104,,,DONE,,,,,,,,,,
-P105,,,VCCO,,,0,,,,,na,,
-P106,,,PROGRAM,,,,,,,,,,
-P107,,IOB,IO_INIT,UNUSED,,(0,3)***,,,,,,,
-P108,,IOB,IO_D7,UNUSED,,(0,3)***,,,,,,,
-P109,,IOB,IO_VREF_3,UNUSED,,(0,3)***,,,,,,,
-P110,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P111,,IOB,IO_VREF_3,UNUSED,,(0,3)***,,,,,,,
-P112,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P113,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P114,,IOB,IO_VREF_3,UNUSED,,(0,3)***,,,,,,,
-P115,,IOB,IO_D6,UNUSED,,(0,3)***,,,,,,,
-P116,,,GND,,,,,,,,,,
-P117,,,VCCO,,,0,,,,,na,,
-P118,,,VCCINT,,,,,,,,2.5,,
-P119,,IOB,IO_D5,UNUSED,,(0,3)***,,,,,,,
-P120,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P121,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P122,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P123,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P124,,,GND,,,,,,,,,,
-P125,,IOB,IO_VREF_3,UNUSED,,(0,3)***,,,,,,,
-P126,,IOB,IO_D4,UNUSED,,(0,3)***,,,,,,,
-P127,,IOB,,UNUSED,,(0,3)***,,,,,,,
-P128,,,VCCINT,,,,,,,,2.5,,
-P129,,PCIIOB,IO_TRDY,UNUSED,,(0,3)***,,,,,,,
-P130,,,VCCO,,,0,,,,,na,,
-P131,,,GND,,,,,,,,,,
-P132,,PCIIOB,IO_IRDY,UNUSED,,(0,2)***,,,,,,,
-P133,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P134,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P135,,IOB,IO_D3,UNUSED,,(0,2)***,,,,,,,
-P136,,IOB,IO_VREF_2,UNUSED,,(0,2)***,,,,,,,
-P137,,,GND,,,,,,,,,,
-P138,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P139,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P140,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P141,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P142,,IOB,IO_D2,UNUSED,,(0,2)***,,,,,,,
-P143,,,VCCINT,,,,,,,,2.5,,
-P144,,,VCCO,,,0,,,,,na,,
-P145,,,GND,,,,,,,,,,
-P146,,IOB,IO_D1,UNUSED,,(0,2)***,,,,,,,
-P147,,IOB,IO_VREF_2,UNUSED,,(0,2)***,,,,,,,
-P148,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P149,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P150,,IOB,IO_VREF_2,UNUSED,,(0,2)***,,,,,,,
-P151,,IOB,,UNUSED,,(0,2)***,,,,,,,
-P152,,IOB,IO_VREF_2,UNUSED,,(0,2)***,,,,,,,
-P153,,IOB,IO_DIN_D0,UNUSED,,(0,2)***,,,,,,,
-P154,,IOB,IO_DOUT_BUSY,UNUSED,,(0,2)***,,,,,,,
-P155,,,CCLK,,,,,,,,,,
-P156,,,VCCO,,,0,,,,,na,,
-P157,,,TDO,,,,,,,,,,
-P158,,,GND,,,,,,,,,,
-P159,,,TDI,,,,,,,,,,
-P160,,IOB,IO_CS,UNUSED,,(0,1)***,,,,,,,
-P161,,IOB,IO_WRITE,UNUSED,,(0,1)***,,,,,,,
-P162,,IOB,IO_VREF_1,UNUSED,,(0,1)***,,,,,,,
-P163,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P164,,IOB,IO_VREF_1,UNUSED,,(0,1)***,,,,,,,
-P165,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P166,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P167,,IOB,IO_VREF_1,UNUSED,,(0,1)***,,,,,,,
-P168,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P169,,,GND,,,,,,,,,,
-P170,,,VCCO,,,0,,,,,na,,
-P171,,,VCCINT,,,,,,,,2.5,,
-P172,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P173,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P174,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P175,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P176,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P177,,,GND,,,,,,,,,,
-P178,,IOB,IO_VREF_1,UNUSED,,(0,1)***,,,,,,,
-P179,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P180,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P181,,IOB,,UNUSED,,(0,1)***,,,,,,,
-P182,,GCLKIOB,GCK2,UNUSED,,(0,1)***,,,,,,,
-P183,,,GND,,,,,,,,,,
-P184,,,VCCO,,,0,,,,,na,,
-P185,,GCLKIOB,GCK3,UNUSED,,0,,,,,,,
-P186,,,VCCINT,,,,,,,,2.5,,
-P187,,IOB,,UNUSED,,0,,,,,,,
-P188,,IOB,,UNUSED,,0,,,,,,,
-P189,,IOB,IO_VREF_0,UNUSED,,0,,,,,,,
-P190,,,GND,,,,,,,,,,
-P191,,IOB,,UNUSED,,0,,,,,,,
-P192,,IOB,,UNUSED,,0,,,,,,,
-P193,,IOB,,UNUSED,,0,,,,,,,
-P194,,IOB,,UNUSED,,0,,,,,,,
-P195,,IOB,,UNUSED,,0,,,,,,,
-P196,,,VCCINT,,,,,,,,2.5,,
-P197,,,VCCO,,,0,,,,,na,,
-P198,,,GND,,,,,,,,,,
-P199,,IOB,,UNUSED,,0,,,,,,,
-P200,,IOB,IO_VREF_0,UNUSED,,0,,,,,,,
-P201,,IOB,,UNUSED,,0,,,,,,,
-P202,,IOB,,UNUSED,,0,,,,,,,
-P203,,IOB,IO_VREF_0,UNUSED,,0,,,,,,,
-P204,,IOB,,UNUSED,,0,,,,,,,
-P205,,IOB,IO_VREF_0,UNUSED,,0,,,,,,,
-P206,,IOB,,UNUSED,,0,,,,,,,
-P207,,,TCK,,,,,,,,,,
-P208,,,VCCO,,,0,,,,,na,,
-
------,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
-
-* Default value.
-** This default Pullup/Pulldown value can be overridden in Bitgen.
-*** In some smaller packages, the VCCO bank number of a pin may trail
- the VREF bank number (VCCO,VREF).
-
Index: projects/BtnDemo/btndemo.twx
===================================================================
--- projects/BtnDemo/btndemo.twx (revision 430)
+++ projects/BtnDemo/btndemo.twx (nonexistent)
@@ -1,237 +0,0 @@
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-]>
-Release 6.2.03i Trace G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. C:/Xilinx/bin/nt/trce.exe -intstyle ise -e 3 -l 3 -xml btndemo btndemo.ncd -o
-btndemo.twr btndemo.pcf
-
- btndemo.ncd btndemo.pcf xc2s200 -5 PRODUCTION 1.27 2003-12-13 INFO:Timing:2698 - No timing constraints found, doing default enumeration. INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report. btn led 7.273 Wed Jul 07 09:50:48 2004 Trace Trace Settings Peak Memory Usage: 47 MB
-
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- 11.1
-
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Index: projects/BtnDemo/btndemo.dly
===================================================================
--- projects/BtnDemo/btndemo.dly (revision 430)
+++ projects/BtnDemo/btndemo.dly (nonexistent)
@@ -1,22 +0,0 @@
-Release 5.1i - Par F.23
-Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
-
-Thu May 29 12:19:45 2003
-
-File: btndemo.dly
-
- The 20 Worst Net Delays are:
--------------------------------
-| Max Delay (ns) | Netname |
--------------------------------
- 0.926 bnbuf
----------------------------------
-
--------------------------------------------------------------------------------
- Net Delays
--------------------------------------------------------------------------------
-
-bnbuf
- btn.GCLKOUT
- 0.926 led.O
-
Index: projects/BtnDemo/BtnDemo.prj
===================================================================
--- projects/BtnDemo/BtnDemo.prj (revision 430)
+++ projects/BtnDemo/BtnDemo.prj (nonexistent)
@@ -1 +0,0 @@
-vhdl work "BtnDemo.vhd"
Index: projects/BtnDemo/btndemo.mrp
===================================================================
--- projects/BtnDemo/btndemo.mrp (revision 430)
+++ projects/BtnDemo/btndemo.mrp (nonexistent)
@@ -1,170 +0,0 @@
-Release 6.2.03i Map G.31a
-Xilinx Mapping Report File for Design 'btndemo'
-
-Design Information
-------------------
-Command Line : C:/Xilinx/bin/nt/map.exe -intstyle ise -p xc2s200-pq208-5 -cm
-area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-Target Device : x2s200
-Target Package : pq208
-Target Speed : -5
-Mapper Version : spartan2 -- $Revision: 1.16.8.1 $
-Mapped Date : Wed Jul 07 09:50:05 2004
-
-Design Summary
---------------
-Number of errors: 0
-Number of warnings: 1
-Logic Utilization:
-Logic Distribution:
- Number of Slices containing only related logic: 0 out of 0 0%
- Number of Slices containing unrelated logic: 0 out of 0 0%
- *See NOTES below for an explanation of the effects of unrelated logic
- Number of bonded IOBs: 1 out of 140 1%
- Number of GCLKIOBs: 1 out of 4 25%
-
-Total equivalent gate count for design: 0
-Additional JTAG gate count for IOBs: 96
-Peak Memory Usage: 61 MB
-
-NOTES:
-
- Related logic is defined as being logic that shares connectivity -
- e.g. two LUTs are "related" if they share common inputs.
- When assembling slices, Map gives priority to combine logic that
- is related. Doing so results in the best timing performance.
-
- Unrelated logic shares no connectivity. Map will only begin
- packing unrelated logic into a slice once 99% of the slices are
- occupied through related logic packing.
-
- Note that once logic distribution reaches the 99% level through
- related logic packing, this does not mean the device is completely
- utilized. Unrelated logic packing will then begin, continuing until
- all usable LUTs and FFs are occupied. Depending on your timing
- budget, increased levels of unrelated logic packing may adversely
- affect the overall timing performance of your design.
-
-
-Table of Contents
------------------
-Section 1 - Errors
-Section 2 - Warnings
-Section 3 - Informational
-Section 4 - Removed Logic Summary
-Section 5 - Removed Logic
-Section 6 - IOB Properties
-Section 7 - RPMs
-Section 8 - Guide Report
-Section 9 - Area Group Summary
-Section 10 - Modular Design Summary
-Section 11 - Timing Report
-Section 12 - Configuration String Information
-Section 13 - Additional Device Resource Counts
-
-Section 1 - Errors
-------------------
-
-Section 2 - Warnings
---------------------
-WARNING:LIT - Dedicated Clock IO IBUFG symbol "U1" (output signal=led_OBUF) is
- not driving a global clock buffer of a DLL. This configuration will result in
- high clock skew and long net delay.
-
-Section 3 - Informational
--------------------------
-INFO:LIT:95 - All of the external outputs in this design are using slew rate
- limited output drivers. The delay on speed critical outputs can be
- dramatically reduced by designating them as fast outputs in the schematic.
-INFO:MapLib:562 - No environment variables are currently set.
-
-Section 4 - Removed Logic Summary
----------------------------------
-
-Section 5 - Removed Logic
--------------------------
-
-Section 6 - IOB Properties
---------------------------
-
-+------------------------------------------------------------------------------------------------------------------------+
-| IOB Name | Type | Direction | IO Standard | Drive | Slew | Reg (s) | Resistor | IOB |
-| | | | | Strength | Rate | | | Delay |
-+------------------------------------------------------------------------------------------------------------------------+
-| btn | GCLKIOB | INPUT | LVTTL | | | | | |
-| led | IOB | OUTPUT | LVTTL | 12 | SLOW | | | |
-+------------------------------------------------------------------------------------------------------------------------+
-
-Section 7 - RPMs
-----------------
-
-Section 8 - Guide Report
-------------------------
-Guide not run on this design.
-
-Section 9 - Area Group Summary
-------------------------------
-No area groups were found in this design.
-
-Section 10 - Modular Design Summary
------------------------------------
-Modular Design not used for this design.
-
-Section 11 - Timing Report
---------------------------
-This design was not run using timing mode.
-
-Section 12 - Configuration String Details
------------------------------------------
-Use the "-detail" map option to print out Configuration Strings
-
-Section 13 - Additional Device Resource Counts
-----------------------------------------------
-Number of JTAG Gates for IOBs = 2
-Number of Equivalent Gates for Design = 0
-Number of RPM Macros = 0
-Number of Hard Macros = 0
-PCI IOBs = 0
-PCI LOGICs = 0
-CAPTUREs = 0
-BSCANs = 0
-STARTUPs = 0
-DLLs = 0
-GCLKIOBs = 1
-GCLKs = 0
-Block RAMs = 0
-TBUFs = 0
-Total Registers (Flops & Latches in Slices & IOBs) not driven by LUTs = 0
-IOB Latches not driven by LUTs = 0
-IOB Latches = 0
-IOB Flip Flops not driven by LUTs = 0
-IOB Flip Flops = 0
-Unbonded IOBs = 0
-Bonded IOBs = 1
-Shift Registers = 0
-Static Shift Registers = 0
-Dynamic Shift Registers = 0
-16x1 ROMs = 0
-16x1 RAMs = 0
-32x1 RAMs = 0
-Dual Port RAMs = 0
-MULTANDs = 0
-MUXF5s + MUXF6s = 0
-4 input LUTs used as Route-Thrus = 0
-4 input LUTs = 0
-Slice Latches not driven by LUTs = 0
-Slice Latches = 0
-Slice Flip Flops not driven by LUTs = 0
-Slice Flip Flops = 0
-Slices = 0
-Number of LUT signals with 4 loads = 0
-Number of LUT signals with 3 loads = 0
-Number of LUT signals with 2 loads = 0
-Number of LUT signals with 1 load = 0
-NGM Average fanout of LUT = -1.#J
-NGM Maximum fanout of LUT = 0
-NGM Average fanin for LUT = -1.#IND
-Number of XVK_GCLKIBUF symbols = 1
-Number of OPAD symbols = 1
-Number of OBUF symbols = 1
-Number of IPAD symbols = 1
Index: projects/BtnDemo/btndemo.xpi
===================================================================
--- projects/BtnDemo/btndemo.xpi (revision 430)
+++ projects/BtnDemo/btndemo.xpi (nonexistent)
@@ -1,3 +0,0 @@
-PROGRAM=PAR
-STATE=ROUTED
-TIMESPECS_MET=OFF
Index: projects/BtnDemo/btndemo.pad
===================================================================
--- projects/BtnDemo/btndemo.pad (revision 430)
+++ projects/BtnDemo/btndemo.pad (nonexistent)
@@ -1,237 +0,0 @@
-Release 6.2.03i - Par G.31a
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
-
-Wed Jul 07 09:50:28 2004
-
-
-NOTE: This file is designed to be imported into a spreadsheet program
-such as Microsoft Excel for viewing, printing and sorting. The |
-character is used as the data field separator. This file is also designed
-to support parsing.
-
-INPUT FILE: btndemo_map.ncd
-OUTPUT FILE: btndemo.pad
-PART TYPE: xc2s200
-SPEED GRADE: -5
-PACKAGE: pq208
-
-Pinout by Pin Number:
-
------|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
-Pin Number|Signal Name|Pin Usage|Pin Name|Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage|Constraint|
-P1|||GND||||||||||
-P2|||TMS||||||||||
-P3||IOB||UNUSED||(0,7)***|||||||
-P4||IOB|IO_VREF_7|UNUSED||(0,7)***|||||||
-P5||IOB||UNUSED||(0,7)***|||||||
-P6||IOB|IO_VREF_7|UNUSED||(0,7)***|||||||
-P7||IOB||UNUSED||(0,7)***|||||||
-P8||IOB||UNUSED||(0,7)***|||||||
-P9||IOB|IO_VREF_7|UNUSED||(0,7)***|||||||
-P10||IOB||UNUSED||(0,7)***|||||||
-P11|||GND||||||||||
-P12|||VCCO|||0|||||na||
-P13|||VCCINT||||||||2.5||
-P14||IOB||UNUSED||(0,7)***|||||||
-P15||IOB||UNUSED||(0,7)***|||||||
-P16||IOB||UNUSED||(0,7)***|||||||
-P17||IOB||UNUSED||(0,7)***|||||||
-P18||IOB||UNUSED||(0,7)***|||||||
-P19|||GND||||||||||
-P20||IOB|IO_VREF_7|UNUSED||(0,7)***|||||||
-P21||IOB||UNUSED||(0,7)***|||||||
-P22||IOB||UNUSED||(0,7)***|||||||
-P23||IOB||UNUSED||(0,7)***|||||||
-P24||PCIIOB|IO_IRDY|UNUSED||(0,7)***|||||||
-P25|||GND||||||||||
-P26|||VCCO|||0|||||na||
-P27||PCIIOB|IO_TRDY|UNUSED||(0,6)***|||||||
-P28|||VCCINT||||||||2.5||
-P29||IOB||UNUSED||(0,6)***|||||||
-P30||IOB||UNUSED||(0,6)***|||||||
-P31||IOB|IO_VREF_6|UNUSED||(0,6)***|||||||
-P32|||GND||||||||||
-P33||IOB||UNUSED||(0,6)***|||||||
-P34||IOB||UNUSED||(0,6)***|||||||
-P35||IOB||UNUSED||(0,6)***|||||||
-P36||IOB||UNUSED||(0,6)***|||||||
-P37||IOB||UNUSED||(0,6)***|||||||
-P38|||VCCINT||||||||2.5||
-P39|||VCCO|||0|||||na||
-P40|||GND||||||||||
-P41||IOB||UNUSED||(0,6)***|||||||
-P42||IOB|IO_VREF_6|UNUSED||(0,6)***|||||||
-P43||IOB||UNUSED||(0,6)***|||||||
-P44||IOB||UNUSED||(0,6)***|||||||
-P45||IOB|IO_VREF_6|UNUSED||(0,6)***|||||||
-P46||IOB||UNUSED||(0,6)***|||||||
-P47||IOB|IO_VREF_6|UNUSED||(0,6)***|||||||
-P48||IOB||UNUSED||(0,6)***|||||||
-P49||IOB||UNUSED||(0,6)***|||||||
-P50|||M1||||||||||
-P51|||GND||||||||||
-P52|||M0||||||||||
-P53|||VCCO|||0|||||na||
-P54|||M2||||||||||
-P55|||NC||||||||||
-P56|||NC||||||||||
-P57||IOB|IO_VREF_5|UNUSED||(0,5)***|||||||
-P58||IOB||UNUSED||(0,5)***|||||||
-P59||IOB|IO_VREF_5|UNUSED||(0,5)***|||||||
-P60||IOB||UNUSED||(0,5)***|||||||
-P61||IOB||UNUSED||(0,5)***|||||||
-P62||IOB|IO_VREF_5|UNUSED||(0,5)***|||||||
-P63||IOB||UNUSED||(0,5)***|||||||
-P64|||GND||||||||||
-P65|||VCCO|||0|||||na||
-P66|||VCCINT||||||||2.5||
-P67||IOB||UNUSED||(0,5)***|||||||
-P68||IOB||UNUSED||(0,5)***|||||||
-P69||IOB||UNUSED||(0,5)***|||||||
-P70||IOB||UNUSED||(0,5)***|||||||
-P71|led|IOB||OUTPUT|LVTTL|(0,5)***|12|SLOW|NONE**|||LOCATED|
-P72|||GND||||||||||
-P73||IOB|IO_VREF_5|UNUSED||(0,5)***|||||||
-P74||IOB||UNUSED||(0,5)***|||||||
-P75||IOB||UNUSED||(0,5)***|||||||
-P76|||VCCINT||||||||2.5||
-P77|btn|GCLKIOB|GCK1|INPUT|LVTTL|(0,5)***||||||LOCATED|
-P78|||VCCO|||0|||||na||
-P79|||GND||||||||||
-P80||GCLKIOB|GCK0|UNUSED||(0,4)***|||||||
-P81||IOB||UNUSED||(0,4)***|||||||
-P82||IOB||UNUSED||(0,4)***|||||||
-P83||IOB||UNUSED||(0,4)***|||||||
-P84||IOB|IO_VREF_4|UNUSED||(0,4)***|||||||
-P85|||GND||||||||||
-P86||IOB||UNUSED||(0,4)***|||||||
-P87||IOB||UNUSED||(0,4)***|||||||
-P88||IOB||UNUSED||(0,4)***|||||||
-P89||IOB||UNUSED||(0,4)***|||||||
-P90||IOB||UNUSED||(0,4)***|||||||
-P91|||VCCINT||||||||2.5||
-P92|||VCCO|||0|||||na||
-P93|||GND||||||||||
-P94||IOB||UNUSED||(0,4)***|||||||
-P95||IOB|IO_VREF_4|UNUSED||(0,4)***|||||||
-P96||IOB||UNUSED||(0,4)***|||||||
-P97||IOB||UNUSED||(0,4)***|||||||
-P98||IOB|IO_VREF_4|UNUSED||(0,4)***|||||||
-P99||IOB||UNUSED||(0,4)***|||||||
-P100||IOB|IO_VREF_4|UNUSED||(0,4)***|||||||
-P101||IOB||UNUSED||(0,4)***|||||||
-P102||IOB||UNUSED||(0,4)***|||||||
-P103|||GND||||||||||
-P104|||DONE||||||||||
-P105|||VCCO|||0|||||na||
-P106|||PROGRAM||||||||||
-P107||IOB|IO_INIT|UNUSED||(0,3)***|||||||
-P108||IOB|IO_D7|UNUSED||(0,3)***|||||||
-P109||IOB|IO_VREF_3|UNUSED||(0,3)***|||||||
-P110||IOB||UNUSED||(0,3)***|||||||
-P111||IOB|IO_VREF_3|UNUSED||(0,3)***|||||||
-P112||IOB||UNUSED||(0,3)***|||||||
-P113||IOB||UNUSED||(0,3)***|||||||
-P114||IOB|IO_VREF_3|UNUSED||(0,3)***|||||||
-P115||IOB|IO_D6|UNUSED||(0,3)***|||||||
-P116|||GND||||||||||
-P117|||VCCO|||0|||||na||
-P118|||VCCINT||||||||2.5||
-P119||IOB|IO_D5|UNUSED||(0,3)***|||||||
-P120||IOB||UNUSED||(0,3)***|||||||
-P121||IOB||UNUSED||(0,3)***|||||||
-P122||IOB||UNUSED||(0,3)***|||||||
-P123||IOB||UNUSED||(0,3)***|||||||
-P124|||GND||||||||||
-P125||IOB|IO_VREF_3|UNUSED||(0,3)***|||||||
-P126||IOB|IO_D4|UNUSED||(0,3)***|||||||
-P127||IOB||UNUSED||(0,3)***|||||||
-P128|||VCCINT||||||||2.5||
-P129||PCIIOB|IO_TRDY|UNUSED||(0,3)***|||||||
-P130|||VCCO|||0|||||na||
-P131|||GND||||||||||
-P132||PCIIOB|IO_IRDY|UNUSED||(0,2)***|||||||
-P133||IOB||UNUSED||(0,2)***|||||||
-P134||IOB||UNUSED||(0,2)***|||||||
-P135||IOB|IO_D3|UNUSED||(0,2)***|||||||
-P136||IOB|IO_VREF_2|UNUSED||(0,2)***|||||||
-P137|||GND||||||||||
-P138||IOB||UNUSED||(0,2)***|||||||
-P139||IOB||UNUSED||(0,2)***|||||||
-P140||IOB||UNUSED||(0,2)***|||||||
-P141||IOB||UNUSED||(0,2)***|||||||
-P142||IOB|IO_D2|UNUSED||(0,2)***|||||||
-P143|||VCCINT||||||||2.5||
-P144|||VCCO|||0|||||na||
-P145|||GND||||||||||
-P146||IOB|IO_D1|UNUSED||(0,2)***|||||||
-P147||IOB|IO_VREF_2|UNUSED||(0,2)***|||||||
-P148||IOB||UNUSED||(0,2)***|||||||
-P149||IOB||UNUSED||(0,2)***|||||||
-P150||IOB|IO_VREF_2|UNUSED||(0,2)***|||||||
-P151||IOB||UNUSED||(0,2)***|||||||
-P152||IOB|IO_VREF_2|UNUSED||(0,2)***|||||||
-P153||IOB|IO_DIN_D0|UNUSED||(0,2)***|||||||
-P154||IOB|IO_DOUT_BUSY|UNUSED||(0,2)***|||||||
-P155|||CCLK||||||||||
-P156|||VCCO|||0|||||na||
-P157|||TDO||||||||||
-P158|||GND||||||||||
-P159|||TDI||||||||||
-P160||IOB|IO_CS|UNUSED||(0,1)***|||||||
-P161||IOB|IO_WRITE|UNUSED||(0,1)***|||||||
-P162||IOB|IO_VREF_1|UNUSED||(0,1)***|||||||
-P163||IOB||UNUSED||(0,1)***|||||||
-P164||IOB|IO_VREF_1|UNUSED||(0,1)***|||||||
-P165||IOB||UNUSED||(0,1)***|||||||
-P166||IOB||UNUSED||(0,1)***|||||||
-P167||IOB|IO_VREF_1|UNUSED||(0,1)***|||||||
-P168||IOB||UNUSED||(0,1)***|||||||
-P169|||GND||||||||||
-P170|||VCCO|||0|||||na||
-P171|||VCCINT||||||||2.5||
-P172||IOB||UNUSED||(0,1)***|||||||
-P173||IOB||UNUSED||(0,1)***|||||||
-P174||IOB||UNUSED||(0,1)***|||||||
-P175||IOB||UNUSED||(0,1)***|||||||
-P176||IOB||UNUSED||(0,1)***|||||||
-P177|||GND||||||||||
-P178||IOB|IO_VREF_1|UNUSED||(0,1)***|||||||
-P179||IOB||UNUSED||(0,1)***|||||||
-P180||IOB||UNUSED||(0,1)***|||||||
-P181||IOB||UNUSED||(0,1)***|||||||
-P182||GCLKIOB|GCK2|UNUSED||(0,1)***|||||||
-P183|||GND||||||||||
-P184|||VCCO|||0|||||na||
-P185||GCLKIOB|GCK3|UNUSED||0|||||||
-P186|||VCCINT||||||||2.5||
-P187||IOB||UNUSED||0|||||||
-P188||IOB||UNUSED||0|||||||
-P189||IOB|IO_VREF_0|UNUSED||0|||||||
-P190|||GND||||||||||
-P191||IOB||UNUSED||0|||||||
-P192||IOB||UNUSED||0|||||||
-P193||IOB||UNUSED||0|||||||
-P194||IOB||UNUSED||0|||||||
-P195||IOB||UNUSED||0|||||||
-P196|||VCCINT||||||||2.5||
-P197|||VCCO|||0|||||na||
-P198|||GND||||||||||
-P199||IOB||UNUSED||0|||||||
-P200||IOB|IO_VREF_0|UNUSED||0|||||||
-P201||IOB||UNUSED||0|||||||
-P202||IOB||UNUSED||0|||||||
-P203||IOB|IO_VREF_0|UNUSED||0|||||||
-P204||IOB||UNUSED||0|||||||
-P205||IOB|IO_VREF_0|UNUSED||0|||||||
-P206||IOB||UNUSED||0|||||||
-P207|||TCK||||||||||
-P208|||VCCO|||0|||||na||
-
------|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
-
-* Default value.
-** This default Pullup/Pulldown value can be overridden in Bitgen.
-*** In some smaller packages, the VCCO bank number of a pin may trail
- the VREF bank number (VCCO,VREF).
-
Index: projects/BtnDemo/BtnDemo_ngdbuild.xrpt
===================================================================
--- projects/BtnDemo/BtnDemo_ngdbuild.xrpt (revision 430)
+++ projects/BtnDemo/BtnDemo_ngdbuild.xrpt (nonexistent)
@@ -1,69 +0,0 @@
-
-
-
-
-
-
-
-
-
- -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Index: projects/BtnDemo/__projnav.log
===================================================================
--- projects/BtnDemo/__projnav.log (revision 430)
+++ projects/BtnDemo/__projnav.log (nonexistent)
@@ -1,1282 +0,0 @@
-ISE Auto-Make Log File
------------------------
-
-Updating: Edit Implementation Constraints (Constraints Editor)
-
-Starting: 'exewrap @__constEditor_exewrap.rsp'
-
-
-Creating TCL Process
-Starting: 'constraints_editor btndemo.ucf btndemo.ngd'
-
-
-Tcl c:/xilinx_webpack/data/projnav/constEditor.tcl detected that program 'constraints_editor btndemo.ucf btndemo.ngd' completed successfully.
-
-call Constraints Editor completed
-Starting: 'chkdate'
-
-
-Tcl c:/xilinx_webpack/data/projnav/constEditor.tcl detected that program 'chkdate' completed successfully.
-
- Existing implementation results have been retained !
- To incorporate your constraint changes, right click on the 'Implement Design' process and select 'Rerun All'.
-Done: completed successfully.
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-JHDPARSE - VHDL/Verilog Parser.
-ISE 5.1i Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
-
-Scanning BtnDemo.vhd
-Scanning BtnDemo.vhd
-Writing BtnDemo.jhd.
-
-JHDPARSE complete - 0 errors, 0 warnings.
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-
-Started process "Synthesize".
-
-
-=========================================================================
-* HDL Compilation *
-=========================================================================
-WARNING:HDLParsers:3215 - Unit work/BTNDEMO is now defined in a different file: was C:/Projects/RefDsgn/D2/BtnDemo/BtnDemo.vhd, now is F:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd
-WARNING:HDLParsers:3215 - Unit work/BTNDEMO/BEHAVIORAL is now defined in a different file: was C:/Projects/RefDsgn/D2/BtnDemo/BtnDemo.vhd, now is F:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd
-Compiling vhdl file F:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd in Library work.
-Architecture behavioral of Entity btndemo is up to date.
-
-=========================================================================
-* HDL Analysis *
-=========================================================================
-
-Analyzing Entity (Architecture ).
-WARNING:Xst:766 - F:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd line 70: Generating a Black Box for component .
-Entity analyzed. Unit generated.
-
-
-=========================================================================
-* HDL Synthesis *
-=========================================================================
-
-Synthesizing Unit .
- Related source file is F:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd.
-Unit synthesized.
-
-
-=========================================================================
-HDL Synthesis Report
-
-Found no macro
-=========================================================================
-
-=========================================================================
-* Low Level Synthesis *
-=========================================================================
-Library "C:/XilinxISE/data/librtl.xst" Consulted
-
-Optimizing unit ...
-
-Mapping all equations...
-Loading device for application Xst from file 'v200.nph' in environment C:/XilinxISE.
-Building and optimizing final netlist ...
-Found area constraint ratio of 100 (+ 5) on block btndemo, actual ratio is 0.
-
-=========================================================================
-* Final Report *
-=========================================================================
-
-Device utilization summary:
----------------------------
-
-Selected Device : 2s200pq208-5
-
- Number of bonded IOBs: 2 out of 144 1%
-
-
-=========================================================================
-TIMING REPORT
-
-
-Clock Information:
-------------------
-No clock signals found in this design
-
-Timing Summary:
----------------
-Speed Grade: -5
-
- Minimum period: No path found
- Minimum input arrival time before clock: No path found
- Maximum output required time after clock: No path found
- Maximum combinational path delay: 8.404ns
-
-=========================================================================
-
-Completed process "Synthesize".
-
-
-
-Started process "Translate".
-
-
-Command Line: ngdbuild -quiet -dd f:\engineering\projects\web5.1\d2\btndemo/_ngo
--uc btndemo.ucf -insert_keep_hierarchy -p xc2s200-pq208-5 btndemo.ngc
-btndemo.ngd
-
-Reading NGO file "F:/Engineering/Projects/web5.1/D2/BtnDemo/btndemo.ngc" ...
-Reading component libraries for design expansion...
-
-Annotating constraints to design from file "btndemo.ucf" ...
-
-Checking timing specifications ...
-Checking expanded design ...
-
-NGDBUILD Design Results Summary:
- Number of errors: 0
- Number of warnings: 0
-
-Writing NGD file "btndemo.ngd" ...
-
-Writing NGDBUILD log file "btndemo.bld"...
-
-NGDBUILD done.
-
-Completed process "Translate".
-
-
-
-Started process "Map".
-
-Using target part "2s200pq208-5".
-Removing unused or disabled logic...
-Running cover...
-Running directed packing...
-Running delay-based LUT packing...
-Running related packing...
-
-Design Summary:
- Number of errors: 0
- Number of warnings: 1
- Number of Slices containing
- unrelated logic: 0 out of 0 0%
- Number of bonded IOBs: 1 out of 140 1%
- Number of GCLKIOBs: 1 out of 4 25%
-Total equivalent gate count for design: 0
-Additional JTAG gate count for IOBs: 96
-Peak Memory Usage: 52 MB
-
-Mapping completed.
-See MAP report file "btndemo_map.mrp" for details.
-
-Completed process "Map".
-
-Mapping Module btndemo . . .
-MAP command line:
-map -quiet -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-Mapping Module btndemo: DONE
-
-
-
-Started process "Place & Route".
-
-Release 5.1i - Par F.23
-Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
-
-
-
-
-Constraints file: btndemo.pcf
-
-Loading device database for application par from file "btndemo_map.ncd".
- "btndemo" is an NCD, version 2.37, device xc2s200, package pq208, speed -5
-Loading device for application par from file 'v200.nph' in environment
-C:/XilinxISE.
-Device speed data version: PRELIMINARY 1.25 2002-06-19.
-
-
-Resolving physical constraints.
-Finished resolving physical constraints.
-
-Device utilization summary:
-
- Number of External GCLKIOBs 1 out of 4 25%
- Number of External IOBs 1 out of 140 1%
- Number of LOCed External IOBs 1 out of 1 100%
-
-
-
-
-
-Overall effort level (-ol): 2 (set by user)
-Placer effort level (-pl): 2 (set by user)
-Placer cost table entry (-t): 1
-Router effort level (-rl): 2 (set by user)
-
-
-Phase 1.1
-Phase 1.1 (Checksum:989683) REAL time: 2 secs
-
-Phase 2.23
-Phase 2.23 (Checksum:1312cfe) REAL time: 2 secs
-
-Phase 3.3
-Phase 3.3 (Checksum:1c9c37d) REAL time: 2 secs
-
-Phase 4.5
-Phase 4.5 (Checksum:26259fc) REAL time: 2 secs
-
-Phase 5.8
-Phase 5.8 (Checksum:98996d) REAL time: 2 secs
-
-Phase 6.5
-Phase 6.5 (Checksum:39386fa) REAL time: 2 secs
-
-Phase 7.18
-Phase 7.18 (Checksum:42c1d79) REAL time: 2 secs
-
-Writing design to file btndemo.ncd.
-
-Total REAL time to placer completion: 2 secs
-Total CPU time to placer completion: 1 secs
-
-
-Starting Router REAL time: 2 secs
-
-Phase 1: 1 unrouted; REAL time: 2 secs
-
-Phase 2: 1 unrouted; REAL time: 2 secs
-
-Phase 3: 0 unrouted; REAL time: 2 secs
-
-Phase 4: 0 unrouted; REAL time: 2 secs
-
-Finished Router REAL time: 2 secs
-
-Total REAL time to router completion: 2 secs
-Total CPU time to router completion: 1 secs
-
-Generating "par" statistics.
-
-
-All signals are completely routed.
-
-Total REAL time to par completion: 7 secs
-Total CPU time to par completion: 2 secs
-
-Placement: Completed - No errors found.
-Routing: Completed - No errors found.
-
-Writing design to file btndemo.ncd.
-
-
-PAR done.
-
-Completed process "Place & Route".
-
-
-Started process "Generate Post-Place & Route Static Timing".
-
-
-Loading device database for application trce.exe from file "btndemo.ncd".
- "btndemo" is an NCD, version 2.37, device xc2s200, package pq208, speed -5
-Loading device for application trce.exe from file 'v200.nph' in environment
-C:/XilinxISE.
-
-Analysis completed Fri Mar 28 16:52:32 2003
---------------------------------------------------------------------------------
-
-Generating Report ...
-
-
-Completed process "Generate Post-Place & Route Static Timing".
-
-Place & Route Module btndemo . . .
-PAR command line: par -w -ol 2 -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-PAR completed successfully
-
-
-
-
-Started process "Generate Programming File".
-
-Release 5.1i - Bitgen F.23
-Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
-
-Loading device database for application Bitgen from file "btndemo.ncd".
- "btndemo" is an NCD, version 2.37, device xc2s200, package pq208, speed -5
-Loading device for application Bitgen from file 'v200.nph' in environment
-C:/XilinxISE.
-Opened constraints file btndemo.pcf.
-
-Fri Mar 28 16:52:34 2003
-
-Running DRC.
-DRC detected 0 errors and 0 warnings.
-Creating bit map...
-Saving bit stream in "btndemo.bit".
-Bitstream generation is complete.
-
-Completed process "Generate Programming File".
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-Started process "Generate Programming File".
-
-Release 5.1i - Bitgen F.23
-Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
-
-Loading device database for application Bitgen from file "btndemo.ncd".
- "btndemo" is an NCD, version 2.37, device xc2s200, package pq208, speed -5
-Loading device for application Bitgen from file 'v200.nph' in environment
-C:/XilinxISE.
-Opened constraints file btndemo.pcf.
-
-Mon Mar 31 17:13:29 2003
-
-Running DRC.
-DRC detected 0 errors and 0 warnings.
-Creating bit map...
-Saving bit stream in "btndemo.bit".
-Bitstream generation is complete.
-
-Completed process "Generate Programming File".
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-
-Started process "Synthesize".
-
-
-=========================================================================
-* HDL Compilation *
-=========================================================================
-WARNING:HDLParsers:3215 - Unit work/BTNDEMO is now defined in a different file: was F:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd, now is E:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd
-WARNING:HDLParsers:3215 - Unit work/BTNDEMO/BEHAVIORAL is now defined in a different file: was F:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd, now is E:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd
-Compiling vhdl file E:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd in Library work.
-Architecture behavioral of Entity btndemo is up to date.
-
-=========================================================================
-* HDL Analysis *
-=========================================================================
-
-Analyzing Entity (Architecture ).
-WARNING:Xst:766 - E:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd line 70: Generating a Black Box for component .
-Entity analyzed. Unit generated.
-
-
-=========================================================================
-* HDL Synthesis *
-=========================================================================
-
-Synthesizing Unit .
- Related source file is E:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd.
-Unit synthesized.
-
-
-=========================================================================
-HDL Synthesis Report
-
-Found no macro
-=========================================================================
-
-=========================================================================
-* Low Level Synthesis *
-=========================================================================
-Library "C:/XilinxISE/data/librtl.xst" Consulted
-
-Optimizing unit ...
-
-Mapping all equations...
-Loading device for application Xst from file 'v200.nph' in environment C:/XilinxISE.
-Building and optimizing final netlist ...
-Found area constraint ratio of 100 (+ 5) on block btndemo, actual ratio is 0.
-
-=========================================================================
-* Final Report *
-=========================================================================
-
-Device utilization summary:
----------------------------
-
-Selected Device : 2s200pq208-5
-
- Number of bonded IOBs: 2 out of 144 1%
-
-
-=========================================================================
-TIMING REPORT
-
-
-Clock Information:
-------------------
-No clock signals found in this design
-
-Timing Summary:
----------------
-Speed Grade: -5
-
- Minimum period: No path found
- Minimum input arrival time before clock: No path found
- Maximum output required time after clock: No path found
- Maximum combinational path delay: 8.404ns
-
-=========================================================================
-
-Completed process "Synthesize".
-
-
-
-Started process "Translate".
-
-
-Command Line: ngdbuild -quiet -dd e:\engineering\projects\web5.1\d2\btndemo/_ngo
--uc btndemo.ucf -insert_keep_hierarchy -p xc2s200-pq208-5 btndemo.ngc
-btndemo.ngd
-
-Reading NGO file "E:/Engineering/Projects/web5.1/D2/BtnDemo/btndemo.ngc" ...
-Reading component libraries for design expansion...
-
-Annotating constraints to design from file "btndemo.ucf" ...
-
-Checking timing specifications ...
-Checking expanded design ...
-
-NGDBUILD Design Results Summary:
- Number of errors: 0
- Number of warnings: 0
-
-Writing NGD file "btndemo.ngd" ...
-
-Writing NGDBUILD log file "btndemo.bld"...
-
-NGDBUILD done.
-
-Completed process "Translate".
-
-
-
-Started process "Map".
-
-Using target part "2s200pq208-5".
-Removing unused or disabled logic...
-Running cover...
-Running directed packing...
-Running delay-based LUT packing...
-Running related packing...
-
-Design Summary:
- Number of errors: 0
- Number of warnings: 1
- Number of Slices containing
- unrelated logic: 0 out of 0 0%
- Number of bonded IOBs: 1 out of 140 1%
- Number of GCLKIOBs: 1 out of 4 25%
-Total equivalent gate count for design: 0
-Additional JTAG gate count for IOBs: 96
-Peak Memory Usage: 52 MB
-
-Mapping completed.
-See MAP report file "btndemo_map.mrp" for details.
-
-Completed process "Map".
-
-Mapping Module btndemo . . .
-MAP command line:
-map -quiet -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-Mapping Module btndemo: DONE
-
-
-
-Started process "Place & Route".
-
-Release 5.1i - Par F.23
-Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
-
-
-
-
-Constraints file: btndemo.pcf
-
-Loading device database for application par from file "btndemo_map.ncd".
- "btndemo" is an NCD, version 2.37, device xc2s200, package pq208, speed -5
-Loading device for application par from file 'v200.nph' in environment
-C:/XilinxISE.
-Device speed data version: PRELIMINARY 1.25 2002-06-19.
-
-
-Resolving physical constraints.
-Finished resolving physical constraints.
-
-Device utilization summary:
-
- Number of External GCLKIOBs 1 out of 4 25%
- Number of External IOBs 1 out of 140 1%
- Number of LOCed External IOBs 1 out of 1 100%
-
-
-
-
-
-Overall effort level (-ol): 2 (set by user)
-Placer effort level (-pl): 2 (set by user)
-Placer cost table entry (-t): 1
-Router effort level (-rl): 2 (set by user)
-
-
-Phase 1.1
-Phase 1.1 (Checksum:989683) REAL time: 2 secs
-
-Phase 2.23
-Phase 2.23 (Checksum:1312cfe) REAL time: 2 secs
-
-Phase 3.3
-Phase 3.3 (Checksum:1c9c37d) REAL time: 2 secs
-
-Phase 4.5
-Phase 4.5 (Checksum:26259fc) REAL time: 2 secs
-
-Phase 5.8
-Phase 5.8 (Checksum:98996d) REAL time: 2 secs
-
-Phase 6.5
-Phase 6.5 (Checksum:39386fa) REAL time: 2 secs
-
-Phase 7.18
-Phase 7.18 (Checksum:42c1d79) REAL time: 2 secs
-
-Writing design to file btndemo.ncd.
-
-Total REAL time to placer completion: 3 secs
-Total CPU time to placer completion: 1 secs
-
-
-Starting Router REAL time: 3 secs
-
-Phase 1: 1 unrouted; REAL time: 3 secs
-
-Phase 2: 1 unrouted; REAL time: 3 secs
-
-Phase 3: 0 unrouted; REAL time: 3 secs
-
-Phase 4: 0 unrouted; REAL time: 3 secs
-
-Finished Router REAL time: 3 secs
-
-Total REAL time to router completion: 3 secs
-Total CPU time to router completion: 1 secs
-
-Generating "par" statistics.
-
-
-All signals are completely routed.
-
-Total REAL time to par completion: 6 secs
-Total CPU time to par completion: 2 secs
-
-Placement: Completed - No errors found.
-Routing: Completed - No errors found.
-
-Writing design to file btndemo.ncd.
-
-
-PAR done.
-
-Completed process "Place & Route".
-
-
-Started process "Generate Post-Place & Route Static Timing".
-
-
-Loading device database for application trce.exe from file "btndemo.ncd".
- "btndemo" is an NCD, version 2.37, device xc2s200, package pq208, speed -5
-Loading device for application trce.exe from file 'v200.nph' in environment
-C:/XilinxISE.
-
-Analysis completed Thu May 29 12:19:52 2003
---------------------------------------------------------------------------------
-
-Generating Report ...
-
-
-Completed process "Generate Post-Place & Route Static Timing".
-
-Place & Route Module btndemo . . .
-PAR command line: par -w -ol 2 -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-PAR completed successfully
-
-
-
-
-Started process "Generate Programming File".
-
-Release 5.1i - Bitgen F.23
-Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
-
-Loading device database for application Bitgen from file "btndemo.ncd".
- "btndemo" is an NCD, version 2.37, device xc2s200, package pq208, speed -5
-Loading device for application Bitgen from file 'v200.nph' in environment
-C:/XilinxISE.
-Opened constraints file btndemo.pcf.
-
-Thu May 29 12:19:55 2003
-
-Running DRC.
-DRC detected 0 errors and 0 warnings.
-Creating bit map...
-Saving bit stream in "btndemo.bit".
-Bitstream generation is complete.
-
-Completed process "Generate Programming File".
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-
-Started process "Synthesize".
-
-
-=========================================================================
-* HDL Compilation *
-=========================================================================
-WARNING:HDLParsers:3215 - Unit work/BTNDEMO is now defined in a different file: was E:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd, now is X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd
-WARNING:HDLParsers:3215 - Unit work/BTNDEMO/BEHAVIORAL is now defined in a different file: was E:/Engineering/Projects/web5.1/D2/BtnDemo/BtnDemo.vhd, now is X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd
-Compiling vhdl file X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd in Library work.
-Entity (Architecture ) compiled.
-
-=========================================================================
-* HDL Analysis *
-=========================================================================
-Analyzing Entity (Architecture ).
-WARNING:Xst:766 - X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd line 70: Generating a Black Box for component .
-Entity analyzed. Unit generated.
-
-
-=========================================================================
-* HDL Synthesis *
-=========================================================================
-
-Synthesizing Unit .
- Related source file is X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd.
-Unit synthesized.
-
-
-=========================================================================
-* Advanced HDL Synthesis *
-=========================================================================
-
-Advanced RAM inference ...
-Advanced multiplier inference ...
-Advanced Registered AddSub inference ...
-Dynamic shift register inference ...
-
-=========================================================================
-HDL Synthesis Report
-
-Found no macro
-=========================================================================
-
-=========================================================================
-* Low Level Synthesis *
-=========================================================================
-
-Optimizing unit ...
-Loading device for application Xst from file 'v200.nph' in environment C:/Xilinx.
-
-Mapping all equations...
-Building and optimizing final netlist ...
-Found area constraint ratio of 100 (+ 5) on block btndemo, actual ratio is 0.
-
-=========================================================================
-* Final Report *
-=========================================================================
-
-Device utilization summary:
----------------------------
-
-Selected Device : 2s200pq208-5
-
- Number of bonded IOBs: 2 out of 144 1%
-
-
-=========================================================================
-TIMING REPORT
-
-
-Clock Information:
-------------------
-No clock signals found in this design
-
-Timing Summary:
----------------
-Speed Grade: -5
-
- Minimum period: No path found
- Minimum input arrival time before clock: No path found
- Maximum output required time after clock: No path found
- Maximum combinational path delay: 8.404ns
-
-=========================================================================
-Completed process "Synthesize".
-
-
-
-Started process "Translate".
-
-
-Command Line: ngdbuild -intstyle ise -dd x:\barron\config\d2\basic\btndemo/_ngo
--uc btndemo.ucf -p xc2s200-pq208-5 btndemo.ngc btndemo.ngd
-
-Reading NGO file "X:/Barron/config/D2/BASIC/BtnDemo/btndemo.ngc" ...
-Reading component libraries for design expansion...
-
-Annotating constraints to design from file "btndemo.ucf" ...
-
-Checking timing specifications ...
-Checking expanded design ...
-
-NGDBUILD Design Results Summary:
- Number of errors: 0
- Number of warnings: 0
-
-Total memory usage is 39036 kilobytes
-
-Writing NGD file "btndemo.ngd" ...
-
-Writing NGDBUILD log file "btndemo.bld"...
-
-NGDBUILD done.
-Completed process "Translate".
-
-
-
-Started process "Map".
-
-Using target part "2s200pq208-5".
-Removing unused or disabled logic...
-Running cover...
-Running directed packing...
-Running delay-based LUT packing...
-Running related packing...
-
-Design Summary:
-Number of errors: 0
-Number of warnings: 1
-Logic Utilization:
-Logic Distribution:
- Number of Slices containing only related logic: 0 out of 0 0%
- Number of Slices containing unrelated logic: 0 out of 0 0%
- *See NOTES below for an explanation of the effects of unrelated logic
- Number of bonded IOBs: 1 out of 140 1%
- Number of GCLKIOBs: 1 out of 4 25%
-
-Total equivalent gate count for design: 0
-Additional JTAG gate count for IOBs: 96
-Peak Memory Usage: 61 MB
-
-NOTES:
-
- Related logic is defined as being logic that shares connectivity -
- e.g. two LUTs are "related" if they share common inputs.
- When assembling slices, Map gives priority to combine logic that
- is related. Doing so results in the best timing performance.
-
- Unrelated logic shares no connectivity. Map will only begin
- packing unrelated logic into a slice once 99% of the slices are
- occupied through related logic packing.
-
- Note that once logic distribution reaches the 99% level through
- related logic packing, this does not mean the device is completely
- utilized. Unrelated logic packing will then begin, continuing until
- all usable LUTs and FFs are occupied. Depending on your timing
- budget, increased levels of unrelated logic packing may adversely
- affect the overall timing performance of your design.
-
-
-Mapping completed.
-See MAP report file "btndemo_map.mrp" for details.
-Completed process "Map".
-
-Mapping Module btndemo . . .
-MAP command line:
-map -intstyle ise -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-Mapping Module btndemo: DONE
-
-
-
-Started process "Place & Route".
-
-
-
-
-
-Constraints file: btndemo.pcf
-
-Loading device database for application Par from file "btndemo_map.ncd".
- "btndemo" is an NCD, version 2.38, device xc2s200, package pq208, speed -5
-Loading device for application Par from file 'v200.nph' in environment
-C:/Xilinx.
-Device speed data version: PRODUCTION 1.27 2003-12-13.
-
-
-Resolving physical constraints.
-Finished resolving physical constraints.
-
-Device utilization summary:
-
- Number of External GCLKIOBs 1 out of 4 25%
- Number of External IOBs 1 out of 140 1%
- Number of LOCed External IOBs 1 out of 1 100%
-
-
-
-
-
-Overall effort level (-ol): Standard (set by user)
-Placer effort level (-pl): Standard (set by user)
-Placer cost table entry (-t): 1
-Router effort level (-rl): Standard (set by user)
-
-
-Phase 1.1
-Phase 1.1 (Checksum:989683) REAL time: 3 secs
-
-Phase 2.23
-Phase 2.23 (Checksum:1312cfe) REAL time: 3 secs
-
-Phase 3.3
-Phase 3.3 (Checksum:1c9c37d) REAL time: 3 secs
-
-Phase 4.5
-Phase 4.5 (Checksum:26259fc) REAL time: 3 secs
-
-Phase 5.8
-Phase 5.8 (Checksum:98996d) REAL time: 4 secs
-
-Phase 6.5
-Phase 6.5 (Checksum:39386fa) REAL time: 4 secs
-
-Phase 7.18
-Phase 7.18 (Checksum:42c1d79) REAL time: 4 secs
-
-Writing design to file btndemo.ncd.
-
-Total REAL time to Placer completion: 6 secs
-Total CPU time to Placer completion: 1 secs
-
-
-Phase 1: 1 unrouted; REAL time: 6 secs
-
-Phase 2: 1 unrouted; REAL time: 6 secs
-
-Phase 3: 0 unrouted; REAL time: 6 secs
-
-Phase 4: 0 unrouted; REAL time: 6 secs
-
-Total REAL time to Router completion: 7 secs
-Total CPU time to Router completion: 2 secs
-
-Generating "par" statistics.
-
-Generating Pad Report.
-
-All signals are completely routed.
-
-Total REAL time to PAR completion: 16 secs
-Total CPU time to PAR completion: 5 secs
-
-Peak Memory Usage: 50 MB
-
-Placement: Completed - No errors found.
-Routing: Completed - No errors found.
-
-Writing design to file btndemo.ncd.
-
-
-PAR done.
-Completed process "Place & Route".
-
-
-Started process "Generate Post-Place & Route Static Timing".
-
-WARNING:SpeedCalc:42 - Cannot find referenced model "bel_d_min_period". This
- generally indicates that there is an inconsistency between versions of the
- speed and device data files. Please check to ensure that the XILINX
- environment variable is set correctly, if the MYXILINX variable is set, make
- sure that it is pointing to patch files that are compatable with the version
- of software that the XILINX variable points to.
-WARNING:SpeedCalc:42 - Cannot find referenced model "bel_d_min_period". This
- generally indicates that there is an inconsistency between versions of the
- speed and device data files. Please check to ensure that the XILINX
- environment variable is set correctly, if the MYXILINX variable is set, make
- sure that it is pointing to patch files that are compatable with the version
- of software that the XILINX variable points to.
-
-Analysis completed Tue Jul 06 17:46:21 2004
---------------------------------------------------------------------------------
-
-Generating Report ...
-
-Completed process "Generate Post-Place & Route Static Timing".
-
-Place & Route Module btndemo . . .
-PAR command line: par -w -intstyle ise -ol std -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-PAR completed successfully
-
-
-
-
-Started process "Generate Programming File".
-
-Completed process "Generate Programming File".
-
-
-
-Project Navigator Auto-Make Log File
--------------------------------------
-
-
-
-
-Started process "Synthesize".
-
-
-=========================================================================
-* HDL Compilation *
-=========================================================================
-Compiling vhdl file X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd in Library work.
-Architecture behavioral of Entity btndemo is up to date.
-
-=========================================================================
-* HDL Analysis *
-=========================================================================
-Analyzing Entity (Architecture ).
-WARNING:Xst:766 - X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd line 70: Generating a Black Box for component .
-Entity analyzed. Unit generated.
-
-
-=========================================================================
-* HDL Synthesis *
-=========================================================================
-
-Synthesizing Unit .
- Related source file is X:/Barron/config/D2/BASIC/BtnDemo/BtnDemo.vhd.
-Unit synthesized.
-
-
-=========================================================================
-* Advanced HDL Synthesis *
-=========================================================================
-
-Advanced RAM inference ...
-Advanced multiplier inference ...
-Advanced Registered AddSub inference ...
-Dynamic shift register inference ...
-
-=========================================================================
-HDL Synthesis Report
-
-Found no macro
-=========================================================================
-
-=========================================================================
-* Low Level Synthesis *
-=========================================================================
-
-Optimizing unit ...
-Loading device for application Xst from file 'v200.nph' in environment C:/Xilinx.
-
-Mapping all equations...
-Building and optimizing final netlist ...
-Found area constraint ratio of 100 (+ 5) on block btndemo, actual ratio is 0.
-
-=========================================================================
-* Final Report *
-=========================================================================
-
-Device utilization summary:
----------------------------
-
-Selected Device : 2s200pq208-5
-
- Number of bonded IOBs: 2 out of 144 1%
-
-
-=========================================================================
-TIMING REPORT
-
-
-Clock Information:
-------------------
-No clock signals found in this design
-
-Timing Summary:
----------------
-Speed Grade: -5
-
- Minimum period: No path found
- Minimum input arrival time before clock: No path found
- Maximum output required time after clock: No path found
- Maximum combinational path delay: 8.404ns
-
-=========================================================================
-Completed process "Synthesize".
-
-
-
-Started process "Translate".
-
-
-Command Line: ngdbuild -intstyle ise -dd x:\barron\config\d2\basic\btndemo/_ngo
--uc btndemo.ucf -p xc2s200-pq208-5 btndemo.ngc btndemo.ngd
-
-Reading NGO file "X:/Barron/config/D2/BASIC/BtnDemo/btndemo.ngc" ...
-Reading component libraries for design expansion...
-
-Annotating constraints to design from file "btndemo.ucf" ...
-
-Checking timing specifications ...
-Checking expanded design ...
-
-NGDBUILD Design Results Summary:
- Number of errors: 0
- Number of warnings: 0
-
-Total memory usage is 39036 kilobytes
-
-Writing NGD file "btndemo.ngd" ...
-
-Writing NGDBUILD log file "btndemo.bld"...
-
-NGDBUILD done.
-Completed process "Translate".
-
-
-
-Started process "Map".
-
-Using target part "2s200pq208-5".
-Removing unused or disabled logic...
-Running cover...
-Running directed packing...
-Running delay-based LUT packing...
-Running related packing...
-
-Design Summary:
-Number of errors: 0
-Number of warnings: 1
-Logic Utilization:
-Logic Distribution:
- Number of Slices containing only related logic: 0 out of 0 0%
- Number of Slices containing unrelated logic: 0 out of 0 0%
- *See NOTES below for an explanation of the effects of unrelated logic
- Number of bonded IOBs: 1 out of 140 1%
- Number of GCLKIOBs: 1 out of 4 25%
-
-Total equivalent gate count for design: 0
-Additional JTAG gate count for IOBs: 96
-Peak Memory Usage: 61 MB
-
-NOTES:
-
- Related logic is defined as being logic that shares connectivity -
- e.g. two LUTs are "related" if they share common inputs.
- When assembling slices, Map gives priority to combine logic that
- is related. Doing so results in the best timing performance.
-
- Unrelated logic shares no connectivity. Map will only begin
- packing unrelated logic into a slice once 99% of the slices are
- occupied through related logic packing.
-
- Note that once logic distribution reaches the 99% level through
- related logic packing, this does not mean the device is completely
- utilized. Unrelated logic packing will then begin, continuing until
- all usable LUTs and FFs are occupied. Depending on your timing
- budget, increased levels of unrelated logic packing may adversely
- affect the overall timing performance of your design.
-
-
-Mapping completed.
-See MAP report file "btndemo_map.mrp" for details.
-Completed process "Map".
-
-Mapping Module btndemo . . .
-MAP command line:
-map -intstyle ise -p xc2s200-pq208-5 -cm area -pr b -k 4 -c 100 -tx off -o btndemo_map.ncd btndemo.ngd btndemo.pcf
-Mapping Module btndemo: DONE
-
-
-
-Started process "Place & Route".
-
-
-
-
-
-Constraints file: btndemo.pcf
-
-Loading device database for application Par from file "btndemo_map.ncd".
- "btndemo" is an NCD, version 2.38, device xc2s200, package pq208, speed -5
-Loading device for application Par from file 'v200.nph' in environment
-C:/Xilinx.
-Device speed data version: PRODUCTION 1.27 2003-12-13.
-
-
-Resolving physical constraints.
-Finished resolving physical constraints.
-
-Device utilization summary:
-
- Number of External GCLKIOBs 1 out of 4 25%
- Number of External IOBs 1 out of 140 1%
- Number of LOCed External IOBs 1 out of 1 100%
-
-
-
-
-
-Overall effort level (-ol): Standard (set by user)
-Placer effort level (-pl): Standard (set by user)
-Placer cost table entry (-t): 1
-Router effort level (-rl): Standard (set by user)
-
-
-Phase 1.1
-Phase 1.1 (Checksum:989683) REAL time: 3 secs
-
-Phase 2.23
-Phase 2.23 (Checksum:1312cfe) REAL time: 4 secs
-
-Phase 3.3
-Phase 3.3 (Checksum:1c9c37d) REAL time: 4 secs
-
-Phase 4.5
-Phase 4.5 (Checksum:26259fc) REAL time: 4 secs
-
-Phase 5.8
-Phase 5.8 (Checksum:98996d) REAL time: 4 secs
-
-Phase 6.5
-Phase 6.5 (Checksum:39386fa) REAL time: 4 secs
-
-Phase 7.18
-Phase 7.18 (Checksum:42c1d79) REAL time: 4 secs
-
-Writing design to file btndemo.ncd.
-
-Total REAL time to Placer completion: 5 secs
-Total CPU time to Placer completion: 1 secs
-
-
-Phase 1: 1 unrouted; REAL time: 5 secs
-
-Phase 2: 1 unrouted; REAL time: 5 secs
-
-Phase 3: 0 unrouted; REAL time: 5 secs
-
-Phase 4: 0 unrouted; REAL time: 5 secs
-
-Total REAL time to Router completion: 5 secs
-Total CPU time to Router completion: 1 secs
-
-Generating "par" statistics.
-
-Generating Pad Report.
-
-All signals are completely routed.
-
-Total REAL time to PAR completion: 24 secs
-Total CPU time to PAR completion: 5 secs
-
-Peak Memory Usage: 50 MB
-
-Placement: Completed - No errors found.
-Routing: Completed - No errors found.
-
-Writing design to file btndemo.ncd.
-
-
-PAR done.
-Completed process "Place & Route".
-
-
-Started process "Generate Post-Place & Route Static Timing".
-
-WARNING:SpeedCalc:42 - Cannot find referenced model "bel_d_min_period". This
- generally indicates that there is an inconsistency between versions of the
- speed and device data files. Please check to ensure that the XILINX
- environment variable is set correctly, if the MYXILINX variable is set, make
- sure that it is pointing to patch files that are compatable with the version
- of software that the XILINX variable points to.
-WARNING:SpeedCalc:42 - Cannot find referenced model "bel_d_min_period". This
- generally indicates that there is an inconsistency between versions of the
- speed and device data files. Please check to ensure that the XILINX
- environment variable is set correctly, if the MYXILINX variable is set, make
- sure that it is pointing to patch files that are compatable with the version
- of software that the XILINX variable points to.
-
-Analysis completed Wed Jul 07 09:50:48 2004
---------------------------------------------------------------------------------
-
-Generating Report ...
-
-Completed process "Generate Post-Place & Route Static Timing".
-
-Place & Route Module btndemo . . .
-PAR command line: par -w -intstyle ise -ol std -t 1 btndemo_map.ncd btndemo.ncd btndemo.pcf
-PAR completed successfully
-
-
-
-
-Started process "Generate Programming File".
-
-Completed process "Generate Programming File".
-
-
Index: projects/BtnDemo/btndemo.jid
===================================================================
--- projects/BtnDemo/btndemo.jid (revision 430)
+++ projects/BtnDemo/btndemo.jid (nonexistent)
@@ -1 +0,0 @@
-. btndemo BtnDemo.vhd e:\engineering\projects\refdsgn\d2\btndemo\BtnDemo.vhd
Index: projects/BtnDemo/BtnDemo.ngc
===================================================================
--- projects/BtnDemo/BtnDemo.ngc (revision 430)
+++ projects/BtnDemo/BtnDemo.ngc (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
-$0cx3>DsfMofc45LOLOJPQCC?2IYILZJD09J1>OE]OM<7AAHIBCO3>K)?9nT@:5AEUULVN7!1!QWQG&7&8*J_NGF6:ZPPIOE>2RonRGk119[`hYJiceyZh||inl24>^ceVGbbb|Yesqjkk50:z`7v7789'?!ki<21CDu713IJs<7H52;3xW7<6=3<1=>=:19g9736b;rd:?7?4n0692>"6:3;;7p]>:0792?74;<;3i7=90d58`5<7280:w^<51485>454=82n6>8?e29uPg<7280:6>u\2;36>3<6;:?:4h4<61g0?!`==2.j6<74b183>7<52:qCi6*l:19j53<722e:;7>5;cf94?4=83:p(n4;;I32?McN692Bn7d=50;9l52z\22>;c2:1v<950;0xZ41<582146s|1983>7}:l3201<653:~j46=83;pDh5rn0394?7|@l1vb<<50;3xL`=zutwKLNu>6;;1<7661=wKLOu?}ABSxFG
\ No newline at end of file
Index: projects/BtnDemo/BtnDemo.ngd
===================================================================
--- projects/BtnDemo/BtnDemo.ngd (revision 430)
+++ projects/BtnDemo/BtnDemo.ngd (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
-$26x4>713-Xnzd}foo8#5+439'8%8-*k;2q2456ao:8;!9=4BTD24>DRAENTXL\HEUCQGM11:G[TDHCMMUB_HQIIMG2?L3JHIMOO;6B@GHABH2=J&>:oSAm4M`hlvScu{`eeo6CfnnpUawungg=0BHZXOSI2?J2PNM^U_U]K>d:ZJHLH_%QNI,= > RVVF%6)9)KXODG9;YQWHLD13QniSDjl;Yfk[Utne]s{ik5Wdi]SvlkQm{ybcc??;Yfn[Hgmg{\n~~g`n028\akXE`dd~[k}shmm7>^t|:1ixc=4ldf;?iccWFH^J55age`vmib?3zzj~yoa399{mioip|d:46vcny]bqqiX8Vron"m|t/zaga{GHy;o7MNw5;D90?7|[109o7?7:01014>b2:<;i>ua2`82?k4e2?1/>:4=5:P3?4d2821=>=:19g9736b?2Y::7=?:08276360l08:=kk;R5975<628989<6j:243ac=c=3:1=7?tS981g?7?28989<6j:243a6=#<39:7E74vUc94?7=939p_54=c;3;>454=82n6>8?e29'61<6?2\957s6i3:0q)uG229'64<23`8o6=44o3g94?=e:;0;6?4?:1y'643=#9=0:<6F>3:&21?553`o1<7*=8;33?>i6k3:1(?651d98yg4a29096=4?{%02>4b<@;<0D?=4$3:97>N6;2.:87?j;%36>64
projects/BtnDemo/btndemo.bit
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/btndemo.par
===================================================================
--- projects/BtnDemo/btndemo.par (revision 430)
+++ projects/BtnDemo/btndemo.par (nonexistent)
@@ -1,113 +0,0 @@
-Release 6.2.03i Par G.31a
-Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.
-
-PANTHER:: Wed Jul 07 09:50:18 2004
-
-
-C:/Xilinx/bin/nt/par.exe -w -intstyle ise -ol std -t 1 btndemo_map.ncd
-btndemo.ncd btndemo.pcf
-
-
-Constraints file: btndemo.pcf
-
-Loading device database for application Par from file "btndemo_map.ncd".
- "btndemo" is an NCD, version 2.38, device xc2s200, package pq208, speed -5
-Loading device for application Par from file 'v200.nph' in environment
-C:/Xilinx.
-Device speed data version: PRODUCTION 1.27 2003-12-13.
-
-
-Resolved that IOB must be placed at site P71.
-Resolved that GCLKIOB must be placed at site P77.
-
-
-Device utilization summary:
-
- Number of External GCLKIOBs 1 out of 4 25%
- Number of External IOBs 1 out of 140 1%
- Number of LOCed External IOBs 1 out of 1 100%
-
-
-
-
-
-Overall effort level (-ol): Standard (set by user)
-Placer effort level (-pl): Standard (set by user)
-Placer cost table entry (-t): 1
-Router effort level (-rl): Standard (set by user)
-
-
-Phase 1.1
-Phase 1.1 (Checksum:989683) REAL time: 3 secs
-
-Phase 2.23
-Phase 2.23 (Checksum:1312cfe) REAL time: 4 secs
-
-Phase 3.3
-Phase 3.3 (Checksum:1c9c37d) REAL time: 4 secs
-
-Phase 4.5
-Phase 4.5 (Checksum:26259fc) REAL time: 4 secs
-
-Phase 5.8
-Phase 5.8 (Checksum:98996d) REAL time: 4 secs
-
-Phase 6.5
-Phase 6.5 (Checksum:39386fa) REAL time: 4 secs
-
-Phase 7.18
-Phase 7.18 (Checksum:42c1d79) REAL time: 4 secs
-
-Writing design to file btndemo.ncd.
-
-Total REAL time to Placer completion: 5 secs
-Total CPU time to Placer completion: 1 secs
-
-
-Phase 1: 1 unrouted; REAL time: 5 secs
-
-Phase 2: 1 unrouted; REAL time: 5 secs
-
-Phase 3: 0 unrouted; REAL time: 5 secs
-
-Phase 4: 0 unrouted; REAL time: 5 secs
-
-Total REAL time to Router completion: 5 secs
-Total CPU time to Router completion: 1 secs
-
-Generating "par" statistics.
-
-
- The Delay Summary Report
-
- The SCORE FOR THIS DESIGN is: 100
-
-
-The NUMBER OF SIGNALS NOT COMPLETELY ROUTED for this design is: 0
-
- The AVERAGE CONNECTION DELAY for this design is: 0.935
- The MAXIMUM PIN DELAY IS: 0.935
- The AVERAGE CONNECTION DELAY on the 10 WORST NETS is: 0.312
-
- Listing Pin Delays by value: (nsec)
-
- d < 1.00 < d < 2.00 < d < 3.00 < d < 4.00 < d < 5.00 d >= 5.00
- --------- --------- --------- --------- --------- ---------
- 1 0 0 0 0 0
-
-Generating Pad Report.
-
-All signals are completely routed.
-
-Total REAL time to PAR completion: 24 secs
-Total CPU time to PAR completion: 5 secs
-
-Peak Memory Usage: 50 MB
-
-Placement: Completed - No errors found.
-Routing: Completed - No errors found.
-
-Writing design to file btndemo.ncd.
-
-
-PAR done.
Index: projects/BtnDemo/d2but.cdf
===================================================================
--- projects/BtnDemo/d2but.cdf (revision 430)
+++ projects/BtnDemo/d2but.cdf (nonexistent)
@@ -1,16 +0,0 @@
-JedecChain;
-FileRevision(JESDxxA);
-/* NoviceMode */
-/* Active Mode BS */
-/* Mode BS */
-/* Cable Parallel lpt1 */
- P ActionCode(Cfg)
- Device
- PartName(xc2s200)
- File("E:\Engineering\Projects\web5.1\D2\BtnDemo\btndemo.bit")
- ;
-/* Mode SS */
-/* Mode SM */
-/* Mode BSFILE */
-/* Mode HW140 */
-ChainEnd;
Index: projects/BtnDemo/BtnDemo.ngr
===================================================================
--- projects/BtnDemo/BtnDemo.ngr (revision 430)
+++ projects/BtnDemo/BtnDemo.ngr (nonexistent)
@@ -1,3 +0,0 @@
-XILINX-XDB 0.1 STUB 0.1 ASCII
-XILINX-XDM V1.6e
-$0ax0f=(`fgn#aizaow`k*iwmgid~h} pip,pwsic&idhdi`/egnkv)wzf`noy} BulGahi(J}dOi`a!vifg?6u689:mk>;H78MGSAO>1GCJGLAM58I+17lVF:7B:4P@PW7>TSD=1_U]K=;T3:?SOB_V^R\H?k;YKOMK^*PMH+<#?/SUWA$5(6(HYHED?j;YQW[LKWDLGNBYO[INL\GJHT\[KBBY]>0:ZPPZTSDVZYC]K]TX48\adXAm;;7Ujb_LcikwPbzzcdb<>4Xeo\Ilhhz_oydaa3:Zpp<=_{}MFcikc3:`wj6=kmml0b{}cd]emiciidoo7~azrbg\hlhbfk;;7um3L1>7?tS5821?>=9:9>=5k5372f7~h6;3;0b<:56:&26?`b2:<;i:5k2;295?7|[=0:976512165=c=;?:n?6xIb;295?7=8rY?6<;58;30707?m39=5<5290;wA?>:3ym5d<3>2.:57>4}%a92>o22900c44?::p52<72;qU=:52d;78yv7?2909wS?7;{zutwKLNu>2;;5b3?amtJKNv>r@ARxyEF
\ No newline at end of file
Index: projects/BtnDemo/btndemo.ut
===================================================================
--- projects/BtnDemo/btndemo.ut (revision 430)
+++ projects/BtnDemo/btndemo.ut (nonexistent)
@@ -1,30 +0,0 @@
-
--w
--g DebugBitstream:No
--g Binary:no
--g Gclkdel0:11111
--g Gclkdel1:11111
--g Gclkdel2:11111
--g Gclkdel3:11111
--g ConfigRate:4
--g CclkPin:PullUp
--g M0Pin:PullUp
--g M1Pin:PullUp
--g M2Pin:PullUp
--g ProgPin:PullUp
--g DonePin:PullUp
--g TckPin:PullUp
--g TdiPin:PullUp
--g TdoPin:PullUp
--g TmsPin:PullUp
--g UnusedPin:PullDown
--g UserID:0xFFFFFFFF
--g StartUpClk:JtagClk
--g DONE_cycle:4
--g GTS_cycle:5
--g GSR_cycle:6
--g GWE_cycle:6
--g LCK_cycle:NoWait
--g Security:None
--g DonePipe:No
--g DriveDone:No
Index: projects/BtnDemo/BtnDemo.lso
===================================================================
--- projects/BtnDemo/BtnDemo.lso (revision 430)
+++ projects/BtnDemo/BtnDemo.lso (nonexistent)
@@ -1 +0,0 @@
-work
Index: projects/BtnDemo/BtnDemo.bld
===================================================================
--- projects/BtnDemo/BtnDemo.bld (revision 430)
+++ projects/BtnDemo/BtnDemo.bld (nonexistent)
@@ -1,36 +0,0 @@
-Release 12.3 ngdbuild M.70d (lin)
-Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
-
-Command Line: /opt/Xilinx/12.3/ISE_DS/ISE/bin/lin/unwrapped/ngdbuild -intstyle
-ise -dd _ngo -nt timestamp -i -p xc3s1000-fg320-4 BtnDemo.ngc BtnDemo.ngd
-
-Reading NGO file
-"/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.ngc"
-...
-Gathering constraint information from source properties...
-Done.
-
-Resolving constraint associations...
-Checking Constraint Associations...
-Done...
-
-Checking expanded design ...
-
-Partition Implementation Status
--------------------------------
-
- No Partitions were found in this design.
-
--------------------------------
-
-NGDBUILD Design Results Summary:
- Number of errors: 0
- Number of warnings: 0
-
-Total memory usage is 84120 kilobytes
-
-Writing NGD file "BtnDemo.ngd" ...
-Total REAL time to NGDBUILD completion: 4 sec
-Total CPU time to NGDBUILD completion: 2 sec
-
-Writing NGDBUILD log file "BtnDemo.bld"...
Index: projects/BtnDemo/BtnDemo_ise5_bak.zip
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: projects/BtnDemo/BtnDemo_ise5_bak.zip
===================================================================
--- projects/BtnDemo/BtnDemo_ise5_bak.zip (revision 430)
+++ projects/BtnDemo/BtnDemo_ise5_bak.zip (nonexistent)
projects/BtnDemo/BtnDemo_ise5_bak.zip
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/BtnDemo.cmd_log
===================================================================
--- projects/BtnDemo/BtnDemo.cmd_log (revision 430)
+++ projects/BtnDemo/BtnDemo.cmd_log (nonexistent)
@@ -1,3 +0,0 @@
-xst -intstyle ise -ifn "/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.xst" -ofn "/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.syr"
-ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1000-fg320-4 BtnDemo.ngc BtnDemo.ngd
-map -intstyle ise -p xc3s1000-fg320-4 -cm area -ir off -pr off -c 100 -o BtnDemo_map.ncd BtnDemo.ngd BtnDemo.pcf
Index: projects/BtnDemo/xlnx_auto_0_xdb/cst.xbcd
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: projects/BtnDemo/xlnx_auto_0_xdb/cst.xbcd
===================================================================
--- projects/BtnDemo/xlnx_auto_0_xdb/cst.xbcd (revision 430)
+++ projects/BtnDemo/xlnx_auto_0_xdb/cst.xbcd (nonexistent)
projects/BtnDemo/xlnx_auto_0_xdb/cst.xbcd
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: projects/BtnDemo/btndemo.drc
===================================================================
--- projects/BtnDemo/btndemo.drc (revision 430)
+++ projects/BtnDemo/btndemo.drc (nonexistent)
@@ -1 +0,0 @@
-DRC detected 0 errors and 0 warnings.
Index: projects/BtnDemo/bitgen.ut
===================================================================
--- projects/BtnDemo/bitgen.ut (revision 430)
+++ projects/BtnDemo/bitgen.ut (nonexistent)
@@ -1,30 +0,0 @@
-
--w
--g DebugBitstream:No
--g Binary:no
--g Gclkdel0:11111
--g Gclkdel1:11111
--g Gclkdel2:11111
--g Gclkdel3:11111
--g ConfigRate:4
--g CclkPin:PullUp
--g M0Pin:PullUp
--g M1Pin:PullUp
--g M2Pin:PullUp
--g ProgPin:PullUp
--g DonePin:PullUp
--g TckPin:PullUp
--g TdiPin:PullUp
--g TdoPin:PullUp
--g TmsPin:PullUp
--g UnusedPin:PullDown
--g UserID:0xFFFFFFFF
--g StartUpClk:JtagClk
--g DONE_cycle:4
--g GTS_cycle:5
--g GSR_cycle:6
--g GWE_cycle:6
--g LCK_cycle:NoWait
--g Security:None
--g DonePipe:No
--g DriveDone:No
Index: projects/BtnDemo/_xmsgs/xst.xmsgs
===================================================================
--- projects/BtnDemo/_xmsgs/xst.xmsgs (revision 430)
+++ projects/BtnDemo/_xmsgs/xst.xmsgs (nonexistent)
@@ -1,15 +0,0 @@
-
-
-
-'-hierarchy_separator ' switch is being deprecated in a future release.
-
-
-"/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd " line 70 : Instantiating black box module <IBUFG >.
-
-
-
-
Index: projects/BtnDemo/_xmsgs/ngdbuild.xmsgs
===================================================================
--- projects/BtnDemo/_xmsgs/ngdbuild.xmsgs (revision 430)
+++ projects/BtnDemo/_xmsgs/ngdbuild.xmsgs (nonexistent)
@@ -1,9 +0,0 @@
-
-
-
-
-
Index: projects/BtnDemo/_xmsgs/pn_parser.xmsgs
===================================================================
--- projects/BtnDemo/_xmsgs/pn_parser.xmsgs (revision 430)
+++ projects/BtnDemo/_xmsgs/pn_parser.xmsgs (nonexistent)
@@ -1,15 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-Parsing VHDL file "/home/lguanuco/opencores/phr/trunk/codigo/demos/projects/BtnDemo/BtnDemo.vhd" into library work
-
-
Index: projects/BtnDemo/_xmsgs/map.xmsgs
===================================================================
--- projects/BtnDemo/_xmsgs/map.xmsgs (revision 430)
+++ projects/BtnDemo/_xmsgs/map.xmsgs (nonexistent)
@@ -1,12 +0,0 @@
-
-
-
-A problem was encountered attempting to get the license for this architecture.
-
-
-
-