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  • This comparison shows the changes necessary to convert path
    /phr/trunk/codigo
    from Rev 389 to Rev 390
    Reverse comparison

Rev 389 → Rev 390

/implementaciones/adc/pmod2nexys2/displayPmod.vhd
4,10 → 4,13
 
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
use IEEE.NUMERIC_STD.ALL;
 
 
entity displayPmod is
generic(
NB_ADC : integer := 12;
PROM : integer := 16);
Port (
clock : in STD_LOGIC;
--slow_clock : in STD_LOGIC;
56,6 → 59,8
signal done : std_logic;
signal Sstart_conv : std_logic_vector (9 downto 0) := (others => '0');
signal Sslow_clock : std_logic := '0';
signal Sacum : std_logic_vector ((NB_ADC+PROM)-1 downto 0):=(others=>'0');
signal Sready2prom : std_logic;
begin
 
81,13 → 86,30
end process;
data1(15 downto 12) <= "0000";
 
process(clock)
variable Vcountsamp : integer := 0;
begin
if(reset = '1') then
Sacum <= (others => '0');
Vcountsamp := 0;
elsif (falling_edge(clock)) then
Sacum <= Sacum + data1;
Vcountsamp := Vcountsamp + 1;
if (Sacum > PROM) then
Sready2prom <= '1';
else
Sready2prom <= '0';
end if;
end if;
end process;
process(clock)
variable cuenta: integer:=0;
begin
if (falling_edge(clock)) then
if (cuenta<50) then
cuenta:=cuenta + 1;
if (cuenta<1000) then
cuenta:=cuenta + 1;
else
Sslow_clock <=not Sslow_clock;
cuenta:=0;
/implementaciones/adc/pmod2nexys2/pines.ucf
3,13 → 3,13
 
net "pmod_sdata1" loc="M18"; # change
net "pmod_sdata2" loc="N18"; # change
net "pmod_sclk" loc="P36"; # change
net "pmod_ncs" loc="P18"; # change
net "pmod_sclk" loc="P18"; # change
net "pmod_ncs" loc="J13"; # change
 
net "display_char<3>" loc="F17";
net "display_char<2>" loc="H17";
net "display_char<1>" loc="C18";
net "display_char<0>" loc="F15";
net "display_char<0>" loc="F17";
net "display_char<1>" loc="H17";
net "display_char<2>" loc="C18";
net "display_char<3>" loc="F15";
 
net "display_seg<6>" loc="L18";
net "display_seg<5>" loc="F18";

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