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Rev 334 → Rev 335
/trunk/codigo/cpld/test2/test2.vhd
0,0 → 1,60
---------------------------------------------------------------------------------- |
-- Company: |
-- Engineer: |
-- |
-- Create Date: 21:39:28 06/10/2014 |
-- Design Name: |
-- Module Name: test2 - Behavioral |
-- Project Name: |
-- Target Devices: |
-- Tool versions: |
-- Description: |
-- |
-- Dependencies: |
-- |
-- Revision: |
-- Revision 0.01 - File Created |
-- Additional Comments: |
-- |
---------------------------------------------------------------------------------- |
library IEEE; |
use IEEE.STD_LOGIC_1164.ALL; |
|
-- Uncomment the following library declaration if using |
-- arithmetic functions with Signed or Unsigned values |
--use IEEE.NUMERIC_STD.ALL; |
|
-- Uncomment the following library declaration if instantiating |
-- any Xilinx primitives in this code. |
--library UNISIM; |
--use UNISIM.VComponents.all; |
|
entity test2 is |
Port ( clock : in STD_LOGIC; -- 730Hz |
sw : in STD_LOGIC_VECTOR (7 downto 0); |
btn : in STD_LOGIC_VECTOR (4 downto 0); |
seg : out STD_LOGIC_VECTOR (7 downto 0); |
an : out STD_LOGIC_VECTOR (3 downto 0); |
led : out STD_LOGIC_VECTOR (7 downto 0)); |
end test2; |
|
architecture Behavioral of test2 is |
|
begin |
|
count:process(clock) |
begin |
if(clock'event and clock='1') then |
if(btn(0) = '1') then |
Scount<=(others=>'0'); |
else |
Scount <= Scount + 1; |
end if; |
end if; |
end process; |
|
|
led <= not sw; |
|
end Behavioral; |
|
/trunk/codigo/cpld/test2/test2.gise
0,0 → 1,127
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/trunk/codigo/cpld/test2/test2.xise
0,0 → 1,201
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<property xil_pn:name="Reset On Configuration Pulse Width" xil_pn:value="100" xil_pn:valueState="default"/> |
<property xil_pn:name="Resource Sharing" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Retain Hierarchy" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/> |
<property xil_pn:name="Selected Simulation Source Node" xil_pn:value="UUT" xil_pn:valueState="default"/> |
<property xil_pn:name="Show All Models" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Signal window" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Signature /User Code" xil_pn:value="" xil_pn:valueState="default"/> |
<property xil_pn:name="Simulation Model Target" xil_pn:value="VHDL" xil_pn:valueState="default"/> |
<property xil_pn:name="Simulation Resolution" xil_pn:value="Default (1 ps)" xil_pn:valueState="default"/> |
<property xil_pn:name="Simulation Run Time Modelsim" xil_pn:value="1000ns" xil_pn:valueState="default"/> |
<property xil_pn:name="Simulator" xil_pn:value="Modelsim-XE VHDL" xil_pn:valueState="non-default"/> |
<property xil_pn:name="Source window" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/> |
<property xil_pn:name="Speed Grade" xil_pn:value="-5" xil_pn:valueState="default"/> |
<property xil_pn:name="Structure window" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/> |
<property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/> |
<property xil_pn:name="Timing Report Format" xil_pn:value="Summary" xil_pn:valueState="default"/> |
<property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Automatic Do File" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Configuration Name" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Custom Do File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Custom Do File Par" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Explicit Declarations Only" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Global Clocks" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Global Output Enables" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Global Set/Reset" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Location Constraints" xil_pn:value="Always" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Multi-level Logic Optimization" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="VCCIO Reference Voltage" xil_pn:value="LVTTL" xil_pn:valueState="default"/> |
<property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/> |
<property xil_pn:name="VHDL Syntax" xil_pn:value="93" xil_pn:valueState="default"/> |
<property xil_pn:name="Variables window" xil_pn:value="false" xil_pn:valueState="default"/> |
<property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Verilog Macros" xil_pn:value="" xil_pn:valueState="default"/> |
<property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/> |
<property xil_pn:name="Wave window" xil_pn:value="true" xil_pn:valueState="default"/> |
<property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/> |
<property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/> |
<!-- --> |
<!-- The following properties are for internal use only. These should not be modified.--> |
<!-- --> |
<property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="" xil_pn:valueState="default"/> |
<property xil_pn:name="PROP_DesignName" xil_pn:value="test2" xil_pn:valueState="non-default"/> |
<property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="xc9500xl" xil_pn:valueState="default"/> |
<property xil_pn:name="PROP_PostFitSimTop" xil_pn:value="" xil_pn:valueState="default"/> |
<property xil_pn:name="PROP_PreSynthesis" xil_pn:value="PreSynthesis" xil_pn:valueState="default"/> |
<property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="2014-06-10T21:39:07" xil_pn:valueState="non-default"/> |
<property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="A349E49D7FC7520B81CAB1084AB46A8C" xil_pn:valueState="non-default"/> |
<property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/> |
<property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/> |
</properties> |
|
<bindings/> |
|
<libraries/> |
|
<autoManagedFiles> |
<!-- The following files are identified by `include statements in verilog --> |
<!-- source files and are automatically managed by Project Navigator. --> |
<!-- --> |
<!-- Do not hand-edit this section, as it will be overwritten when the --> |
<!-- project is analyzed based on files automatically identified as --> |
<!-- include files. --> |
</autoManagedFiles> |
|
</project> |
/trunk/codigo/cpld/test2/test2.prj
0,0 → 1,201
vhdl work "test2.vhd" |
/trunk/codigo/cpld/test2/test1.ucf
0,0 → 1,49
|
NET clock LOC=P1; |
# --- LEDS--- |
|
NET led<0> LOC=P13; |
NET led<1> LOC=P18; |
NET led<2> LOC=P22; |
NET led<3> LOC=P21; |
NET led<4> LOC=P20; |
NET led<5> LOC=P27; |
NET led<6> LOC=P28; |
NET led<7> LOC=P30; |
|
# --- PUSH BOTTON --- |
|
NET btn<0> LOC=P7; |
NET btn<1> LOC=P6; |
NET btn<2> LOC=P16; |
NET btn<3> LOC=P8; |
NET btn<4> LOC=P29; |
|
# --- SWITCHES--- |
NET sw<0> LOC=P32; |
NET sw<1> LOC=P40; |
NET sw<2> LOC=P38; |
NET sw<3> LOC=P34; |
NET sw<4> LOC=P41; |
NET sw<5> LOC=P43; |
NET sw<6> LOC=P2; |
NET sw<7> LOC=P5; |
|
|
# --- DISPLAY --- |
NET seg<0> LOC=P31; #Seg A |
NET seg<1> LOC=P33; #Seg B |
NET seg<2> LOC=P39; #Seg C |
NET seg<3> LOC=P37; #Seg D |
NET seg<4> LOC=P36; #Seg E |
NET seg<5> LOC=P42; #Seg F |
NET seg<6> LOC=P44; #Seg G |
NET seg<7> LOC=P3; #Seg DP |
|
NET an<0> LOC=P12; |
NET an<1> LOC=P14; |
NET an<2> LOC=P19; |
NET an<3> LOC=P23; |
|
|
|
/trunk/codigo/cpld/test2/test2.isc
0,0 → 1,420
IEEE_1532_Data |
(Header (STD_Version STD_1532_2001 |
Creation_Date 20140610.2159 |
Creator "hprep6" |
Entity xc9572xl_vq44_1532 |
) |
Data array ( |
Initialize (00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000) |
Repeat (00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,02000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,20000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,80000000,00000000, |
00000000,40804000,80000000,00800000, |
c0000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000200,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
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00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
80000000,00000000,00000000,40804000, |
80000000,00800000,c0000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
80000000,00000000,00000000,40804000, |
80000000,00800000,c0000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,80000000,00000000, |
00000000,40804000,80000000,00800000, |
c0000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00200000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,80000000,00000000, |
00000000,40804000,80000000,00800000, |
c0000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,80000000,00000000,00000000, |
40804000,80000000,00800000,c0000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,40000000,40000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,40000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00800000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00004000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00100000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00400000, |
80400000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,80000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,80000000,80000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,40404000, |
00000000,00000000,00000000,00000000, |
00000000,40404040,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
08000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
04000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,10000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000,00000000,00000000,00000000, |
00000000) |
data_CRC (2b2244e9) |
), |
Data usercode ( |
Initialize (00000000) |
) |
) |
5447 |