URL
https://opencores.org/ocsvn/plasma/plasma/trunk
Subversion Repositories plasma
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- This comparison shows the changes necessary to convert path
/plasma/trunk/vhdl
- from Rev 352 to Rev 356
- ↔ Reverse comparison
Rev 352 → Rev 356
/plasma.vhd
51,8 → 51,8
byte_we : out std_logic_vector(3 downto 0); |
data_write : out std_logic_vector(31 downto 0); |
data_read : in std_logic_vector(31 downto 0); |
mem_pause_in : in std_logic; |
no_ddr_start : out std_logic; |
mem_pause_in : in std_logic; |
no_ddr_start : out std_logic; |
no_ddr_stop : out std_logic; |
|
gpio0_out : out std_logic_vector(31 downto 0); |
69,7 → 69,7
signal cpu_pause : std_logic; |
|
signal data_read_uart : std_logic_vector(7 downto 0); |
signal write_enable : std_logic; |
signal write_enable : std_logic; |
signal eth_pause_in : std_logic; |
signal eth_pause : std_logic; |
signal mem_busy : std_logic; |
98,12 → 98,12
|
signal cache_check : std_logic; |
signal cache_checking : std_logic; |
signal cache_miss : std_logic; |
signal cache_miss : std_logic; |
signal cache_hit : std_logic; |
|
begin --architecture |
write_enable <= '1' when cpu_byte_we /= "0000" else '0'; |
mem_busy <= eth_pause or mem_pause_in; |
mem_busy <= eth_pause or mem_pause_in; |
cache_hit <= cache_checking and not cache_miss; |
cpu_pause <= (uart_write_busy and enable_uart and write_enable) or --UART busy |
cache_miss or --Cache wait |
139,7 → 139,7
data_r => cpu_data_r, |
mem_pause => cpu_pause); |
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opt_cache: if use_cache = '0' generate |
opt_cache: if use_cache = '0' generate |
cache_check <= '0'; |
cache_checking <= '0'; |
cache_miss <= '0'; |
161,10 → 161,10
cache_check => cache_check, --Stage1: address_next in first 2MB DDR |
cache_checking => cache_checking, --Stage2 |
cache_miss => cache_miss); --Stage3 |
end generate; --opt_cache2 |
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no_ddr_start <= not eth_pause and cache_checking; |
no_ddr_stop <= not eth_pause and cache_miss; |
end generate; --opt_cache2 |
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no_ddr_start <= not eth_pause and cache_checking; |
no_ddr_stop <= not eth_pause and cache_miss; |
eth_pause_in <= mem_pause_in or (not eth_pause and cache_miss and not cache_checking); |
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misc_proc: process(clk, reset, cpu_address, enable_misc, |