URL
https://opencores.org/ocsvn/potato/potato/trunk
Subversion Repositories potato
Compare Revisions
- This comparison shows the changes necessary to convert path
/potato/trunk
- from Rev 19 to Rev 20
- ↔ Reverse comparison
Rev 19 → Rev 20
/benchmarks/sha256/main.c
16,23 → 16,42
static int led_status = 0; |
static volatile int hashes_per_second = 0; |
|
void exception_handler(uint32_t cause, void * epc) |
// Handle an exception/interrupt. |
// Arguments: |
// - cause: exception cause, see potato.h for values |
// - epc: exception return address |
// - regbase: base of the stored context, can be used for printing all |
// registers with regbase[0] = x1 and upwards. |
void exception_handler(uint32_t cause, void * epc, void * regbase) |
{ |
uart_puts(IO_ADDRESS(UART_BASE), "Hashes per second: "); |
uart_puth(IO_ADDRESS(UART_BASE), hashes_per_second); |
uart_puts(IO_ADDRESS(UART_BASE), "\n\r"); |
if(cause == (CAUSE_IRQ_BASE + 5)) // Timer interrupt |
{ |
uart_puts(IO_ADDRESS(UART_BASE), "Hashes per second: "); |
uart_puth(IO_ADDRESS(UART_BASE), hashes_per_second); |
uart_puts(IO_ADDRESS(UART_BASE), "\n\r"); |
|
if(led_status == 0) |
{ |
gpio_set_output(IO_ADDRESS(GPIO2_BASE), 1); |
led_status = 1; |
if(led_status == 0) |
{ |
gpio_set_output(IO_ADDRESS(GPIO2_BASE), 1); |
led_status = 1; |
} else { |
gpio_set_output(IO_ADDRESS(GPIO2_BASE), 0); |
led_status = 0; |
} |
|
hashes_per_second = 0; |
timer_reset(IO_ADDRESS(TIMER_BASE)); |
} else { |
gpio_set_output(IO_ADDRESS(GPIO2_BASE), 0); |
led_status = 0; |
uart_puts(IO_ADDRESS(UART_BASE), "Unhandled exception!\n\r"); |
uart_puts(IO_ADDRESS(UART_BASE), "Cause: "); |
uart_puth(IO_ADDRESS(UART_BASE), cause); |
uart_puts(IO_ADDRESS(UART_BASE), "\n\r"); |
uart_puts(IO_ADDRESS(UART_BASE), "EPC: "); |
uart_puth(IO_ADDRESS(UART_BASE), (uint32_t) epc); |
uart_puts(IO_ADDRESS(UART_BASE), "\n\r"); |
|
while(1) asm volatile("nop\n"); |
} |
|
timer_reset(IO_ADDRESS(TIMER_BASE)); |
hashes_per_second = 0; |
} |
|
int main(void) |
42,7 → 61,7
gpio_set_direction(IO_ADDRESS(GPIO2_BASE), 0xffff); // LEDs |
|
// Set up the timer: |
timer_set(IO_ADDRESS(TIMER_BASE), 50000000); |
timer_set(IO_ADDRESS(TIMER_BASE), SYSTEM_CLK_FREQ); |
|
// Print a startup message: |
uart_puts(IO_ADDRESS(UART_BASE), "The Potato Processor SHA256 Benchmark\n\r\n\r"); |
/benchmarks/sha256/Makefile
11,7 → 11,8
TARGET_OBJCOPY := $(TARGET_PREFIX)-objcopy |
HEXDUMP ?= hexdump |
|
TARGET_CFLAGS += -m32 -Wall -O3 -fomit-frame-pointer -ffreestanding -fno-builtin -I.. -std=gnu99 |
TARGET_CFLAGS += -m32 -march=RV32I -Wall -Os -fomit-frame-pointer \ |
-ffreestanding -fno-builtin -I.. -std=gnu99 |
TARGET_LDFLAGS += -m elf32lriscv -T../benchmark.ld |
|
OBJECTS := gpio.o main.o sha256.o start.o timer.o uart.o utilities.o |
/benchmarks/platform.h
8,6 → 8,9
#ifndef PLATFORM_H |
#define PLATFORM_H |
|
// Clock frequency in Hz: |
#define SYSTEM_CLK_FREQ 50000000 |
|
// Macro for using the addresses below in C code: |
#define IO_ADDRESS(x) ((volatile void *) x) |
|
/benchmarks/start.S
6,6 → 6,7
// applications. |
|
#include "platform.h" |
#include "potato.h" |
|
.section .init |
|
61,47 → 62,81
|
.global exception_handler_wrapper |
exception_handler_wrapper: |
// Save all registers that aren't saved by the IRQ handler function: |
addi sp, sp, -64 |
sw ra, 0(sp) |
sw t0, 4(sp) |
sw t1, 8(sp) |
sw t2, 12(sp) |
sw t3, 16(sp) |
sw t4, 20(sp) |
sw t5, 24(sp) |
sw t6, 28(sp) |
sw a0, 32(sp) |
sw a1, 36(sp) |
sw a2, 40(sp) |
sw a3, 44(sp) |
sw a4, 48(sp) |
sw a5, 52(sp) |
sw a6, 56(sp) |
sw a7, 60(sp) |
// Save all registers (even those that are saved by the IRQ handler |
// function, to aid in debugging): |
addi sp, sp, -124 |
sw x1, 0(sp) |
sw x2, 4(sp) |
sw x3, 8(sp) |
sw x4, 12(sp) |
sw x5, 16(sp) |
sw x6, 20(sp) |
sw x7, 24(sp) |
sw x8, 28(sp) |
sw x9, 32(sp) |
sw x10, 36(sp) |
sw x11, 40(sp) |
sw x12, 44(sp) |
sw x13, 48(sp) |
sw x14, 52(sp) |
sw x15, 56(sp) |
sw x16, 60(sp) |
sw x17, 64(sp) |
sw x18, 68(sp) |
sw x19, 72(sp) |
sw x20, 76(sp) |
sw x21, 80(sp) |
sw x22, 84(sp) |
sw x23, 88(sp) |
sw x24, 92(sp) |
sw x25, 96(sp) |
sw x26, 100(sp) |
sw x27, 104(sp) |
sw x28, 108(sp) |
sw x29, 112(sp) |
sw x30, 116(sp) |
sw x31, 120(sp) |
|
csrr a0, cause |
csrr a1, epc |
mv a2, sp |
jal exception_handler |
|
// Restore the current state: |
lw ra, 0(sp) |
lw t0, 4(sp) |
lw t1, 8(sp) |
lw t2, 12(sp) |
lw t3, 16(sp) |
lw t4, 20(sp) |
lw t5, 24(sp) |
lw t6, 28(sp) |
lw a0, 32(sp) |
lw a1, 36(sp) |
lw a2, 40(sp) |
lw a3, 44(sp) |
lw a4, 48(sp) |
lw a5, 52(sp) |
lw a6, 56(sp) |
lw a7, 60(sp) |
addi sp, sp, 64 |
.hidden exception_return |
exception_return: |
// Restore all registers: |
lw x1, 0(sp) |
lw x2, 4(sp) |
lw x3, 8(sp) |
lw x4, 12(sp) |
lw x5, 16(sp) |
lw x6, 20(sp) |
lw x7, 24(sp) |
lw x8, 28(sp) |
lw x9, 32(sp) |
lw x10, 36(sp) |
lw x11, 40(sp) |
lw x12, 44(sp) |
lw x13, 48(sp) |
lw x14, 52(sp) |
lw x15, 56(sp) |
lw x16, 60(sp) |
lw x17, 64(sp) |
lw x18, 68(sp) |
lw x19, 72(sp) |
lw x20, 76(sp) |
lw x21, 80(sp) |
lw x22, 84(sp) |
lw x23, 88(sp) |
lw x24, 92(sp) |
lw x25, 96(sp) |
lw x26, 100(sp) |
lw x27, 104(sp) |
lw x28, 108(sp) |
lw x29, 112(sp) |
lw x30, 116(sp) |
lw x31, 120(sp) |
addi sp, sp, 124 |
|
sret |
|