URL
https://opencores.org/ocsvn/present/present/trunk
Subversion Repositories present
Compare Revisions
- This comparison shows the changes necessary to convert path
/present/trunk
- from Rev 6 to Rev 7
- ↔ Reverse comparison
Rev 6 → Rev 7
/DecodeTesting/bench/vhdl/ShiftRegTB.vhd
42,7 → 42,6
----------------------------------------------------------------------- |
LIBRARY ieee; |
USE ieee.std_logic_1164.ALL; |
use work.RSAFinalizerProperties.ALL; |
|
-- Uncomment the following library declaration if using |
-- arithmetic functions with Signed or Unsigned values |
59,8 → 58,8
-- generic (length_1 : integer := WORD_LENGTH; |
-- length_2 : integer := BYTE |
GENERIC ( |
length_1 : integer := BYTE; |
length_2 : integer := WORD_LENGTH |
length_1 : integer := 8; |
length_2 : integer := 64 |
); |
PORT( |
input : in STD_LOGIC_VECTOR(7 downto 0); |
122,6 → 121,7
wait for 100 ns; |
reset <= '1'; |
wait for clk_period*10; |
reset <= '0'; |
en <= '1'; |
wait for clk_period*1; |
en <= '0'; |
/DecodeTesting/bench/vhdl/sLayer_invTB.vhd
46,8 → 46,8
USE ieee.std_logic_unsigned.all; |
USE ieee.numeric_std.ALL; |
|
ENTITY sLayerTB IS |
END sLayerTB; |
ENTITY sLayer_invTB IS |
END sLayer_invTB; |
|
ARCHITECTURE behavior OF sLayer_invTB IS |
|
/DecodeTesting/sim/rtl_sim/bin/test/key.txt
0,0 → 1,100
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
00000000 |
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1 |
/DecodeTesting/sim/rtl_sim/bin/test/data.txt
0,0 → 1,80
01111011 |
1 |
1 |
|
1 |
1 |
1 |
1 |
|
1 |
01000001 |
1 |
|
|
|
|
|
1 |
|
1 |
01101000 |
|
|
|
1 |
|
1 |
1 |
|
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00101111 |
1 |
1 |
1 |
1 |
|
1 |
|
|
|
11000111 |
1 |
1 |
1 |
|
|
|
1 |
1 |
|
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
00010010 |
|
1 |
|
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1 |
|
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1 |
10100001 |
1 |
|
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1 |
|
1 |
|
/DecodeTesting/sim/rtl_sim/bin/test/key2.txt
0,0 → 1,100
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
11111111 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
/DecodeTesting/sim/rtl_sim/bin/test/data2.txt
0,0 → 1,80
11010010 |
|
1 |
|
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1 |
|
1 |
1 |
1 |
00010000 |
|
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1 |
|
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|
|
00110010 |
|
1 |
|
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1 |
1 |
|
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00100001 |
1 |
|
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|
1 |
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1 |
11010011 |
1 |
1 |
|
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1 |
|
1 |
1 |
|
11011100 |
|
|
1 |
1 |
1 |
|
1 |
1 |
|
00110011 |
1 |
1 |
|
|
1 |
1 |
|
|
1 |
00110011 |
1 |
1 |
|
|
1 |
1 |
|
|
1 |
DecodeTesting/sim/rtl_sim/bin/test
Property changes :
Added: bugtraq:number
## -0,0 +1 ##
+true
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_stx_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_stx_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_stx_beh.prj (revision 7)
@@ -0,0 +1,9 @@
+vhdl isim_temp "../../../rtl/vhdl/slayer.vhd"
+vhdl isim_temp "../../../rtl/vhdl/kody.vhd"
+vhdl isim_temp "../../../rtl/vhdl/Reg.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentStateMachine.vhd"
+vhdl isim_temp "../../../rtl/vhdl/keyupd.vhd"
+vhdl isim_temp "../../../rtl/vhdl/counter.vhd"
+vhdl isim_temp "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentEncKeyGen.vhd"
+vhdl isim_temp "../../../bench/vhdl/PresentKeyGenTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_beh.prj (revision 7)
@@ -0,0 +1,9 @@
+vhdl work "../../../rtl/vhdl/slayer.vhd"
+vhdl work "../../../rtl/vhdl/kody.vhd"
+vhdl work "../../../rtl/vhdl/Reg.vhd"
+vhdl work "../../../rtl/vhdl/PresentStateMachine.vhd"
+vhdl work "../../../rtl/vhdl/keyupd.vhd"
+vhdl work "../../../rtl/vhdl/counter.vhd"
+vhdl work "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl work "../../../rtl/vhdl/PresentEncKeyGen.vhd"
+vhdl work "../../../bench/vhdl/PresentKeyGenTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_isim_beh.wdb
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_isim_beh.wdb
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_isim_beh.wdb (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_isim_beh.wdb (revision 7)
DecodeTesting/sim/rtl_sim/bin/PresentKeyGenTB_isim_beh.wdb
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_stx_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_stx_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_stx_beh.prj (revision 7)
@@ -0,0 +1,17 @@
+vhdl isim_temp "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/slayer.vhd"
+vhdl isim_temp "../../../rtl/vhdl/kody.vhd"
+vhdl isim_temp "../../../rtl/vhdl/Reg.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentStateMachine.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDecStateMachine.vhd"
+vhdl isim_temp "../../../rtl/vhdl/pLayer_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/keyupd.vhd"
+vhdl isim_temp "../../../rtl/vhdl/counter_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/counter.vhd"
+vhdl isim_temp "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentEncKeyGen.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDec.vhd"
+vhdl isim_temp "../../../rtl/vhdl/FullDecoderSM.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentFullDecoder.vhd"
+vhdl isim_temp "../../../bench/vhdl/PresentFullDecoderTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_beh.prj (revision 7)
@@ -0,0 +1,17 @@
+vhdl work "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl work "../../../rtl/vhdl/slayer.vhd"
+vhdl work "../../../rtl/vhdl/kody.vhd"
+vhdl work "../../../rtl/vhdl/Reg.vhd"
+vhdl work "../../../rtl/vhdl/PresentStateMachine.vhd"
+vhdl work "../../../rtl/vhdl/PresentDecStateMachine.vhd"
+vhdl work "../../../rtl/vhdl/pLayer_inv.vhd"
+vhdl work "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl work "../../../rtl/vhdl/keyupd.vhd"
+vhdl work "../../../rtl/vhdl/counter_inv.vhd"
+vhdl work "../../../rtl/vhdl/counter.vhd"
+vhdl work "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl work "../../../rtl/vhdl/PresentEncKeyGen.vhd"
+vhdl work "../../../rtl/vhdl/PresentDec.vhd"
+vhdl work "../../../rtl/vhdl/FullDecoderSM.vhd"
+vhdl work "../../../rtl/vhdl/PresentFullDecoder.vhd"
+vhdl work "../../../bench/vhdl/PresentFullDecoderTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecTB_stx_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentDecTB_stx_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentDecTB_stx_beh.prj (revision 7)
@@ -0,0 +1,10 @@
+vhdl isim_temp "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/kody.vhd"
+vhdl isim_temp "../../../rtl/vhdl/Reg.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDecStateMachine.vhd"
+vhdl isim_temp "../../../rtl/vhdl/pLayer_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/counter_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDec.vhd"
+vhdl isim_temp "../../../bench/vhdl/PresentDecTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_isim_beh.wdb
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_isim_beh.wdb
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_isim_beh.wdb (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_isim_beh.wdb (revision 7)
DecodeTesting/sim/rtl_sim/bin/PresentFullDecoderTB_isim_beh.wdb
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecTB_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentDecTB_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentDecTB_beh.prj (revision 7)
@@ -0,0 +1,10 @@
+vhdl work "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl work "../../../rtl/vhdl/kody.vhd"
+vhdl work "../../../rtl/vhdl/Reg.vhd"
+vhdl work "../../../rtl/vhdl/PresentDecStateMachine.vhd"
+vhdl work "../../../rtl/vhdl/pLayer_inv.vhd"
+vhdl work "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl work "../../../rtl/vhdl/counter_inv.vhd"
+vhdl work "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl work "../../../rtl/vhdl/PresentDec.vhd"
+vhdl work "../../../bench/vhdl/PresentDecTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecTB_isim_beh.wdb
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecTB_isim_beh.wdb
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentDecTB_isim_beh.wdb (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentDecTB_isim_beh.wdb (revision 7)
DecodeTesting/sim/rtl_sim/bin/PresentDecTB_isim_beh.wdb
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_stx_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_stx_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_stx_beh.prj (revision 7)
@@ -0,0 +1,22 @@
+vhdl isim_temp "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/slayer.vhd"
+vhdl isim_temp "../../../rtl/vhdl/kody.vhd"
+vhdl isim_temp "../../../rtl/vhdl/Reg.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentStateMachine.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDecStateMachine.vhd"
+vhdl isim_temp "../../../rtl/vhdl/pLayer_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/keyupd.vhd"
+vhdl isim_temp "../../../rtl/vhdl/counter_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/counter.vhd"
+vhdl isim_temp "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentEncKeyGen.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDec.vhd"
+vhdl isim_temp "../../../rtl/vhdl/FullDecoderSM.vhd"
+vhdl isim_temp "../../../rtl/vhdl/ShiftReg.vhd"
+vhdl isim_temp "../../../rtl/vhdl/RS232RefComp.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentFullDecoder.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDecodeCommSM.vhd"
+vhdl isim_temp "../../../rtl/vhdl/PresentDecodeComm.vhd"
+vhdl isim_temp "../../../bench/vhdl/txt_util.vhd"
+vhdl isim_temp "../../../bench/vhdl/PresentDecodeCommTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_beh.prj (revision 7)
@@ -0,0 +1,22 @@
+vhdl work "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl work "../../../rtl/vhdl/slayer.vhd"
+vhdl work "../../../rtl/vhdl/kody.vhd"
+vhdl work "../../../rtl/vhdl/Reg.vhd"
+vhdl work "../../../rtl/vhdl/PresentStateMachine.vhd"
+vhdl work "../../../rtl/vhdl/PresentDecStateMachine.vhd"
+vhdl work "../../../rtl/vhdl/pLayer_inv.vhd"
+vhdl work "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl work "../../../rtl/vhdl/keyupd.vhd"
+vhdl work "../../../rtl/vhdl/counter_inv.vhd"
+vhdl work "../../../rtl/vhdl/counter.vhd"
+vhdl work "../../../rtl/vhdl/AsyncMux.vhd"
+vhdl work "../../../rtl/vhdl/PresentEncKeyGen.vhd"
+vhdl work "../../../rtl/vhdl/PresentDec.vhd"
+vhdl work "../../../rtl/vhdl/FullDecoderSM.vhd"
+vhdl work "../../../rtl/vhdl/ShiftReg.vhd"
+vhdl work "../../../rtl/vhdl/RS232RefComp.vhd"
+vhdl work "../../../rtl/vhdl/PresentFullDecoder.vhd"
+vhdl work "../../../rtl/vhdl/PresentDecodeCommSM.vhd"
+vhdl work "../../../rtl/vhdl/PresentDecodeComm.vhd"
+vhdl work "../../../bench/vhdl/txt_util.vhd"
+vhdl work "../../../bench/vhdl/PresentDecodeCommTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_isim_beh.wdb
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_isim_beh.wdb
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_isim_beh.wdb (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_isim_beh.wdb (revision 7)
DecodeTesting/sim/rtl_sim/bin/PresentDecodeCommTB_isim_beh.wdb
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin/isim.cmd
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/isim.cmd (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/isim.cmd (revision 7)
@@ -0,0 +1,3 @@
+onerror {resume}
+wave add /
+run 1000 ns;
Index: DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_stx_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_stx_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_stx_beh.prj (revision 7)
@@ -0,0 +1,2 @@
+vhdl isim_temp "../../../rtl/vhdl/ShiftReg.vhd"
+vhdl isim_temp "../../../bench/vhdl/ShiftRegTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_stx_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_stx_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_stx_beh.prj (revision 7)
@@ -0,0 +1,2 @@
+vhdl isim_temp "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl isim_temp "../../../bench/vhdl/sLayer_invTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_beh.prj (revision 7)
@@ -0,0 +1,2 @@
+vhdl work "../../../rtl/vhdl/ShiftReg.vhd"
+vhdl work "../../../bench/vhdl/ShiftRegTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_stx_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_stx_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_stx_beh.prj (revision 7)
@@ -0,0 +1,3 @@
+vhdl isim_temp "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl isim_temp "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl isim_temp "../../../bench/vhdl/keyupd_invTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_beh.prj (revision 7)
@@ -0,0 +1,2 @@
+vhdl work "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl work "../../../bench/vhdl/sLayer_invTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_isim_beh.wdb
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_isim_beh.wdb
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_isim_beh.wdb (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_isim_beh.wdb (revision 7)
DecodeTesting/sim/rtl_sim/bin/sLayer_invTB_isim_beh.wdb
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_isim_beh.wdb
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_isim_beh.wdb
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_isim_beh.wdb (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_isim_beh.wdb (revision 7)
DecodeTesting/sim/rtl_sim/bin/ShiftRegTB_isim_beh.wdb
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_beh.prj
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_beh.prj (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_beh.prj (revision 7)
@@ -0,0 +1,3 @@
+vhdl work "../../../rtl/vhdl/slayer_inv.vhd"
+vhdl work "../../../rtl/vhdl/keyupd_inv.vhd"
+vhdl work "../../../bench/vhdl/keyupd_invTB.vhd"
Index: DecodeTesting/sim/rtl_sim/bin/Makefile
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/Makefile (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/Makefile (revision 7)
@@ -0,0 +1,73 @@
+PROJECT=present-pure-testing
+
+RM=rm -rf
+
+PLATFORM=xc3s500e-fg320-5
+
+XILINX_DIR="D:/Programy/Xilinx/14.2/ISE_DS/ISE/bin/nt64/"
+FUSE=$(XILINX_DIR)"fuse.exe"
+VHPCOMP=$(XILINX_DIR)"vhpcomp.exe"
+
+clean:
+ $(RM) ./isim
+ $(RM) ./isim.wdb
+ $(RM) *.log
+ $(RM) *.xmsgs
+ $(RM) ./fuseRelaunch.cmd
+ $(RM) *.exe
+
+exports:
+ export DISPLAY=:0
+ export XILINX=D:/Programy/Xilinx/14.2/ISE_DS/ISE
+ export SYSOP=nt64
+ export PATH=${XILINX}/bin/${SYSOP}
+ export LD_LIBRARY_PATH=${XILINX}/lib/${SYSOP}
+
+PresentDecodeCommTB:
+ $(VHPCOMP) -work isim_temp -intstyle ise -prj ./PresentDecodeCommTB_stx_beh.prj
+ $(FUSE) -intstyle ise -incremental -o PresentDecodeCommTB_isim_beh.exe -prj ./PresentDecodeCommTB_beh.prj work.PresentDecodeCommTB
+
+run_PresentDecodeCommTB: exports PresentDecodeCommTB
+ "./PresentDecodeCommTB_isim_beh.exe" -intstyle ise -gui -tclbatch isim.cmd -wdb "PresentDecodeCommTB_isim_beh.wdb"
+
+PresentDecTB:
+ $(VHPCOMP) -work isim_temp -intstyle ise -prj ./PresentDecTB_stx_beh.prj
+ $(FUSE) -intstyle ise -incremental -o PresentDecTB_isim_beh.exe -prj ./PresentDecTB_beh.prj work.PresentDecTB
+
+run_PresentDecTB: exports PresentDecTB
+ "./PresentDecTB_isim_beh.exe" -intstyle ise -gui -tclbatch isim.cmd -wdb "PresentDecTB_isim_beh.wdb"
+
+keyupd_invTB:
+ $(VHPCOMP) -work isim_temp -intstyle ise -prj ./keyupd_invTB_stx_beh.prj
+ $(FUSE) -intstyle ise -incremental -o keyupd_invTB_isim_beh.exe -prj ./keyupd_invTB_beh.prj work.keyupd_invTB
+
+run_keyupd_invTB: exports keyupd_invTB
+ "./keyupd_invTB_isim_beh.exe" -intstyle ise -gui -tclbatch isim.cmd -wdb "keyupd_invTB_isim_beh.wdb"
+
+ShiftRegTB:
+ $(VHPCOMP) -work isim_temp -intstyle ise -prj ./ShiftRegTB_stx_beh.prj
+ $(FUSE) -intstyle ise -incremental -o ShiftRegTB_isim_beh.exe -prj ./ShiftRegTB_beh.prj work.ShiftRegTB
+
+run_ShiftRegTB: exports ShiftRegTB
+ "./ShiftRegTB_isim_beh.exe" -intstyle ise -gui -tclbatch isim.cmd -wdb "ShiftRegTB_isim_beh.wdb"
+
+sLayer_invTB:
+ $(VHPCOMP) -work isim_temp -intstyle ise -prj ./sLayer_invTB_stx_beh.prj
+ $(FUSE) -intstyle ise -incremental -o sLayer_invTB_isim_beh.exe -prj ./sLayer_invTB_beh.prj work.sLayer_invTB
+
+run_sLayer_invTB: exports sLayer_invTB
+ "./sLayer_invTB_isim_beh.exe" -intstyle ise -gui -tclbatch isim.cmd -wdb "sLayer_invTB_isim_beh.wdb"
+
+PresentFullDecoderTB:
+ $(VHPCOMP) -work isim_temp -intstyle ise -prj ./PresentFullDecoderTB_stx_beh.prj
+ $(FUSE) -intstyle ise -incremental -o PresentFullDecoderTB_isim_beh.exe -prj ./PresentFullDecoderTB_beh.prj work.PresentFullDecoderTB
+
+run_PresentFullDecoderTB: exports PresentFullDecoderTB
+ "./PresentFullDecoderTB_isim_beh.exe" -intstyle ise -gui -tclbatch isim.cmd -wdb "PresentFullDecoderTB_isim_beh.wdb"
+
+PresentKeyGenTB:
+ $(VHPCOMP) -work isim_temp -intstyle ise -prj ./PresentKeyGenTB_stx_beh.prj
+ $(FUSE) -intstyle ise -incremental -o PresentKeyGenTB_isim_beh.exe -prj ./PresentKeyGenTB_beh.prj work.PresentKeyGenTB
+
+run_PresentKeyGenTB: exports PresentKeyGenTB
+ "./PresentKeyGenTB_isim_beh.exe" -intstyle ise -gui -tclbatch isim.cmd -wdb "PresentKeyGenTB_isim_beh.wdb"
\ No newline at end of file
Index: DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_isim_beh.wdb
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_isim_beh.wdb
===================================================================
--- DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_isim_beh.wdb (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_isim_beh.wdb (revision 7)
DecodeTesting/sim/rtl_sim/bin/keyupd_invTB_isim_beh.wdb
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim/bin
===================================================================
--- DecodeTesting/sim/rtl_sim/bin (nonexistent)
+++ DecodeTesting/sim/rtl_sim/bin (revision 7)
DecodeTesting/sim/rtl_sim/bin
Property changes :
Added: bugtraq:number
## -0,0 +1 ##
+true
\ No newline at end of property
Index: DecodeTesting/sim/rtl_sim
===================================================================
--- DecodeTesting/sim/rtl_sim (nonexistent)
+++ DecodeTesting/sim/rtl_sim (revision 7)
DecodeTesting/sim/rtl_sim
Property changes :
Added: bugtraq:number
## -0,0 +1 ##
+true
\ No newline at end of property
Index: DecodeTesting/syn/XC3ES500/log
===================================================================
--- DecodeTesting/syn/XC3ES500/log (nonexistent)
+++ DecodeTesting/syn/XC3ES500/log (revision 7)
DecodeTesting/syn/XC3ES500/log
Property changes :
Added: bugtraq:number
## -0,0 +1 ##
+true
\ No newline at end of property
Index: DecodeTesting/syn/XC3ES500/out
===================================================================
--- DecodeTesting/syn/XC3ES500/out (nonexistent)
+++ DecodeTesting/syn/XC3ES500/out (revision 7)
DecodeTesting/syn/XC3ES500/out
Property changes :
Added: bugtraq:number
## -0,0 +1 ##
+true
\ No newline at end of property
Index: DecodeTesting/syn/XC3ES500/PresentDecodeComm.ut
===================================================================
--- DecodeTesting/syn/XC3ES500/PresentDecodeComm.ut (nonexistent)
+++ DecodeTesting/syn/XC3ES500/PresentDecodeComm.ut (revision 7)
@@ -0,0 +1,22 @@
+-w
+-g DebugBitstream:No
+-g Binary:no
+-g CRC:Enable
+-g ConfigRate:1
+-g ProgPin:PullUp
+-g DonePin:PullUp
+-g TckPin:PullUp
+-g TdiPin:PullUp
+-g TdoPin:PullUp
+-g TmsPin:PullUp
+-g UnusedPin:PullDown
+-g UserID:0xFFFFFFFF
+-g DCMShutdown:Disable
+-g StartUpClk:CClk
+-g DONE_cycle:4
+-g GTS_cycle:5
+-g GWE_cycle:6
+-g LCK_cycle:NoWait
+-g Security:None
+-g DonePipe:Yes
+-g DriveDone:No
Index: DecodeTesting/syn/XC3ES500/PresentDecodeComm.prj
===================================================================
--- DecodeTesting/syn/XC3ES500/PresentDecodeComm.prj (nonexistent)
+++ DecodeTesting/syn/XC3ES500/PresentDecodeComm.prj (revision 7)
@@ -0,0 +1,20 @@
+vhdl work "../../rtl/vhdl/slayer_inv.vhd"
+vhdl work "../../rtl/vhdl/slayer.vhd"
+vhdl work "../../rtl/vhdl/kody.vhd"
+vhdl work "../../rtl/vhdl/Reg.vhd"
+vhdl work "../../rtl/vhdl/PresentStateMachine.vhd"
+vhdl work "../../rtl/vhdl/PresentDecStateMachine.vhd"
+vhdl work "../../rtl/vhdl/pLayer_inv.vhd"
+vhdl work "../../rtl/vhdl/keyupd_inv.vhd"
+vhdl work "../../rtl/vhdl/keyupd.vhd"
+vhdl work "../../rtl/vhdl/counter_inv.vhd"
+vhdl work "../../rtl/vhdl/counter.vhd"
+vhdl work "../../rtl/vhdl/AsyncMux.vhd"
+vhdl work "../../rtl/vhdl/PresentEncKeyGen.vhd"
+vhdl work "../../rtl/vhdl/PresentDec.vhd"
+vhdl work "../../rtl/vhdl/FullDecoderSM.vhd"
+vhdl work "../../rtl/vhdl/ShiftReg.vhd"
+vhdl work "../../rtl/vhdl/RS232RefComp.vhd"
+vhdl work "../../rtl/vhdl/PresentFullDecoder.vhd"
+vhdl work "../../rtl/vhdl/PresentDecodeCommSM.vhd"
+vhdl work "../../rtl/vhdl/PresentDecodeComm.vhd"
Index: DecodeTesting/syn/XC3ES500/PresentDecodeComm.xst
===================================================================
--- DecodeTesting/syn/XC3ES500/PresentDecodeComm.xst (nonexistent)
+++ DecodeTesting/syn/XC3ES500/PresentDecodeComm.xst (revision 7)
@@ -0,0 +1,56 @@
+set -tmpdir "xst/projnav.tmp"
+set -xsthdpdir "xst"
+run
+-ifn PresentDecodeComm.prj
+-ifmt mixed
+-ofn PresentDecodeComm
+-ofmt NGC
+-p xc3s500e-5-fg320
+-top PresentDecodeComm
+-opt_mode Speed
+-opt_level 1
+-iuc NO
+-keep_hierarchy Soft
+-netlist_hierarchy As_Optimized
+-rtlview Yes
+-glob_opt AllClockNets
+-read_cores YES
+-write_timing_constraints NO
+-cross_clock_analysis NO
+-hierarchy_separator /
+-bus_delimiter <>
+-case Maintain
+-slice_utilization_ratio 100
+-bram_utilization_ratio 100
+-verilog2001 YES
+-fsm_extract YES -fsm_encoding Auto
+-safe_implementation No
+-fsm_style LUT
+-ram_extract Yes
+-ram_style Auto
+-rom_extract Yes
+-mux_style Auto
+-decoder_extract YES
+-priority_extract Yes
+-shreg_extract YES
+-shift_extract YES
+-xor_collapse YES
+-rom_style Auto
+-auto_bram_packing NO
+-mux_extract Yes
+-resource_sharing YES
+-async_to_sync NO
+-mult_style Auto
+-iobuf YES
+-max_fanout 100000
+-bufg 24
+-register_duplication YES
+-register_balancing No
+-slice_packing YES
+-optimize_primitives NO
+-use_clock_enable Yes
+-use_sync_set Yes
+-use_sync_reset Yes
+-iob Auto
+-equivalent_register_removal YES
+-slice_utilization_ratio_maxmargin 5
Index: DecodeTesting/syn/XC3ES500/Makefile
===================================================================
--- DecodeTesting/syn/XC3ES500/Makefile (nonexistent)
+++ DecodeTesting/syn/XC3ES500/Makefile (revision 7)
@@ -0,0 +1,52 @@
+PROJECT=present-decode-testing
+
+RM=rm -rf
+
+PLATFORM=xc3s500e-fg320-5
+UCF="../../rtl/vhdl/PresentDecodeCommImpl.ucf"
+
+XILINX_DIR="D:/Programy/Xilinx/14.2/ISE_DS/ISE/bin/nt64/"
+XST_DIR=$(XILINX_DIR)"xst.exe"
+NGDBUILD_DIR=$(XILINX_DIR)"ngdbuild.exe"
+MAP=$(XILINX_DIR)"map.exe"
+PAR=$(XILINX_DIR)"par.exe"
+TRCE=$(XILINX_DIR)"trce.exe"
+BITGEN=$(XILINX_DIR)"bitgen.exe"
+
+clean: clean_postgen
+ $(RM) "./out/"*.*
+ $(RM) "./log/"*.*
+
+clean_postgen:
+ $(RM) "./_xmsgs"
+ $(RM) "./_ngo"
+ $(RM) "./xlnx_auto_0_xdb"
+ $(RM) "./xst"
+ $(RM) *_vhdl.prj *.bgn *.bld *.csv *.drc *.lso *.map *.mrp *.ncd *.ngc *.ngd *.ngm *.ngr *.pad *.par *.pcf *.ptwx *.syr *.twr *.twx *.unroutes *.xpi *.xwbt
+
+synthesize: clean
+ mkdir "./xst"
+ mkdir "./xst/projnav.tmp"
+ $(XST_DIR) -intstyle ise -ifn "./PresentDecodeComm.xst" -ofn "./PresentDecodeComm.syr"
+
+translate: synthesize
+ $(NGDBUILD_DIR) -intstyle ise -dd _ngo -nt timestamp -uc $(UCF) -p $(PLATFORM) "PresentDecodeComm.ngc" PresentDecodeComm.ngd
+
+map: translate
+ $(MAP) -intstyle ise -p $(PLATFORM) -cm area -ir off -pr off -c 100 -o PresentDecodeComm_map.ncd PresentDecodeComm.ngd PresentDecodeComm.pcf
+
+par: map
+ $(PAR) -w -intstyle ise -ol high -t 1 PresentDecodeComm_map.ncd PresentDecodeComm.ncd PresentDecodeComm.pcf
+
+trce: par
+ $(TRCE) -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml PresentDecodeComm.twx PresentDecodeComm.ncd -o PresentDecodeComm.twr PresentDecodeComm.pcf
+
+bitgen: par
+ $(BITGEN) -intstyle ise -f PresentDecodeComm.ut PresentDecodeComm.ncd
+
+postgen:
+ mv *.bit ./out
+ mv *.xrpt ./log
+ mv *.txt ./log
+ mv *.xml ./log
+ mv *.html ./log
\ No newline at end of file