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URL https://opencores.org/ocsvn/present/present/trunk

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  • This comparison shows the changes necessary to convert path 
    /present/trunk
    from Rev 8 to Rev 9
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  •

Rev 8 → Rev 9

/32BitIO/bench/vhdl/sLayerTB.vhd
98,12 → 98,52
wait for 100ns;
reset <= '0';
wait for clk_period;
---- Preparation for test case 1 -----------------
-- inpput <= x"0";
-- expected_output <= x"";
--------------------------------------------------
input <= x"0";
wait for clk_period;
 
if output /= x"C" then
report "RESULT MISMATCH! Test case 1 failed" severity ERROR;
assert false severity failure;
else
report "Test case 1 successful" severity note;
end if;
 
---- Preparation for test case 2 -----------------
-- inpput <= x"0";
-- expected_output <= x"";
--------------------------------------------------
input <= x"A";
wait for clk_period;
 
if output /= x"F" then
report "RESULT MISMATCH! Test case 2 failed" severity ERROR;
assert false severity failure;
else
report "Test case 2 successful" severity note;
end if;
 
---- Preparation for test case 3 -----------------
-- inpput <= x"0";
-- expected_output <= x"";
--------------------------------------------------
input <= x"F";
wait for clk_period;
if output /= x"2" then
report "RESULT MISMATCH! Test case 3 failed" severity ERROR;
assert false severity failure;
else
report "Test case 3 successful" severity note;
end if;
-- insert stimulus here
assert false severity failure;
end process;
/32BitIO/bench/vhdl/keyupdTB.vhd
105,18 → 105,75
wait for 100ns;
reset <='0';
wait for clk_period;
key <= "00000000000000000000000000000000000000000000000000000000000000000000000000000000";
---- Preparation for test case 1 -----------------
-- key <= x"00000000000000000000";
-- num <= "00001";
-- expected_keyout <= x"c0000000000000008000";
--------------------------------------------------
key <= (others => '0');
num <= "00001";
wait for clk_period;
if keyout /= x"c0000000000000008000" then
report "RESULT MISMATCH! Test case 1 failed" severity ERROR;
assert false severity failure;
else
report "Test case 1 successful" severity note;
end if;
---- Preparation for test case 2 -----------------
-- key <= x"c0000000000000008000";
-- num <= "00010";
-- expected_keyout <= x"50001800000000010000";
--------------------------------------------------
key <= x"c0000000000000008000";
num <= "00010";
wait for clk_period;
if keyout /= x"50001800000000010000" then
report "RESULT MISMATCH! Test case 2 failed" severity ERROR;
assert false severity failure;
else
report "Test case 2 successful" severity note;
end if;
---- Preparation for test case 3 -----------------
-- key <= x"50001800000000010000";
-- num <= "00011";
-- expected_keyout <= x"60000a00030000018000";
--------------------------------------------------
key <= x"50001800000000010000";
num <= "00011";
wait for clk_period;
 
if keyout /= x"60000a00030000018000" then
report "RESULT MISMATCH! Test case 3 failed" severity ERROR;
assert false severity failure;
else
report "Test case 3 successful" severity note;
end if;
key <= x"8ba27a0eb8783ac96d59";
num <= "11111";
wait for clk_period;
---- Preparation for test case 4 -----------------
-- key <= x"8ba27a0eb8783ac96d59";
-- num <= "11111";
-- expected_keyout <= x"6dab31744f41d7008759";
--------------------------------------------------
if keyout /= x"6dab31744f41d7008759" then
report "RESULT MISMATCH! Test case 4 failed" severity ERROR;
assert false severity failure;
else
report "Test case 4 successful" severity note;
end if;
assert false severity failure;
end process;
END;
/32BitIO/bench/vhdl/PresentEncTB.vhd
42,8 → 42,6
-----------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
USE ieee.numeric_std.ALL;
USE std.textio.all;
USE work.txt_util.all;
USE ieee.std_logic_textio.all;
110,7 → 108,8
file infile :text is in "input.txt";
variable line_in :line;
variable bytes : std_logic_vector(32 downto 0);
variable line_string : string(1 to 12);
variable bytes : std_logic_vector(31 downto 0);
variable bytes2 : std_logic_vector(3 downto 0);
variable xbit : std_logic;
123,58 → 122,131
reset <= '0';
wait for 10ns;
-- insert stimulus here
-- Below loop which iterates through "input.txt" file
while not (endfile(infile)) loop
readline(infile, line_in); --2
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line "no operation to prepare encoder"
hread(line_in, bytes2);
ctrl <= bytes2;
wait for clk_period;
readline(infile, line_in); -- 1
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for reading key 1/3
hread(line_in, bytes2);
ctrl <= bytes2;
readline(infile, line_in);
readline(infile, line_in); -- read data
read(line_in, xbit);
input <= (others => xbit);
wait for clk_period;
readline(infile, line_in);
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for reading key 2/3
hread(line_in, bytes2);
ctrl <= bytes2;
readline(infile, line_in);
readline(infile, line_in); -- read data
read(line_in, xbit);
input <= (others => xbit);
wait for clk_period;
readline(infile, line_in);
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for reading key 3/3
hread(line_in, bytes2);
ctrl <= bytes2;
readline(infile, line_in);
readline(infile, line_in); -- read data
read(line_in, xbit);
input <= (others => xbit);
wait for clk_period;
readline(infile, line_in);
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for reading text 1/2
hread(line_in, bytes2);
ctrl <= bytes2;
readline(infile, line_in);
readline(infile, line_in); --read data
read(line_in, xbit);
input <= (others => xbit);
wait for clk_period;
readline(infile, line_in);
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for reading text 2/2
hread(line_in, bytes2);
ctrl <= bytes2;
readline(infile, line_in);
readline(infile, line_in); --read data
read(line_in, xbit);
input <= (others => xbit);
wait for clk_period;
readline(infile, line_in);
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for coding input text to ciphertext
hread(line_in, bytes2);
ctrl <= bytes2;
wait for clk_period*33;
readline(infile, line_in);
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for retrieving output 1/2
hread(line_in, bytes2);
ctrl <= bytes2;
wait for clk_period;
readline(infile, line_in);
readline(infile, line_in); -- retrieve expected value 1/2 from input file
hread(line_in, bytes);
if output /= bytes then
report "RESULT MISMATCH! Least significant bytes failed" severity ERROR;
assert false severity failure;
else
report "Least significant bytes successful" severity note;
end if;
readline(infile, line_in); -- info line
read(line_in, line_string);
report line_string;
readline(infile, line_in); -- command line for retrieving output 2/2
hread(line_in, bytes2);
ctrl <= bytes2;
wait for clk_period*2;
readline(infile, line_in); -- retrieve expected value 3/2 from input file
hread(line_in, bytes);
if output /= bytes then
report "RESULT MISMATCH! Most significant bytes failed" severity ERROR;
assert false severity failure;
else
report "Most significant bytes successful" severity note;
end if;
report ""; -- "new line"
end loop;
assert false severity failure;
end process;
253,7 → 325,7
init_file := '0';
end if;
 
-------- write to output "output" --------
if (strobe'EVENT and strobe='0') then
str := (others => ' ');
str(1) := conv_to_char(clk);
/32BitIO/sim/rtl_sim/bin/input.txt
1,56 → 1,104
Test stage 1
No operation
 
Read key 1/3
2
1
Read key 2/3
3
1
Read key 3/3
4
1
Read txt 1/2
7
1
Read txt 2/2
8
1
Coding input
6
Ciph txt 1/2
9
213210D2
Ciph txt 2/2
A
3333DCD3
Test stage 2
No operation
 
Read key 1/3
2
 
Read key 2/3
3
 
Read key 3/3
4
 
Read txt 1/2
7
 
Read txt 2/2
8
 
Coding input
6
Ciph txt 1/2
9
7B228445
Ciph txt 2/2
A
5579C138
Test stage 3
No operation
 
Read key 1/3
2
 
Read key 2/3
3
 
Read key 3/3
4
 
Read txt 1/2
7
1
Read txt 2/2
8
1
Coding input
6
Ciph txt 1/2
9
2F68417B
Ciph txt 2/2
A
A112FFC7
Test stage 4
No operation
 
Read key 1/3
2
1
Read key 2/3
3
1
Read key 3/3
4
1
Read txt 1/2
7
 
Read txt 2/2
8
 
Coding input
6
Ciph txt 1/2
9
A
F5945049
Ciph txt 2/2
A
E72C46C0

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