URL
https://opencores.org/ocsvn/pss/pss/trunk
Subversion Repositories pss
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- This comparison shows the changes necessary to convert path
/pss/trunk/pss/hdl/pss/zpu_uc/motherblock
- from Rev 5 to Rev 7
- ↔ Reverse comparison
Rev 5 → Rev 7
/pss_busbridge.v
107,7 → 107,7
begin |
xport_req_o <= 1'b1; |
xport_we_o <= 1'b1; |
xport_addr_bo <= bus_addr_bi; |
xport_addr_bo <= {a31_i, bus_addr_bi[30:0]}; |
xport_wdata_bo <= bus_wdata_bi; |
xport_writemask_bo <= bus_writemask_bi; |
bb_state <= ST_WR_WAIT_ACK; |
116,7 → 116,7
begin |
xport_req_o <= 1'b1; |
xport_we_o <= 1'b0; |
xport_addr_bo <= bus_addr_bi; |
xport_addr_bo <= {a31_i, bus_addr_bi[30:0]}; |
xport_wdata_bo <= bus_wdata_bi; |
xport_writemask_bo <= bus_writemask_bi; |
bb_state <= ST_RD_WAIT_ACK; |
/pss_motherblock.v
38,6 → 38,7
#( |
parameter A31_DEFAULT = 1, |
parameter CPU_RESET_DEFAULT = 1, |
parameter EXT_RESET_DEFAULT = 1, |
parameter MEM_SIZE_KB = 1 |
) |
( |
269,6 → 270,7
PSS_SFR |
#( |
.CPU_RESET_DEFAULT(CPU_RESET_DEFAULT), |
.EXT_RESET_DEFAULT(EXT_RESET_DEFAULT), |
.A31_DEFAULT(A31_DEFAULT), |
.MEM_SIZE_KB(MEM_SIZE_KB) |
) |
293,6 → 295,7
.trap_cpu_addr_bi(cpu_addr_bi), |
|
.cpu_reset_o(cpu_reset_o), |
.ext_reset_o(ext_rst_o), |
.a31_o(a31), |
|
.bus_error_i(bus_error), |
/pss_sfr.v
1,6 → 1,7
module PSS_SFR |
#( |
parameter CPU_RESET_DEFAULT = 1, |
parameter EXT_RESET_DEFAULT = 1, |
parameter A31_DEFAULT = 1, |
parameter MEM_SIZE_KB = 1 |
) |
25,6 → 26,7
input [31:0] trap_cpu_addr_bi, |
|
output reg cpu_reset_o, |
output reg ext_reset_o, |
output cpu_enb_o, |
output reg a31_o, |
|
105,6 → 107,7
begin |
|
cpu_reset_o <= CPU_RESET_DEFAULT; |
ext_reset_o <= EXT_RESET_DEFAULT; |
a31_o <= A31_DEFAULT; |
|
trap_enable <= 1'b0; |
141,7 → 144,7
begin |
if (bus_we_i == 1'b0) |
case (bus_addr_bi[7:0]) |
REG_CPU_CONTROL_ADDR: bus_rdata_bo <= {cpu_present_i, 29'h0, cpu_break_i, cpu_reset_o}; |
REG_CPU_CONTROL_ADDR: bus_rdata_bo <= {cpu_present_i, 28'h0, cpu_break_i, ext_reset_o, cpu_reset_o}; |
REG_CPU_PC_ADDR: bus_rdata_bo <= cpu_pc_bi; |
REG_A31: bus_rdata_bo <= {31'h0, a31_o}; |
|
162,7 → 165,7
endcase |
else |
case (bus_addr_bi[7:0]) |
REG_CPU_CONTROL_ADDR: cpu_reset_o <= bus_wdata_bi[0]; |
REG_CPU_CONTROL_ADDR: begin cpu_reset_o <= bus_wdata_bi[0]; ext_reset_o <= bus_wdata_bi[1]; end |
REG_A31: a31_o <= bus_wdata_bi[0]; |
|
REG_INTC_CONTROL_ADDR: begin intc_ie_we_o <= 1'b1; intc_ie_data_o <= bus_wdata_bi[0]; end |