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https://opencores.org/ocsvn/quark/quark/trunk
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- This comparison shows the changes necessary to convert path
/quark/trunk
- from Rev 3 to Rev 4
- ↔ Reverse comparison
Rev 3 → Rev 4
/ENG04_RequirementsAnalysis/03_InternalRequirements/02_VerilogAlgorithmDesign/alu_8bit.v
171,25 → 171,12
end |
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8'h0B:begin /* ROL(reg_out) reg_in_1,reg_in_2 [reg_out = ??]*/ |
if (rotation_step == `R_FIRST_STEP) begin |
reg_out_temp <= reg_in_1 << (reg_in_2 & 8'h07); |
rotation_step <= `R_SECOND_STEP; |
end else begin |
reg_out <= reg_out_temp[15:8] | reg_out_temp[7:0]; |
ready <= 1'b1; |
rotation_step <= `R_FIRST_STEP; |
end |
reg_out <= (reg_in_1 << (reg_in_2 & 8´h07)) | (reg_in_1 >> (8´h08 - (reg_in_2 & 8´h07)); |
ready <= 1'b1; |
end |
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8'h0C:begin /* ROR(reg_out) reg_in_1,reg_in_2 [reg_out = ??]*/ |
if (rotation_step == `R_FIRST_STEP) begin |
reg_out_temp <= {reg_in_1[7:0],8'b00} >> (reg_in_2 & 8'h07); |
rotation_step <= `R_SECOND_STEP; |
end else begin |
reg_out <= reg_out_temp[15:8] | reg_out_temp[7:0]; |
ready <= 1'b1; |
rotation_step <= `R_FIRST_STEP; |
end |
reg_out <= (reg_in_1 >> (reg_in_2 & 8´h07)) | (reg_in_1 << (8´h08 - (reg_in_2 & 8´h07)); |
end |
endcase |
end |