URL
https://opencores.org/ocsvn/raytrac/raytrac/trunk
Subversion Repositories raytrac
Compare Revisions
- This comparison shows the changes necessary to convert path
/raytrac/branches
- from Rev 232 to Rev 233
- ↔ Reverse comparison
Rev 232 → Rev 233
/fp_sgdma/raytrac_hw.tcl
1,5 → 1,5
# TCL File Generated by Component Editor 11.0 |
# Thu Aug 30 11:19:35 COT 2012 |
# Thu Aug 30 11:27:49 COT 2012 |
# DO NOT MODIFY |
|
|
6,7 → 6,7
# +----------------------------------- |
# | |
# | raytrac "raytrac" v1.0 |
# | null 2012.08.30.11:19:35 |
# | null 2012.08.30.11:27:49 |
# | |
# | |
# | J:/code/hworkspace/raytrac/fp_sgdma/raytrac.vhd |
57,6 → 57,7
set_parameter_property wd DISPLAY_NAME wd |
set_parameter_property wd TYPE INTEGER |
set_parameter_property wd UNITS None |
set_parameter_property wd ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property wd AFFECTS_GENERATION false |
set_parameter_property wd HDL_PARAMETER true |
add_parameter fd INTEGER 8 |
64,6 → 65,7
set_parameter_property fd DISPLAY_NAME fd |
set_parameter_property fd TYPE INTEGER |
set_parameter_property fd UNITS None |
set_parameter_property fd ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property fd AFFECTS_GENERATION false |
set_parameter_property fd HDL_PARAMETER true |
add_parameter mb INTEGER 4 |
71,6 → 73,7
set_parameter_property mb DISPLAY_NAME mb |
set_parameter_property mb TYPE INTEGER |
set_parameter_property mb UNITS None |
set_parameter_property mb ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property mb AFFECTS_GENERATION false |
set_parameter_property mb HDL_PARAMETER true |
# | |
83,14 → 86,14
# +----------------------------------- |
|
# +----------------------------------- |
# | connection point clock |
# | connection point rtClock |
# | |
add_interface clock clock end |
set_interface_property clock clockRate 0 |
add_interface rtClock clock end |
set_interface_property rtClock clockRate 0 |
|
set_interface_property clock ENABLED true |
set_interface_property rtClock ENABLED true |
|
add_interface_port clock clk clk Input 1 |
add_interface_port rtClock clk clk Input 1 |
# | |
# +----------------------------------- |
|
100,7 → 103,7
add_interface rtSlave avalon end |
set_interface_property rtSlave addressAlignment DYNAMIC |
set_interface_property rtSlave addressUnits WORDS |
set_interface_property rtSlave associatedClock clock |
set_interface_property rtSlave associatedClock rtClock |
set_interface_property rtSlave associatedReset reset_sink |
set_interface_property rtSlave burstOnBurstBoundariesOnly false |
set_interface_property rtSlave explicitAddressSpan 0 |
132,7 → 135,7
# | |
add_interface rtMaster avalon start |
set_interface_property rtMaster addressUnits SYMBOLS |
set_interface_property rtMaster associatedClock clock |
set_interface_property rtMaster associatedClock rtClock |
set_interface_property rtMaster associatedReset reset_sink |
set_interface_property rtMaster burstOnBurstBoundariesOnly false |
set_interface_property rtMaster doStreamReads false |
158,7 → 161,7
# | |
add_interface interrupt_sender interrupt end |
set_interface_property interrupt_sender associatedAddressablePoint rtSlave |
set_interface_property interrupt_sender associatedClock clock |
set_interface_property interrupt_sender associatedClock rtClock |
set_interface_property interrupt_sender associatedReset reset_sink |
|
set_interface_property interrupt_sender ENABLED true |
171,7 → 174,7
# | connection point reset_sink |
# | |
add_interface reset_sink reset end |
set_interface_property reset_sink associatedClock clock |
set_interface_property reset_sink associatedClock rtClock |
set_interface_property reset_sink synchronousEdges BOTH |
|
set_interface_property reset_sink ENABLED true |