OpenCores
URL https://opencores.org/ocsvn/robust_reg/robust_reg/trunk

Subversion Repositories robust_reg

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /robust_reg/trunk/src/base
    from Rev 11 to Rev 12
    Reverse comparison

Rev 11 → Rev 12

/def_fields.txt File deleted
/def_regs.txt File deleted
/def_regfile_fields.txt
0,0 → 1,528
<##//////////////////////////////////////////////////////////////////
//// ////
//// Author: Eyal Hochberg ////
//// eyal@provartec.com ////
//// ////
//// Downloaded from: http://www.opencores.org ////
/////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2010 Provartec LTD ////
//// www.provartec.com ////
//// info@provartec.com ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation.////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more////
//// details. http://www.gnu.org/licenses/lgpl.html ////
//// ////
//////////////////////////////////////////////////////////////////##>
GROUP REG0 is { ;; rd_start_addr 32 SON(START 0) SON(DEFAULT 0) SON(TYPE TYPE_RW) ;; }
GROUP REG1 is { ;; wr_start_addr 32 SON(START 0) SON(DEFAULT 0) SON(TYPE TYPE_RW) ;; }
GROUP REG2 is { ;; buffer_size 32 SON(START 0) SON(DEFAULT 0) SON(TYPE TYPE_RW) ;; }
GROUP REG3 is { ;; set_int 1 SON(START 0) SON(DEFAULT 0) SON(TYPE TYPE_RO)
cmd_last 1 SON(START 1) SON(DEFAULT 1) SON(TYPE TYPE_RW)
next_addr 28 SON(START 4) SON(DEFAULT 0) SON(TYPE TYPE_RW) ;; }
GROUP REG4 is { ;; ch_start 1 SON(START 0) SON(DEFAULT 0) SON(TYPE TYPE_WO) ;; }
GROUP REG5 is { ;; buff_count 16 SON(START 0) SON(DEFAULT 0) SON(TYPE TYPE_RO)
int_count 6 SON(START 16) SON(DEFAULT 0) SON(TYPE TYPE_RO) ;; }
/def_regfile.txt
27,10 → 27,10
//// ////
//////////////////////////////////////////////////////////////////##>
 
REQUIRE(1.3)
REQUIRE(1.4)
 
INCLUDE def_regs.txt
INCLUDE def_fields.txt
INCLUDE def_regfile_regs.txt
INCLUDE def_regfile_fields.txt
 
SWAP.GLOBAL MODEL_NAME regfile
/def_regfile_regs.txt
0,0 → 1,327
<##//////////////////////////////////////////////////////////////////
//// ////
//// Author: Eyal Hochberg ////
//// eyal@provartec.com ////
//// ////
//// Downloaded from: http://www.opencores.org ////
/////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2010 Provartec LTD ////
//// www.provartec.com ////
//// info@provartec.com ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation.////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more////
//// details. http://www.gnu.org/licenses/lgpl.html ////
//// ////
//////////////////////////////////////////////////////////////////##>
SWAP REGNAME DMA
SWAP REG_NUM 6
GROUP REGS is {
CONFIG0 SON(ADDR 0) SON(TYPE TYPE_RW) ##reg number 0
CONFIG1 SON(ADDR 4) SON(TYPE TYPE_RW) ##reg number 1
CONFIG2 SON(ADDR 8) SON(TYPE TYPE_RW) ##reg number 2
CONFIG3 SON(ADDR C) SON(TYPE TYPE_RW) ##reg number 3
START SON(ADDR 20) SON(TYPE TYPE_WO) ##reg number 4
STATUS SON(ADDR 30) SON(TYPE TYPE_RO) ##reg number 5
}
/regfile_top.txt
0,0 → 1,32
<##//////////////////////////////////////////////////////////////////
//// ////
//// Author: Eyal Hochberg ////
//// eyal@provartec.com ////
//// ////
//// Downloaded from: http://www.opencores.org ////
/////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2010 Provartec LTD ////
//// www.provartec.com ////
//// info@provartec.com ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation.////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more////
//// details. http://www.gnu.org/licenses/lgpl.html ////
//// ////
//////////////////////////////////////////////////////////////////##>
 
CREATE regfile.v
CREATE regfile.h DEFCMD(DEFINE NOT_IN_LIST)
CREATE regfile.html DEFCMD(DEFINE NOT_IN_LIST)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.