URL
https://opencores.org/ocsvn/s1_core/s1_core/trunk
Subversion Repositories s1_core
Compare Revisions
- This comparison shows the changes necessary to convert path
/s1_core/trunk/hdl/rtl
- from Rev 113 to Rev 114
- ↔ Reverse comparison
Rev 113 → Rev 114
/s1_top/cachedir.v
1,8 → 1,7
/* |
* Simply RISC CacheDir |
* CacheDir |
* |
* (C) Copyleft 2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) Copyleft 2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |
/s1_top/int_ctrl.v
1,8 → 1,7
/* |
* Interrupt Controller |
* S1 Interrupt Controller |
* |
* (C) 2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) 2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |
/s1_top/os2wb.v
2,7 → 2,7
////////////////////////////////////////////////////////////////////////////////// |
// Company: (C) Athree, 2009 |
// Engineer: Dmitry Rozhdestvenskiy |
// Email dmitry.rozhdestvenskiy@srisc.com dmitryr@a3.spb.ru divx4log@narod.ru |
// Email: dmitryr@a3.spb.ru divx4log@narod.ru |
// |
// Design Name: Bridge from SPARC Core to Wishbone Master |
// Module Name: os2wb |
/s1_top/pcx_fifo.v
1,8 → 1,7
/* |
* Simply RISC PCX FIFO |
* PCX FIFO |
* |
* (C) Copyleft 2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) Copyleft 2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |
/s1_top/rst_ctrl.v
1,8 → 1,7
/* |
* Reset Controller |
* S1 Reset Controller |
* |
* (C) Copyleft 2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) Copyleft 2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |
/s1_top/s1_defs.h
1,8 → 1,7
/* |
* Simply RISC S1 Definitions |
* S1 Definitions |
* |
* (C) Copyleft 2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) Copyleft 2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |
/s1_top/s1_top.v
1,8 → 1,7
/* |
* Simply RISC S1 Core Top-Level |
* S1 Core Top-Level |
* |
* (C) 2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) 2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |
/s1_top/simple_fifo.v
1,8 → 1,7
/* |
* Simply RISC Simple FIFO |
* Simple FIFO |
* |
* (C) Copyleft 2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) Copyleft 2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |
/s1_top/spc2wbm.v
1,8 → 1,7
/* |
* Bridge from SPARC Core to Wishbone Master |
* |
* (C) 2006-2007 Simply RISC LLP |
* AUTHOR: Fabrizio Fazzino <fabrizio.fazzino@srisc.com> |
* (C) 2006-2007 Fabrizio Fazzino |
* |
* LICENSE: |
* This is a Free Hardware Design; you can redistribute it and/or |