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URL https://opencores.org/ocsvn/sata_controller_core/sata_controller_core/trunk

Subversion Repositories sata_controller_core

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  • This comparison shows the changes necessary to convert path
    /sata_controller_core/trunk/sata2_fifo_v1_00_a/hdl/vhdl
    from Rev 10 to Rev 12
    Reverse comparison

Rev 10 → Rev 12

/sata_core.vhd
161,10 → 161,11
-- USER FIFO DECLARATION
component user_fifo
port (
clk: IN std_logic;
rst: IN std_logic;
wr_clk: IN std_logic;
din: IN std_logic_VECTOR(31 downto 0);
wr_en: IN std_logic;
rd_clk: IN std_logic;
rd_en: IN std_logic;
dout: OUT std_logic_VECTOR(31 downto 0);
full: OUT std_logic;
181,9 → 182,10
USER_FIFO_i : user_fifo
port map (
rst => reset,
clk => sata_user_clk,
wr_clk => SATA_USER_DATA_CLK_IN,
din => sata_din,
wr_en => sata_din_we,
rd_clk => sata_user_clk,
dout => user_fifo_dout,
rd_en => user_din_re,
full => user_fifo_full,

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