URL
https://opencores.org/ocsvn/sd_card_controller/sd_card_controller/trunk
Subversion Repositories sd_card_controller
Compare Revisions
- This comparison shows the changes necessary to convert path
/sd_card_controller/trunk
- from Rev 5 to Rev 6
- ↔ Reverse comparison
Rev 5 → Rev 6
/rtl/verilog/sd_defines.h
97,6 → 97,4
//wb module defines |
`define RESET_BLOCK_SIZE 512 |
`define RESET_CLK_DIV 0 |
`define SUPPLY_VOLTAGE_3_3 |
//`define SUPPLY_VOLTAGE_3_0 |
//`define SUPPLY_VOLTAGE_1_8 |
`define SUPPLY_VOLTAGE_mV 3300 |
/rtl/verilog/sd_controller_wb.v
110,13 → 110,7
output reg [`BLKCNT_W-1:0]block_count_reg; |
output reg [31:0] dma_addr_reg; |
|
`ifdef SUPPLY_VOLTAGE_3_3 |
parameter voltage_controll_reg = 8'b0000_111_1; |
`elsif SUPPLY_VOLTAGE_3_0 |
parameter voltage_controll_reg = 8'b0000_110_1; |
`elsif SUPPLY_VOLTAGE_1_8 |
parameter voltage_controll_reg = 8'b0000_101_1; |
`endif |
parameter voltage_controll_reg = `SUPPLY_VOLTAGE_mV; |
parameter capabilies_reg = 16'b0000_0000_0000_0000; |
|
always @(posedge wb_clk_i or posedge wb_rst_i) |
/doc/src/sw_if.tex
203,11 → 203,14
\subsubsection{Voltage information register} |
\label{sec:voltage_reg} |
|
This register contains the value of power supply voltage expressed in mV. It is read-only register and its |
value is configured in HDL. |
|
\begin{table}[H] |
\caption{Software reset register} |
\begin{tabular}{m{1.3cm}|m{2cm}|m{1cm}|m{8cm}} |
\rowcolor[gray]{0.7} bit \# & reset value & access & description \\ \hline \hline |
\texttt{[31:0]} & & & reserved \\ \hline |
\texttt{[31:0]} & & R & power supply voltage [mV] \\ \hline |
\hline |
\end{tabular} |
\label{tab:voltage_reg} |