URL
https://opencores.org/ocsvn/sdcard_mass_storage_controller/sdcard_mass_storage_controller/trunk
Subversion Repositories sdcard_mass_storage_controller
Compare Revisions
- This comparison shows the changes necessary to convert path
/sdcard_mass_storage_controller/trunk
- from Rev 59 to Rev 60
- ↔ Reverse comparison
Rev 59 → Rev 60
/rtl/sdc_dma/verilog/SD_data_master.v
87,8 → 87,26
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reg trans_done; |
reg trans_failed; |
reg internal_transm_complete; |
reg transm_complete_q; |
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always @ (posedge clk or posedge rst ) |
begin |
if (rst) begin |
internal_transm_complete <=1'b0; |
transm_complete_q<=0; |
end |
else begin |
transm_complete_q<=transm_complete; |
internal_transm_complete<=transm_complete_q; |
end |
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end |
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always @ (state or resend_try_cnt or tx_full or free_tx_bd or free_rx_bd or bd_cnt or send_done or rec_done or rec_failed or trans_done or trans_failed) |
begin : FSM_COMBO |
next_state = 0; |
381,14 → 399,15
end |
`endif |
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`ifdef SIM |
rec_done<=1; |
start_tx_fifo<=1; |
`endif |
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//Check card_status[5:1] for state 4 or 6... |
//If wrong state change interupt status reg,so software can put card in |
// transfer state and restart/cancel Data transfer |
end |
`ifdef SIM |
rec_done<=1; |
start_tx_fifo<=1; |
`endif |
end |
else begin |
rec_failed<=1; //CRC-Error, CIC-Error or timeout |
416,7 → 435,7
end |
//Check for fifo underflow, |
//2 DO: if deteced stop transfer, reset data host |
if (transm_complete) begin //Transfer complete |
if (internal_transm_complete) begin //Transfer complete |
ack_transfer<=1; |
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if ((!crc_ok) && (busy_n)) begin //Wrong CRC and Data line free. |