URL
https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk
Subversion Repositories sdhc-sc-core
Compare Revisions
- This comparison shows the changes necessary to convert path
/sdhc-sc-core/trunk/src/grpSd/unitSdWbSlave
- from Rev 123 to Rev 126
- ↔ Reverse comparison
Rev 123 → Rev 126
/src/SdWbSlave-Rtl-a.vhdl
11,30 → 11,37
|
type aWbState is (idle, ClassicWrite, ClassicRead); |
type aSdIntState is (idle, newOperation); |
type aReadBufferState is (invalid, readreq, latchdata, valid); |
|
type aRegs is record |
|
WbState : aWbState; -- state of the wb interface |
SdIntState : aSdIntState; -- state of the sd controller interface |
OperationBlock : aOperationBlock; -- Operation for the SdController |
ReqOperation : std_ulogic; -- Register for catching edges on the SdController ReqOperationEdge line |
-- Register outputs |
oWbDat : aSdWbSlaveDataOutput; |
oWbCtrl : aWbSlaveCtrlOutput; |
oController : aSdWbSlaveToSdController; |
oWriteFifo : aoWriteFifo; |
WbState : aWbState; -- state of the wb interface |
SdIntState : aSdIntState; -- state of the sd controller interface |
OperationBlock : aOperationBlock; -- Operation for the SdController |
ReqOperation : std_ulogic; -- Register for catching edges on the SdController ReqOperationEdge line |
ReadBuffer : aData; |
ReadBufferState : aReadBufferState; |
-- Register outputs |
oWbDat : aSdWbSlaveDataOutput; |
oWbCtrl : aWbSlaveCtrlOutput; |
oController : aSdWbSlaveToSdController; |
oWriteFifo : aoWriteFifo; |
oReadFifo : aoReadFifo; |
|
end record aRegs; |
|
constant cDefaultRegs : aRegs := ( |
WbState => idle, |
SdIntState => idle, |
OperationBlock => cDefaultOperationBlock, |
ReqOperation => cInactivated, |
oWbDat => (Dat => (others => '0')), |
oWbCtrl => cDefaultWbSlaveCtrlOutput, |
oController => cDefaultSdWbSlaveToSdController, |
oWriteFifo => cDefaultoWriteFifo); |
WbState => idle, |
SdIntState => idle, |
OperationBlock => cDefaultOperationBlock, |
ReqOperation => cInactivated, |
oWbDat => (Dat => (others => '0')), |
oWbCtrl => cDefaultWbSlaveCtrlOutput, |
oController => cDefaultSdWbSlaveToSdController, |
oWriteFifo => cDefaultoWriteFifo, |
oReadFifo => cDefaultoReadFifo, |
ReadBuffer => (others => '0'), |
ReadBufferState => invalid); |
|
signal R, NxR : aRegs; |
|
43,6 → 50,7
oWbCtrl <= R.oWbCtrl; |
oController <= R.oController; |
oWriteFifo <= R.oWriteFifo; |
oReadFifo <= R.oReadFifo; |
|
WbStateReg : process (iClk, iRstSync) |
begin |
55,7 → 63,7
end if; |
end process WbStateReg ; |
|
WbStateAndOutputs : process (iWbCtrl, iWbDat, iController, iWriteFifo, R) |
WbStateAndOutputs : process (iWbCtrl, iWbDat, iController, iWriteFifo, iReadFifo, R) |
begin |
-- Default Assignments |
|
64,6 → 72,32
NxR.oWbCtrl <= cDefaultWbSlaveCtrlOutput; |
NxR.oWriteFifo <= cDefaultoWriteFifo; |
|
case R.ReadBufferState is |
when invalid => |
-- is new data available? |
if (iReadFifo.rdempty = cInactivated) then |
NxR.oReadFifo.rdreq <= cActivated; |
NxR.ReadBufferState <= readreq; |
end if; |
|
when readreq => |
-- readreq was sent, data is available next cylce |
NxR.oReadFifo.rdreq <= cInactivated; |
NxR.ReadBufferState <= latchdata; |
|
when latchdata => |
NxR.ReadBuffer <= iReadFifo.q; |
NxR.ReadBufferState <= valid; |
|
when valid => |
-- do nothing, wishbone statemachine sets the state to invalid when it used it |
null; |
|
when others => |
report "Error: Invalid ReadBufferState" severity error; |
end case; |
|
|
-- Determine next state |
case R.WbState is |
when idle => |
90,8 → 124,32
NxR.oWbDat.Dat <= R.OperationBlock.EndAddr; |
|
when cReadDataAddr => |
-- read data from fifo |
-- check if data is available |
case R.ReadBufferState is |
when valid => |
-- use buffered data |
NxR.oWbDat.Dat <= R.ReadBuffer; |
NxR.ReadBufferState <= invalid; |
|
when latchdata => |
-- use input directly |
NxR.oWbDat.Dat <= iReadFifo.q; |
NxR.ReadBufferState <= invalid; |
|
when readreq => |
-- no data available, insert a waitstate |
NxR.oWbCtrl.Ack <= cInactivated; |
NxR.WbState <= idle; |
|
when invalid => |
-- no data available, insert a waitstate |
NxR.oWbCtrl.Ack <= cInactivated; |
NxR.WbState <= idle; |
|
when others => |
report "Invalid ReadBufferState" severity error; |
end case; |
|
when others => |
report "Read to an invalid address" severity warning; |
NxR.oWbCtrl.Err <= cActivated; |
/src/SdWbSlave-e.vhdl
31,7 → 31,11
|
-- To write fifo |
oWriteFifo : out aoWriteFifo; |
iWriteFifo : in aiWriteFifo |
iWriteFifo : in aiWriteFifo; |
|
-- To read fifo |
oReadFifo : out aoReadFifo; |
iReadFifo : in aiReadFifo |
); |
end entity; |
|