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URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /sdhc-sc-core/trunk/src/grpStrobesClocks/unitCounter
    from Rev 164 to Rev 165
    Reverse comparison

Rev 164 → Rev 165

/src/Counter-Rtl-a.vhdl
39,29 → 39,31
 
begin
 
Regs : process (iClk, inResetAsync)
Regs : process (iClk)
begin
if (inResetAsync = cnActivated) then
R <= cDefaultReg;
elsif (iClk'event and iClk = cActivated) then
oStrobe <= cInactivated;
if (iClk'event and iClk = cActivated) then
if (iRstSync = cActivated) then
R <= cDefaultReg;
else
oStrobe <= cInactivated;
 
if (iDisable = cActivated) then
R.Enabled <= cInactivated;
R.Counter <= to_unsigned(0, R.Counter'length);
if (iDisable = cActivated) then
R.Enabled <= cInactivated;
R.Counter <= to_unsigned(0, R.Counter'length);
 
elsif (iEnable = cActivated or R.Enabled = cActivated) then
R.Enabled <= cActivated;
elsif (iEnable = cActivated or R.Enabled = cActivated) then
R.Enabled <= cActivated;
 
if (R.Counter = iMax) then
R.Counter <= to_unsigned(0, R.Counter'length);
oStrobe <= cActivated;
R.Enabled <= cInactivated;
if (R.Counter = iMax) then
R.Counter <= to_unsigned(0, R.Counter'length);
oStrobe <= cActivated;
R.Enabled <= cInactivated;
 
else
R.Counter <= R.Counter + 1;
else
R.Counter <= R.Counter + 1;
end if;
 
end if;
 
end if;
end if;
end process Regs;
/src/Counter-e.vhdl
35,7 → 35,7
);
port (
iClk : in std_ulogic;
inResetAsync : in std_ulogic;
iRstSync : in std_ulogic;
iEnable : in std_ulogic;
iDisable : in std_ulogic;
iMax : in unsigned(gBitWidth - 1 downto 0);

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